wm8750.c 29 KB

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  1. /*
  2. * wm8750.c -- WM8750 ALSA SoC audio driver
  3. *
  4. * Copyright 2005 Openedhand Ltd.
  5. *
  6. * Author: Richard Purdie <richard@openedhand.com>
  7. *
  8. * Based on WM8753.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/i2c.h>
  20. #include <linux/platform_device.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/initval.h>
  27. #include "wm8750.h"
  28. #define AUDIO_NAME "WM8750"
  29. #define WM8750_VERSION "0.12"
  30. /*
  31. * Debug
  32. */
  33. #define WM8750_DEBUG 0
  34. #ifdef WM8750_DEBUG
  35. #define dbg(format, arg...) \
  36. printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
  37. #else
  38. #define dbg(format, arg...) do {} while (0)
  39. #endif
  40. #define err(format, arg...) \
  41. printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
  42. #define info(format, arg...) \
  43. printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
  44. #define warn(format, arg...) \
  45. printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
  46. /* codec private data */
  47. struct wm8750_priv {
  48. unsigned int sysclk;
  49. };
  50. /*
  51. * wm8750 register cache
  52. * We can't read the WM8750 register space when we
  53. * are using 2 wire for device control, so we cache them instead.
  54. */
  55. static const u16 wm8750_reg[] = {
  56. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  57. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  58. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  59. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  60. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  61. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  62. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  63. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  64. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  65. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  66. 0x0079, 0x0079, 0x0079, /* 40 */
  67. };
  68. /*
  69. * read wm8750 register cache
  70. */
  71. static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
  72. unsigned int reg)
  73. {
  74. u16 *cache = codec->reg_cache;
  75. if (reg > WM8750_CACHE_REGNUM)
  76. return -1;
  77. return cache[reg];
  78. }
  79. /*
  80. * write wm8750 register cache
  81. */
  82. static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
  83. unsigned int reg, unsigned int value)
  84. {
  85. u16 *cache = codec->reg_cache;
  86. if (reg > WM8750_CACHE_REGNUM)
  87. return;
  88. cache[reg] = value;
  89. }
  90. static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
  91. unsigned int value)
  92. {
  93. u8 data[2];
  94. /* data is
  95. * D15..D9 WM8753 register offset
  96. * D8...D0 register data
  97. */
  98. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  99. data[1] = value & 0x00ff;
  100. wm8750_write_reg_cache (codec, reg, value);
  101. if (codec->hw_write(codec->control_data, data, 2) == 2)
  102. return 0;
  103. else
  104. return -EIO;
  105. }
  106. #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
  107. /*
  108. * WM8750 Controls
  109. */
  110. static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  111. static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  112. static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  113. static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  114. static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  115. static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  116. static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  117. static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  118. "Mute ADC Output"};
  119. static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
  120. "Differential"};
  121. static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
  122. "Differential"};
  123. static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
  124. "ROUT1"};
  125. static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
  126. static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
  127. "L + R Invert"};
  128. static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  129. static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
  130. "Mono (Right)", "Digital Mono"};
  131. static const struct soc_enum wm8750_enum[] = {
  132. SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
  133. SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
  134. SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
  135. SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
  136. SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
  137. SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
  138. SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
  139. SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
  140. SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
  141. SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
  142. SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
  143. SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
  144. SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
  145. SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
  146. SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
  147. SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
  148. SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
  149. };
  150. static const struct snd_kcontrol_new wm8750_snd_controls[] = {
  151. SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
  152. SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
  153. SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
  154. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
  155. WM8750_ROUT1V, 7, 1, 0),
  156. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
  157. WM8750_ROUT2V, 7, 1, 0),
  158. SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
  159. SOC_ENUM("Capture Polarity", wm8750_enum[14]),
  160. SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
  161. SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
  162. SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
  163. SOC_ENUM("Bass Boost", wm8750_enum[0]),
  164. SOC_ENUM("Bass Filter", wm8750_enum[1]),
  165. SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
  166. SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
  167. SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
  168. SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
  169. SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
  170. SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
  171. SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
  172. SOC_ENUM("3D Mode", wm8750_enum[5]),
  173. SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
  174. SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
  175. SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
  176. SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
  177. SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
  178. SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
  179. SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
  180. SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
  181. SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
  182. SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
  183. SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
  184. SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
  185. SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
  186. SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
  187. SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
  188. /* Unimplemented */
  189. /* ADCDAC Bit 0 - ADCHPD */
  190. /* ADCDAC Bit 4 - HPOR */
  191. /* ADCTL1 Bit 2,3 - DATSEL */
  192. /* ADCTL1 Bit 4,5 - DMONOMIX */
  193. /* ADCTL1 Bit 6,7 - VSEL */
  194. /* ADCTL2 Bit 2 - LRCM */
  195. /* ADCTL2 Bit 3 - TRI */
  196. /* ADCTL3 Bit 5 - HPFLREN */
  197. /* ADCTL3 Bit 6 - VROI */
  198. /* ADCTL3 Bit 7,8 - ADCLRM */
  199. /* ADCIN Bit 4 - LDCM */
  200. /* ADCIN Bit 5 - RDCM */
  201. SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
  202. SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
  203. WM8750_LOUTM2, 4, 7, 1),
  204. SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
  205. WM8750_ROUTM2, 4, 7, 1),
  206. SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
  207. WM8750_MOUTM2, 4, 7, 1),
  208. SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
  209. SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
  210. 0, 127, 0),
  211. SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
  212. 0, 127, 0),
  213. SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
  214. };
  215. /* add non dapm controls */
  216. static int wm8750_add_controls(struct snd_soc_codec *codec)
  217. {
  218. int err, i;
  219. for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
  220. err = snd_ctl_add(codec->card,
  221. snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL));
  222. if (err < 0)
  223. return err;
  224. }
  225. return 0;
  226. }
  227. /*
  228. * DAPM Controls
  229. */
  230. /* Left Mixer */
  231. static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
  232. SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
  233. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
  234. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
  235. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
  236. };
  237. /* Right Mixer */
  238. static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
  239. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
  240. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
  241. SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
  242. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
  243. };
  244. /* Mono Mixer */
  245. static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
  246. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
  247. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
  248. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
  249. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
  250. };
  251. /* Left Line Mux */
  252. static const struct snd_kcontrol_new wm8750_left_line_controls =
  253. SOC_DAPM_ENUM("Route", wm8750_enum[8]);
  254. /* Right Line Mux */
  255. static const struct snd_kcontrol_new wm8750_right_line_controls =
  256. SOC_DAPM_ENUM("Route", wm8750_enum[9]);
  257. /* Left PGA Mux */
  258. static const struct snd_kcontrol_new wm8750_left_pga_controls =
  259. SOC_DAPM_ENUM("Route", wm8750_enum[10]);
  260. /* Right PGA Mux */
  261. static const struct snd_kcontrol_new wm8750_right_pga_controls =
  262. SOC_DAPM_ENUM("Route", wm8750_enum[11]);
  263. /* Out 3 Mux */
  264. static const struct snd_kcontrol_new wm8750_out3_controls =
  265. SOC_DAPM_ENUM("Route", wm8750_enum[12]);
  266. /* Differential Mux */
  267. static const struct snd_kcontrol_new wm8750_diffmux_controls =
  268. SOC_DAPM_ENUM("Route", wm8750_enum[13]);
  269. /* Mono ADC Mux */
  270. static const struct snd_kcontrol_new wm8750_monomux_controls =
  271. SOC_DAPM_ENUM("Route", wm8750_enum[16]);
  272. static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
  273. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  274. &wm8750_left_mixer_controls[0],
  275. ARRAY_SIZE(wm8750_left_mixer_controls)),
  276. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  277. &wm8750_right_mixer_controls[0],
  278. ARRAY_SIZE(wm8750_right_mixer_controls)),
  279. SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
  280. &wm8750_mono_mixer_controls[0],
  281. ARRAY_SIZE(wm8750_mono_mixer_controls)),
  282. SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
  283. SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
  284. SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
  285. SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
  286. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
  287. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
  288. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
  289. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
  290. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
  291. SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
  292. &wm8750_left_pga_controls),
  293. SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
  294. &wm8750_right_pga_controls),
  295. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  296. &wm8750_left_line_controls),
  297. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  298. &wm8750_right_line_controls),
  299. SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
  300. SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
  301. SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
  302. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  303. &wm8750_diffmux_controls),
  304. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  305. &wm8750_monomux_controls),
  306. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  307. &wm8750_monomux_controls),
  308. SND_SOC_DAPM_OUTPUT("LOUT1"),
  309. SND_SOC_DAPM_OUTPUT("ROUT1"),
  310. SND_SOC_DAPM_OUTPUT("LOUT2"),
  311. SND_SOC_DAPM_OUTPUT("ROUT2"),
  312. SND_SOC_DAPM_OUTPUT("MONO"),
  313. SND_SOC_DAPM_OUTPUT("OUT3"),
  314. SND_SOC_DAPM_INPUT("LINPUT1"),
  315. SND_SOC_DAPM_INPUT("LINPUT2"),
  316. SND_SOC_DAPM_INPUT("LINPUT3"),
  317. SND_SOC_DAPM_INPUT("RINPUT1"),
  318. SND_SOC_DAPM_INPUT("RINPUT2"),
  319. SND_SOC_DAPM_INPUT("RINPUT3"),
  320. };
  321. static const char *audio_map[][3] = {
  322. /* left mixer */
  323. {"Left Mixer", "Playback Switch", "Left DAC"},
  324. {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
  325. {"Left Mixer", "Right Playback Switch", "Right DAC"},
  326. {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
  327. /* right mixer */
  328. {"Right Mixer", "Left Playback Switch", "Left DAC"},
  329. {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
  330. {"Right Mixer", "Playback Switch", "Right DAC"},
  331. {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
  332. /* left out 1 */
  333. {"Left Out 1", NULL, "Left Mixer"},
  334. {"LOUT1", NULL, "Left Out 1"},
  335. /* left out 2 */
  336. {"Left Out 2", NULL, "Left Mixer"},
  337. {"LOUT2", NULL, "Left Out 2"},
  338. /* right out 1 */
  339. {"Right Out 1", NULL, "Right Mixer"},
  340. {"ROUT1", NULL, "Right Out 1"},
  341. /* right out 2 */
  342. {"Right Out 2", NULL, "Right Mixer"},
  343. {"ROUT2", NULL, "Right Out 2"},
  344. /* mono mixer */
  345. {"Mono Mixer", "Left Playback Switch", "Left DAC"},
  346. {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
  347. {"Mono Mixer", "Right Playback Switch", "Right DAC"},
  348. {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
  349. /* mono out */
  350. {"Mono Out 1", NULL, "Mono Mixer"},
  351. {"MONO1", NULL, "Mono Out 1"},
  352. /* out 3 */
  353. {"Out3 Mux", "VREF", "VREF"},
  354. {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
  355. {"Out3 Mux", "ROUT1", "Right Mixer"},
  356. {"Out3 Mux", "MonoOut", "MONO1"},
  357. {"Out 3", NULL, "Out3 Mux"},
  358. {"OUT3", NULL, "Out 3"},
  359. /* Left Line Mux */
  360. {"Left Line Mux", "Line 1", "LINPUT1"},
  361. {"Left Line Mux", "Line 2", "LINPUT2"},
  362. {"Left Line Mux", "Line 3", "LINPUT3"},
  363. {"Left Line Mux", "PGA", "Left PGA Mux"},
  364. {"Left Line Mux", "Differential", "Differential Mux"},
  365. /* Right Line Mux */
  366. {"Right Line Mux", "Line 1", "RINPUT1"},
  367. {"Right Line Mux", "Line 2", "RINPUT2"},
  368. {"Right Line Mux", "Line 3", "RINPUT3"},
  369. {"Right Line Mux", "PGA", "Right PGA Mux"},
  370. {"Right Line Mux", "Differential", "Differential Mux"},
  371. /* Left PGA Mux */
  372. {"Left PGA Mux", "Line 1", "LINPUT1"},
  373. {"Left PGA Mux", "Line 2", "LINPUT2"},
  374. {"Left PGA Mux", "Line 3", "LINPUT3"},
  375. {"Left PGA Mux", "Differential", "Differential Mux"},
  376. /* Right PGA Mux */
  377. {"Right PGA Mux", "Line 1", "RINPUT1"},
  378. {"Right PGA Mux", "Line 2", "RINPUT2"},
  379. {"Right PGA Mux", "Line 3", "RINPUT3"},
  380. {"Right PGA Mux", "Differential", "Differential Mux"},
  381. /* Differential Mux */
  382. {"Differential Mux", "Line 1", "LINPUT1"},
  383. {"Differential Mux", "Line 1", "RINPUT1"},
  384. {"Differential Mux", "Line 2", "LINPUT2"},
  385. {"Differential Mux", "Line 2", "RINPUT2"},
  386. /* Left ADC Mux */
  387. {"Left ADC Mux", "Stereo", "Left PGA Mux"},
  388. {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
  389. {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
  390. /* Right ADC Mux */
  391. {"Right ADC Mux", "Stereo", "Right PGA Mux"},
  392. {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
  393. {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
  394. /* ADC */
  395. {"Left ADC", NULL, "Left ADC Mux"},
  396. {"Right ADC", NULL, "Right ADC Mux"},
  397. /* terminator */
  398. {NULL, NULL, NULL},
  399. };
  400. static int wm8750_add_widgets(struct snd_soc_codec *codec)
  401. {
  402. int i;
  403. for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) {
  404. snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]);
  405. }
  406. /* set up audio path audio_mapnects */
  407. for(i = 0; audio_map[i][0] != NULL; i++) {
  408. snd_soc_dapm_connect_input(codec, audio_map[i][0],
  409. audio_map[i][1], audio_map[i][2]);
  410. }
  411. snd_soc_dapm_new_widgets(codec);
  412. return 0;
  413. }
  414. struct _coeff_div {
  415. u32 mclk;
  416. u32 rate;
  417. u16 fs;
  418. u8 sr:5;
  419. u8 usb:1;
  420. };
  421. /* codec hifi mclk clock divider coefficients */
  422. static const struct _coeff_div coeff_div[] = {
  423. /* 8k */
  424. {12288000, 8000, 1536, 0x6, 0x0},
  425. {11289600, 8000, 1408, 0x16, 0x0},
  426. {18432000, 8000, 2304, 0x7, 0x0},
  427. {16934400, 8000, 2112, 0x17, 0x0},
  428. {12000000, 8000, 1500, 0x6, 0x1},
  429. /* 11.025k */
  430. {11289600, 11025, 1024, 0x18, 0x0},
  431. {16934400, 11025, 1536, 0x19, 0x0},
  432. {12000000, 11025, 1088, 0x19, 0x1},
  433. /* 16k */
  434. {12288000, 16000, 768, 0xa, 0x0},
  435. {18432000, 16000, 1152, 0xb, 0x0},
  436. {12000000, 16000, 750, 0xa, 0x1},
  437. /* 22.05k */
  438. {11289600, 22050, 512, 0x1a, 0x0},
  439. {16934400, 22050, 768, 0x1b, 0x0},
  440. {12000000, 22050, 544, 0x1b, 0x1},
  441. /* 32k */
  442. {12288000, 32000, 384, 0xc, 0x0},
  443. {18432000, 32000, 576, 0xd, 0x0},
  444. {12000000, 32000, 375, 0xa, 0x1},
  445. /* 44.1k */
  446. {11289600, 44100, 256, 0x10, 0x0},
  447. {16934400, 44100, 384, 0x11, 0x0},
  448. {12000000, 44100, 272, 0x11, 0x1},
  449. /* 48k */
  450. {12288000, 48000, 256, 0x0, 0x0},
  451. {18432000, 48000, 384, 0x1, 0x0},
  452. {12000000, 48000, 250, 0x0, 0x1},
  453. /* 88.2k */
  454. {11289600, 88200, 128, 0x1e, 0x0},
  455. {16934400, 88200, 192, 0x1f, 0x0},
  456. {12000000, 88200, 136, 0x1f, 0x1},
  457. /* 96k */
  458. {12288000, 96000, 128, 0xe, 0x0},
  459. {18432000, 96000, 192, 0xf, 0x0},
  460. {12000000, 96000, 125, 0xe, 0x1},
  461. };
  462. static inline int get_coeff(int mclk, int rate)
  463. {
  464. int i;
  465. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  466. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  467. return i;
  468. }
  469. printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
  470. mclk, rate);
  471. return -EINVAL;
  472. }
  473. static int wm8750_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai,
  474. int clk_id, unsigned int freq, int dir)
  475. {
  476. struct snd_soc_codec *codec = codec_dai->codec;
  477. struct wm8750_priv *wm8750 = codec->private_data;
  478. switch (freq) {
  479. case 11289600:
  480. case 12000000:
  481. case 12288000:
  482. case 16934400:
  483. case 18432000:
  484. wm8750->sysclk = freq;
  485. return 0;
  486. }
  487. return -EINVAL;
  488. }
  489. static int wm8750_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
  490. unsigned int fmt)
  491. {
  492. struct snd_soc_codec *codec = codec_dai->codec;
  493. u16 iface = 0;
  494. /* set master/slave audio interface */
  495. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  496. case SND_SOC_DAIFMT_CBM_CFM:
  497. iface = 0x0040;
  498. break;
  499. case SND_SOC_DAIFMT_CBS_CFS:
  500. break;
  501. default:
  502. return -EINVAL;
  503. }
  504. /* interface format */
  505. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  506. case SND_SOC_DAIFMT_I2S:
  507. iface |= 0x0002;
  508. break;
  509. case SND_SOC_DAIFMT_RIGHT_J:
  510. break;
  511. case SND_SOC_DAIFMT_LEFT_J:
  512. iface |= 0x0001;
  513. break;
  514. case SND_SOC_DAIFMT_DSP_A:
  515. iface |= 0x0003;
  516. break;
  517. case SND_SOC_DAIFMT_DSP_B:
  518. iface |= 0x0013;
  519. break;
  520. default:
  521. return -EINVAL;
  522. }
  523. /* clock inversion */
  524. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  525. case SND_SOC_DAIFMT_NB_NF:
  526. break;
  527. case SND_SOC_DAIFMT_IB_IF:
  528. iface |= 0x0090;
  529. break;
  530. case SND_SOC_DAIFMT_IB_NF:
  531. iface |= 0x0080;
  532. break;
  533. case SND_SOC_DAIFMT_NB_IF:
  534. iface |= 0x0010;
  535. break;
  536. default:
  537. return -EINVAL;
  538. }
  539. wm8750_write(codec, WM8750_IFACE, iface);
  540. return 0;
  541. }
  542. static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
  543. struct snd_pcm_hw_params *params)
  544. {
  545. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  546. struct snd_soc_device *socdev = rtd->socdev;
  547. struct snd_soc_codec *codec = socdev->codec;
  548. struct wm8750_priv *wm8750 = codec->private_data;
  549. u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
  550. u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
  551. int coeff = get_coeff(wm8750->sysclk, params_rate(params));
  552. /* bit size */
  553. switch (params_format(params)) {
  554. case SNDRV_PCM_FORMAT_S16_LE:
  555. break;
  556. case SNDRV_PCM_FORMAT_S20_3LE:
  557. iface |= 0x0004;
  558. break;
  559. case SNDRV_PCM_FORMAT_S24_LE:
  560. iface |= 0x0008;
  561. break;
  562. case SNDRV_PCM_FORMAT_S32_LE:
  563. iface |= 0x000c;
  564. break;
  565. }
  566. /* set iface & srate */
  567. wm8750_write(codec, WM8750_IFACE, iface);
  568. if (coeff >= 0)
  569. wm8750_write(codec, WM8750_SRATE, srate |
  570. (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
  571. return 0;
  572. }
  573. static int wm8750_mute(struct snd_soc_codec_dai *dai, int mute)
  574. {
  575. struct snd_soc_codec *codec = dai->codec;
  576. u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
  577. if (mute)
  578. wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
  579. else
  580. wm8750_write(codec, WM8750_ADCDAC, mute_reg);
  581. return 0;
  582. }
  583. static int wm8750_dapm_event(struct snd_soc_codec *codec, int event)
  584. {
  585. u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
  586. switch (event) {
  587. case SNDRV_CTL_POWER_D0: /* full On */
  588. /* set vmid to 50k and unmute dac */
  589. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
  590. break;
  591. case SNDRV_CTL_POWER_D1: /* partial On */
  592. case SNDRV_CTL_POWER_D2: /* partial On */
  593. /* set vmid to 5k for quick power up */
  594. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
  595. break;
  596. case SNDRV_CTL_POWER_D3hot: /* Off, with power */
  597. /* mute dac and set vmid to 500k, enable VREF */
  598. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
  599. break;
  600. case SNDRV_CTL_POWER_D3cold: /* Off, without power */
  601. wm8750_write(codec, WM8750_PWR1, 0x0001);
  602. break;
  603. }
  604. codec->dapm_state = event;
  605. return 0;
  606. }
  607. #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
  608. SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
  609. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  610. #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  611. SNDRV_PCM_FMTBIT_S24_LE)
  612. struct snd_soc_codec_dai wm8750_dai = {
  613. .name = "WM8750",
  614. .playback = {
  615. .stream_name = "Playback",
  616. .channels_min = 1,
  617. .channels_max = 2,
  618. .rates = WM8750_RATES,
  619. .formats = WM8750_FORMATS,},
  620. .capture = {
  621. .stream_name = "Capture",
  622. .channels_min = 1,
  623. .channels_max = 2,
  624. .rates = WM8750_RATES,
  625. .formats = WM8750_FORMATS,},
  626. .ops = {
  627. .hw_params = wm8750_pcm_hw_params,
  628. },
  629. .dai_ops = {
  630. .digital_mute = wm8750_mute,
  631. .set_fmt = wm8750_set_dai_fmt,
  632. .set_sysclk = wm8750_set_dai_sysclk,
  633. },
  634. };
  635. EXPORT_SYMBOL_GPL(wm8750_dai);
  636. static void wm8750_work(struct work_struct *work)
  637. {
  638. struct snd_soc_codec *codec =
  639. container_of(work, struct snd_soc_codec, delayed_work.work);
  640. wm8750_dapm_event(codec, codec->dapm_state);
  641. }
  642. static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
  643. {
  644. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  645. struct snd_soc_codec *codec = socdev->codec;
  646. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  647. return 0;
  648. }
  649. static int wm8750_resume(struct platform_device *pdev)
  650. {
  651. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  652. struct snd_soc_codec *codec = socdev->codec;
  653. int i;
  654. u8 data[2];
  655. u16 *cache = codec->reg_cache;
  656. /* Sync reg_cache with the hardware */
  657. for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
  658. if (i == WM8750_RESET)
  659. continue;
  660. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  661. data[1] = cache[i] & 0x00ff;
  662. codec->hw_write(codec->control_data, data, 2);
  663. }
  664. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
  665. /* charge wm8750 caps */
  666. if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) {
  667. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  668. codec->dapm_state = SNDRV_CTL_POWER_D0;
  669. schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
  670. }
  671. return 0;
  672. }
  673. /*
  674. * initialise the WM8750 driver
  675. * register the mixer and dsp interfaces with the kernel
  676. */
  677. static int wm8750_init(struct snd_soc_device *socdev)
  678. {
  679. struct snd_soc_codec *codec = socdev->codec;
  680. int reg, ret = 0;
  681. codec->name = "WM8750";
  682. codec->owner = THIS_MODULE;
  683. codec->read = wm8750_read_reg_cache;
  684. codec->write = wm8750_write;
  685. codec->dapm_event = wm8750_dapm_event;
  686. codec->dai = &wm8750_dai;
  687. codec->num_dai = 1;
  688. codec->reg_cache_size = sizeof(wm8750_reg);
  689. codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
  690. if (codec->reg_cache == NULL)
  691. return -ENOMEM;
  692. wm8750_reset(codec);
  693. /* register pcms */
  694. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  695. if (ret < 0) {
  696. printk(KERN_ERR "wm8750: failed to create pcms\n");
  697. goto pcm_err;
  698. }
  699. /* charge output caps */
  700. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  701. codec->dapm_state = SNDRV_CTL_POWER_D3hot;
  702. schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
  703. /* set the update bits */
  704. reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
  705. wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
  706. reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
  707. wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
  708. reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
  709. wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
  710. reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
  711. wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
  712. reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
  713. wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
  714. reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
  715. wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
  716. reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
  717. wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
  718. reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
  719. wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
  720. wm8750_add_controls(codec);
  721. wm8750_add_widgets(codec);
  722. ret = snd_soc_register_card(socdev);
  723. if (ret < 0) {
  724. printk(KERN_ERR "wm8750: failed to register card\n");
  725. goto card_err;
  726. }
  727. return ret;
  728. card_err:
  729. snd_soc_free_pcms(socdev);
  730. snd_soc_dapm_free(socdev);
  731. pcm_err:
  732. kfree(codec->reg_cache);
  733. return ret;
  734. }
  735. /* If the i2c layer weren't so broken, we could pass this kind of data
  736. around */
  737. static struct snd_soc_device *wm8750_socdev;
  738. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  739. /*
  740. * WM8731 2 wire address is determined by GPIO5
  741. * state during powerup.
  742. * low = 0x1a
  743. * high = 0x1b
  744. */
  745. static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
  746. /* Magic definition of all other variables and things */
  747. I2C_CLIENT_INSMOD;
  748. static struct i2c_driver wm8750_i2c_driver;
  749. static struct i2c_client client_template;
  750. static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
  751. {
  752. struct snd_soc_device *socdev = wm8750_socdev;
  753. struct wm8750_setup_data *setup = socdev->codec_data;
  754. struct snd_soc_codec *codec = socdev->codec;
  755. struct i2c_client *i2c;
  756. int ret;
  757. if (addr != setup->i2c_address)
  758. return -ENODEV;
  759. client_template.adapter = adap;
  760. client_template.addr = addr;
  761. i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL);
  762. if (i2c == NULL) {
  763. kfree(codec);
  764. return -ENOMEM;
  765. }
  766. i2c_set_clientdata(i2c, codec);
  767. codec->control_data = i2c;
  768. ret = i2c_attach_client(i2c);
  769. if (ret < 0) {
  770. err("failed to attach codec at addr %x\n", addr);
  771. goto err;
  772. }
  773. ret = wm8750_init(socdev);
  774. if (ret < 0) {
  775. err("failed to initialise WM8750\n");
  776. goto err;
  777. }
  778. return ret;
  779. err:
  780. kfree(codec);
  781. kfree(i2c);
  782. return ret;
  783. }
  784. static int wm8750_i2c_detach(struct i2c_client *client)
  785. {
  786. struct snd_soc_codec *codec = i2c_get_clientdata(client);
  787. i2c_detach_client(client);
  788. kfree(codec->reg_cache);
  789. kfree(client);
  790. return 0;
  791. }
  792. static int wm8750_i2c_attach(struct i2c_adapter *adap)
  793. {
  794. return i2c_probe(adap, &addr_data, wm8750_codec_probe);
  795. }
  796. /* corgi i2c codec control layer */
  797. static struct i2c_driver wm8750_i2c_driver = {
  798. .driver = {
  799. .name = "WM8750 I2C Codec",
  800. .owner = THIS_MODULE,
  801. },
  802. .id = I2C_DRIVERID_WM8750,
  803. .attach_adapter = wm8750_i2c_attach,
  804. .detach_client = wm8750_i2c_detach,
  805. .command = NULL,
  806. };
  807. static struct i2c_client client_template = {
  808. .name = "WM8750",
  809. .driver = &wm8750_i2c_driver,
  810. };
  811. #endif
  812. static int wm8750_probe(struct platform_device *pdev)
  813. {
  814. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  815. struct wm8750_setup_data *setup = socdev->codec_data;
  816. struct snd_soc_codec *codec;
  817. struct wm8750_priv *wm8750;
  818. int ret = 0;
  819. info("WM8750 Audio Codec %s", WM8750_VERSION);
  820. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  821. if (codec == NULL)
  822. return -ENOMEM;
  823. wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
  824. if (wm8750 == NULL) {
  825. kfree(codec);
  826. return -ENOMEM;
  827. }
  828. codec->private_data = wm8750;
  829. socdev->codec = codec;
  830. mutex_init(&codec->mutex);
  831. INIT_LIST_HEAD(&codec->dapm_widgets);
  832. INIT_LIST_HEAD(&codec->dapm_paths);
  833. wm8750_socdev = socdev;
  834. INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
  835. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  836. if (setup->i2c_address) {
  837. normal_i2c[0] = setup->i2c_address;
  838. codec->hw_write = (hw_write_t)i2c_master_send;
  839. ret = i2c_add_driver(&wm8750_i2c_driver);
  840. if (ret != 0)
  841. printk(KERN_ERR "can't add i2c driver");
  842. }
  843. #else
  844. /* Add other interfaces here */
  845. #endif
  846. return ret;
  847. }
  848. /*
  849. * This function forces any delayed work to be queued and run.
  850. */
  851. static int run_delayed_work(struct delayed_work *dwork)
  852. {
  853. int ret;
  854. /* cancel any work waiting to be queued. */
  855. ret = cancel_delayed_work(dwork);
  856. /* if there was any work waiting then we run it now and
  857. * wait for it's completion */
  858. if (ret) {
  859. schedule_delayed_work(dwork, 0);
  860. flush_scheduled_work();
  861. }
  862. return ret;
  863. }
  864. /* power down chip */
  865. static int wm8750_remove(struct platform_device *pdev)
  866. {
  867. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  868. struct snd_soc_codec *codec = socdev->codec;
  869. if (codec->control_data)
  870. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  871. run_delayed_work(&codec->delayed_work);
  872. snd_soc_free_pcms(socdev);
  873. snd_soc_dapm_free(socdev);
  874. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  875. i2c_del_driver(&wm8750_i2c_driver);
  876. #endif
  877. kfree(codec->private_data);
  878. kfree(codec);
  879. return 0;
  880. }
  881. struct snd_soc_codec_device soc_codec_dev_wm8750 = {
  882. .probe = wm8750_probe,
  883. .remove = wm8750_remove,
  884. .suspend = wm8750_suspend,
  885. .resume = wm8750_resume,
  886. };
  887. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
  888. MODULE_DESCRIPTION("ASoC WM8750 driver");
  889. MODULE_AUTHOR("Liam Girdwood");
  890. MODULE_LICENSE("GPL");