hoontech.c 10 KB

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  1. /*
  2. * ALSA driver for ICEnsemble ICE1712 (Envy24)
  3. *
  4. * Lowlevel functions for Hoontech STDSP24
  5. *
  6. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <asm/io.h>
  24. #include <linux/delay.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/init.h>
  27. #include <linux/slab.h>
  28. #include <linux/mutex.h>
  29. #include <sound/core.h>
  30. #include "ice1712.h"
  31. #include "hoontech.h"
  32. /* Hoontech-specific setting */
  33. struct hoontech_spec {
  34. unsigned char boxbits[4];
  35. unsigned int config;
  36. unsigned short boxconfig[4];
  37. };
  38. static void __devinit snd_ice1712_stdsp24_gpio_write(struct snd_ice1712 *ice, unsigned char byte)
  39. {
  40. byte |= ICE1712_STDSP24_CLOCK_BIT;
  41. udelay(100);
  42. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
  43. byte &= ~ICE1712_STDSP24_CLOCK_BIT;
  44. udelay(100);
  45. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
  46. byte |= ICE1712_STDSP24_CLOCK_BIT;
  47. udelay(100);
  48. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, byte);
  49. }
  50. static void __devinit snd_ice1712_stdsp24_darear(struct snd_ice1712 *ice, int activate)
  51. {
  52. struct hoontech_spec *spec = ice->spec;
  53. mutex_lock(&ice->gpio_mutex);
  54. ICE1712_STDSP24_0_DAREAR(spec->boxbits, activate);
  55. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
  56. mutex_unlock(&ice->gpio_mutex);
  57. }
  58. static void __devinit snd_ice1712_stdsp24_mute(struct snd_ice1712 *ice, int activate)
  59. {
  60. struct hoontech_spec *spec = ice->spec;
  61. mutex_lock(&ice->gpio_mutex);
  62. ICE1712_STDSP24_3_MUTE(spec->boxbits, activate);
  63. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
  64. mutex_unlock(&ice->gpio_mutex);
  65. }
  66. static void __devinit snd_ice1712_stdsp24_insel(struct snd_ice1712 *ice, int activate)
  67. {
  68. struct hoontech_spec *spec = ice->spec;
  69. mutex_lock(&ice->gpio_mutex);
  70. ICE1712_STDSP24_3_INSEL(spec->boxbits, activate);
  71. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
  72. mutex_unlock(&ice->gpio_mutex);
  73. }
  74. static void __devinit snd_ice1712_stdsp24_box_channel(struct snd_ice1712 *ice, int box, int chn, int activate)
  75. {
  76. struct hoontech_spec *spec = ice->spec;
  77. mutex_lock(&ice->gpio_mutex);
  78. /* select box */
  79. ICE1712_STDSP24_0_BOX(spec->boxbits, box);
  80. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
  81. /* prepare for write */
  82. if (chn == 3)
  83. ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
  84. ICE1712_STDSP24_2_MIDI1(spec->boxbits, activate);
  85. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  86. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
  87. ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
  88. ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
  89. ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
  90. ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
  91. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
  92. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  93. udelay(100);
  94. if (chn == 3) {
  95. ICE1712_STDSP24_2_CHN4(spec->boxbits, 0);
  96. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  97. } else {
  98. switch (chn) {
  99. case 0: ICE1712_STDSP24_1_CHN1(spec->boxbits, 0); break;
  100. case 1: ICE1712_STDSP24_1_CHN2(spec->boxbits, 0); break;
  101. case 2: ICE1712_STDSP24_1_CHN3(spec->boxbits, 0); break;
  102. }
  103. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
  104. }
  105. udelay(100);
  106. ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
  107. ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
  108. ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
  109. ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
  110. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[1]);
  111. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  112. udelay(100);
  113. ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
  114. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  115. mutex_unlock(&ice->gpio_mutex);
  116. }
  117. static void __devinit snd_ice1712_stdsp24_box_midi(struct snd_ice1712 *ice, int box, int master)
  118. {
  119. struct hoontech_spec *spec = ice->spec;
  120. mutex_lock(&ice->gpio_mutex);
  121. /* select box */
  122. ICE1712_STDSP24_0_BOX(spec->boxbits, box);
  123. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[0]);
  124. ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
  125. ICE1712_STDSP24_2_MIDI1(spec->boxbits, master);
  126. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  127. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
  128. udelay(100);
  129. ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 0);
  130. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  131. mdelay(10);
  132. ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
  133. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[2]);
  134. mutex_unlock(&ice->gpio_mutex);
  135. }
  136. static void __devinit snd_ice1712_stdsp24_midi2(struct snd_ice1712 *ice, int activate)
  137. {
  138. struct hoontech_spec *spec = ice->spec;
  139. mutex_lock(&ice->gpio_mutex);
  140. ICE1712_STDSP24_3_MIDI2(spec->boxbits, activate);
  141. snd_ice1712_stdsp24_gpio_write(ice, spec->boxbits[3]);
  142. mutex_unlock(&ice->gpio_mutex);
  143. }
  144. static int __devinit snd_ice1712_hoontech_init(struct snd_ice1712 *ice)
  145. {
  146. struct hoontech_spec *spec;
  147. int box, chn;
  148. ice->num_total_dacs = 8;
  149. ice->num_total_adcs = 8;
  150. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  151. if (!spec)
  152. return -ENOMEM;
  153. ice->spec = spec;
  154. ICE1712_STDSP24_SET_ADDR(spec->boxbits, 0);
  155. ICE1712_STDSP24_CLOCK(spec->boxbits, 0, 1);
  156. ICE1712_STDSP24_0_BOX(spec->boxbits, 0);
  157. ICE1712_STDSP24_0_DAREAR(spec->boxbits, 0);
  158. ICE1712_STDSP24_SET_ADDR(spec->boxbits, 1);
  159. ICE1712_STDSP24_CLOCK(spec->boxbits, 1, 1);
  160. ICE1712_STDSP24_1_CHN1(spec->boxbits, 1);
  161. ICE1712_STDSP24_1_CHN2(spec->boxbits, 1);
  162. ICE1712_STDSP24_1_CHN3(spec->boxbits, 1);
  163. ICE1712_STDSP24_SET_ADDR(spec->boxbits, 2);
  164. ICE1712_STDSP24_CLOCK(spec->boxbits, 2, 1);
  165. ICE1712_STDSP24_2_CHN4(spec->boxbits, 1);
  166. ICE1712_STDSP24_2_MIDIIN(spec->boxbits, 1);
  167. ICE1712_STDSP24_2_MIDI1(spec->boxbits, 0);
  168. ICE1712_STDSP24_SET_ADDR(spec->boxbits, 3);
  169. ICE1712_STDSP24_CLOCK(spec->boxbits, 3, 1);
  170. ICE1712_STDSP24_3_MIDI2(spec->boxbits, 0);
  171. ICE1712_STDSP24_3_MUTE(spec->boxbits, 1);
  172. ICE1712_STDSP24_3_INSEL(spec->boxbits, 0);
  173. /* let's go - activate only functions in first box */
  174. spec->config = 0;
  175. /* ICE1712_STDSP24_MUTE |
  176. ICE1712_STDSP24_INSEL |
  177. ICE1712_STDSP24_DAREAR; */
  178. spec->boxconfig[0] = ICE1712_STDSP24_BOX_CHN1 |
  179. ICE1712_STDSP24_BOX_CHN2 |
  180. ICE1712_STDSP24_BOX_CHN3 |
  181. ICE1712_STDSP24_BOX_CHN4 |
  182. ICE1712_STDSP24_BOX_MIDI1 |
  183. ICE1712_STDSP24_BOX_MIDI2;
  184. spec->boxconfig[1] =
  185. spec->boxconfig[2] =
  186. spec->boxconfig[3] = 0;
  187. snd_ice1712_stdsp24_darear(ice,
  188. (spec->config & ICE1712_STDSP24_DAREAR) ? 1 : 0);
  189. snd_ice1712_stdsp24_mute(ice,
  190. (spec->config & ICE1712_STDSP24_MUTE) ? 1 : 0);
  191. snd_ice1712_stdsp24_insel(ice,
  192. (spec->config & ICE1712_STDSP24_INSEL) ? 1 : 0);
  193. for (box = 0; box < 1; box++) {
  194. if (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI2)
  195. snd_ice1712_stdsp24_midi2(ice, 1);
  196. for (chn = 0; chn < 4; chn++)
  197. snd_ice1712_stdsp24_box_channel(ice, box, chn,
  198. (spec->boxconfig[box] & (1 << chn)) ? 1 : 0);
  199. snd_ice1712_stdsp24_box_midi(ice, box,
  200. (spec->boxconfig[box] & ICE1712_STDSP24_BOX_MIDI1) ? 1 : 0);
  201. }
  202. return 0;
  203. }
  204. /*
  205. * AK4524 access
  206. */
  207. /* start callback for STDSP24 with modified hardware */
  208. static void stdsp24_ak4524_lock(struct snd_akm4xxx *ak, int chip)
  209. {
  210. struct snd_ice1712 *ice = ak->private_data[0];
  211. unsigned char tmp;
  212. snd_ice1712_save_gpio_status(ice);
  213. tmp = ICE1712_STDSP24_SERIAL_DATA |
  214. ICE1712_STDSP24_SERIAL_CLOCK |
  215. ICE1712_STDSP24_AK4524_CS;
  216. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
  217. ice->gpio.direction | tmp);
  218. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ~tmp);
  219. }
  220. static int __devinit snd_ice1712_value_init(struct snd_ice1712 *ice)
  221. {
  222. /* Hoontech STDSP24 with modified hardware */
  223. static struct snd_akm4xxx akm_stdsp24_mv __devinitdata = {
  224. .num_adcs = 2,
  225. .num_dacs = 2,
  226. .type = SND_AK4524,
  227. .ops = {
  228. .lock = stdsp24_ak4524_lock
  229. }
  230. };
  231. static struct snd_ak4xxx_private akm_stdsp24_mv_priv __devinitdata = {
  232. .caddr = 2,
  233. .cif = 1, /* CIF high */
  234. .data_mask = ICE1712_STDSP24_SERIAL_DATA,
  235. .clk_mask = ICE1712_STDSP24_SERIAL_CLOCK,
  236. .cs_mask = ICE1712_STDSP24_AK4524_CS,
  237. .cs_addr = ICE1712_STDSP24_AK4524_CS,
  238. .cs_none = 0,
  239. .add_flags = 0,
  240. };
  241. int err;
  242. struct snd_akm4xxx *ak;
  243. /* set the analog DACs */
  244. ice->num_total_dacs = 2;
  245. /* set the analog ADCs */
  246. ice->num_total_adcs = 2;
  247. /* analog section */
  248. ak = ice->akm = kmalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  249. if (! ak)
  250. return -ENOMEM;
  251. ice->akm_codecs = 1;
  252. err = snd_ice1712_akm4xxx_init(ak, &akm_stdsp24_mv, &akm_stdsp24_mv_priv, ice);
  253. if (err < 0)
  254. return err;
  255. /* ak4524 controls */
  256. err = snd_ice1712_akm4xxx_build_controls(ice);
  257. if (err < 0)
  258. return err;
  259. return 0;
  260. }
  261. static int __devinit snd_ice1712_ez8_init(struct snd_ice1712 *ice)
  262. {
  263. ice->gpio.write_mask = ice->eeprom.gpiomask;
  264. ice->gpio.direction = ice->eeprom.gpiodir;
  265. snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, ice->eeprom.gpiomask);
  266. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, ice->eeprom.gpiodir);
  267. snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, ice->eeprom.gpiostate);
  268. return 0;
  269. }
  270. /* entry point */
  271. struct snd_ice1712_card_info snd_ice1712_hoontech_cards[] __devinitdata = {
  272. {
  273. .subvendor = ICE1712_SUBDEVICE_STDSP24,
  274. .name = "Hoontech SoundTrack Audio DSP24",
  275. .model = "dsp24",
  276. .chip_init = snd_ice1712_hoontech_init,
  277. },
  278. {
  279. .subvendor = ICE1712_SUBDEVICE_STDSP24_VALUE, /* a dummy id */
  280. .name = "Hoontech SoundTrack Audio DSP24 Value",
  281. .model = "dsp24_value",
  282. .chip_init = snd_ice1712_value_init,
  283. },
  284. {
  285. .subvendor = ICE1712_SUBDEVICE_STDSP24_MEDIA7_1,
  286. .name = "Hoontech STA DSP24 Media 7.1",
  287. .model = "dsp24_71",
  288. .chip_init = snd_ice1712_hoontech_init,
  289. },
  290. {
  291. .subvendor = ICE1712_SUBDEVICE_EVENT_EZ8, /* a dummy id */
  292. .name = "Event Electronics EZ8",
  293. .model = "ez8",
  294. .chip_init = snd_ice1712_ez8_init,
  295. },
  296. { } /* terminator */
  297. };