swiotlb.c 23 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/string.h>
  24. #include <linux/types.h>
  25. #include <linux/ctype.h>
  26. #include <asm/io.h>
  27. #include <asm/dma.h>
  28. #include <asm/scatterlist.h>
  29. #include <linux/init.h>
  30. #include <linux/bootmem.h>
  31. #define OFFSET(val,align) ((unsigned long) \
  32. ( (val) & ( (align) - 1)))
  33. #define SG_ENT_VIRT_ADDRESS(sg) (sg_virt((sg)))
  34. #define SG_ENT_PHYS_ADDRESS(sg) virt_to_bus(SG_ENT_VIRT_ADDRESS(sg))
  35. /*
  36. * Maximum allowable number of contiguous slabs to map,
  37. * must be a power of 2. What is the appropriate value ?
  38. * The complexity of {map,unmap}_single is linearly dependent on this value.
  39. */
  40. #define IO_TLB_SEGSIZE 128
  41. /*
  42. * log of the size of each IO TLB slab. The number of slabs is command line
  43. * controllable.
  44. */
  45. #define IO_TLB_SHIFT 11
  46. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  47. /*
  48. * Minimum IO TLB size to bother booting with. Systems with mainly
  49. * 64bit capable cards will only lightly use the swiotlb. If we can't
  50. * allocate a contiguous 1MB, we're probably in trouble anyway.
  51. */
  52. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  53. /*
  54. * Enumeration for sync targets
  55. */
  56. enum dma_sync_target {
  57. SYNC_FOR_CPU = 0,
  58. SYNC_FOR_DEVICE = 1,
  59. };
  60. int swiotlb_force;
  61. /*
  62. * Used to do a quick range check in swiotlb_unmap_single and
  63. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  64. * API.
  65. */
  66. static char *io_tlb_start, *io_tlb_end;
  67. /*
  68. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  69. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  70. */
  71. static unsigned long io_tlb_nslabs;
  72. /*
  73. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  74. */
  75. static unsigned long io_tlb_overflow = 32*1024;
  76. void *io_tlb_overflow_buffer;
  77. /*
  78. * This is a free list describing the number of free entries available from
  79. * each index
  80. */
  81. static unsigned int *io_tlb_list;
  82. static unsigned int io_tlb_index;
  83. /*
  84. * We need to save away the original address corresponding to a mapped entry
  85. * for the sync operations.
  86. */
  87. static unsigned char **io_tlb_orig_addr;
  88. /*
  89. * Protect the above data structures in the map and unmap calls
  90. */
  91. static DEFINE_SPINLOCK(io_tlb_lock);
  92. static int __init
  93. setup_io_tlb_npages(char *str)
  94. {
  95. if (isdigit(*str)) {
  96. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  97. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  98. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  99. }
  100. if (*str == ',')
  101. ++str;
  102. if (!strcmp(str, "force"))
  103. swiotlb_force = 1;
  104. return 1;
  105. }
  106. __setup("swiotlb=", setup_io_tlb_npages);
  107. /* make io_tlb_overflow tunable too? */
  108. /*
  109. * Statically reserve bounce buffer space and initialize bounce buffer data
  110. * structures for the software IO TLB used to implement the DMA API.
  111. */
  112. void __init
  113. swiotlb_init_with_default_size(size_t default_size)
  114. {
  115. unsigned long i, bytes;
  116. if (!io_tlb_nslabs) {
  117. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  118. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  119. }
  120. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  121. /*
  122. * Get IO TLB memory from the low pages
  123. */
  124. io_tlb_start = alloc_bootmem_low_pages(bytes);
  125. if (!io_tlb_start)
  126. panic("Cannot allocate SWIOTLB buffer");
  127. io_tlb_end = io_tlb_start + bytes;
  128. /*
  129. * Allocate and initialize the free list array. This array is used
  130. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  131. * between io_tlb_start and io_tlb_end.
  132. */
  133. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  134. for (i = 0; i < io_tlb_nslabs; i++)
  135. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  136. io_tlb_index = 0;
  137. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(char *));
  138. /*
  139. * Get the overflow emergency buffer
  140. */
  141. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  142. if (!io_tlb_overflow_buffer)
  143. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  144. printk(KERN_INFO "Placing software IO TLB between 0x%lx - 0x%lx\n",
  145. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  146. }
  147. void __init
  148. swiotlb_init(void)
  149. {
  150. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  151. }
  152. /*
  153. * Systems with larger DMA zones (those that don't support ISA) can
  154. * initialize the swiotlb later using the slab allocator if needed.
  155. * This should be just like above, but with some error catching.
  156. */
  157. int
  158. swiotlb_late_init_with_default_size(size_t default_size)
  159. {
  160. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  161. unsigned int order;
  162. if (!io_tlb_nslabs) {
  163. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  164. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  165. }
  166. /*
  167. * Get IO TLB memory from the low pages
  168. */
  169. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  170. io_tlb_nslabs = SLABS_PER_PAGE << order;
  171. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  172. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  173. io_tlb_start = (char *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  174. order);
  175. if (io_tlb_start)
  176. break;
  177. order--;
  178. }
  179. if (!io_tlb_start)
  180. goto cleanup1;
  181. if (order != get_order(bytes)) {
  182. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  183. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  184. io_tlb_nslabs = SLABS_PER_PAGE << order;
  185. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  186. }
  187. io_tlb_end = io_tlb_start + bytes;
  188. memset(io_tlb_start, 0, bytes);
  189. /*
  190. * Allocate and initialize the free list array. This array is used
  191. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  192. * between io_tlb_start and io_tlb_end.
  193. */
  194. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  195. get_order(io_tlb_nslabs * sizeof(int)));
  196. if (!io_tlb_list)
  197. goto cleanup2;
  198. for (i = 0; i < io_tlb_nslabs; i++)
  199. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  200. io_tlb_index = 0;
  201. io_tlb_orig_addr = (unsigned char **)__get_free_pages(GFP_KERNEL,
  202. get_order(io_tlb_nslabs * sizeof(char *)));
  203. if (!io_tlb_orig_addr)
  204. goto cleanup3;
  205. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(char *));
  206. /*
  207. * Get the overflow emergency buffer
  208. */
  209. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  210. get_order(io_tlb_overflow));
  211. if (!io_tlb_overflow_buffer)
  212. goto cleanup4;
  213. printk(KERN_INFO "Placing %luMB software IO TLB between 0x%lx - "
  214. "0x%lx\n", bytes >> 20,
  215. virt_to_bus(io_tlb_start), virt_to_bus(io_tlb_end));
  216. return 0;
  217. cleanup4:
  218. free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
  219. sizeof(char *)));
  220. io_tlb_orig_addr = NULL;
  221. cleanup3:
  222. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  223. sizeof(int)));
  224. io_tlb_list = NULL;
  225. cleanup2:
  226. io_tlb_end = NULL;
  227. free_pages((unsigned long)io_tlb_start, order);
  228. io_tlb_start = NULL;
  229. cleanup1:
  230. io_tlb_nslabs = req_nslabs;
  231. return -ENOMEM;
  232. }
  233. static int
  234. address_needs_mapping(struct device *hwdev, dma_addr_t addr)
  235. {
  236. dma_addr_t mask = 0xffffffff;
  237. /* If the device has a mask, use it, otherwise default to 32 bits */
  238. if (hwdev && hwdev->dma_mask)
  239. mask = *hwdev->dma_mask;
  240. return (addr & ~mask) != 0;
  241. }
  242. static inline unsigned int is_span_boundary(unsigned int index,
  243. unsigned int nslots,
  244. unsigned long offset_slots,
  245. unsigned long max_slots)
  246. {
  247. unsigned long offset = (offset_slots + index) & (max_slots - 1);
  248. return offset + nslots > max_slots;
  249. }
  250. /*
  251. * Allocates bounce buffer and returns its kernel virtual address.
  252. */
  253. static void *
  254. map_single(struct device *hwdev, char *buffer, size_t size, int dir)
  255. {
  256. unsigned long flags;
  257. char *dma_addr;
  258. unsigned int nslots, stride, index, wrap;
  259. int i;
  260. unsigned long start_dma_addr;
  261. unsigned long mask;
  262. unsigned long offset_slots;
  263. unsigned long max_slots;
  264. mask = dma_get_seg_boundary(hwdev);
  265. start_dma_addr = virt_to_bus(io_tlb_start) & mask;
  266. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  267. max_slots = ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  268. /*
  269. * For mappings greater than a page, we limit the stride (and
  270. * hence alignment) to a page size.
  271. */
  272. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  273. if (size > PAGE_SIZE)
  274. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  275. else
  276. stride = 1;
  277. BUG_ON(!nslots);
  278. /*
  279. * Find suitable number of IO TLB entries size that will fit this
  280. * request and allocate a buffer from that IO TLB pool.
  281. */
  282. spin_lock_irqsave(&io_tlb_lock, flags);
  283. {
  284. index = ALIGN(io_tlb_index, stride);
  285. if (index >= io_tlb_nslabs)
  286. index = 0;
  287. while (is_span_boundary(index, nslots, offset_slots,
  288. max_slots)) {
  289. index += stride;
  290. if (index >= io_tlb_nslabs)
  291. index = 0;
  292. }
  293. wrap = index;
  294. do {
  295. /*
  296. * If we find a slot that indicates we have 'nslots'
  297. * number of contiguous buffers, we allocate the
  298. * buffers from that slot and mark the entries as '0'
  299. * indicating unavailable.
  300. */
  301. if (io_tlb_list[index] >= nslots) {
  302. int count = 0;
  303. for (i = index; i < (int) (index + nslots); i++)
  304. io_tlb_list[i] = 0;
  305. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  306. io_tlb_list[i] = ++count;
  307. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  308. /*
  309. * Update the indices to avoid searching in
  310. * the next round.
  311. */
  312. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  313. ? (index + nslots) : 0);
  314. goto found;
  315. }
  316. do {
  317. index += stride;
  318. if (index >= io_tlb_nslabs)
  319. index = 0;
  320. } while (is_span_boundary(index, nslots, offset_slots,
  321. max_slots));
  322. } while (index != wrap);
  323. spin_unlock_irqrestore(&io_tlb_lock, flags);
  324. return NULL;
  325. }
  326. found:
  327. spin_unlock_irqrestore(&io_tlb_lock, flags);
  328. /*
  329. * Save away the mapping from the original address to the DMA address.
  330. * This is needed when we sync the memory. Then we sync the buffer if
  331. * needed.
  332. */
  333. for (i = 0; i < nslots; i++)
  334. io_tlb_orig_addr[index+i] = buffer + (i << IO_TLB_SHIFT);
  335. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  336. memcpy(dma_addr, buffer, size);
  337. return dma_addr;
  338. }
  339. /*
  340. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  341. */
  342. static void
  343. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  344. {
  345. unsigned long flags;
  346. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  347. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  348. char *buffer = io_tlb_orig_addr[index];
  349. /*
  350. * First, sync the memory before unmapping the entry
  351. */
  352. if (buffer && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  353. /*
  354. * bounce... copy the data back into the original buffer * and
  355. * delete the bounce buffer.
  356. */
  357. memcpy(buffer, dma_addr, size);
  358. /*
  359. * Return the buffer to the free list by setting the corresponding
  360. * entries to indicate the number of contigous entries available.
  361. * While returning the entries to the free list, we merge the entries
  362. * with slots below and above the pool being returned.
  363. */
  364. spin_lock_irqsave(&io_tlb_lock, flags);
  365. {
  366. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  367. io_tlb_list[index + nslots] : 0);
  368. /*
  369. * Step 1: return the slots to the free list, merging the
  370. * slots with superceeding slots
  371. */
  372. for (i = index + nslots - 1; i >= index; i--)
  373. io_tlb_list[i] = ++count;
  374. /*
  375. * Step 2: merge the returned slots with the preceding slots,
  376. * if available (non zero)
  377. */
  378. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  379. io_tlb_list[i] = ++count;
  380. }
  381. spin_unlock_irqrestore(&io_tlb_lock, flags);
  382. }
  383. static void
  384. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  385. int dir, int target)
  386. {
  387. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  388. char *buffer = io_tlb_orig_addr[index];
  389. buffer += ((unsigned long)dma_addr & ((1 << IO_TLB_SHIFT) - 1));
  390. switch (target) {
  391. case SYNC_FOR_CPU:
  392. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  393. memcpy(buffer, dma_addr, size);
  394. else
  395. BUG_ON(dir != DMA_TO_DEVICE);
  396. break;
  397. case SYNC_FOR_DEVICE:
  398. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  399. memcpy(dma_addr, buffer, size);
  400. else
  401. BUG_ON(dir != DMA_FROM_DEVICE);
  402. break;
  403. default:
  404. BUG();
  405. }
  406. }
  407. void *
  408. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  409. dma_addr_t *dma_handle, gfp_t flags)
  410. {
  411. dma_addr_t dev_addr;
  412. void *ret;
  413. int order = get_order(size);
  414. /*
  415. * XXX fix me: the DMA API should pass us an explicit DMA mask
  416. * instead, or use ZONE_DMA32 (ia64 overloads ZONE_DMA to be a ~32
  417. * bit range instead of a 16MB one).
  418. */
  419. flags |= GFP_DMA;
  420. ret = (void *)__get_free_pages(flags, order);
  421. if (ret && address_needs_mapping(hwdev, virt_to_bus(ret))) {
  422. /*
  423. * The allocated memory isn't reachable by the device.
  424. * Fall back on swiotlb_map_single().
  425. */
  426. free_pages((unsigned long) ret, order);
  427. ret = NULL;
  428. }
  429. if (!ret) {
  430. /*
  431. * We are either out of memory or the device can't DMA
  432. * to GFP_DMA memory; fall back on
  433. * swiotlb_map_single(), which will grab memory from
  434. * the lowest available address range.
  435. */
  436. dma_addr_t handle;
  437. handle = swiotlb_map_single(NULL, NULL, size, DMA_FROM_DEVICE);
  438. if (swiotlb_dma_mapping_error(handle))
  439. return NULL;
  440. ret = bus_to_virt(handle);
  441. }
  442. memset(ret, 0, size);
  443. dev_addr = virt_to_bus(ret);
  444. /* Confirm address can be DMA'd by device */
  445. if (address_needs_mapping(hwdev, dev_addr)) {
  446. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  447. (unsigned long long)*hwdev->dma_mask,
  448. (unsigned long long)dev_addr);
  449. panic("swiotlb_alloc_coherent: allocated memory is out of "
  450. "range for device");
  451. }
  452. *dma_handle = dev_addr;
  453. return ret;
  454. }
  455. void
  456. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  457. dma_addr_t dma_handle)
  458. {
  459. WARN_ON(irqs_disabled());
  460. if (!(vaddr >= (void *)io_tlb_start
  461. && vaddr < (void *)io_tlb_end))
  462. free_pages((unsigned long) vaddr, get_order(size));
  463. else
  464. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  465. swiotlb_unmap_single (hwdev, dma_handle, size, DMA_TO_DEVICE);
  466. }
  467. static void
  468. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  469. {
  470. /*
  471. * Ran out of IOMMU space for this operation. This is very bad.
  472. * Unfortunately the drivers cannot handle this operation properly.
  473. * unless they check for dma_mapping_error (most don't)
  474. * When the mapping is small enough return a static buffer to limit
  475. * the damage, or panic when the transfer is too big.
  476. */
  477. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  478. "device %s\n", size, dev ? dev->bus_id : "?");
  479. if (size > io_tlb_overflow && do_panic) {
  480. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  481. panic("DMA: Memory would be corrupted\n");
  482. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  483. panic("DMA: Random memory would be DMAed\n");
  484. }
  485. }
  486. /*
  487. * Map a single buffer of the indicated size for DMA in streaming mode. The
  488. * physical address to use is returned.
  489. *
  490. * Once the device is given the dma address, the device owns this memory until
  491. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  492. */
  493. dma_addr_t
  494. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  495. {
  496. dma_addr_t dev_addr = virt_to_bus(ptr);
  497. void *map;
  498. BUG_ON(dir == DMA_NONE);
  499. /*
  500. * If the pointer passed in happens to be in the device's DMA window,
  501. * we can safely return the device addr and not worry about bounce
  502. * buffering it.
  503. */
  504. if (!address_needs_mapping(hwdev, dev_addr) && !swiotlb_force)
  505. return dev_addr;
  506. /*
  507. * Oh well, have to allocate and map a bounce buffer.
  508. */
  509. map = map_single(hwdev, ptr, size, dir);
  510. if (!map) {
  511. swiotlb_full(hwdev, size, dir, 1);
  512. map = io_tlb_overflow_buffer;
  513. }
  514. dev_addr = virt_to_bus(map);
  515. /*
  516. * Ensure that the address returned is DMA'ble
  517. */
  518. if (address_needs_mapping(hwdev, dev_addr))
  519. panic("map_single: bounce buffer is not DMA'ble");
  520. return dev_addr;
  521. }
  522. /*
  523. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  524. * match what was provided for in a previous swiotlb_map_single call. All
  525. * other usages are undefined.
  526. *
  527. * After this call, reads by the cpu to the buffer are guaranteed to see
  528. * whatever the device wrote there.
  529. */
  530. void
  531. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  532. int dir)
  533. {
  534. char *dma_addr = bus_to_virt(dev_addr);
  535. BUG_ON(dir == DMA_NONE);
  536. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  537. unmap_single(hwdev, dma_addr, size, dir);
  538. else if (dir == DMA_FROM_DEVICE)
  539. dma_mark_clean(dma_addr, size);
  540. }
  541. /*
  542. * Make physical memory consistent for a single streaming mode DMA translation
  543. * after a transfer.
  544. *
  545. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  546. * using the cpu, yet do not wish to teardown the dma mapping, you must
  547. * call this function before doing so. At the next point you give the dma
  548. * address back to the card, you must first perform a
  549. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  550. */
  551. static void
  552. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  553. size_t size, int dir, int target)
  554. {
  555. char *dma_addr = bus_to_virt(dev_addr);
  556. BUG_ON(dir == DMA_NONE);
  557. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  558. sync_single(hwdev, dma_addr, size, dir, target);
  559. else if (dir == DMA_FROM_DEVICE)
  560. dma_mark_clean(dma_addr, size);
  561. }
  562. void
  563. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  564. size_t size, int dir)
  565. {
  566. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  567. }
  568. void
  569. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  570. size_t size, int dir)
  571. {
  572. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  573. }
  574. /*
  575. * Same as above, but for a sub-range of the mapping.
  576. */
  577. static void
  578. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  579. unsigned long offset, size_t size,
  580. int dir, int target)
  581. {
  582. char *dma_addr = bus_to_virt(dev_addr) + offset;
  583. BUG_ON(dir == DMA_NONE);
  584. if (dma_addr >= io_tlb_start && dma_addr < io_tlb_end)
  585. sync_single(hwdev, dma_addr, size, dir, target);
  586. else if (dir == DMA_FROM_DEVICE)
  587. dma_mark_clean(dma_addr, size);
  588. }
  589. void
  590. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  591. unsigned long offset, size_t size, int dir)
  592. {
  593. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  594. SYNC_FOR_CPU);
  595. }
  596. void
  597. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  598. unsigned long offset, size_t size, int dir)
  599. {
  600. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  601. SYNC_FOR_DEVICE);
  602. }
  603. /*
  604. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  605. * This is the scatter-gather version of the above swiotlb_map_single
  606. * interface. Here the scatter gather list elements are each tagged with the
  607. * appropriate dma address and length. They are obtained via
  608. * sg_dma_{address,length}(SG).
  609. *
  610. * NOTE: An implementation may be able to use a smaller number of
  611. * DMA address/length pairs than there are SG table elements.
  612. * (for example via virtual mapping capabilities)
  613. * The routine returns the number of addr/length pairs actually
  614. * used, at most nents.
  615. *
  616. * Device ownership issues as mentioned above for swiotlb_map_single are the
  617. * same here.
  618. */
  619. int
  620. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  621. int dir)
  622. {
  623. struct scatterlist *sg;
  624. void *addr;
  625. dma_addr_t dev_addr;
  626. int i;
  627. BUG_ON(dir == DMA_NONE);
  628. for_each_sg(sgl, sg, nelems, i) {
  629. addr = SG_ENT_VIRT_ADDRESS(sg);
  630. dev_addr = virt_to_bus(addr);
  631. if (swiotlb_force || address_needs_mapping(hwdev, dev_addr)) {
  632. void *map = map_single(hwdev, addr, sg->length, dir);
  633. if (!map) {
  634. /* Don't panic here, we expect map_sg users
  635. to do proper error handling. */
  636. swiotlb_full(hwdev, sg->length, dir, 0);
  637. swiotlb_unmap_sg(hwdev, sgl, i, dir);
  638. sgl[0].dma_length = 0;
  639. return 0;
  640. }
  641. sg->dma_address = virt_to_bus(map);
  642. } else
  643. sg->dma_address = dev_addr;
  644. sg->dma_length = sg->length;
  645. }
  646. return nelems;
  647. }
  648. /*
  649. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  650. * concerning calls here are the same as for swiotlb_unmap_single() above.
  651. */
  652. void
  653. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  654. int dir)
  655. {
  656. struct scatterlist *sg;
  657. int i;
  658. BUG_ON(dir == DMA_NONE);
  659. for_each_sg(sgl, sg, nelems, i) {
  660. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  661. unmap_single(hwdev, bus_to_virt(sg->dma_address),
  662. sg->dma_length, dir);
  663. else if (dir == DMA_FROM_DEVICE)
  664. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  665. }
  666. }
  667. /*
  668. * Make physical memory consistent for a set of streaming mode DMA translations
  669. * after a transfer.
  670. *
  671. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  672. * and usage.
  673. */
  674. static void
  675. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  676. int nelems, int dir, int target)
  677. {
  678. struct scatterlist *sg;
  679. int i;
  680. BUG_ON(dir == DMA_NONE);
  681. for_each_sg(sgl, sg, nelems, i) {
  682. if (sg->dma_address != SG_ENT_PHYS_ADDRESS(sg))
  683. sync_single(hwdev, bus_to_virt(sg->dma_address),
  684. sg->dma_length, dir, target);
  685. else if (dir == DMA_FROM_DEVICE)
  686. dma_mark_clean(SG_ENT_VIRT_ADDRESS(sg), sg->dma_length);
  687. }
  688. }
  689. void
  690. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  691. int nelems, int dir)
  692. {
  693. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  694. }
  695. void
  696. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  697. int nelems, int dir)
  698. {
  699. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  700. }
  701. int
  702. swiotlb_dma_mapping_error(dma_addr_t dma_addr)
  703. {
  704. return (dma_addr == virt_to_bus(io_tlb_overflow_buffer));
  705. }
  706. /*
  707. * Return whether the given device DMA address mask can be supported
  708. * properly. For example, if your device can only drive the low 24-bits
  709. * during bus mastering, then you would pass 0x00ffffff as the mask to
  710. * this function.
  711. */
  712. int
  713. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  714. {
  715. return virt_to_bus(io_tlb_end - 1) <= mask;
  716. }
  717. EXPORT_SYMBOL(swiotlb_map_single);
  718. EXPORT_SYMBOL(swiotlb_unmap_single);
  719. EXPORT_SYMBOL(swiotlb_map_sg);
  720. EXPORT_SYMBOL(swiotlb_unmap_sg);
  721. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  722. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  723. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  724. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  725. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  726. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  727. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  728. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  729. EXPORT_SYMBOL(swiotlb_free_coherent);
  730. EXPORT_SYMBOL(swiotlb_dma_supported);