io_32.h 9.1 KB

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  1. #ifndef _ASM_IO_H
  2. #define _ASM_IO_H
  3. #include <linux/string.h>
  4. #include <linux/compiler.h>
  5. /*
  6. * This file contains the definitions for the x86 IO instructions
  7. * inb/inw/inl/outb/outw/outl and the "string versions" of the same
  8. * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing"
  9. * versions of the single-IO instructions (inb_p/inw_p/..).
  10. *
  11. * This file is not meant to be obfuscating: it's just complicated
  12. * to (a) handle it all in a way that makes gcc able to optimize it
  13. * as well as possible and (b) trying to avoid writing the same thing
  14. * over and over again with slight variations and possibly making a
  15. * mistake somewhere.
  16. */
  17. /*
  18. * Thanks to James van Artsdalen for a better timing-fix than
  19. * the two short jumps: using outb's to a nonexistent port seems
  20. * to guarantee better timings even on fast machines.
  21. *
  22. * On the other hand, I'd like to be sure of a non-existent port:
  23. * I feel a bit unsafe about using 0x80 (should be safe, though)
  24. *
  25. * Linus
  26. */
  27. /*
  28. * Bit simplified and optimized by Jan Hubicka
  29. * Support of BIGMEM added by Gerhard Wichert, Siemens AG, July 1999.
  30. *
  31. * isa_memset_io, isa_memcpy_fromio, isa_memcpy_toio added,
  32. * isa_read[wl] and isa_write[wl] fixed
  33. * - Arnaldo Carvalho de Melo <acme@conectiva.com.br>
  34. */
  35. #define IO_SPACE_LIMIT 0xffff
  36. #define XQUAD_PORTIO_BASE 0xfe400000
  37. #define XQUAD_PORTIO_QUAD 0x40000 /* 256k per quad. */
  38. #ifdef __KERNEL__
  39. #include <asm-generic/iomap.h>
  40. #include <linux/vmalloc.h>
  41. /*
  42. * Convert a physical pointer to a virtual kernel pointer for /dev/mem
  43. * access
  44. */
  45. #define xlate_dev_mem_ptr(p) __va(p)
  46. /*
  47. * Convert a virtual cached pointer to an uncached pointer
  48. */
  49. #define xlate_dev_kmem_ptr(p) p
  50. /**
  51. * virt_to_phys - map virtual addresses to physical
  52. * @address: address to remap
  53. *
  54. * The returned physical address is the physical (CPU) mapping for
  55. * the memory address given. It is only valid to use this function on
  56. * addresses directly mapped or allocated via kmalloc.
  57. *
  58. * This function does not give bus mappings for DMA transfers. In
  59. * almost all conceivable cases a device driver should not be using
  60. * this function
  61. */
  62. static inline unsigned long virt_to_phys(volatile void * address)
  63. {
  64. return __pa(address);
  65. }
  66. /**
  67. * phys_to_virt - map physical address to virtual
  68. * @address: address to remap
  69. *
  70. * The returned virtual address is a current CPU mapping for
  71. * the memory address given. It is only valid to use this function on
  72. * addresses that have a kernel mapping
  73. *
  74. * This function does not handle bus mappings for DMA transfers. In
  75. * almost all conceivable cases a device driver should not be using
  76. * this function
  77. */
  78. static inline void * phys_to_virt(unsigned long address)
  79. {
  80. return __va(address);
  81. }
  82. /*
  83. * Change "struct page" to physical address.
  84. */
  85. #define page_to_phys(page) ((dma_addr_t)page_to_pfn(page) << PAGE_SHIFT)
  86. /**
  87. * ioremap - map bus memory into CPU space
  88. * @offset: bus address of the memory
  89. * @size: size of the resource to map
  90. *
  91. * ioremap performs a platform specific sequence of operations to
  92. * make bus memory CPU accessible via the readb/readw/readl/writeb/
  93. * writew/writel functions and the other mmio helpers. The returned
  94. * address is not guaranteed to be usable directly as a virtual
  95. * address.
  96. *
  97. * If the area you are trying to map is a PCI BAR you should have a
  98. * look at pci_iomap().
  99. */
  100. extern void __iomem *ioremap_nocache(unsigned long offset, unsigned long size);
  101. extern void __iomem *ioremap_cache(unsigned long offset, unsigned long size);
  102. /*
  103. * The default ioremap() behavior is non-cached:
  104. */
  105. static inline void __iomem *ioremap(unsigned long offset, unsigned long size)
  106. {
  107. return ioremap_nocache(offset, size);
  108. }
  109. extern void iounmap(volatile void __iomem *addr);
  110. /*
  111. * early_ioremap() and early_iounmap() are for temporary early boot-time
  112. * mappings, before the real ioremap() is functional.
  113. * A boot-time mapping is currently limited to at most 16 pages.
  114. */
  115. extern void early_ioremap_init(void);
  116. extern void early_ioremap_clear(void);
  117. extern void early_ioremap_reset(void);
  118. extern void *early_ioremap(unsigned long offset, unsigned long size);
  119. extern void early_iounmap(void *addr, unsigned long size);
  120. extern void __iomem *fix_ioremap(unsigned idx, unsigned long phys);
  121. /* Use early IO mappings for DMI because it's initialized early */
  122. #define dmi_ioremap early_ioremap
  123. #define dmi_iounmap early_iounmap
  124. #define dmi_alloc alloc_bootmem
  125. /*
  126. * ISA I/O bus memory addresses are 1:1 with the physical address.
  127. */
  128. #define isa_virt_to_bus virt_to_phys
  129. #define isa_page_to_bus page_to_phys
  130. #define isa_bus_to_virt phys_to_virt
  131. /*
  132. * However PCI ones are not necessarily 1:1 and therefore these interfaces
  133. * are forbidden in portable PCI drivers.
  134. *
  135. * Allow them on x86 for legacy drivers, though.
  136. */
  137. #define virt_to_bus virt_to_phys
  138. #define bus_to_virt phys_to_virt
  139. /*
  140. * readX/writeX() are used to access memory mapped devices. On some
  141. * architectures the memory mapped IO stuff needs to be accessed
  142. * differently. On the x86 architecture, we just read/write the
  143. * memory location directly.
  144. */
  145. static inline unsigned char readb(const volatile void __iomem *addr)
  146. {
  147. return *(volatile unsigned char __force *) addr;
  148. }
  149. static inline unsigned short readw(const volatile void __iomem *addr)
  150. {
  151. return *(volatile unsigned short __force *) addr;
  152. }
  153. static inline unsigned int readl(const volatile void __iomem *addr)
  154. {
  155. return *(volatile unsigned int __force *) addr;
  156. }
  157. #define readb_relaxed(addr) readb(addr)
  158. #define readw_relaxed(addr) readw(addr)
  159. #define readl_relaxed(addr) readl(addr)
  160. #define __raw_readb readb
  161. #define __raw_readw readw
  162. #define __raw_readl readl
  163. static inline void writeb(unsigned char b, volatile void __iomem *addr)
  164. {
  165. *(volatile unsigned char __force *) addr = b;
  166. }
  167. static inline void writew(unsigned short b, volatile void __iomem *addr)
  168. {
  169. *(volatile unsigned short __force *) addr = b;
  170. }
  171. static inline void writel(unsigned int b, volatile void __iomem *addr)
  172. {
  173. *(volatile unsigned int __force *) addr = b;
  174. }
  175. #define __raw_writeb writeb
  176. #define __raw_writew writew
  177. #define __raw_writel writel
  178. #define mmiowb()
  179. static inline void
  180. memset_io(volatile void __iomem *addr, unsigned char val, int count)
  181. {
  182. memset((void __force *)addr, val, count);
  183. }
  184. static inline void
  185. memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
  186. {
  187. __memcpy(dst, (const void __force *)src, count);
  188. }
  189. static inline void
  190. memcpy_toio(volatile void __iomem *dst, const void *src, int count)
  191. {
  192. __memcpy((void __force *)dst, src, count);
  193. }
  194. /*
  195. * ISA space is 'always mapped' on a typical x86 system, no need to
  196. * explicitly ioremap() it. The fact that the ISA IO space is mapped
  197. * to PAGE_OFFSET is pure coincidence - it does not mean ISA values
  198. * are physical addresses. The following constant pointer can be
  199. * used as the IO-area pointer (it can be iounmapped as well, so the
  200. * analogy with PCI is quite large):
  201. */
  202. #define __ISA_IO_base ((char __iomem *)(PAGE_OFFSET))
  203. /*
  204. * Cache management
  205. *
  206. * This needed for two cases
  207. * 1. Out of order aware processors
  208. * 2. Accidentally out of order processors (PPro errata #51)
  209. */
  210. #if defined(CONFIG_X86_OOSTORE) || defined(CONFIG_X86_PPRO_FENCE)
  211. static inline void flush_write_buffers(void)
  212. {
  213. __asm__ __volatile__ ("lock; addl $0,0(%%esp)": : :"memory");
  214. }
  215. #else
  216. #define flush_write_buffers() do { } while (0)
  217. #endif
  218. #endif /* __KERNEL__ */
  219. extern void native_io_delay(void);
  220. extern int io_delay_type;
  221. extern void io_delay_init(void);
  222. #if defined(CONFIG_PARAVIRT)
  223. #include <asm/paravirt.h>
  224. #else
  225. static inline void slow_down_io(void) {
  226. native_io_delay();
  227. #ifdef REALLY_SLOW_IO
  228. native_io_delay();
  229. native_io_delay();
  230. native_io_delay();
  231. #endif
  232. }
  233. #endif
  234. #define __BUILDIO(bwl,bw,type) \
  235. static inline void out##bwl(unsigned type value, int port) { \
  236. out##bwl##_local(value, port); \
  237. } \
  238. static inline unsigned type in##bwl(int port) { \
  239. return in##bwl##_local(port); \
  240. }
  241. #define BUILDIO(bwl,bw,type) \
  242. static inline void out##bwl##_local(unsigned type value, int port) { \
  243. __asm__ __volatile__("out" #bwl " %" #bw "0, %w1" : : "a"(value), "Nd"(port)); \
  244. } \
  245. static inline unsigned type in##bwl##_local(int port) { \
  246. unsigned type value; \
  247. __asm__ __volatile__("in" #bwl " %w1, %" #bw "0" : "=a"(value) : "Nd"(port)); \
  248. return value; \
  249. } \
  250. static inline void out##bwl##_local_p(unsigned type value, int port) { \
  251. out##bwl##_local(value, port); \
  252. slow_down_io(); \
  253. } \
  254. static inline unsigned type in##bwl##_local_p(int port) { \
  255. unsigned type value = in##bwl##_local(port); \
  256. slow_down_io(); \
  257. return value; \
  258. } \
  259. __BUILDIO(bwl,bw,type) \
  260. static inline void out##bwl##_p(unsigned type value, int port) { \
  261. out##bwl(value, port); \
  262. slow_down_io(); \
  263. } \
  264. static inline unsigned type in##bwl##_p(int port) { \
  265. unsigned type value = in##bwl(port); \
  266. slow_down_io(); \
  267. return value; \
  268. } \
  269. static inline void outs##bwl(int port, const void *addr, unsigned long count) { \
  270. __asm__ __volatile__("rep; outs" #bwl : "+S"(addr), "+c"(count) : "d"(port)); \
  271. } \
  272. static inline void ins##bwl(int port, void *addr, unsigned long count) { \
  273. __asm__ __volatile__("rep; ins" #bwl : "+D"(addr), "+c"(count) : "d"(port)); \
  274. }
  275. BUILDIO(b,b,char)
  276. BUILDIO(w,w,short)
  277. BUILDIO(l,,int)
  278. #endif