platform.h 13 KB

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  1. /*
  2. * linux/include/asm-arm/arch-realview/platform.h
  3. *
  4. * Copyright (c) ARM Limited 2003. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #ifndef __ASM_ARCH_PLATFORM_H
  21. #define __ASM_ARCH_PLATFORM_H
  22. /*
  23. * Memory definitions
  24. */
  25. #define REALVIEW_BOOT_ROM_LO 0x30000000 /* DoC Base (64Mb)...*/
  26. #define REALVIEW_BOOT_ROM_HI 0x30000000
  27. #define REALVIEW_BOOT_ROM_BASE REALVIEW_BOOT_ROM_HI /* Normal position */
  28. #define REALVIEW_BOOT_ROM_SIZE SZ_64M
  29. #define REALVIEW_SSRAM_BASE /* REALVIEW_SSMC_BASE ? */
  30. #define REALVIEW_SSRAM_SIZE SZ_2M
  31. #define REALVIEW_FLASH_BASE 0x40000000
  32. #define REALVIEW_FLASH_SIZE SZ_64M
  33. /*
  34. * SDRAM
  35. */
  36. #define REALVIEW_SDRAM_BASE 0x00000000
  37. /*
  38. * Logic expansion modules
  39. *
  40. */
  41. /* ------------------------------------------------------------------------
  42. * RealView Registers
  43. * ------------------------------------------------------------------------
  44. *
  45. */
  46. #define REALVIEW_SYS_ID_OFFSET 0x00
  47. #define REALVIEW_SYS_SW_OFFSET 0x04
  48. #define REALVIEW_SYS_LED_OFFSET 0x08
  49. #define REALVIEW_SYS_OSC0_OFFSET 0x0C
  50. #define REALVIEW_SYS_OSC1_OFFSET 0x10
  51. #define REALVIEW_SYS_OSC2_OFFSET 0x14
  52. #define REALVIEW_SYS_OSC3_OFFSET 0x18
  53. #define REALVIEW_SYS_OSC4_OFFSET 0x1C /* OSC1 for RealView/AB */
  54. #define REALVIEW_SYS_LOCK_OFFSET 0x20
  55. #define REALVIEW_SYS_100HZ_OFFSET 0x24
  56. #define REALVIEW_SYS_CFGDATA1_OFFSET 0x28
  57. #define REALVIEW_SYS_CFGDATA2_OFFSET 0x2C
  58. #define REALVIEW_SYS_FLAGS_OFFSET 0x30
  59. #define REALVIEW_SYS_FLAGSSET_OFFSET 0x30
  60. #define REALVIEW_SYS_FLAGSCLR_OFFSET 0x34
  61. #define REALVIEW_SYS_NVFLAGS_OFFSET 0x38
  62. #define REALVIEW_SYS_NVFLAGSSET_OFFSET 0x38
  63. #define REALVIEW_SYS_NVFLAGSCLR_OFFSET 0x3C
  64. #define REALVIEW_SYS_RESETCTL_OFFSET 0x40
  65. #define REALVIEW_SYS_PCICTL_OFFSET 0x44
  66. #define REALVIEW_SYS_MCI_OFFSET 0x48
  67. #define REALVIEW_SYS_FLASH_OFFSET 0x4C
  68. #define REALVIEW_SYS_CLCD_OFFSET 0x50
  69. #define REALVIEW_SYS_CLCDSER_OFFSET 0x54
  70. #define REALVIEW_SYS_BOOTCS_OFFSET 0x58
  71. #define REALVIEW_SYS_24MHz_OFFSET 0x5C
  72. #define REALVIEW_SYS_MISC_OFFSET 0x60
  73. #define REALVIEW_SYS_IOSEL_OFFSET 0x70
  74. #define REALVIEW_SYS_PROCID_OFFSET 0x84
  75. #define REALVIEW_SYS_TEST_OSC0_OFFSET 0xC0
  76. #define REALVIEW_SYS_TEST_OSC1_OFFSET 0xC4
  77. #define REALVIEW_SYS_TEST_OSC2_OFFSET 0xC8
  78. #define REALVIEW_SYS_TEST_OSC3_OFFSET 0xCC
  79. #define REALVIEW_SYS_TEST_OSC4_OFFSET 0xD0
  80. #define REALVIEW_SYS_BASE 0x10000000
  81. #define REALVIEW_SYS_ID (REALVIEW_SYS_BASE + REALVIEW_SYS_ID_OFFSET)
  82. #define REALVIEW_SYS_SW (REALVIEW_SYS_BASE + REALVIEW_SYS_SW_OFFSET)
  83. #define REALVIEW_SYS_LED (REALVIEW_SYS_BASE + REALVIEW_SYS_LED_OFFSET)
  84. #define REALVIEW_SYS_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC0_OFFSET)
  85. #define REALVIEW_SYS_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_OSC1_OFFSET)
  86. #define REALVIEW_SYS_LOCK (REALVIEW_SYS_BASE + REALVIEW_SYS_LOCK_OFFSET)
  87. #define REALVIEW_SYS_100HZ (REALVIEW_SYS_BASE + REALVIEW_SYS_100HZ_OFFSET)
  88. #define REALVIEW_SYS_CFGDATA1 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA1_OFFSET)
  89. #define REALVIEW_SYS_CFGDATA2 (REALVIEW_SYS_BASE + REALVIEW_SYS_CFGDATA2_OFFSET)
  90. #define REALVIEW_SYS_FLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGS_OFFSET)
  91. #define REALVIEW_SYS_FLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSSET_OFFSET)
  92. #define REALVIEW_SYS_FLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_FLAGSCLR_OFFSET)
  93. #define REALVIEW_SYS_NVFLAGS (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGS_OFFSET)
  94. #define REALVIEW_SYS_NVFLAGSSET (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSSET_OFFSET)
  95. #define REALVIEW_SYS_NVFLAGSCLR (REALVIEW_SYS_BASE + REALVIEW_SYS_NVFLAGSCLR_OFFSET)
  96. #define REALVIEW_SYS_RESETCTL (REALVIEW_SYS_BASE + REALVIEW_SYS_RESETCTL_OFFSET)
  97. #define REALVIEW_SYS_PCICTL (REALVIEW_SYS_BASE + REALVIEW_SYS_PCICTL_OFFSET)
  98. #define REALVIEW_SYS_MCI (REALVIEW_SYS_BASE + REALVIEW_SYS_MCI_OFFSET)
  99. #define REALVIEW_SYS_FLASH (REALVIEW_SYS_BASE + REALVIEW_SYS_FLASH_OFFSET)
  100. #define REALVIEW_SYS_CLCD (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCD_OFFSET)
  101. #define REALVIEW_SYS_CLCDSER (REALVIEW_SYS_BASE + REALVIEW_SYS_CLCDSER_OFFSET)
  102. #define REALVIEW_SYS_BOOTCS (REALVIEW_SYS_BASE + REALVIEW_SYS_BOOTCS_OFFSET)
  103. #define REALVIEW_SYS_24MHz (REALVIEW_SYS_BASE + REALVIEW_SYS_24MHz_OFFSET)
  104. #define REALVIEW_SYS_MISC (REALVIEW_SYS_BASE + REALVIEW_SYS_MISC_OFFSET)
  105. #define REALVIEW_SYS_IOSEL (REALVIEW_SYS_BASE + REALVIEW_SYS_IOSEL_OFFSET)
  106. #define REALVIEW_SYS_PROCID (REALVIEW_SYS_BASE + REALVIEW_SYS_PROCID_OFFSET)
  107. #define REALVIEW_SYS_TEST_OSC0 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC0_OFFSET)
  108. #define REALVIEW_SYS_TEST_OSC1 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC1_OFFSET)
  109. #define REALVIEW_SYS_TEST_OSC2 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC2_OFFSET)
  110. #define REALVIEW_SYS_TEST_OSC3 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC3_OFFSET)
  111. #define REALVIEW_SYS_TEST_OSC4 (REALVIEW_SYS_BASE + REALVIEW_SYS_TEST_OSC4_OFFSET)
  112. /*
  113. * Values for REALVIEW_SYS_RESET_CTRL
  114. */
  115. #define REALVIEW_SYS_CTRL_RESET_CONFIGCLR 0x01
  116. #define REALVIEW_SYS_CTRL_RESET_CONFIGINIT 0x02
  117. #define REALVIEW_SYS_CTRL_RESET_DLLRESET 0x03
  118. #define REALVIEW_SYS_CTRL_RESET_PLLRESET 0x04
  119. #define REALVIEW_SYS_CTRL_RESET_POR 0x05
  120. #define REALVIEW_SYS_CTRL_RESET_DoC 0x06
  121. #define REALVIEW_SYS_CTRL_LED (1 << 0)
  122. /* ------------------------------------------------------------------------
  123. * RealView control registers
  124. * ------------------------------------------------------------------------
  125. */
  126. /*
  127. * REALVIEW_IDFIELD
  128. *
  129. * 31:24 = manufacturer (0x41 = ARM)
  130. * 23:16 = architecture (0x08 = AHB system bus, ASB processor bus)
  131. * 15:12 = FPGA (0x3 = XVC600 or XVC600E)
  132. * 11:4 = build value
  133. * 3:0 = revision number (0x1 = rev B (AHB))
  134. */
  135. /*
  136. * REALVIEW_SYS_LOCK
  137. * control access to SYS_OSCx, SYS_CFGDATAx, SYS_RESETCTL,
  138. * SYS_CLD, SYS_BOOTCS
  139. */
  140. #define REALVIEW_SYS_LOCK_LOCKED (1 << 16)
  141. #define REALVIEW_SYS_LOCKVAL_MASK 0xFFFF /* write 0xA05F to enable write access */
  142. /*
  143. * REALVIEW_SYS_FLASH
  144. */
  145. #define REALVIEW_FLASHPROG_FLVPPEN (1 << 0) /* Enable writing to flash */
  146. /*
  147. * REALVIEW_INTREG
  148. * - used to acknowledge and control MMCI and UART interrupts
  149. */
  150. #define REALVIEW_INTREG_WPROT 0x00 /* MMC protection status (no interrupt generated) */
  151. #define REALVIEW_INTREG_RI0 0x01 /* Ring indicator UART0 is asserted, */
  152. #define REALVIEW_INTREG_CARDIN 0x08 /* MMCI card in detect */
  153. /* write 1 to acknowledge and clear */
  154. #define REALVIEW_INTREG_RI1 0x02 /* Ring indicator UART1 is asserted, */
  155. #define REALVIEW_INTREG_CARDINSERT 0x03 /* Signal insertion of MMC card */
  156. /*
  157. * REALVIEW peripheral addresses
  158. */
  159. #define REALVIEW_SCTL_BASE 0x10001000 /* System controller */
  160. #define REALVIEW_I2C_BASE 0x10002000 /* I2C control */
  161. /* Reserved 0x10003000 */
  162. #define REALVIEW_AACI_BASE 0x10004000 /* Audio */
  163. #define REALVIEW_MMCI0_BASE 0x10005000 /* MMC interface */
  164. #define REALVIEW_KMI0_BASE 0x10006000 /* KMI interface */
  165. #define REALVIEW_KMI1_BASE 0x10007000 /* KMI 2nd interface */
  166. #define REALVIEW_CHAR_LCD_BASE 0x10008000 /* Character LCD */
  167. #define REALVIEW_UART0_BASE 0x10009000 /* UART 0 */
  168. #define REALVIEW_UART1_BASE 0x1000A000 /* UART 1 */
  169. #define REALVIEW_UART2_BASE 0x1000B000 /* UART 2 */
  170. #define REALVIEW_UART3_BASE 0x1000C000 /* UART 3 */
  171. #define REALVIEW_SSP_BASE 0x1000D000 /* Synchronous Serial Port */
  172. #define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
  173. /* Reserved 0x1000F000 */
  174. #define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
  175. #define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
  176. #define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
  177. #define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
  178. #define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
  179. #define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
  180. /* Reserved 0x10016000 */
  181. #define REALVIEW_RTC_BASE 0x10017000 /* Real Time Clock */
  182. #define REALVIEW_DMC_BASE 0x10018000 /* DMC configuration */
  183. #define REALVIEW_PCI_CORE_BASE 0x10019000 /* PCI configuration */
  184. /* Reserved 0x1001A000 - 0x1001FFFF */
  185. #define REALVIEW_CLCD_BASE 0x10020000 /* CLCD */
  186. #define REALVIEW_DMAC_BASE 0x10030000 /* DMA controller */
  187. #define REALVIEW_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
  188. #define REALVIEW_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
  189. #define REALVIEW_SMC_BASE 0x10080000 /* SMC */
  190. /* Reserved 0x10090000 - 0x100EFFFF */
  191. #define REALVIEW_ETH_BASE 0x4E000000 /* Ethernet */
  192. /* PCI space */
  193. #define REALVIEW_PCI_BASE 0x41000000 /* PCI Interface */
  194. #define REALVIEW_PCI_CFG_BASE 0x42000000
  195. #define REALVIEW_PCI_MEM_BASE0 0x44000000
  196. #define REALVIEW_PCI_MEM_BASE1 0x50000000
  197. #define REALVIEW_PCI_MEM_BASE2 0x60000000
  198. /* Sizes of above maps */
  199. #define REALVIEW_PCI_BASE_SIZE 0x01000000
  200. #define REALVIEW_PCI_CFG_BASE_SIZE 0x02000000
  201. #define REALVIEW_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */
  202. #define REALVIEW_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */
  203. #define REALVIEW_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */
  204. #define REALVIEW_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */
  205. #define REALVIEW_LT_BASE 0x80000000 /* Logic Tile expansion */
  206. /*
  207. * Disk on Chip
  208. */
  209. #define REALVIEW_DOC_BASE 0x2C000000
  210. #define REALVIEW_DOC_SIZE (16 << 20)
  211. #define REALVIEW_DOC_PAGE_SIZE 512
  212. #define REALVIEW_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE)
  213. #define ERASE_UNIT_PAGES 32
  214. #define START_PAGE 0x80
  215. /*
  216. * LED settings, bits [7:0]
  217. */
  218. #define REALVIEW_SYS_LED0 (1 << 0)
  219. #define REALVIEW_SYS_LED1 (1 << 1)
  220. #define REALVIEW_SYS_LED2 (1 << 2)
  221. #define REALVIEW_SYS_LED3 (1 << 3)
  222. #define REALVIEW_SYS_LED4 (1 << 4)
  223. #define REALVIEW_SYS_LED5 (1 << 5)
  224. #define REALVIEW_SYS_LED6 (1 << 6)
  225. #define REALVIEW_SYS_LED7 (1 << 7)
  226. #define ALL_LEDS 0xFF
  227. #define LED_BANK REALVIEW_SYS_LED
  228. /*
  229. * Control registers
  230. */
  231. #define REALVIEW_IDFIELD_OFFSET 0x0 /* RealView build information */
  232. #define REALVIEW_FLASHPROG_OFFSET 0x4 /* Flash devices */
  233. #define REALVIEW_INTREG_OFFSET 0x8 /* Interrupt control */
  234. #define REALVIEW_DECODE_OFFSET 0xC /* Fitted logic modules */
  235. /*
  236. * Application Flash
  237. *
  238. */
  239. #define FLASH_BASE REALVIEW_FLASH_BASE
  240. #define FLASH_SIZE REALVIEW_FLASH_SIZE
  241. #define FLASH_END (FLASH_BASE + FLASH_SIZE - 1)
  242. #define FLASH_BLOCK_SIZE SZ_128K
  243. /*
  244. * Boot Flash
  245. *
  246. */
  247. #define EPROM_BASE REALVIEW_BOOT_ROM_HI
  248. #define EPROM_SIZE REALVIEW_BOOT_ROM_SIZE
  249. #define EPROM_END (EPROM_BASE + EPROM_SIZE - 1)
  250. /*
  251. * Clean base - dummy
  252. *
  253. */
  254. #define CLEAN_BASE EPROM_BASE
  255. /*
  256. * System controller bit assignment
  257. */
  258. #define REALVIEW_REFCLK 0
  259. #define REALVIEW_TIMCLK 1
  260. #define REALVIEW_TIMER1_EnSel 15
  261. #define REALVIEW_TIMER2_EnSel 17
  262. #define REALVIEW_TIMER3_EnSel 19
  263. #define REALVIEW_TIMER4_EnSel 21
  264. #define MAX_TIMER 2
  265. #define MAX_PERIOD 699050
  266. #define TICKS_PER_uSEC 1
  267. /*
  268. * These are useconds NOT ticks.
  269. *
  270. */
  271. #define mSEC_1 1000
  272. #define mSEC_5 (mSEC_1 * 5)
  273. #define mSEC_10 (mSEC_1 * 10)
  274. #define mSEC_25 (mSEC_1 * 25)
  275. #define SEC_1 (mSEC_1 * 1000)
  276. #define REALVIEW_CSR_BASE 0x10000000
  277. #define REALVIEW_CSR_SIZE 0x10000000
  278. #endif /* __ASM_ARCH_PLATFORM_H */