xhci-hub.c 16 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <asm/unaligned.h>
  23. #include "xhci.h"
  24. static void xhci_hub_descriptor(struct xhci_hcd *xhci,
  25. struct usb_hub_descriptor *desc)
  26. {
  27. int ports;
  28. u16 temp;
  29. ports = HCS_MAX_PORTS(xhci->hcs_params1);
  30. /* USB 3.0 hubs have a different descriptor, but we fake this for now */
  31. desc->bDescriptorType = 0x29;
  32. desc->bPwrOn2PwrGood = 10; /* xhci section 5.4.9 says 20ms max */
  33. desc->bHubContrCurrent = 0;
  34. desc->bNbrPorts = ports;
  35. temp = 1 + (ports / 8);
  36. desc->bDescLength = 7 + 2 * temp;
  37. /* Why does core/hcd.h define bitmap? It's just confusing. */
  38. memset(&desc->DeviceRemovable[0], 0, temp);
  39. memset(&desc->DeviceRemovable[temp], 0xff, temp);
  40. /* Ugh, these should be #defines, FIXME */
  41. /* Using table 11-13 in USB 2.0 spec. */
  42. temp = 0;
  43. /* Bits 1:0 - support port power switching, or power always on */
  44. if (HCC_PPC(xhci->hcc_params))
  45. temp |= 0x0001;
  46. else
  47. temp |= 0x0002;
  48. /* Bit 2 - root hubs are not part of a compound device */
  49. /* Bits 4:3 - individual port over current protection */
  50. temp |= 0x0008;
  51. /* Bits 6:5 - no TTs in root ports */
  52. /* Bit 7 - no port indicators */
  53. desc->wHubCharacteristics = (__force __u16) cpu_to_le16(temp);
  54. }
  55. static unsigned int xhci_port_speed(unsigned int port_status)
  56. {
  57. if (DEV_LOWSPEED(port_status))
  58. return USB_PORT_STAT_LOW_SPEED;
  59. if (DEV_HIGHSPEED(port_status))
  60. return USB_PORT_STAT_HIGH_SPEED;
  61. if (DEV_SUPERSPEED(port_status))
  62. return USB_PORT_STAT_SUPER_SPEED;
  63. /*
  64. * FIXME: Yes, we should check for full speed, but the core uses that as
  65. * a default in portspeed() in usb/core/hub.c (which is the only place
  66. * USB_PORT_STAT_*_SPEED is used).
  67. */
  68. return 0;
  69. }
  70. /*
  71. * These bits are Read Only (RO) and should be saved and written to the
  72. * registers: 0, 3, 10:13, 30
  73. * connect status, over-current status, port speed, and device removable.
  74. * connect status and port speed are also sticky - meaning they're in
  75. * the AUX well and they aren't changed by a hot, warm, or cold reset.
  76. */
  77. #define XHCI_PORT_RO ((1<<0) | (1<<3) | (0xf<<10) | (1<<30))
  78. /*
  79. * These bits are RW; writing a 0 clears the bit, writing a 1 sets the bit:
  80. * bits 5:8, 9, 14:15, 25:27
  81. * link state, port power, port indicator state, "wake on" enable state
  82. */
  83. #define XHCI_PORT_RWS ((0xf<<5) | (1<<9) | (0x3<<14) | (0x7<<25))
  84. /*
  85. * These bits are RW; writing a 1 sets the bit, writing a 0 has no effect:
  86. * bit 4 (port reset)
  87. */
  88. #define XHCI_PORT_RW1S ((1<<4))
  89. /*
  90. * These bits are RW; writing a 1 clears the bit, writing a 0 has no effect:
  91. * bits 1, 17, 18, 19, 20, 21, 22, 23
  92. * port enable/disable, and
  93. * change bits: connect, PED, warm port reset changed (reserved zero for USB 2.0 ports),
  94. * over-current, reset, link state, and L1 change
  95. */
  96. #define XHCI_PORT_RW1CS ((1<<1) | (0x7f<<17))
  97. /*
  98. * Bit 16 is RW, and writing a '1' to it causes the link state control to be
  99. * latched in
  100. */
  101. #define XHCI_PORT_RW ((1<<16))
  102. /*
  103. * These bits are Reserved Zero (RsvdZ) and zero should be written to them:
  104. * bits 2, 24, 28:31
  105. */
  106. #define XHCI_PORT_RZ ((1<<2) | (1<<24) | (0xf<<28))
  107. /*
  108. * Given a port state, this function returns a value that would result in the
  109. * port being in the same state, if the value was written to the port status
  110. * control register.
  111. * Save Read Only (RO) bits and save read/write bits where
  112. * writing a 0 clears the bit and writing a 1 sets the bit (RWS).
  113. * For all other types (RW1S, RW1CS, RW, and RZ), writing a '0' has no effect.
  114. */
  115. u32 xhci_port_state_to_neutral(u32 state)
  116. {
  117. /* Save read-only status and port state */
  118. return (state & XHCI_PORT_RO) | (state & XHCI_PORT_RWS);
  119. }
  120. /*
  121. * find slot id based on port number.
  122. */
  123. int xhci_find_slot_id_by_port(struct xhci_hcd *xhci, u16 port)
  124. {
  125. int slot_id;
  126. int i;
  127. slot_id = 0;
  128. for (i = 0; i < MAX_HC_SLOTS; i++) {
  129. if (!xhci->devs[i])
  130. continue;
  131. if (xhci->devs[i]->port == port) {
  132. slot_id = i;
  133. break;
  134. }
  135. }
  136. return slot_id;
  137. }
  138. /*
  139. * Stop device
  140. * It issues stop endpoint command for EP 0 to 30. And wait the last command
  141. * to complete.
  142. * suspend will set to 1, if suspend bit need to set in command.
  143. */
  144. static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
  145. {
  146. struct xhci_virt_device *virt_dev;
  147. struct xhci_command *cmd;
  148. unsigned long flags;
  149. int timeleft;
  150. int ret;
  151. int i;
  152. ret = 0;
  153. virt_dev = xhci->devs[slot_id];
  154. cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
  155. if (!cmd) {
  156. xhci_dbg(xhci, "Couldn't allocate command structure.\n");
  157. return -ENOMEM;
  158. }
  159. spin_lock_irqsave(&xhci->lock, flags);
  160. for (i = LAST_EP_INDEX; i > 0; i--) {
  161. if (virt_dev->eps[i].ring && virt_dev->eps[i].ring->dequeue)
  162. xhci_queue_stop_endpoint(xhci, slot_id, i, suspend);
  163. }
  164. cmd->command_trb = xhci->cmd_ring->enqueue;
  165. list_add_tail(&cmd->cmd_list, &virt_dev->cmd_list);
  166. xhci_queue_stop_endpoint(xhci, slot_id, 0, suspend);
  167. xhci_ring_cmd_db(xhci);
  168. spin_unlock_irqrestore(&xhci->lock, flags);
  169. /* Wait for last stop endpoint command to finish */
  170. timeleft = wait_for_completion_interruptible_timeout(
  171. cmd->completion,
  172. USB_CTRL_SET_TIMEOUT);
  173. if (timeleft <= 0) {
  174. xhci_warn(xhci, "%s while waiting for stop endpoint command\n",
  175. timeleft == 0 ? "Timeout" : "Signal");
  176. spin_lock_irqsave(&xhci->lock, flags);
  177. /* The timeout might have raced with the event ring handler, so
  178. * only delete from the list if the item isn't poisoned.
  179. */
  180. if (cmd->cmd_list.next != LIST_POISON1)
  181. list_del(&cmd->cmd_list);
  182. spin_unlock_irqrestore(&xhci->lock, flags);
  183. ret = -ETIME;
  184. goto command_cleanup;
  185. }
  186. command_cleanup:
  187. xhci_free_command(xhci, cmd);
  188. return ret;
  189. }
  190. /*
  191. * Ring device, it rings the all doorbells unconditionally.
  192. */
  193. void xhci_ring_device(struct xhci_hcd *xhci, int slot_id)
  194. {
  195. int i;
  196. for (i = 0; i < LAST_EP_INDEX + 1; i++)
  197. if (xhci->devs[slot_id]->eps[i].ring &&
  198. xhci->devs[slot_id]->eps[i].ring->dequeue)
  199. xhci_ring_ep_doorbell(xhci, slot_id, i, 0);
  200. return;
  201. }
  202. static void xhci_disable_port(struct xhci_hcd *xhci, u16 wIndex,
  203. u32 __iomem *addr, u32 port_status)
  204. {
  205. /* Write 1 to disable the port */
  206. xhci_writel(xhci, port_status | PORT_PE, addr);
  207. port_status = xhci_readl(xhci, addr);
  208. xhci_dbg(xhci, "disable port, actual port %d status = 0x%x\n",
  209. wIndex, port_status);
  210. }
  211. static void xhci_clear_port_change_bit(struct xhci_hcd *xhci, u16 wValue,
  212. u16 wIndex, u32 __iomem *addr, u32 port_status)
  213. {
  214. char *port_change_bit;
  215. u32 status;
  216. switch (wValue) {
  217. case USB_PORT_FEAT_C_RESET:
  218. status = PORT_RC;
  219. port_change_bit = "reset";
  220. break;
  221. case USB_PORT_FEAT_C_CONNECTION:
  222. status = PORT_CSC;
  223. port_change_bit = "connect";
  224. break;
  225. case USB_PORT_FEAT_C_OVER_CURRENT:
  226. status = PORT_OCC;
  227. port_change_bit = "over-current";
  228. break;
  229. case USB_PORT_FEAT_C_ENABLE:
  230. status = PORT_PEC;
  231. port_change_bit = "enable/disable";
  232. break;
  233. case USB_PORT_FEAT_C_SUSPEND:
  234. status = PORT_PLC;
  235. port_change_bit = "suspend/resume";
  236. break;
  237. default:
  238. /* Should never happen */
  239. return;
  240. }
  241. /* Change bits are all write 1 to clear */
  242. xhci_writel(xhci, port_status | status, addr);
  243. port_status = xhci_readl(xhci, addr);
  244. xhci_dbg(xhci, "clear port %s change, actual port %d status = 0x%x\n",
  245. port_change_bit, wIndex, port_status);
  246. }
  247. int xhci_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
  248. u16 wIndex, char *buf, u16 wLength)
  249. {
  250. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  251. int ports;
  252. unsigned long flags;
  253. u32 temp, temp1, status;
  254. int retval = 0;
  255. u32 __iomem *addr;
  256. int slot_id;
  257. ports = HCS_MAX_PORTS(xhci->hcs_params1);
  258. spin_lock_irqsave(&xhci->lock, flags);
  259. switch (typeReq) {
  260. case GetHubStatus:
  261. /* No power source, over-current reported per port */
  262. memset(buf, 0, 4);
  263. break;
  264. case GetHubDescriptor:
  265. xhci_hub_descriptor(xhci, (struct usb_hub_descriptor *) buf);
  266. break;
  267. case GetPortStatus:
  268. if (!wIndex || wIndex > ports)
  269. goto error;
  270. wIndex--;
  271. status = 0;
  272. addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
  273. temp = xhci_readl(xhci, addr);
  274. xhci_dbg(xhci, "get port status, actual port %d status = 0x%x\n", wIndex, temp);
  275. /* wPortChange bits */
  276. if (temp & PORT_CSC)
  277. status |= USB_PORT_STAT_C_CONNECTION << 16;
  278. if (temp & PORT_PEC)
  279. status |= USB_PORT_STAT_C_ENABLE << 16;
  280. if ((temp & PORT_OCC))
  281. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  282. /*
  283. * FIXME ignoring reset and USB 2.1/3.0 specific
  284. * changes
  285. */
  286. if ((temp & PORT_PLS_MASK) == XDEV_U3
  287. && (temp & PORT_POWER))
  288. status |= 1 << USB_PORT_FEAT_SUSPEND;
  289. if ((temp & PORT_PLS_MASK) == XDEV_RESUME) {
  290. if ((temp & PORT_RESET) || !(temp & PORT_PE))
  291. goto error;
  292. if (!DEV_SUPERSPEED(temp) && time_after_eq(jiffies,
  293. xhci->resume_done[wIndex])) {
  294. xhci_dbg(xhci, "Resume USB2 port %d\n",
  295. wIndex + 1);
  296. xhci->resume_done[wIndex] = 0;
  297. temp1 = xhci_port_state_to_neutral(temp);
  298. temp1 &= ~PORT_PLS_MASK;
  299. temp1 |= PORT_LINK_STROBE | XDEV_U0;
  300. xhci_writel(xhci, temp1, addr);
  301. xhci_dbg(xhci, "set port %d resume\n",
  302. wIndex + 1);
  303. slot_id = xhci_find_slot_id_by_port(xhci,
  304. wIndex + 1);
  305. if (!slot_id) {
  306. xhci_dbg(xhci, "slot_id is zero\n");
  307. goto error;
  308. }
  309. xhci_ring_device(xhci, slot_id);
  310. xhci->port_c_suspend[wIndex >> 5] |=
  311. 1 << (wIndex & 31);
  312. xhci->suspended_ports[wIndex >> 5] &=
  313. ~(1 << (wIndex & 31));
  314. }
  315. }
  316. if ((temp & PORT_PLS_MASK) == XDEV_U0
  317. && (temp & PORT_POWER)
  318. && (xhci->suspended_ports[wIndex >> 5] &
  319. (1 << (wIndex & 31)))) {
  320. xhci->suspended_ports[wIndex >> 5] &=
  321. ~(1 << (wIndex & 31));
  322. xhci->port_c_suspend[wIndex >> 5] |=
  323. 1 << (wIndex & 31);
  324. }
  325. if (temp & PORT_CONNECT) {
  326. status |= USB_PORT_STAT_CONNECTION;
  327. status |= xhci_port_speed(temp);
  328. }
  329. if (temp & PORT_PE)
  330. status |= USB_PORT_STAT_ENABLE;
  331. if (temp & PORT_OC)
  332. status |= USB_PORT_STAT_OVERCURRENT;
  333. if (temp & PORT_RESET)
  334. status |= USB_PORT_STAT_RESET;
  335. if (temp & PORT_POWER)
  336. status |= USB_PORT_STAT_POWER;
  337. if (xhci->port_c_suspend[wIndex >> 5] & (1 << (wIndex & 31)))
  338. status |= 1 << USB_PORT_FEAT_C_SUSPEND;
  339. xhci_dbg(xhci, "Get port status returned 0x%x\n", status);
  340. put_unaligned(cpu_to_le32(status), (__le32 *) buf);
  341. break;
  342. case SetPortFeature:
  343. wIndex &= 0xff;
  344. if (!wIndex || wIndex > ports)
  345. goto error;
  346. wIndex--;
  347. addr = &xhci->op_regs->port_status_base + NUM_PORT_REGS*(wIndex & 0xff);
  348. temp = xhci_readl(xhci, addr);
  349. temp = xhci_port_state_to_neutral(temp);
  350. switch (wValue) {
  351. case USB_PORT_FEAT_SUSPEND:
  352. temp = xhci_readl(xhci, addr);
  353. /* In spec software should not attempt to suspend
  354. * a port unless the port reports that it is in the
  355. * enabled (PED = ‘1’,PLS < ‘3’) state.
  356. */
  357. if ((temp & PORT_PE) == 0 || (temp & PORT_RESET)
  358. || (temp & PORT_PLS_MASK) >= XDEV_U3) {
  359. xhci_warn(xhci, "USB core suspending device "
  360. "not in U0/U1/U2.\n");
  361. goto error;
  362. }
  363. slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
  364. if (!slot_id) {
  365. xhci_warn(xhci, "slot_id is zero\n");
  366. goto error;
  367. }
  368. /* unlock to execute stop endpoint commands */
  369. spin_unlock_irqrestore(&xhci->lock, flags);
  370. xhci_stop_device(xhci, slot_id, 1);
  371. spin_lock_irqsave(&xhci->lock, flags);
  372. temp = xhci_port_state_to_neutral(temp);
  373. temp &= ~PORT_PLS_MASK;
  374. temp |= PORT_LINK_STROBE | XDEV_U3;
  375. xhci_writel(xhci, temp, addr);
  376. spin_unlock_irqrestore(&xhci->lock, flags);
  377. msleep(10); /* wait device to enter */
  378. spin_lock_irqsave(&xhci->lock, flags);
  379. temp = xhci_readl(xhci, addr);
  380. xhci->suspended_ports[wIndex >> 5] |=
  381. 1 << (wIndex & (31));
  382. break;
  383. case USB_PORT_FEAT_POWER:
  384. /*
  385. * Turn on ports, even if there isn't per-port switching.
  386. * HC will report connect events even before this is set.
  387. * However, khubd will ignore the roothub events until
  388. * the roothub is registered.
  389. */
  390. xhci_writel(xhci, temp | PORT_POWER, addr);
  391. temp = xhci_readl(xhci, addr);
  392. xhci_dbg(xhci, "set port power, actual port %d status = 0x%x\n", wIndex, temp);
  393. break;
  394. case USB_PORT_FEAT_RESET:
  395. temp = (temp | PORT_RESET);
  396. xhci_writel(xhci, temp, addr);
  397. temp = xhci_readl(xhci, addr);
  398. xhci_dbg(xhci, "set port reset, actual port %d status = 0x%x\n", wIndex, temp);
  399. break;
  400. default:
  401. goto error;
  402. }
  403. temp = xhci_readl(xhci, addr); /* unblock any posted writes */
  404. break;
  405. case ClearPortFeature:
  406. if (!wIndex || wIndex > ports)
  407. goto error;
  408. wIndex--;
  409. addr = &xhci->op_regs->port_status_base +
  410. NUM_PORT_REGS*(wIndex & 0xff);
  411. temp = xhci_readl(xhci, addr);
  412. temp = xhci_port_state_to_neutral(temp);
  413. switch (wValue) {
  414. case USB_PORT_FEAT_SUSPEND:
  415. temp = xhci_readl(xhci, addr);
  416. xhci_dbg(xhci, "clear USB_PORT_FEAT_SUSPEND\n");
  417. xhci_dbg(xhci, "PORTSC %04x\n", temp);
  418. if (temp & PORT_RESET)
  419. goto error;
  420. if (temp & XDEV_U3) {
  421. if ((temp & PORT_PE) == 0)
  422. goto error;
  423. if (DEV_SUPERSPEED(temp)) {
  424. temp = xhci_port_state_to_neutral(temp);
  425. temp &= ~PORT_PLS_MASK;
  426. temp |= PORT_LINK_STROBE | XDEV_U0;
  427. xhci_writel(xhci, temp, addr);
  428. xhci_readl(xhci, addr);
  429. } else {
  430. temp = xhci_port_state_to_neutral(temp);
  431. temp &= ~PORT_PLS_MASK;
  432. temp |= PORT_LINK_STROBE | XDEV_RESUME;
  433. xhci_writel(xhci, temp, addr);
  434. spin_unlock_irqrestore(&xhci->lock,
  435. flags);
  436. msleep(20);
  437. spin_lock_irqsave(&xhci->lock, flags);
  438. temp = xhci_readl(xhci, addr);
  439. temp = xhci_port_state_to_neutral(temp);
  440. temp &= ~PORT_PLS_MASK;
  441. temp |= PORT_LINK_STROBE | XDEV_U0;
  442. xhci_writel(xhci, temp, addr);
  443. }
  444. xhci->port_c_suspend[wIndex >> 5] |=
  445. 1 << (wIndex & 31);
  446. }
  447. slot_id = xhci_find_slot_id_by_port(xhci, wIndex + 1);
  448. if (!slot_id) {
  449. xhci_dbg(xhci, "slot_id is zero\n");
  450. goto error;
  451. }
  452. xhci_ring_device(xhci, slot_id);
  453. break;
  454. case USB_PORT_FEAT_C_SUSPEND:
  455. xhci->port_c_suspend[wIndex >> 5] &=
  456. ~(1 << (wIndex & 31));
  457. case USB_PORT_FEAT_C_RESET:
  458. case USB_PORT_FEAT_C_CONNECTION:
  459. case USB_PORT_FEAT_C_OVER_CURRENT:
  460. case USB_PORT_FEAT_C_ENABLE:
  461. xhci_clear_port_change_bit(xhci, wValue, wIndex,
  462. addr, temp);
  463. break;
  464. case USB_PORT_FEAT_ENABLE:
  465. xhci_disable_port(xhci, wIndex, addr, temp);
  466. break;
  467. default:
  468. goto error;
  469. }
  470. break;
  471. default:
  472. error:
  473. /* "stall" on error */
  474. retval = -EPIPE;
  475. }
  476. spin_unlock_irqrestore(&xhci->lock, flags);
  477. return retval;
  478. }
  479. /*
  480. * Returns 0 if the status hasn't changed, or the number of bytes in buf.
  481. * Ports are 0-indexed from the HCD point of view,
  482. * and 1-indexed from the USB core pointer of view.
  483. *
  484. * Note that the status change bits will be cleared as soon as a port status
  485. * change event is generated, so we use the saved status from that event.
  486. */
  487. int xhci_hub_status_data(struct usb_hcd *hcd, char *buf)
  488. {
  489. unsigned long flags;
  490. u32 temp, status;
  491. u32 mask;
  492. int i, retval;
  493. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  494. int ports;
  495. u32 __iomem *addr;
  496. ports = HCS_MAX_PORTS(xhci->hcs_params1);
  497. /* Initial status is no changes */
  498. retval = (ports + 8) / 8;
  499. memset(buf, 0, retval);
  500. status = 0;
  501. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  502. spin_lock_irqsave(&xhci->lock, flags);
  503. /* For each port, did anything change? If so, set that bit in buf. */
  504. for (i = 0; i < ports; i++) {
  505. addr = &xhci->op_regs->port_status_base +
  506. NUM_PORT_REGS*i;
  507. temp = xhci_readl(xhci, addr);
  508. if ((temp & mask) != 0 ||
  509. (xhci->port_c_suspend[i >> 5] & 1 << (i & 31)) ||
  510. (xhci->resume_done[i] && time_after_eq(
  511. jiffies, xhci->resume_done[i]))) {
  512. buf[(i + 1) / 8] |= 1 << (i + 1) % 8;
  513. status = 1;
  514. }
  515. }
  516. spin_unlock_irqrestore(&xhci->lock, flags);
  517. return status ? retval : 0;
  518. }