be_main.c 60 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include "be_cmds.h"
  19. #include <asm/div64.h>
  20. MODULE_VERSION(DRV_VER);
  21. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  22. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  23. MODULE_AUTHOR("ServerEngines Corporation");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int rx_frag_size = 2048;
  26. module_param(rx_frag_size, uint, S_IRUGO);
  27. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  28. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  29. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
  31. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  32. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  33. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID3) },
  34. { 0 }
  35. };
  36. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  37. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  38. {
  39. struct be_dma_mem *mem = &q->dma_mem;
  40. if (mem->va)
  41. pci_free_consistent(adapter->pdev, mem->size,
  42. mem->va, mem->dma);
  43. }
  44. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  45. u16 len, u16 entry_size)
  46. {
  47. struct be_dma_mem *mem = &q->dma_mem;
  48. memset(q, 0, sizeof(*q));
  49. q->len = len;
  50. q->entry_size = entry_size;
  51. mem->size = len * entry_size;
  52. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  53. if (!mem->va)
  54. return -1;
  55. memset(mem->va, 0, mem->size);
  56. return 0;
  57. }
  58. static void be_intr_set(struct be_adapter *adapter, bool enable)
  59. {
  60. u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  61. u32 reg = ioread32(addr);
  62. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  63. if (!enabled && enable)
  64. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  65. else if (enabled && !enable)
  66. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  67. else
  68. return;
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, adapter->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_adapter *adapter, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, adapter->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
  99. {
  100. u32 val = 0;
  101. val |= qid & DB_CQ_RING_ID_MASK;
  102. if (arm)
  103. val |= 1 << DB_CQ_REARM_SHIFT;
  104. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  105. iowrite32(val, adapter->db + DB_CQ_OFFSET);
  106. }
  107. static int be_mac_addr_set(struct net_device *netdev, void *p)
  108. {
  109. struct be_adapter *adapter = netdev_priv(netdev);
  110. struct sockaddr *addr = p;
  111. int status = 0;
  112. if (!is_valid_ether_addr(addr->sa_data))
  113. return -EADDRNOTAVAIL;
  114. status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
  115. if (status)
  116. return status;
  117. status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
  118. adapter->if_handle, &adapter->pmac_id);
  119. if (!status)
  120. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  121. return status;
  122. }
  123. void netdev_stats_update(struct be_adapter *adapter)
  124. {
  125. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  126. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  127. struct be_port_rxf_stats *port_stats =
  128. &rxf_stats->port[adapter->port_num];
  129. struct net_device_stats *dev_stats = &adapter->netdev->stats;
  130. struct be_erx_stats *erx_stats = &hw_stats->erx;
  131. dev_stats->rx_packets = port_stats->rx_total_frames;
  132. dev_stats->tx_packets = port_stats->tx_unicastframes +
  133. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  134. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  135. (u64) port_stats->rx_bytes_lsd;
  136. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  137. (u64) port_stats->tx_bytes_lsd;
  138. /* bad pkts received */
  139. dev_stats->rx_errors = port_stats->rx_crc_errors +
  140. port_stats->rx_alignment_symbol_errors +
  141. port_stats->rx_in_range_errors +
  142. port_stats->rx_out_range_errors +
  143. port_stats->rx_frame_too_long +
  144. port_stats->rx_dropped_too_small +
  145. port_stats->rx_dropped_too_short +
  146. port_stats->rx_dropped_header_too_small +
  147. port_stats->rx_dropped_tcp_length +
  148. port_stats->rx_dropped_runt +
  149. port_stats->rx_tcp_checksum_errs +
  150. port_stats->rx_ip_checksum_errs +
  151. port_stats->rx_udp_checksum_errs;
  152. /* no space in linux buffers: best possible approximation */
  153. dev_stats->rx_dropped =
  154. erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
  155. /* detailed rx errors */
  156. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  157. port_stats->rx_out_range_errors +
  158. port_stats->rx_frame_too_long;
  159. /* receive ring buffer overflow */
  160. dev_stats->rx_over_errors = 0;
  161. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  162. /* frame alignment errors */
  163. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  164. /* receiver fifo overrun */
  165. /* drops_no_pbuf is no per i/f, it's per BE card */
  166. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  167. port_stats->rx_input_fifo_overflow +
  168. rxf_stats->rx_drops_no_pbuf;
  169. /* receiver missed packetd */
  170. dev_stats->rx_missed_errors = 0;
  171. /* packet transmit problems */
  172. dev_stats->tx_errors = 0;
  173. /* no space available in linux */
  174. dev_stats->tx_dropped = 0;
  175. dev_stats->multicast = port_stats->rx_multicast_frames;
  176. dev_stats->collisions = 0;
  177. /* detailed tx_errors */
  178. dev_stats->tx_aborted_errors = 0;
  179. dev_stats->tx_carrier_errors = 0;
  180. dev_stats->tx_fifo_errors = 0;
  181. dev_stats->tx_heartbeat_errors = 0;
  182. dev_stats->tx_window_errors = 0;
  183. }
  184. void be_link_status_update(struct be_adapter *adapter, bool link_up)
  185. {
  186. struct net_device *netdev = adapter->netdev;
  187. /* If link came up or went down */
  188. if (adapter->link_up != link_up) {
  189. adapter->link_speed = -1;
  190. if (link_up) {
  191. netif_start_queue(netdev);
  192. netif_carrier_on(netdev);
  193. printk(KERN_INFO "%s: Link up\n", netdev->name);
  194. } else {
  195. netif_stop_queue(netdev);
  196. netif_carrier_off(netdev);
  197. printk(KERN_INFO "%s: Link down\n", netdev->name);
  198. }
  199. adapter->link_up = link_up;
  200. }
  201. }
  202. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  203. static void be_rx_eqd_update(struct be_adapter *adapter)
  204. {
  205. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  206. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  207. ulong now = jiffies;
  208. u32 eqd;
  209. if (!rx_eq->enable_aic)
  210. return;
  211. /* Wrapped around */
  212. if (time_before(now, stats->rx_fps_jiffies)) {
  213. stats->rx_fps_jiffies = now;
  214. return;
  215. }
  216. /* Update once a second */
  217. if ((now - stats->rx_fps_jiffies) < HZ)
  218. return;
  219. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  220. ((now - stats->rx_fps_jiffies) / HZ);
  221. stats->rx_fps_jiffies = now;
  222. stats->be_prev_rx_frags = stats->be_rx_frags;
  223. eqd = stats->be_rx_fps / 110000;
  224. eqd = eqd << 3;
  225. if (eqd > rx_eq->max_eqd)
  226. eqd = rx_eq->max_eqd;
  227. if (eqd < rx_eq->min_eqd)
  228. eqd = rx_eq->min_eqd;
  229. if (eqd < 10)
  230. eqd = 0;
  231. if (eqd != rx_eq->cur_eqd)
  232. be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
  233. rx_eq->cur_eqd = eqd;
  234. }
  235. static struct net_device_stats *be_get_stats(struct net_device *dev)
  236. {
  237. return &dev->stats;
  238. }
  239. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  240. {
  241. u64 rate = bytes;
  242. do_div(rate, ticks / HZ);
  243. rate <<= 3; /* bytes/sec -> bits/sec */
  244. do_div(rate, 1000000ul); /* MB/Sec */
  245. return rate;
  246. }
  247. static void be_tx_rate_update(struct be_adapter *adapter)
  248. {
  249. struct be_drvr_stats *stats = drvr_stats(adapter);
  250. ulong now = jiffies;
  251. /* Wrapped around? */
  252. if (time_before(now, stats->be_tx_jiffies)) {
  253. stats->be_tx_jiffies = now;
  254. return;
  255. }
  256. /* Update tx rate once in two seconds */
  257. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  258. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  259. - stats->be_tx_bytes_prev,
  260. now - stats->be_tx_jiffies);
  261. stats->be_tx_jiffies = now;
  262. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  263. }
  264. }
  265. static void be_tx_stats_update(struct be_adapter *adapter,
  266. u32 wrb_cnt, u32 copied, bool stopped)
  267. {
  268. struct be_drvr_stats *stats = drvr_stats(adapter);
  269. stats->be_tx_reqs++;
  270. stats->be_tx_wrbs += wrb_cnt;
  271. stats->be_tx_bytes += copied;
  272. if (stopped)
  273. stats->be_tx_stops++;
  274. }
  275. /* Determine number of WRB entries needed to xmit data in an skb */
  276. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  277. {
  278. int cnt = (skb->len > skb->data_len);
  279. cnt += skb_shinfo(skb)->nr_frags;
  280. /* to account for hdr wrb */
  281. cnt++;
  282. if (cnt & 1) {
  283. /* add a dummy to make it an even num */
  284. cnt++;
  285. *dummy = true;
  286. } else
  287. *dummy = false;
  288. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  289. return cnt;
  290. }
  291. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  292. {
  293. wrb->frag_pa_hi = upper_32_bits(addr);
  294. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  295. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  296. }
  297. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  298. bool vlan, u32 wrb_cnt, u32 len)
  299. {
  300. memset(hdr, 0, sizeof(*hdr));
  301. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  302. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  303. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  305. hdr, skb_shinfo(skb)->gso_size);
  306. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  307. if (is_tcp_pkt(skb))
  308. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  309. else if (is_udp_pkt(skb))
  310. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  311. }
  312. if (vlan && vlan_tx_tag_present(skb)) {
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  314. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  315. hdr, vlan_tx_tag_get(skb));
  316. }
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  318. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  319. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  321. }
  322. static int make_tx_wrbs(struct be_adapter *adapter,
  323. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  324. {
  325. u64 busaddr;
  326. u32 i, copied = 0;
  327. struct pci_dev *pdev = adapter->pdev;
  328. struct sk_buff *first_skb = skb;
  329. struct be_queue_info *txq = &adapter->tx_obj.q;
  330. struct be_eth_wrb *wrb;
  331. struct be_eth_hdr_wrb *hdr;
  332. hdr = queue_head_node(txq);
  333. atomic_add(wrb_cnt, &txq->used);
  334. queue_head_inc(txq);
  335. if (skb->len > skb->data_len) {
  336. int len = skb->len - skb->data_len;
  337. busaddr = pci_map_single(pdev, skb->data, len,
  338. PCI_DMA_TODEVICE);
  339. wrb = queue_head_node(txq);
  340. wrb_fill(wrb, busaddr, len);
  341. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  342. queue_head_inc(txq);
  343. copied += len;
  344. }
  345. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  346. struct skb_frag_struct *frag =
  347. &skb_shinfo(skb)->frags[i];
  348. busaddr = pci_map_page(pdev, frag->page,
  349. frag->page_offset,
  350. frag->size, PCI_DMA_TODEVICE);
  351. wrb = queue_head_node(txq);
  352. wrb_fill(wrb, busaddr, frag->size);
  353. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  354. queue_head_inc(txq);
  355. copied += frag->size;
  356. }
  357. if (dummy_wrb) {
  358. wrb = queue_head_node(txq);
  359. wrb_fill(wrb, 0, 0);
  360. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  361. queue_head_inc(txq);
  362. }
  363. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  364. wrb_cnt, copied);
  365. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  366. return copied;
  367. }
  368. static netdev_tx_t be_xmit(struct sk_buff *skb,
  369. struct net_device *netdev)
  370. {
  371. struct be_adapter *adapter = netdev_priv(netdev);
  372. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  373. struct be_queue_info *txq = &tx_obj->q;
  374. u32 wrb_cnt = 0, copied = 0;
  375. u32 start = txq->head;
  376. bool dummy_wrb, stopped = false;
  377. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  378. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  379. if (copied) {
  380. /* record the sent skb in the sent_skb table */
  381. BUG_ON(tx_obj->sent_skb_list[start]);
  382. tx_obj->sent_skb_list[start] = skb;
  383. /* Ensure txq has space for the next skb; Else stop the queue
  384. * *BEFORE* ringing the tx doorbell, so that we serialze the
  385. * tx compls of the current transmit which'll wake up the queue
  386. */
  387. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
  388. txq->len) {
  389. netif_stop_queue(netdev);
  390. stopped = true;
  391. }
  392. be_txq_notify(adapter, txq->id, wrb_cnt);
  393. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  394. } else {
  395. txq->head = start;
  396. dev_kfree_skb_any(skb);
  397. }
  398. return NETDEV_TX_OK;
  399. }
  400. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  401. {
  402. struct be_adapter *adapter = netdev_priv(netdev);
  403. if (new_mtu < BE_MIN_MTU ||
  404. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  405. dev_info(&adapter->pdev->dev,
  406. "MTU must be between %d and %d bytes\n",
  407. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  408. return -EINVAL;
  409. }
  410. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  411. netdev->mtu, new_mtu);
  412. netdev->mtu = new_mtu;
  413. return 0;
  414. }
  415. /*
  416. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  417. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  418. * set the BE in promiscuous VLAN mode.
  419. */
  420. static int be_vid_config(struct be_adapter *adapter)
  421. {
  422. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  423. u16 ntags = 0, i;
  424. int status;
  425. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  426. /* Construct VLAN Table to give to HW */
  427. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  428. if (adapter->vlan_tag[i]) {
  429. vtag[ntags] = cpu_to_le16(i);
  430. ntags++;
  431. }
  432. }
  433. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  434. vtag, ntags, 1, 0);
  435. } else {
  436. status = be_cmd_vlan_config(adapter, adapter->if_handle,
  437. NULL, 0, 1, 1);
  438. }
  439. return status;
  440. }
  441. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  442. {
  443. struct be_adapter *adapter = netdev_priv(netdev);
  444. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  445. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  446. be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
  447. be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
  448. adapter->vlan_grp = grp;
  449. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  450. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  451. }
  452. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  453. {
  454. struct be_adapter *adapter = netdev_priv(netdev);
  455. adapter->num_vlans++;
  456. adapter->vlan_tag[vid] = 1;
  457. be_vid_config(adapter);
  458. }
  459. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  460. {
  461. struct be_adapter *adapter = netdev_priv(netdev);
  462. adapter->num_vlans--;
  463. adapter->vlan_tag[vid] = 0;
  464. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  465. be_vid_config(adapter);
  466. }
  467. static void be_set_multicast_list(struct net_device *netdev)
  468. {
  469. struct be_adapter *adapter = netdev_priv(netdev);
  470. if (netdev->flags & IFF_PROMISC) {
  471. be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
  472. adapter->promiscuous = true;
  473. goto done;
  474. }
  475. /* BE was previously in promiscous mode; disable it */
  476. if (adapter->promiscuous) {
  477. adapter->promiscuous = false;
  478. be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
  479. }
  480. /* Enable multicast promisc if num configured exceeds what we support */
  481. if (netdev->flags & IFF_ALLMULTI || netdev->mc_count > BE_MAX_MC) {
  482. be_cmd_multicast_set(adapter, adapter->if_handle, NULL, 0,
  483. &adapter->mc_cmd_mem);
  484. goto done;
  485. }
  486. be_cmd_multicast_set(adapter, adapter->if_handle, netdev->mc_list,
  487. netdev->mc_count, &adapter->mc_cmd_mem);
  488. done:
  489. return;
  490. }
  491. static void be_rx_rate_update(struct be_adapter *adapter)
  492. {
  493. struct be_drvr_stats *stats = drvr_stats(adapter);
  494. ulong now = jiffies;
  495. /* Wrapped around */
  496. if (time_before(now, stats->be_rx_jiffies)) {
  497. stats->be_rx_jiffies = now;
  498. return;
  499. }
  500. /* Update the rate once in two seconds */
  501. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  502. return;
  503. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  504. - stats->be_rx_bytes_prev,
  505. now - stats->be_rx_jiffies);
  506. stats->be_rx_jiffies = now;
  507. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  508. }
  509. static void be_rx_stats_update(struct be_adapter *adapter,
  510. u32 pktsize, u16 numfrags)
  511. {
  512. struct be_drvr_stats *stats = drvr_stats(adapter);
  513. stats->be_rx_compl++;
  514. stats->be_rx_frags += numfrags;
  515. stats->be_rx_bytes += pktsize;
  516. }
  517. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  518. {
  519. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  520. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  521. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  522. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  523. if (ip_version) {
  524. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  525. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  526. }
  527. ipv6_chk = (ip_version && (tcpf || udpf));
  528. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  529. }
  530. static struct be_rx_page_info *
  531. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  532. {
  533. struct be_rx_page_info *rx_page_info;
  534. struct be_queue_info *rxq = &adapter->rx_obj.q;
  535. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  536. BUG_ON(!rx_page_info->page);
  537. if (rx_page_info->last_page_user)
  538. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  539. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  540. atomic_dec(&rxq->used);
  541. return rx_page_info;
  542. }
  543. /* Throwaway the data in the Rx completion */
  544. static void be_rx_compl_discard(struct be_adapter *adapter,
  545. struct be_eth_rx_compl *rxcp)
  546. {
  547. struct be_queue_info *rxq = &adapter->rx_obj.q;
  548. struct be_rx_page_info *page_info;
  549. u16 rxq_idx, i, num_rcvd;
  550. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  551. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  552. for (i = 0; i < num_rcvd; i++) {
  553. page_info = get_rx_page_info(adapter, rxq_idx);
  554. put_page(page_info->page);
  555. memset(page_info, 0, sizeof(*page_info));
  556. index_inc(&rxq_idx, rxq->len);
  557. }
  558. }
  559. /*
  560. * skb_fill_rx_data forms a complete skb for an ether frame
  561. * indicated by rxcp.
  562. */
  563. static void skb_fill_rx_data(struct be_adapter *adapter,
  564. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  565. {
  566. struct be_queue_info *rxq = &adapter->rx_obj.q;
  567. struct be_rx_page_info *page_info;
  568. u16 rxq_idx, i, num_rcvd, j;
  569. u32 pktsize, hdr_len, curr_frag_len, size;
  570. u8 *start;
  571. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  572. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  573. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  574. page_info = get_rx_page_info(adapter, rxq_idx);
  575. start = page_address(page_info->page) + page_info->page_offset;
  576. prefetch(start);
  577. /* Copy data in the first descriptor of this completion */
  578. curr_frag_len = min(pktsize, rx_frag_size);
  579. /* Copy the header portion into skb_data */
  580. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  581. memcpy(skb->data, start, hdr_len);
  582. skb->len = curr_frag_len;
  583. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  584. /* Complete packet has now been moved to data */
  585. put_page(page_info->page);
  586. skb->data_len = 0;
  587. skb->tail += curr_frag_len;
  588. } else {
  589. skb_shinfo(skb)->nr_frags = 1;
  590. skb_shinfo(skb)->frags[0].page = page_info->page;
  591. skb_shinfo(skb)->frags[0].page_offset =
  592. page_info->page_offset + hdr_len;
  593. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  594. skb->data_len = curr_frag_len - hdr_len;
  595. skb->tail += hdr_len;
  596. }
  597. memset(page_info, 0, sizeof(*page_info));
  598. if (pktsize <= rx_frag_size) {
  599. BUG_ON(num_rcvd != 1);
  600. goto done;
  601. }
  602. /* More frags present for this completion */
  603. size = pktsize;
  604. for (i = 1, j = 0; i < num_rcvd; i++) {
  605. size -= curr_frag_len;
  606. index_inc(&rxq_idx, rxq->len);
  607. page_info = get_rx_page_info(adapter, rxq_idx);
  608. curr_frag_len = min(size, rx_frag_size);
  609. /* Coalesce all frags from the same physical page in one slot */
  610. if (page_info->page_offset == 0) {
  611. /* Fresh page */
  612. j++;
  613. skb_shinfo(skb)->frags[j].page = page_info->page;
  614. skb_shinfo(skb)->frags[j].page_offset =
  615. page_info->page_offset;
  616. skb_shinfo(skb)->frags[j].size = 0;
  617. skb_shinfo(skb)->nr_frags++;
  618. } else {
  619. put_page(page_info->page);
  620. }
  621. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  622. skb->len += curr_frag_len;
  623. skb->data_len += curr_frag_len;
  624. memset(page_info, 0, sizeof(*page_info));
  625. }
  626. BUG_ON(j > MAX_SKB_FRAGS);
  627. done:
  628. be_rx_stats_update(adapter, pktsize, num_rcvd);
  629. return;
  630. }
  631. /* Process the RX completion indicated by rxcp when GRO is disabled */
  632. static void be_rx_compl_process(struct be_adapter *adapter,
  633. struct be_eth_rx_compl *rxcp)
  634. {
  635. struct sk_buff *skb;
  636. u32 vlanf, vid;
  637. u8 vtm;
  638. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  639. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  640. /* vlanf could be wrongly set in some cards.
  641. * ignore if vtm is not set */
  642. if ((adapter->cap & 0x400) && !vtm)
  643. vlanf = 0;
  644. skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
  645. if (!skb) {
  646. if (net_ratelimit())
  647. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  648. be_rx_compl_discard(adapter, rxcp);
  649. return;
  650. }
  651. skb_fill_rx_data(adapter, skb, rxcp);
  652. if (do_pkt_csum(rxcp, adapter->rx_csum))
  653. skb->ip_summed = CHECKSUM_NONE;
  654. else
  655. skb->ip_summed = CHECKSUM_UNNECESSARY;
  656. skb->truesize = skb->len + sizeof(struct sk_buff);
  657. skb->protocol = eth_type_trans(skb, adapter->netdev);
  658. skb->dev = adapter->netdev;
  659. if (vlanf) {
  660. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  661. kfree_skb(skb);
  662. return;
  663. }
  664. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  665. vid = be16_to_cpu(vid);
  666. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  667. } else {
  668. netif_receive_skb(skb);
  669. }
  670. return;
  671. }
  672. /* Process the RX completion indicated by rxcp when GRO is enabled */
  673. static void be_rx_compl_process_gro(struct be_adapter *adapter,
  674. struct be_eth_rx_compl *rxcp)
  675. {
  676. struct be_rx_page_info *page_info;
  677. struct sk_buff *skb = NULL;
  678. struct be_queue_info *rxq = &adapter->rx_obj.q;
  679. struct be_eq_obj *eq_obj = &adapter->rx_eq;
  680. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  681. u16 i, rxq_idx = 0, vid, j;
  682. u8 vtm;
  683. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  684. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  685. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  686. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  687. vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
  688. /* vlanf could be wrongly set in some cards.
  689. * ignore if vtm is not set */
  690. if ((adapter->cap & 0x400) && !vtm)
  691. vlanf = 0;
  692. skb = napi_get_frags(&eq_obj->napi);
  693. if (!skb) {
  694. be_rx_compl_discard(adapter, rxcp);
  695. return;
  696. }
  697. remaining = pkt_size;
  698. for (i = 0, j = -1; i < num_rcvd; i++) {
  699. page_info = get_rx_page_info(adapter, rxq_idx);
  700. curr_frag_len = min(remaining, rx_frag_size);
  701. /* Coalesce all frags from the same physical page in one slot */
  702. if (i == 0 || page_info->page_offset == 0) {
  703. /* First frag or Fresh page */
  704. j++;
  705. skb_shinfo(skb)->frags[j].page = page_info->page;
  706. skb_shinfo(skb)->frags[j].page_offset =
  707. page_info->page_offset;
  708. skb_shinfo(skb)->frags[j].size = 0;
  709. } else {
  710. put_page(page_info->page);
  711. }
  712. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  713. remaining -= curr_frag_len;
  714. index_inc(&rxq_idx, rxq->len);
  715. memset(page_info, 0, sizeof(*page_info));
  716. }
  717. BUG_ON(j > MAX_SKB_FRAGS);
  718. skb_shinfo(skb)->nr_frags = j + 1;
  719. skb->len = pkt_size;
  720. skb->data_len = pkt_size;
  721. skb->truesize += pkt_size;
  722. skb->ip_summed = CHECKSUM_UNNECESSARY;
  723. if (likely(!vlanf)) {
  724. napi_gro_frags(&eq_obj->napi);
  725. } else {
  726. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  727. vid = be16_to_cpu(vid);
  728. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  729. return;
  730. vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
  731. }
  732. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  733. return;
  734. }
  735. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  736. {
  737. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  738. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  739. return NULL;
  740. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  741. queue_tail_inc(&adapter->rx_obj.cq);
  742. return rxcp;
  743. }
  744. /* To reset the valid bit, we need to reset the whole word as
  745. * when walking the queue the valid entries are little-endian
  746. * and invalid entries are host endian
  747. */
  748. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  749. {
  750. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  751. }
  752. static inline struct page *be_alloc_pages(u32 size)
  753. {
  754. gfp_t alloc_flags = GFP_ATOMIC;
  755. u32 order = get_order(size);
  756. if (order > 0)
  757. alloc_flags |= __GFP_COMP;
  758. return alloc_pages(alloc_flags, order);
  759. }
  760. /*
  761. * Allocate a page, split it to fragments of size rx_frag_size and post as
  762. * receive buffers to BE
  763. */
  764. static void be_post_rx_frags(struct be_adapter *adapter)
  765. {
  766. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  767. struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
  768. struct be_queue_info *rxq = &adapter->rx_obj.q;
  769. struct page *pagep = NULL;
  770. struct be_eth_rx_d *rxd;
  771. u64 page_dmaaddr = 0, frag_dmaaddr;
  772. u32 posted, page_offset = 0;
  773. page_info = &page_info_tbl[rxq->head];
  774. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  775. if (!pagep) {
  776. pagep = be_alloc_pages(adapter->big_page_size);
  777. if (unlikely(!pagep)) {
  778. drvr_stats(adapter)->be_ethrx_post_fail++;
  779. break;
  780. }
  781. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  782. adapter->big_page_size,
  783. PCI_DMA_FROMDEVICE);
  784. page_info->page_offset = 0;
  785. } else {
  786. get_page(pagep);
  787. page_info->page_offset = page_offset + rx_frag_size;
  788. }
  789. page_offset = page_info->page_offset;
  790. page_info->page = pagep;
  791. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  792. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  793. rxd = queue_head_node(rxq);
  794. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  795. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  796. /* Any space left in the current big page for another frag? */
  797. if ((page_offset + rx_frag_size + rx_frag_size) >
  798. adapter->big_page_size) {
  799. pagep = NULL;
  800. page_info->last_page_user = true;
  801. }
  802. prev_page_info = page_info;
  803. queue_head_inc(rxq);
  804. page_info = &page_info_tbl[rxq->head];
  805. }
  806. if (pagep)
  807. prev_page_info->last_page_user = true;
  808. if (posted) {
  809. atomic_add(posted, &rxq->used);
  810. be_rxq_notify(adapter, rxq->id, posted);
  811. } else if (atomic_read(&rxq->used) == 0) {
  812. /* Let be_worker replenish when memory is available */
  813. adapter->rx_post_starved = true;
  814. }
  815. return;
  816. }
  817. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  818. {
  819. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  820. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  821. return NULL;
  822. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  823. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  824. queue_tail_inc(tx_cq);
  825. return txcp;
  826. }
  827. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  828. {
  829. struct be_queue_info *txq = &adapter->tx_obj.q;
  830. struct be_eth_wrb *wrb;
  831. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  832. struct sk_buff *sent_skb;
  833. u64 busaddr;
  834. u16 cur_index, num_wrbs = 0;
  835. cur_index = txq->tail;
  836. sent_skb = sent_skbs[cur_index];
  837. BUG_ON(!sent_skb);
  838. sent_skbs[cur_index] = NULL;
  839. wrb = queue_tail_node(txq);
  840. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  841. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  842. if (busaddr != 0) {
  843. pci_unmap_single(adapter->pdev, busaddr,
  844. wrb->frag_len, PCI_DMA_TODEVICE);
  845. }
  846. num_wrbs++;
  847. queue_tail_inc(txq);
  848. while (cur_index != last_index) {
  849. cur_index = txq->tail;
  850. wrb = queue_tail_node(txq);
  851. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  852. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  853. if (busaddr != 0) {
  854. pci_unmap_page(adapter->pdev, busaddr,
  855. wrb->frag_len, PCI_DMA_TODEVICE);
  856. }
  857. num_wrbs++;
  858. queue_tail_inc(txq);
  859. }
  860. atomic_sub(num_wrbs, &txq->used);
  861. kfree_skb(sent_skb);
  862. }
  863. static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
  864. {
  865. struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
  866. if (!eqe->evt)
  867. return NULL;
  868. eqe->evt = le32_to_cpu(eqe->evt);
  869. queue_tail_inc(&eq_obj->q);
  870. return eqe;
  871. }
  872. static int event_handle(struct be_adapter *adapter,
  873. struct be_eq_obj *eq_obj)
  874. {
  875. struct be_eq_entry *eqe;
  876. u16 num = 0;
  877. while ((eqe = event_get(eq_obj)) != NULL) {
  878. eqe->evt = 0;
  879. num++;
  880. }
  881. /* Deal with any spurious interrupts that come
  882. * without events
  883. */
  884. be_eq_notify(adapter, eq_obj->q.id, true, true, num);
  885. if (num)
  886. napi_schedule(&eq_obj->napi);
  887. return num;
  888. }
  889. /* Just read and notify events without processing them.
  890. * Used at the time of destroying event queues */
  891. static void be_eq_clean(struct be_adapter *adapter,
  892. struct be_eq_obj *eq_obj)
  893. {
  894. struct be_eq_entry *eqe;
  895. u16 num = 0;
  896. while ((eqe = event_get(eq_obj)) != NULL) {
  897. eqe->evt = 0;
  898. num++;
  899. }
  900. if (num)
  901. be_eq_notify(adapter, eq_obj->q.id, false, true, num);
  902. }
  903. static void be_rx_q_clean(struct be_adapter *adapter)
  904. {
  905. struct be_rx_page_info *page_info;
  906. struct be_queue_info *rxq = &adapter->rx_obj.q;
  907. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  908. struct be_eth_rx_compl *rxcp;
  909. u16 tail;
  910. /* First cleanup pending rx completions */
  911. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  912. be_rx_compl_discard(adapter, rxcp);
  913. be_rx_compl_reset(rxcp);
  914. be_cq_notify(adapter, rx_cq->id, true, 1);
  915. }
  916. /* Then free posted rx buffer that were not used */
  917. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  918. for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
  919. page_info = get_rx_page_info(adapter, tail);
  920. put_page(page_info->page);
  921. memset(page_info, 0, sizeof(*page_info));
  922. }
  923. BUG_ON(atomic_read(&rxq->used));
  924. }
  925. static void be_tx_compl_clean(struct be_adapter *adapter)
  926. {
  927. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  928. struct be_queue_info *txq = &adapter->tx_obj.q;
  929. struct be_eth_tx_compl *txcp;
  930. u16 end_idx, cmpl = 0, timeo = 0;
  931. /* Wait for a max of 200ms for all the tx-completions to arrive. */
  932. do {
  933. while ((txcp = be_tx_compl_get(tx_cq))) {
  934. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  935. wrb_index, txcp);
  936. be_tx_compl_process(adapter, end_idx);
  937. cmpl++;
  938. }
  939. if (cmpl) {
  940. be_cq_notify(adapter, tx_cq->id, false, cmpl);
  941. cmpl = 0;
  942. }
  943. if (atomic_read(&txq->used) == 0 || ++timeo > 200)
  944. break;
  945. mdelay(1);
  946. } while (true);
  947. if (atomic_read(&txq->used))
  948. dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
  949. atomic_read(&txq->used));
  950. }
  951. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  952. {
  953. struct be_queue_info *q;
  954. q = &adapter->mcc_obj.q;
  955. if (q->created)
  956. be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
  957. be_queue_free(adapter, q);
  958. q = &adapter->mcc_obj.cq;
  959. if (q->created)
  960. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  961. be_queue_free(adapter, q);
  962. }
  963. /* Must be called only after TX qs are created as MCC shares TX EQ */
  964. static int be_mcc_queues_create(struct be_adapter *adapter)
  965. {
  966. struct be_queue_info *q, *cq;
  967. /* Alloc MCC compl queue */
  968. cq = &adapter->mcc_obj.cq;
  969. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  970. sizeof(struct be_mcc_compl)))
  971. goto err;
  972. /* Ask BE to create MCC compl queue; share TX's eq */
  973. if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
  974. goto mcc_cq_free;
  975. /* Alloc MCC queue */
  976. q = &adapter->mcc_obj.q;
  977. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  978. goto mcc_cq_destroy;
  979. /* Ask BE to create MCC queue */
  980. if (be_cmd_mccq_create(adapter, q, cq))
  981. goto mcc_q_free;
  982. return 0;
  983. mcc_q_free:
  984. be_queue_free(adapter, q);
  985. mcc_cq_destroy:
  986. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  987. mcc_cq_free:
  988. be_queue_free(adapter, cq);
  989. err:
  990. return -1;
  991. }
  992. static void be_tx_queues_destroy(struct be_adapter *adapter)
  993. {
  994. struct be_queue_info *q;
  995. q = &adapter->tx_obj.q;
  996. if (q->created)
  997. be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
  998. be_queue_free(adapter, q);
  999. q = &adapter->tx_obj.cq;
  1000. if (q->created)
  1001. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1002. be_queue_free(adapter, q);
  1003. /* Clear any residual events */
  1004. be_eq_clean(adapter, &adapter->tx_eq);
  1005. q = &adapter->tx_eq.q;
  1006. if (q->created)
  1007. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1008. be_queue_free(adapter, q);
  1009. }
  1010. static int be_tx_queues_create(struct be_adapter *adapter)
  1011. {
  1012. struct be_queue_info *eq, *q, *cq;
  1013. adapter->tx_eq.max_eqd = 0;
  1014. adapter->tx_eq.min_eqd = 0;
  1015. adapter->tx_eq.cur_eqd = 96;
  1016. adapter->tx_eq.enable_aic = false;
  1017. /* Alloc Tx Event queue */
  1018. eq = &adapter->tx_eq.q;
  1019. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  1020. return -1;
  1021. /* Ask BE to create Tx Event queue */
  1022. if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
  1023. goto tx_eq_free;
  1024. /* Alloc TX eth compl queue */
  1025. cq = &adapter->tx_obj.cq;
  1026. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  1027. sizeof(struct be_eth_tx_compl)))
  1028. goto tx_eq_destroy;
  1029. /* Ask BE to create Tx eth compl queue */
  1030. if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
  1031. goto tx_cq_free;
  1032. /* Alloc TX eth queue */
  1033. q = &adapter->tx_obj.q;
  1034. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  1035. goto tx_cq_destroy;
  1036. /* Ask BE to create Tx eth queue */
  1037. if (be_cmd_txq_create(adapter, q, cq))
  1038. goto tx_q_free;
  1039. return 0;
  1040. tx_q_free:
  1041. be_queue_free(adapter, q);
  1042. tx_cq_destroy:
  1043. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1044. tx_cq_free:
  1045. be_queue_free(adapter, cq);
  1046. tx_eq_destroy:
  1047. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1048. tx_eq_free:
  1049. be_queue_free(adapter, eq);
  1050. return -1;
  1051. }
  1052. static void be_rx_queues_destroy(struct be_adapter *adapter)
  1053. {
  1054. struct be_queue_info *q;
  1055. q = &adapter->rx_obj.q;
  1056. if (q->created) {
  1057. be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
  1058. be_rx_q_clean(adapter);
  1059. }
  1060. be_queue_free(adapter, q);
  1061. q = &adapter->rx_obj.cq;
  1062. if (q->created)
  1063. be_cmd_q_destroy(adapter, q, QTYPE_CQ);
  1064. be_queue_free(adapter, q);
  1065. /* Clear any residual events */
  1066. be_eq_clean(adapter, &adapter->rx_eq);
  1067. q = &adapter->rx_eq.q;
  1068. if (q->created)
  1069. be_cmd_q_destroy(adapter, q, QTYPE_EQ);
  1070. be_queue_free(adapter, q);
  1071. }
  1072. static int be_rx_queues_create(struct be_adapter *adapter)
  1073. {
  1074. struct be_queue_info *eq, *q, *cq;
  1075. int rc;
  1076. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  1077. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  1078. adapter->rx_eq.min_eqd = 0;
  1079. adapter->rx_eq.cur_eqd = 0;
  1080. adapter->rx_eq.enable_aic = true;
  1081. /* Alloc Rx Event queue */
  1082. eq = &adapter->rx_eq.q;
  1083. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1084. sizeof(struct be_eq_entry));
  1085. if (rc)
  1086. return rc;
  1087. /* Ask BE to create Rx Event queue */
  1088. rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
  1089. if (rc)
  1090. goto rx_eq_free;
  1091. /* Alloc RX eth compl queue */
  1092. cq = &adapter->rx_obj.cq;
  1093. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1094. sizeof(struct be_eth_rx_compl));
  1095. if (rc)
  1096. goto rx_eq_destroy;
  1097. /* Ask BE to create Rx eth compl queue */
  1098. rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
  1099. if (rc)
  1100. goto rx_cq_free;
  1101. /* Alloc RX eth queue */
  1102. q = &adapter->rx_obj.q;
  1103. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1104. if (rc)
  1105. goto rx_cq_destroy;
  1106. /* Ask BE to create Rx eth queue */
  1107. rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
  1108. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1109. if (rc)
  1110. goto rx_q_free;
  1111. return 0;
  1112. rx_q_free:
  1113. be_queue_free(adapter, q);
  1114. rx_cq_destroy:
  1115. be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
  1116. rx_cq_free:
  1117. be_queue_free(adapter, cq);
  1118. rx_eq_destroy:
  1119. be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
  1120. rx_eq_free:
  1121. be_queue_free(adapter, eq);
  1122. return rc;
  1123. }
  1124. /* There are 8 evt ids per func. Retruns the evt id's bit number */
  1125. static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
  1126. {
  1127. return eq_id - 8 * be_pci_func(adapter);
  1128. }
  1129. static irqreturn_t be_intx(int irq, void *dev)
  1130. {
  1131. struct be_adapter *adapter = dev;
  1132. int isr;
  1133. isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
  1134. (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
  1135. if (!isr)
  1136. return IRQ_NONE;
  1137. event_handle(adapter, &adapter->tx_eq);
  1138. event_handle(adapter, &adapter->rx_eq);
  1139. return IRQ_HANDLED;
  1140. }
  1141. static irqreturn_t be_msix_rx(int irq, void *dev)
  1142. {
  1143. struct be_adapter *adapter = dev;
  1144. event_handle(adapter, &adapter->rx_eq);
  1145. return IRQ_HANDLED;
  1146. }
  1147. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1148. {
  1149. struct be_adapter *adapter = dev;
  1150. event_handle(adapter, &adapter->tx_eq);
  1151. return IRQ_HANDLED;
  1152. }
  1153. static inline bool do_gro(struct be_adapter *adapter,
  1154. struct be_eth_rx_compl *rxcp)
  1155. {
  1156. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1157. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1158. if (err)
  1159. drvr_stats(adapter)->be_rxcp_err++;
  1160. return (tcp_frame && !err) ? true : false;
  1161. }
  1162. int be_poll_rx(struct napi_struct *napi, int budget)
  1163. {
  1164. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1165. struct be_adapter *adapter =
  1166. container_of(rx_eq, struct be_adapter, rx_eq);
  1167. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1168. struct be_eth_rx_compl *rxcp;
  1169. u32 work_done;
  1170. adapter->stats.drvr_stats.be_rx_polls++;
  1171. for (work_done = 0; work_done < budget; work_done++) {
  1172. rxcp = be_rx_compl_get(adapter);
  1173. if (!rxcp)
  1174. break;
  1175. if (do_gro(adapter, rxcp))
  1176. be_rx_compl_process_gro(adapter, rxcp);
  1177. else
  1178. be_rx_compl_process(adapter, rxcp);
  1179. be_rx_compl_reset(rxcp);
  1180. }
  1181. /* Refill the queue */
  1182. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1183. be_post_rx_frags(adapter);
  1184. /* All consumed */
  1185. if (work_done < budget) {
  1186. napi_complete(napi);
  1187. be_cq_notify(adapter, rx_cq->id, true, work_done);
  1188. } else {
  1189. /* More to be consumed; continue with interrupts disabled */
  1190. be_cq_notify(adapter, rx_cq->id, false, work_done);
  1191. }
  1192. return work_done;
  1193. }
  1194. void be_process_tx(struct be_adapter *adapter)
  1195. {
  1196. struct be_queue_info *txq = &adapter->tx_obj.q;
  1197. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1198. struct be_eth_tx_compl *txcp;
  1199. u32 num_cmpl = 0;
  1200. u16 end_idx;
  1201. while ((txcp = be_tx_compl_get(tx_cq))) {
  1202. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1203. wrb_index, txcp);
  1204. be_tx_compl_process(adapter, end_idx);
  1205. num_cmpl++;
  1206. }
  1207. if (num_cmpl) {
  1208. be_cq_notify(adapter, tx_cq->id, true, num_cmpl);
  1209. /* As Tx wrbs have been freed up, wake up netdev queue if
  1210. * it was stopped due to lack of tx wrbs.
  1211. */
  1212. if (netif_queue_stopped(adapter->netdev) &&
  1213. atomic_read(&txq->used) < txq->len / 2) {
  1214. netif_wake_queue(adapter->netdev);
  1215. }
  1216. drvr_stats(adapter)->be_tx_events++;
  1217. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1218. }
  1219. }
  1220. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1221. * For TX/MCC we don't honour budget; consume everything
  1222. */
  1223. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1224. {
  1225. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1226. struct be_adapter *adapter =
  1227. container_of(tx_eq, struct be_adapter, tx_eq);
  1228. napi_complete(napi);
  1229. be_process_tx(adapter);
  1230. be_process_mcc(adapter);
  1231. return 1;
  1232. }
  1233. static void be_worker(struct work_struct *work)
  1234. {
  1235. struct be_adapter *adapter =
  1236. container_of(work, struct be_adapter, work.work);
  1237. be_cmd_get_stats(adapter, &adapter->stats.cmd);
  1238. /* Set EQ delay */
  1239. be_rx_eqd_update(adapter);
  1240. be_tx_rate_update(adapter);
  1241. be_rx_rate_update(adapter);
  1242. if (adapter->rx_post_starved) {
  1243. adapter->rx_post_starved = false;
  1244. be_post_rx_frags(adapter);
  1245. }
  1246. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1247. }
  1248. static void be_msix_disable(struct be_adapter *adapter)
  1249. {
  1250. if (adapter->msix_enabled) {
  1251. pci_disable_msix(adapter->pdev);
  1252. adapter->msix_enabled = false;
  1253. }
  1254. }
  1255. static void be_msix_enable(struct be_adapter *adapter)
  1256. {
  1257. int i, status;
  1258. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1259. adapter->msix_entries[i].entry = i;
  1260. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1261. BE_NUM_MSIX_VECTORS);
  1262. if (status == 0)
  1263. adapter->msix_enabled = true;
  1264. return;
  1265. }
  1266. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1267. {
  1268. return adapter->msix_entries[
  1269. be_evt_bit_get(adapter, eq_id)].vector;
  1270. }
  1271. static int be_request_irq(struct be_adapter *adapter,
  1272. struct be_eq_obj *eq_obj,
  1273. void *handler, char *desc)
  1274. {
  1275. struct net_device *netdev = adapter->netdev;
  1276. int vec;
  1277. sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
  1278. vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1279. return request_irq(vec, handler, 0, eq_obj->desc, adapter);
  1280. }
  1281. static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
  1282. {
  1283. int vec = be_msix_vec_get(adapter, eq_obj->q.id);
  1284. free_irq(vec, adapter);
  1285. }
  1286. static int be_msix_register(struct be_adapter *adapter)
  1287. {
  1288. int status;
  1289. status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
  1290. if (status)
  1291. goto err;
  1292. status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
  1293. if (status)
  1294. goto free_tx_irq;
  1295. return 0;
  1296. free_tx_irq:
  1297. be_free_irq(adapter, &adapter->tx_eq);
  1298. err:
  1299. dev_warn(&adapter->pdev->dev,
  1300. "MSIX Request IRQ failed - err %d\n", status);
  1301. pci_disable_msix(adapter->pdev);
  1302. adapter->msix_enabled = false;
  1303. return status;
  1304. }
  1305. static int be_irq_register(struct be_adapter *adapter)
  1306. {
  1307. struct net_device *netdev = adapter->netdev;
  1308. int status;
  1309. if (adapter->msix_enabled) {
  1310. status = be_msix_register(adapter);
  1311. if (status == 0)
  1312. goto done;
  1313. }
  1314. /* INTx */
  1315. netdev->irq = adapter->pdev->irq;
  1316. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1317. adapter);
  1318. if (status) {
  1319. dev_err(&adapter->pdev->dev,
  1320. "INTx request IRQ failed - err %d\n", status);
  1321. return status;
  1322. }
  1323. done:
  1324. adapter->isr_registered = true;
  1325. return 0;
  1326. }
  1327. static void be_irq_unregister(struct be_adapter *adapter)
  1328. {
  1329. struct net_device *netdev = adapter->netdev;
  1330. if (!adapter->isr_registered)
  1331. return;
  1332. /* INTx */
  1333. if (!adapter->msix_enabled) {
  1334. free_irq(netdev->irq, adapter);
  1335. goto done;
  1336. }
  1337. /* MSIx */
  1338. be_free_irq(adapter, &adapter->tx_eq);
  1339. be_free_irq(adapter, &adapter->rx_eq);
  1340. done:
  1341. adapter->isr_registered = false;
  1342. return;
  1343. }
  1344. static int be_open(struct net_device *netdev)
  1345. {
  1346. struct be_adapter *adapter = netdev_priv(netdev);
  1347. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1348. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1349. bool link_up;
  1350. int status;
  1351. u8 mac_speed;
  1352. u16 link_speed;
  1353. /* First time posting */
  1354. be_post_rx_frags(adapter);
  1355. napi_enable(&rx_eq->napi);
  1356. napi_enable(&tx_eq->napi);
  1357. be_irq_register(adapter);
  1358. be_intr_set(adapter, true);
  1359. /* The evt queues are created in unarmed state; arm them */
  1360. be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
  1361. be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
  1362. /* Rx compl queue may be in unarmed state; rearm it */
  1363. be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
  1364. status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
  1365. &link_speed);
  1366. if (status)
  1367. goto ret_sts;
  1368. be_link_status_update(adapter, link_up);
  1369. status = be_vid_config(adapter);
  1370. if (status)
  1371. goto ret_sts;
  1372. status = be_cmd_set_flow_control(adapter,
  1373. adapter->tx_fc, adapter->rx_fc);
  1374. if (status)
  1375. goto ret_sts;
  1376. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1377. ret_sts:
  1378. return status;
  1379. }
  1380. static int be_setup_wol(struct be_adapter *adapter, bool enable)
  1381. {
  1382. struct be_dma_mem cmd;
  1383. int status = 0;
  1384. u8 mac[ETH_ALEN];
  1385. memset(mac, 0, ETH_ALEN);
  1386. cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
  1387. cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
  1388. if (cmd.va == NULL)
  1389. return -1;
  1390. memset(cmd.va, 0, cmd.size);
  1391. if (enable) {
  1392. status = pci_write_config_dword(adapter->pdev,
  1393. PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
  1394. if (status) {
  1395. dev_err(&adapter->pdev->dev,
  1396. "Could not enable Wake-on-lan \n");
  1397. pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
  1398. cmd.dma);
  1399. return status;
  1400. }
  1401. status = be_cmd_enable_magic_wol(adapter,
  1402. adapter->netdev->dev_addr, &cmd);
  1403. pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
  1404. pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
  1405. } else {
  1406. status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
  1407. pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
  1408. pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
  1409. }
  1410. pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
  1411. return status;
  1412. }
  1413. static int be_setup(struct be_adapter *adapter)
  1414. {
  1415. struct net_device *netdev = adapter->netdev;
  1416. u32 cap_flags, en_flags;
  1417. int status;
  1418. cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1419. BE_IF_FLAGS_MCAST_PROMISCUOUS |
  1420. BE_IF_FLAGS_PROMISCUOUS |
  1421. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1422. en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
  1423. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1424. status = be_cmd_if_create(adapter, cap_flags, en_flags,
  1425. netdev->dev_addr, false/* pmac_invalid */,
  1426. &adapter->if_handle, &adapter->pmac_id);
  1427. if (status != 0)
  1428. goto do_none;
  1429. status = be_tx_queues_create(adapter);
  1430. if (status != 0)
  1431. goto if_destroy;
  1432. status = be_rx_queues_create(adapter);
  1433. if (status != 0)
  1434. goto tx_qs_destroy;
  1435. status = be_mcc_queues_create(adapter);
  1436. if (status != 0)
  1437. goto rx_qs_destroy;
  1438. adapter->link_speed = -1;
  1439. return 0;
  1440. rx_qs_destroy:
  1441. be_rx_queues_destroy(adapter);
  1442. tx_qs_destroy:
  1443. be_tx_queues_destroy(adapter);
  1444. if_destroy:
  1445. be_cmd_if_destroy(adapter, adapter->if_handle);
  1446. do_none:
  1447. return status;
  1448. }
  1449. static int be_clear(struct be_adapter *adapter)
  1450. {
  1451. be_mcc_queues_destroy(adapter);
  1452. be_rx_queues_destroy(adapter);
  1453. be_tx_queues_destroy(adapter);
  1454. be_cmd_if_destroy(adapter, adapter->if_handle);
  1455. /* tell fw we're done with firing cmds */
  1456. be_cmd_fw_clean(adapter);
  1457. return 0;
  1458. }
  1459. static int be_close(struct net_device *netdev)
  1460. {
  1461. struct be_adapter *adapter = netdev_priv(netdev);
  1462. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1463. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1464. int vec;
  1465. cancel_delayed_work_sync(&adapter->work);
  1466. netif_stop_queue(netdev);
  1467. netif_carrier_off(netdev);
  1468. adapter->link_up = false;
  1469. be_intr_set(adapter, false);
  1470. if (adapter->msix_enabled) {
  1471. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1472. synchronize_irq(vec);
  1473. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1474. synchronize_irq(vec);
  1475. } else {
  1476. synchronize_irq(netdev->irq);
  1477. }
  1478. be_irq_unregister(adapter);
  1479. napi_disable(&rx_eq->napi);
  1480. napi_disable(&tx_eq->napi);
  1481. /* Wait for all pending tx completions to arrive so that
  1482. * all tx skbs are freed.
  1483. */
  1484. be_tx_compl_clean(adapter);
  1485. return 0;
  1486. }
  1487. #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
  1488. char flash_cookie[2][16] = {"*** SE FLAS",
  1489. "H DIRECTORY *** "};
  1490. static bool be_flash_redboot(struct be_adapter *adapter,
  1491. const u8 *p)
  1492. {
  1493. u32 crc_offset;
  1494. u8 flashed_crc[4];
  1495. int status;
  1496. crc_offset = FLASH_REDBOOT_START + FLASH_REDBOOT_IMAGE_MAX_SIZE - 4
  1497. + sizeof(struct flash_file_hdr) - 32*1024;
  1498. p += crc_offset;
  1499. status = be_cmd_get_flash_crc(adapter, flashed_crc);
  1500. if (status) {
  1501. dev_err(&adapter->pdev->dev,
  1502. "could not get crc from flash, not flashing redboot\n");
  1503. return false;
  1504. }
  1505. /*update redboot only if crc does not match*/
  1506. if (!memcmp(flashed_crc, p, 4))
  1507. return false;
  1508. else
  1509. return true;
  1510. }
  1511. static int be_flash_image(struct be_adapter *adapter,
  1512. const struct firmware *fw,
  1513. struct be_dma_mem *flash_cmd, u32 flash_type)
  1514. {
  1515. int status;
  1516. u32 flash_op, image_offset = 0, total_bytes, image_size = 0;
  1517. int num_bytes;
  1518. const u8 *p = fw->data;
  1519. struct be_cmd_write_flashrom *req = flash_cmd->va;
  1520. switch (flash_type) {
  1521. case FLASHROM_TYPE_ISCSI_ACTIVE:
  1522. image_offset = FLASH_iSCSI_PRIMARY_IMAGE_START;
  1523. image_size = FLASH_IMAGE_MAX_SIZE;
  1524. break;
  1525. case FLASHROM_TYPE_ISCSI_BACKUP:
  1526. image_offset = FLASH_iSCSI_BACKUP_IMAGE_START;
  1527. image_size = FLASH_IMAGE_MAX_SIZE;
  1528. break;
  1529. case FLASHROM_TYPE_FCOE_FW_ACTIVE:
  1530. image_offset = FLASH_FCoE_PRIMARY_IMAGE_START;
  1531. image_size = FLASH_IMAGE_MAX_SIZE;
  1532. break;
  1533. case FLASHROM_TYPE_FCOE_FW_BACKUP:
  1534. image_offset = FLASH_FCoE_BACKUP_IMAGE_START;
  1535. image_size = FLASH_IMAGE_MAX_SIZE;
  1536. break;
  1537. case FLASHROM_TYPE_BIOS:
  1538. image_offset = FLASH_iSCSI_BIOS_START;
  1539. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1540. break;
  1541. case FLASHROM_TYPE_FCOE_BIOS:
  1542. image_offset = FLASH_FCoE_BIOS_START;
  1543. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1544. break;
  1545. case FLASHROM_TYPE_PXE_BIOS:
  1546. image_offset = FLASH_PXE_BIOS_START;
  1547. image_size = FLASH_BIOS_IMAGE_MAX_SIZE;
  1548. break;
  1549. case FLASHROM_TYPE_REDBOOT:
  1550. if (!be_flash_redboot(adapter, fw->data))
  1551. return 0;
  1552. image_offset = FLASH_REDBOOT_ISM_START;
  1553. image_size = FLASH_REDBOOT_IMAGE_MAX_SIZE;
  1554. break;
  1555. default:
  1556. return 0;
  1557. }
  1558. p += sizeof(struct flash_file_hdr) + image_offset;
  1559. if (p + image_size > fw->data + fw->size)
  1560. return -1;
  1561. total_bytes = image_size;
  1562. while (total_bytes) {
  1563. if (total_bytes > 32*1024)
  1564. num_bytes = 32*1024;
  1565. else
  1566. num_bytes = total_bytes;
  1567. total_bytes -= num_bytes;
  1568. if (!total_bytes)
  1569. flash_op = FLASHROM_OPER_FLASH;
  1570. else
  1571. flash_op = FLASHROM_OPER_SAVE;
  1572. memcpy(req->params.data_buf, p, num_bytes);
  1573. p += num_bytes;
  1574. status = be_cmd_write_flashrom(adapter, flash_cmd,
  1575. flash_type, flash_op, num_bytes);
  1576. if (status) {
  1577. dev_err(&adapter->pdev->dev,
  1578. "cmd to write to flash rom failed. type/op %d/%d\n",
  1579. flash_type, flash_op);
  1580. return -1;
  1581. }
  1582. yield();
  1583. }
  1584. return 0;
  1585. }
  1586. int be_load_fw(struct be_adapter *adapter, u8 *func)
  1587. {
  1588. char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
  1589. const struct firmware *fw;
  1590. struct flash_file_hdr *fhdr;
  1591. struct flash_section_info *fsec = NULL;
  1592. struct be_dma_mem flash_cmd;
  1593. int status;
  1594. const u8 *p;
  1595. bool entry_found = false;
  1596. int flash_type;
  1597. char fw_ver[FW_VER_LEN];
  1598. char fw_cfg;
  1599. status = be_cmd_get_fw_ver(adapter, fw_ver);
  1600. if (status)
  1601. return status;
  1602. fw_cfg = *(fw_ver + 2);
  1603. if (fw_cfg == '0')
  1604. fw_cfg = '1';
  1605. strcpy(fw_file, func);
  1606. status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
  1607. if (status)
  1608. goto fw_exit;
  1609. p = fw->data;
  1610. fhdr = (struct flash_file_hdr *) p;
  1611. if (memcmp(fhdr->sign, FW_FILE_HDR_SIGN, strlen(FW_FILE_HDR_SIGN))) {
  1612. dev_err(&adapter->pdev->dev,
  1613. "Firmware(%s) load error (signature did not match)\n",
  1614. fw_file);
  1615. status = -1;
  1616. goto fw_exit;
  1617. }
  1618. dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
  1619. p += sizeof(struct flash_file_hdr);
  1620. while (p < (fw->data + fw->size)) {
  1621. fsec = (struct flash_section_info *)p;
  1622. if (!memcmp(flash_cookie, fsec->cookie, sizeof(flash_cookie))) {
  1623. entry_found = true;
  1624. break;
  1625. }
  1626. p += 32;
  1627. }
  1628. if (!entry_found) {
  1629. status = -1;
  1630. dev_err(&adapter->pdev->dev,
  1631. "Flash cookie not found in firmware image\n");
  1632. goto fw_exit;
  1633. }
  1634. flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
  1635. flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
  1636. &flash_cmd.dma);
  1637. if (!flash_cmd.va) {
  1638. status = -ENOMEM;
  1639. dev_err(&adapter->pdev->dev,
  1640. "Memory allocation failure while flashing\n");
  1641. goto fw_exit;
  1642. }
  1643. for (flash_type = FLASHROM_TYPE_ISCSI_ACTIVE;
  1644. flash_type <= FLASHROM_TYPE_FCOE_FW_BACKUP; flash_type++) {
  1645. status = be_flash_image(adapter, fw, &flash_cmd,
  1646. flash_type);
  1647. if (status)
  1648. break;
  1649. }
  1650. pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
  1651. flash_cmd.dma);
  1652. if (status) {
  1653. dev_err(&adapter->pdev->dev, "Firmware load error\n");
  1654. goto fw_exit;
  1655. }
  1656. dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
  1657. fw_exit:
  1658. release_firmware(fw);
  1659. return status;
  1660. }
  1661. static struct net_device_ops be_netdev_ops = {
  1662. .ndo_open = be_open,
  1663. .ndo_stop = be_close,
  1664. .ndo_start_xmit = be_xmit,
  1665. .ndo_get_stats = be_get_stats,
  1666. .ndo_set_rx_mode = be_set_multicast_list,
  1667. .ndo_set_mac_address = be_mac_addr_set,
  1668. .ndo_change_mtu = be_change_mtu,
  1669. .ndo_validate_addr = eth_validate_addr,
  1670. .ndo_vlan_rx_register = be_vlan_register,
  1671. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1672. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1673. };
  1674. static void be_netdev_init(struct net_device *netdev)
  1675. {
  1676. struct be_adapter *adapter = netdev_priv(netdev);
  1677. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1678. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
  1679. NETIF_F_GRO;
  1680. netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
  1681. netdev->flags |= IFF_MULTICAST;
  1682. adapter->rx_csum = true;
  1683. /* Default settings for Rx and Tx flow control */
  1684. adapter->rx_fc = true;
  1685. adapter->tx_fc = true;
  1686. netif_set_gso_max_size(netdev, 65535);
  1687. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1688. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1689. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1690. BE_NAPI_WEIGHT);
  1691. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1692. BE_NAPI_WEIGHT);
  1693. netif_carrier_off(netdev);
  1694. netif_stop_queue(netdev);
  1695. }
  1696. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1697. {
  1698. if (adapter->csr)
  1699. iounmap(adapter->csr);
  1700. if (adapter->db)
  1701. iounmap(adapter->db);
  1702. if (adapter->pcicfg)
  1703. iounmap(adapter->pcicfg);
  1704. }
  1705. static int be_map_pci_bars(struct be_adapter *adapter)
  1706. {
  1707. u8 __iomem *addr;
  1708. int pcicfg_reg;
  1709. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1710. pci_resource_len(adapter->pdev, 2));
  1711. if (addr == NULL)
  1712. return -ENOMEM;
  1713. adapter->csr = addr;
  1714. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1715. 128 * 1024);
  1716. if (addr == NULL)
  1717. goto pci_map_err;
  1718. adapter->db = addr;
  1719. if (adapter->generation == BE_GEN2)
  1720. pcicfg_reg = 1;
  1721. else
  1722. pcicfg_reg = 0;
  1723. addr = ioremap_nocache(pci_resource_start(adapter->pdev, pcicfg_reg),
  1724. pci_resource_len(adapter->pdev, pcicfg_reg));
  1725. if (addr == NULL)
  1726. goto pci_map_err;
  1727. adapter->pcicfg = addr;
  1728. return 0;
  1729. pci_map_err:
  1730. be_unmap_pci_bars(adapter);
  1731. return -ENOMEM;
  1732. }
  1733. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1734. {
  1735. struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
  1736. be_unmap_pci_bars(adapter);
  1737. if (mem->va)
  1738. pci_free_consistent(adapter->pdev, mem->size,
  1739. mem->va, mem->dma);
  1740. mem = &adapter->mc_cmd_mem;
  1741. if (mem->va)
  1742. pci_free_consistent(adapter->pdev, mem->size,
  1743. mem->va, mem->dma);
  1744. }
  1745. static int be_ctrl_init(struct be_adapter *adapter)
  1746. {
  1747. struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
  1748. struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
  1749. struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
  1750. int status;
  1751. status = be_map_pci_bars(adapter);
  1752. if (status)
  1753. goto done;
  1754. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1755. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1756. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1757. if (!mbox_mem_alloc->va) {
  1758. status = -ENOMEM;
  1759. goto unmap_pci_bars;
  1760. }
  1761. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1762. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1763. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1764. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1765. mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
  1766. mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
  1767. &mc_cmd_mem->dma);
  1768. if (mc_cmd_mem->va == NULL) {
  1769. status = -ENOMEM;
  1770. goto free_mbox;
  1771. }
  1772. memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
  1773. spin_lock_init(&adapter->mbox_lock);
  1774. spin_lock_init(&adapter->mcc_lock);
  1775. spin_lock_init(&adapter->mcc_cq_lock);
  1776. return 0;
  1777. free_mbox:
  1778. pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
  1779. mbox_mem_alloc->va, mbox_mem_alloc->dma);
  1780. unmap_pci_bars:
  1781. be_unmap_pci_bars(adapter);
  1782. done:
  1783. return status;
  1784. }
  1785. static void be_stats_cleanup(struct be_adapter *adapter)
  1786. {
  1787. struct be_stats_obj *stats = &adapter->stats;
  1788. struct be_dma_mem *cmd = &stats->cmd;
  1789. if (cmd->va)
  1790. pci_free_consistent(adapter->pdev, cmd->size,
  1791. cmd->va, cmd->dma);
  1792. }
  1793. static int be_stats_init(struct be_adapter *adapter)
  1794. {
  1795. struct be_stats_obj *stats = &adapter->stats;
  1796. struct be_dma_mem *cmd = &stats->cmd;
  1797. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1798. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1799. if (cmd->va == NULL)
  1800. return -1;
  1801. memset(cmd->va, 0, cmd->size);
  1802. return 0;
  1803. }
  1804. static void __devexit be_remove(struct pci_dev *pdev)
  1805. {
  1806. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1807. if (!adapter)
  1808. return;
  1809. unregister_netdev(adapter->netdev);
  1810. be_clear(adapter);
  1811. be_stats_cleanup(adapter);
  1812. be_ctrl_cleanup(adapter);
  1813. be_msix_disable(adapter);
  1814. pci_set_drvdata(pdev, NULL);
  1815. pci_release_regions(pdev);
  1816. pci_disable_device(pdev);
  1817. free_netdev(adapter->netdev);
  1818. }
  1819. static int be_get_config(struct be_adapter *adapter)
  1820. {
  1821. int status;
  1822. u8 mac[ETH_ALEN];
  1823. status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
  1824. if (status)
  1825. return status;
  1826. status = be_cmd_query_fw_cfg(adapter,
  1827. &adapter->port_num, &adapter->cap);
  1828. if (status)
  1829. return status;
  1830. memset(mac, 0, ETH_ALEN);
  1831. status = be_cmd_mac_addr_query(adapter, mac,
  1832. MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
  1833. if (status)
  1834. return status;
  1835. if (!is_valid_ether_addr(mac))
  1836. return -EADDRNOTAVAIL;
  1837. memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
  1838. memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
  1839. return 0;
  1840. }
  1841. static int __devinit be_probe(struct pci_dev *pdev,
  1842. const struct pci_device_id *pdev_id)
  1843. {
  1844. int status = 0;
  1845. struct be_adapter *adapter;
  1846. struct net_device *netdev;
  1847. status = pci_enable_device(pdev);
  1848. if (status)
  1849. goto do_none;
  1850. status = pci_request_regions(pdev, DRV_NAME);
  1851. if (status)
  1852. goto disable_dev;
  1853. pci_set_master(pdev);
  1854. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1855. if (netdev == NULL) {
  1856. status = -ENOMEM;
  1857. goto rel_reg;
  1858. }
  1859. adapter = netdev_priv(netdev);
  1860. switch (pdev->device) {
  1861. case BE_DEVICE_ID1:
  1862. case OC_DEVICE_ID1:
  1863. adapter->generation = BE_GEN2;
  1864. break;
  1865. case BE_DEVICE_ID2:
  1866. case OC_DEVICE_ID2:
  1867. adapter->generation = BE_GEN3;
  1868. break;
  1869. default:
  1870. adapter->generation = 0;
  1871. }
  1872. adapter->pdev = pdev;
  1873. pci_set_drvdata(pdev, adapter);
  1874. adapter->netdev = netdev;
  1875. be_netdev_init(netdev);
  1876. SET_NETDEV_DEV(netdev, &pdev->dev);
  1877. be_msix_enable(adapter);
  1878. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1879. if (!status) {
  1880. netdev->features |= NETIF_F_HIGHDMA;
  1881. } else {
  1882. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1883. if (status) {
  1884. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1885. goto free_netdev;
  1886. }
  1887. }
  1888. status = be_ctrl_init(adapter);
  1889. if (status)
  1890. goto free_netdev;
  1891. /* sync up with fw's ready state */
  1892. status = be_cmd_POST(adapter);
  1893. if (status)
  1894. goto ctrl_clean;
  1895. /* tell fw we're ready to fire cmds */
  1896. status = be_cmd_fw_init(adapter);
  1897. if (status)
  1898. goto ctrl_clean;
  1899. status = be_cmd_reset_function(adapter);
  1900. if (status)
  1901. goto ctrl_clean;
  1902. status = be_stats_init(adapter);
  1903. if (status)
  1904. goto ctrl_clean;
  1905. status = be_get_config(adapter);
  1906. if (status)
  1907. goto stats_clean;
  1908. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1909. status = be_setup(adapter);
  1910. if (status)
  1911. goto stats_clean;
  1912. status = register_netdev(netdev);
  1913. if (status != 0)
  1914. goto unsetup;
  1915. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1916. return 0;
  1917. unsetup:
  1918. be_clear(adapter);
  1919. stats_clean:
  1920. be_stats_cleanup(adapter);
  1921. ctrl_clean:
  1922. be_ctrl_cleanup(adapter);
  1923. free_netdev:
  1924. be_msix_disable(adapter);
  1925. free_netdev(adapter->netdev);
  1926. pci_set_drvdata(pdev, NULL);
  1927. rel_reg:
  1928. pci_release_regions(pdev);
  1929. disable_dev:
  1930. pci_disable_device(pdev);
  1931. do_none:
  1932. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1933. return status;
  1934. }
  1935. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1936. {
  1937. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1938. struct net_device *netdev = adapter->netdev;
  1939. if (adapter->wol)
  1940. be_setup_wol(adapter, true);
  1941. netif_device_detach(netdev);
  1942. if (netif_running(netdev)) {
  1943. rtnl_lock();
  1944. be_close(netdev);
  1945. rtnl_unlock();
  1946. }
  1947. be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
  1948. be_clear(adapter);
  1949. pci_save_state(pdev);
  1950. pci_disable_device(pdev);
  1951. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1952. return 0;
  1953. }
  1954. static int be_resume(struct pci_dev *pdev)
  1955. {
  1956. int status = 0;
  1957. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1958. struct net_device *netdev = adapter->netdev;
  1959. netif_device_detach(netdev);
  1960. status = pci_enable_device(pdev);
  1961. if (status)
  1962. return status;
  1963. pci_set_power_state(pdev, 0);
  1964. pci_restore_state(pdev);
  1965. /* tell fw we're ready to fire cmds */
  1966. status = be_cmd_fw_init(adapter);
  1967. if (status)
  1968. return status;
  1969. be_setup(adapter);
  1970. if (netif_running(netdev)) {
  1971. rtnl_lock();
  1972. be_open(netdev);
  1973. rtnl_unlock();
  1974. }
  1975. netif_device_attach(netdev);
  1976. if (adapter->wol)
  1977. be_setup_wol(adapter, false);
  1978. return 0;
  1979. }
  1980. static struct pci_driver be_driver = {
  1981. .name = DRV_NAME,
  1982. .id_table = be_dev_ids,
  1983. .probe = be_probe,
  1984. .remove = be_remove,
  1985. .suspend = be_suspend,
  1986. .resume = be_resume
  1987. };
  1988. static int __init be_init_module(void)
  1989. {
  1990. if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
  1991. rx_frag_size != 2048) {
  1992. printk(KERN_WARNING DRV_NAME
  1993. " : Module param rx_frag_size must be 2048/4096/8192."
  1994. " Using 2048\n");
  1995. rx_frag_size = 2048;
  1996. }
  1997. return pci_register_driver(&be_driver);
  1998. }
  1999. module_init(be_init_module);
  2000. static void __exit be_exit_module(void)
  2001. {
  2002. pci_unregister_driver(&be_driver);
  2003. }
  2004. module_exit(be_exit_module);