qla_init.c 121 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /****************************************************************************/
  37. /* QLogic ISP2x00 Hardware Support Functions. */
  38. /****************************************************************************/
  39. /*
  40. * qla2x00_initialize_adapter
  41. * Initialize board.
  42. *
  43. * Input:
  44. * ha = adapter block pointer.
  45. *
  46. * Returns:
  47. * 0 = success
  48. */
  49. int
  50. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  51. {
  52. int rval;
  53. struct qla_hw_data *ha = vha->hw;
  54. struct req_que *req = ha->req_q_map[0];
  55. /* Clear adapter flags. */
  56. vha->flags.online = 0;
  57. vha->flags.reset_active = 0;
  58. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  59. atomic_set(&vha->loop_state, LOOP_DOWN);
  60. vha->device_flags = DFLG_NO_CABLE;
  61. vha->dpc_flags = 0;
  62. vha->flags.management_server_logged_in = 0;
  63. vha->marker_needed = 0;
  64. ha->mbx_flags = 0;
  65. ha->isp_abort_cnt = 0;
  66. ha->beacon_blink_led = 0;
  67. set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
  68. set_bit(0, ha->req_qid_map);
  69. set_bit(0, ha->rsp_qid_map);
  70. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  71. rval = ha->isp_ops->pci_config(vha);
  72. if (rval) {
  73. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  74. vha->host_no));
  75. return (rval);
  76. }
  77. ha->isp_ops->reset_chip(vha);
  78. rval = qla2xxx_get_flash_info(vha);
  79. if (rval) {
  80. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  81. vha->host_no));
  82. return (rval);
  83. }
  84. ha->isp_ops->get_flash_version(vha, req->ring);
  85. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  86. ha->isp_ops->nvram_config(vha);
  87. if (ha->flags.disable_serdes) {
  88. /* Mask HBA via NVRAM settings? */
  89. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  90. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  91. vha->port_name[0], vha->port_name[1],
  92. vha->port_name[2], vha->port_name[3],
  93. vha->port_name[4], vha->port_name[5],
  94. vha->port_name[6], vha->port_name[7]);
  95. return QLA_FUNCTION_FAILED;
  96. }
  97. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  98. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  99. rval = ha->isp_ops->chip_diag(vha);
  100. if (rval)
  101. return (rval);
  102. rval = qla2x00_setup_chip(vha);
  103. if (rval)
  104. return (rval);
  105. }
  106. if (IS_QLA84XX(ha)) {
  107. ha->cs84xx = qla84xx_get_chip(vha);
  108. if (!ha->cs84xx) {
  109. qla_printk(KERN_ERR, ha,
  110. "Unable to configure ISP84XX.\n");
  111. return QLA_FUNCTION_FAILED;
  112. }
  113. }
  114. rval = qla2x00_init_rings(vha);
  115. return (rval);
  116. }
  117. /**
  118. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  119. * @ha: HA context
  120. *
  121. * Returns 0 on success.
  122. */
  123. int
  124. qla2100_pci_config(scsi_qla_host_t *vha)
  125. {
  126. uint16_t w;
  127. unsigned long flags;
  128. struct qla_hw_data *ha = vha->hw;
  129. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  130. pci_set_master(ha->pdev);
  131. pci_try_set_mwi(ha->pdev);
  132. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  133. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  134. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  135. pci_disable_rom(ha->pdev);
  136. /* Get PCI bus information. */
  137. spin_lock_irqsave(&ha->hardware_lock, flags);
  138. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  139. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  140. return QLA_SUCCESS;
  141. }
  142. /**
  143. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  144. * @ha: HA context
  145. *
  146. * Returns 0 on success.
  147. */
  148. int
  149. qla2300_pci_config(scsi_qla_host_t *vha)
  150. {
  151. uint16_t w;
  152. unsigned long flags = 0;
  153. uint32_t cnt;
  154. struct qla_hw_data *ha = vha->hw;
  155. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  156. pci_set_master(ha->pdev);
  157. pci_try_set_mwi(ha->pdev);
  158. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  159. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  160. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  161. w &= ~PCI_COMMAND_INTX_DISABLE;
  162. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  163. /*
  164. * If this is a 2300 card and not 2312, reset the
  165. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  166. * the 2310 also reports itself as a 2300 so we need to get the
  167. * fb revision level -- a 6 indicates it really is a 2300 and
  168. * not a 2310.
  169. */
  170. if (IS_QLA2300(ha)) {
  171. spin_lock_irqsave(&ha->hardware_lock, flags);
  172. /* Pause RISC. */
  173. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  174. for (cnt = 0; cnt < 30000; cnt++) {
  175. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  176. break;
  177. udelay(10);
  178. }
  179. /* Select FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Get the fb rev level */
  183. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  184. if (ha->fb_rev == FPM_2300)
  185. pci_clear_mwi(ha->pdev);
  186. /* Deselect FPM registers. */
  187. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  188. RD_REG_WORD(&reg->ctrl_status);
  189. /* Release RISC module. */
  190. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  191. for (cnt = 0; cnt < 30000; cnt++) {
  192. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  193. break;
  194. udelay(10);
  195. }
  196. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  197. }
  198. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  199. pci_disable_rom(ha->pdev);
  200. /* Get PCI bus information. */
  201. spin_lock_irqsave(&ha->hardware_lock, flags);
  202. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  203. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  204. return QLA_SUCCESS;
  205. }
  206. /**
  207. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  208. * @ha: HA context
  209. *
  210. * Returns 0 on success.
  211. */
  212. int
  213. qla24xx_pci_config(scsi_qla_host_t *vha)
  214. {
  215. uint16_t w;
  216. unsigned long flags = 0;
  217. struct qla_hw_data *ha = vha->hw;
  218. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  219. pci_set_master(ha->pdev);
  220. pci_try_set_mwi(ha->pdev);
  221. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  222. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  223. w &= ~PCI_COMMAND_INTX_DISABLE;
  224. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  225. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  226. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  227. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  228. pcix_set_mmrbc(ha->pdev, 2048);
  229. /* PCIe -- adjust Maximum Read Request Size (2048). */
  230. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  231. pcie_set_readrq(ha->pdev, 2048);
  232. pci_disable_rom(ha->pdev);
  233. ha->chip_revision = ha->pdev->revision;
  234. /* Get PCI bus information. */
  235. spin_lock_irqsave(&ha->hardware_lock, flags);
  236. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  237. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  238. return QLA_SUCCESS;
  239. }
  240. /**
  241. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  242. * @ha: HA context
  243. *
  244. * Returns 0 on success.
  245. */
  246. int
  247. qla25xx_pci_config(scsi_qla_host_t *vha)
  248. {
  249. uint16_t w;
  250. struct qla_hw_data *ha = vha->hw;
  251. pci_set_master(ha->pdev);
  252. pci_try_set_mwi(ha->pdev);
  253. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  254. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  255. w &= ~PCI_COMMAND_INTX_DISABLE;
  256. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  257. /* PCIe -- adjust Maximum Read Request Size (2048). */
  258. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  259. pcie_set_readrq(ha->pdev, 2048);
  260. pci_disable_rom(ha->pdev);
  261. ha->chip_revision = ha->pdev->revision;
  262. return QLA_SUCCESS;
  263. }
  264. /**
  265. * qla2x00_isp_firmware() - Choose firmware image.
  266. * @ha: HA context
  267. *
  268. * Returns 0 on success.
  269. */
  270. static int
  271. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  272. {
  273. int rval;
  274. uint16_t loop_id, topo, sw_cap;
  275. uint8_t domain, area, al_pa;
  276. struct qla_hw_data *ha = vha->hw;
  277. /* Assume loading risc code */
  278. rval = QLA_FUNCTION_FAILED;
  279. if (ha->flags.disable_risc_code_load) {
  280. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  281. vha->host_no));
  282. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  283. /* Verify checksum of loaded RISC code. */
  284. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  285. if (rval == QLA_SUCCESS) {
  286. /* And, verify we are not in ROM code. */
  287. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  288. &area, &domain, &topo, &sw_cap);
  289. }
  290. }
  291. if (rval) {
  292. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  293. vha->host_no));
  294. }
  295. return (rval);
  296. }
  297. /**
  298. * qla2x00_reset_chip() - Reset ISP chip.
  299. * @ha: HA context
  300. *
  301. * Returns 0 on success.
  302. */
  303. void
  304. qla2x00_reset_chip(scsi_qla_host_t *vha)
  305. {
  306. unsigned long flags = 0;
  307. struct qla_hw_data *ha = vha->hw;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *vha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct qla_hw_data *ha = vha->hw;
  425. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  426. uint32_t cnt, d2;
  427. uint16_t wd;
  428. spin_lock_irqsave(&ha->hardware_lock, flags);
  429. /* Reset RISC. */
  430. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  431. for (cnt = 0; cnt < 30000; cnt++) {
  432. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  433. break;
  434. udelay(10);
  435. }
  436. WRT_REG_DWORD(&reg->ctrl_status,
  437. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  438. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  439. udelay(100);
  440. /* Wait for firmware to complete NVRAM accesses. */
  441. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  442. for (cnt = 10000 ; cnt && d2; cnt--) {
  443. udelay(5);
  444. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  445. barrier();
  446. }
  447. if (cnt == 0)
  448. hw_evt = 1;
  449. /* Wait for soft-reset to complete. */
  450. d2 = RD_REG_DWORD(&reg->ctrl_status);
  451. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  452. udelay(5);
  453. d2 = RD_REG_DWORD(&reg->ctrl_status);
  454. barrier();
  455. }
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  459. RD_REG_DWORD(&reg->hccr);
  460. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  461. RD_REG_DWORD(&reg->hccr);
  462. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  463. for (cnt = 6000000 ; cnt && d2; cnt--) {
  464. udelay(5);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. barrier();
  467. }
  468. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  469. if (IS_NOPOLLING_TYPE(ha))
  470. ha->isp_ops->enable_intrs(ha);
  471. }
  472. /**
  473. * qla24xx_reset_chip() - Reset ISP24xx chip.
  474. * @ha: HA context
  475. *
  476. * Returns 0 on success.
  477. */
  478. void
  479. qla24xx_reset_chip(scsi_qla_host_t *vha)
  480. {
  481. struct qla_hw_data *ha = vha->hw;
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(vha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *vha)
  494. {
  495. int rval;
  496. struct qla_hw_data *ha = vha->hw;
  497. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  498. unsigned long flags = 0;
  499. uint16_t data;
  500. uint32_t cnt;
  501. uint16_t mb[5];
  502. struct req_que *req = ha->req_q_map[0];
  503. /* Assume a failed state */
  504. rval = QLA_FUNCTION_FAILED;
  505. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  506. vha->host_no, (u_long)&reg->flash_address));
  507. spin_lock_irqsave(&ha->hardware_lock, flags);
  508. /* Reset ISP chip. */
  509. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  510. /*
  511. * We need to have a delay here since the card will not respond while
  512. * in reset causing an MCA on some architectures.
  513. */
  514. udelay(20);
  515. data = qla2x00_debounce_register(&reg->ctrl_status);
  516. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  517. udelay(5);
  518. data = RD_REG_WORD(&reg->ctrl_status);
  519. barrier();
  520. }
  521. if (!cnt)
  522. goto chip_diag_failed;
  523. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  524. ha->host_no));
  525. /* Reset RISC processor. */
  526. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  527. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  528. /* Workaround for QLA2312 PCI parity error */
  529. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  530. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  531. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  532. udelay(5);
  533. data = RD_MAILBOX_REG(ha, reg, 0);
  534. barrier();
  535. }
  536. } else
  537. udelay(10);
  538. if (!cnt)
  539. goto chip_diag_failed;
  540. /* Check product ID of chip */
  541. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  542. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  543. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  544. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  545. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  546. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  547. mb[3] != PROD_ID_3) {
  548. qla_printk(KERN_WARNING, ha,
  549. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  550. goto chip_diag_failed;
  551. }
  552. ha->product_id[0] = mb[1];
  553. ha->product_id[1] = mb[2];
  554. ha->product_id[2] = mb[3];
  555. ha->product_id[3] = mb[4];
  556. /* Adjust fw RISC transfer size */
  557. if (req->length > 1024)
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  559. else
  560. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  561. req->length;
  562. if (IS_QLA2200(ha) &&
  563. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  564. /* Limit firmware transfer size with a 2200A */
  565. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  566. vha->host_no));
  567. ha->device_type |= DT_ISP2200A;
  568. ha->fw_transfer_size = 128;
  569. }
  570. /* Wrap Incoming Mailboxes Test. */
  571. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  572. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  573. rval = qla2x00_mbx_reg_test(vha);
  574. if (rval) {
  575. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  576. vha->host_no));
  577. qla_printk(KERN_WARNING, ha,
  578. "Failed mailbox send register test\n");
  579. }
  580. else {
  581. /* Flag a successful rval */
  582. rval = QLA_SUCCESS;
  583. }
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. chip_diag_failed:
  586. if (rval)
  587. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  588. "****\n", vha->host_no));
  589. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  590. return (rval);
  591. }
  592. /**
  593. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  594. * @ha: HA context
  595. *
  596. * Returns 0 on success.
  597. */
  598. int
  599. qla24xx_chip_diag(scsi_qla_host_t *vha)
  600. {
  601. int rval;
  602. struct qla_hw_data *ha = vha->hw;
  603. struct req_que *req = ha->req_q_map[0];
  604. /* Perform RISC reset. */
  605. qla24xx_reset_risc(vha);
  606. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  607. rval = qla2x00_mbx_reg_test(vha);
  608. if (rval) {
  609. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  610. vha->host_no));
  611. qla_printk(KERN_WARNING, ha,
  612. "Failed mailbox send register test\n");
  613. } else {
  614. /* Flag a successful rval */
  615. rval = QLA_SUCCESS;
  616. }
  617. return rval;
  618. }
  619. void
  620. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  621. {
  622. int rval;
  623. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  624. eft_size, fce_size, mq_size;
  625. dma_addr_t tc_dma;
  626. void *tc;
  627. struct qla_hw_data *ha = vha->hw;
  628. struct req_que *req = ha->req_q_map[0];
  629. struct rsp_que *rsp = ha->rsp_q_map[0];
  630. if (ha->fw_dump) {
  631. qla_printk(KERN_WARNING, ha,
  632. "Firmware dump previously allocated.\n");
  633. return;
  634. }
  635. ha->fw_dumped = 0;
  636. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  637. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  638. fixed_size = sizeof(struct qla2100_fw_dump);
  639. } else if (IS_QLA23XX(ha)) {
  640. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  641. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  642. sizeof(uint16_t);
  643. } else if (IS_FWI2_CAPABLE(ha)) {
  644. if (IS_QLA81XX(ha))
  645. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  646. else if (IS_QLA25XX(ha))
  647. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  648. else
  649. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  650. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  651. sizeof(uint32_t);
  652. if (ha->mqenable)
  653. mq_size = sizeof(struct qla2xxx_mq_chain);
  654. /* Allocate memory for Fibre Channel Event Buffer. */
  655. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  656. goto try_eft;
  657. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  658. GFP_KERNEL);
  659. if (!tc) {
  660. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  661. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  662. goto try_eft;
  663. }
  664. memset(tc, 0, FCE_SIZE);
  665. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  666. ha->fce_mb, &ha->fce_bufs);
  667. if (rval) {
  668. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  669. "FCE (%d).\n", rval);
  670. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  671. tc_dma);
  672. ha->flags.fce_enabled = 0;
  673. goto try_eft;
  674. }
  675. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  676. FCE_SIZE / 1024);
  677. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  678. ha->flags.fce_enabled = 1;
  679. ha->fce_dma = tc_dma;
  680. ha->fce = tc;
  681. try_eft:
  682. /* Allocate memory for Extended Trace Buffer. */
  683. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  684. GFP_KERNEL);
  685. if (!tc) {
  686. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  687. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  688. goto cont_alloc;
  689. }
  690. memset(tc, 0, EFT_SIZE);
  691. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  692. if (rval) {
  693. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  694. "EFT (%d).\n", rval);
  695. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  696. tc_dma);
  697. goto cont_alloc;
  698. }
  699. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  700. EFT_SIZE / 1024);
  701. eft_size = EFT_SIZE;
  702. ha->eft_dma = tc_dma;
  703. ha->eft = tc;
  704. }
  705. cont_alloc:
  706. req_q_size = req->length * sizeof(request_t);
  707. rsp_q_size = rsp->length * sizeof(response_t);
  708. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  709. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  710. eft_size;
  711. ha->chain_offset = dump_size;
  712. dump_size += mq_size + fce_size;
  713. ha->fw_dump = vmalloc(dump_size);
  714. if (!ha->fw_dump) {
  715. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  716. "firmware dump!!!\n", dump_size / 1024);
  717. if (ha->eft) {
  718. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  719. ha->eft_dma);
  720. ha->eft = NULL;
  721. ha->eft_dma = 0;
  722. }
  723. return;
  724. }
  725. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  726. dump_size / 1024);
  727. ha->fw_dump_len = dump_size;
  728. ha->fw_dump->signature[0] = 'Q';
  729. ha->fw_dump->signature[1] = 'L';
  730. ha->fw_dump->signature[2] = 'G';
  731. ha->fw_dump->signature[3] = 'C';
  732. ha->fw_dump->version = __constant_htonl(1);
  733. ha->fw_dump->fixed_size = htonl(fixed_size);
  734. ha->fw_dump->mem_size = htonl(mem_size);
  735. ha->fw_dump->req_q_size = htonl(req_q_size);
  736. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  737. ha->fw_dump->eft_size = htonl(eft_size);
  738. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  739. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  740. ha->fw_dump->header_size =
  741. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  742. }
  743. /**
  744. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  745. * @ha: HA context
  746. *
  747. * Returns 0 on success.
  748. */
  749. static void
  750. qla2x00_resize_request_q(scsi_qla_host_t *vha)
  751. {
  752. int rval;
  753. uint16_t fw_iocb_cnt = 0;
  754. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  755. dma_addr_t request_dma;
  756. request_t *request_ring;
  757. struct qla_hw_data *ha = vha->hw;
  758. struct req_que *req = ha->req_q_map[0];
  759. /* Valid only on recent ISPs. */
  760. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  761. return;
  762. /* Retrieve IOCB counts available to the firmware. */
  763. rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt,
  764. &ha->max_npiv_vports);
  765. if (rval)
  766. return;
  767. /* No point in continuing if current settings are sufficient. */
  768. if (fw_iocb_cnt < 1024)
  769. return;
  770. if (req->length >= request_q_length)
  771. return;
  772. /* Attempt to claim larger area for request queue. */
  773. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  774. (request_q_length + 1) * sizeof(request_t), &request_dma,
  775. GFP_KERNEL);
  776. if (request_ring == NULL)
  777. return;
  778. /* Resize successful, report extensions. */
  779. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  780. (ha->fw_memory_size + 1) / 1024);
  781. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  782. "(%d -> %d)...\n", req->length, request_q_length);
  783. /* Clear old allocations. */
  784. dma_free_coherent(&ha->pdev->dev,
  785. (req->length + 1) * sizeof(request_t), req->ring,
  786. req->dma);
  787. /* Begin using larger queue. */
  788. req->length = request_q_length;
  789. req->ring = request_ring;
  790. req->dma = request_dma;
  791. }
  792. /**
  793. * qla2x00_setup_chip() - Load and start RISC firmware.
  794. * @ha: HA context
  795. *
  796. * Returns 0 on success.
  797. */
  798. static int
  799. qla2x00_setup_chip(scsi_qla_host_t *vha)
  800. {
  801. int rval;
  802. uint32_t srisc_address = 0;
  803. struct qla_hw_data *ha = vha->hw;
  804. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  805. unsigned long flags;
  806. uint16_t fw_major_version;
  807. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  808. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  809. spin_lock_irqsave(&ha->hardware_lock, flags);
  810. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  811. RD_REG_WORD(&reg->hccr);
  812. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  813. }
  814. /* Load firmware sequences */
  815. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  816. if (rval == QLA_SUCCESS) {
  817. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  818. "code.\n", vha->host_no));
  819. rval = qla2x00_verify_checksum(vha, srisc_address);
  820. if (rval == QLA_SUCCESS) {
  821. /* Start firmware execution. */
  822. DEBUG(printk("scsi(%ld): Checksum OK, start "
  823. "firmware.\n", vha->host_no));
  824. rval = qla2x00_execute_fw(vha, srisc_address);
  825. /* Retrieve firmware information. */
  826. if (rval == QLA_SUCCESS) {
  827. fw_major_version = ha->fw_major_version;
  828. qla2x00_get_fw_version(vha,
  829. &ha->fw_major_version,
  830. &ha->fw_minor_version,
  831. &ha->fw_subminor_version,
  832. &ha->fw_attributes, &ha->fw_memory_size,
  833. ha->mpi_version, &ha->mpi_capabilities,
  834. ha->phy_version);
  835. ha->flags.npiv_supported = 0;
  836. if (IS_QLA2XXX_MIDTYPE(ha) &&
  837. (ha->fw_attributes & BIT_2)) {
  838. ha->flags.npiv_supported = 1;
  839. if ((!ha->max_npiv_vports) ||
  840. ((ha->max_npiv_vports + 1) %
  841. MIN_MULTI_ID_FABRIC))
  842. ha->max_npiv_vports =
  843. MIN_MULTI_ID_FABRIC - 1;
  844. }
  845. if (!fw_major_version) {
  846. qla2x00_resize_request_q(vha);
  847. if (ql2xallocfwdump)
  848. qla2x00_alloc_fw_dump(vha);
  849. }
  850. }
  851. } else {
  852. DEBUG2(printk(KERN_INFO
  853. "scsi(%ld): ISP Firmware failed checksum.\n",
  854. vha->host_no));
  855. }
  856. }
  857. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  858. /* Enable proper parity. */
  859. spin_lock_irqsave(&ha->hardware_lock, flags);
  860. if (IS_QLA2300(ha))
  861. /* SRAM parity */
  862. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  863. else
  864. /* SRAM, Instruction RAM and GP RAM parity */
  865. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  866. RD_REG_WORD(&reg->hccr);
  867. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  868. }
  869. if (rval) {
  870. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  871. vha->host_no));
  872. }
  873. return (rval);
  874. }
  875. /**
  876. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  877. * @ha: HA context
  878. *
  879. * Beginning of request ring has initialization control block already built
  880. * by nvram config routine.
  881. *
  882. * Returns 0 on success.
  883. */
  884. void
  885. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  886. {
  887. uint16_t cnt;
  888. response_t *pkt;
  889. pkt = rsp->ring_ptr;
  890. for (cnt = 0; cnt < rsp->length; cnt++) {
  891. pkt->signature = RESPONSE_PROCESSED;
  892. pkt++;
  893. }
  894. }
  895. /**
  896. * qla2x00_update_fw_options() - Read and process firmware options.
  897. * @ha: HA context
  898. *
  899. * Returns 0 on success.
  900. */
  901. void
  902. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  903. {
  904. uint16_t swing, emphasis, tx_sens, rx_sens;
  905. struct qla_hw_data *ha = vha->hw;
  906. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  907. qla2x00_get_fw_options(vha, ha->fw_options);
  908. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  909. return;
  910. /* Serial Link options. */
  911. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  912. vha->host_no));
  913. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  914. sizeof(ha->fw_seriallink_options)));
  915. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  916. if (ha->fw_seriallink_options[3] & BIT_2) {
  917. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  918. /* 1G settings */
  919. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  920. emphasis = (ha->fw_seriallink_options[2] &
  921. (BIT_4 | BIT_3)) >> 3;
  922. tx_sens = ha->fw_seriallink_options[0] &
  923. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  924. rx_sens = (ha->fw_seriallink_options[0] &
  925. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  926. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  927. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  928. if (rx_sens == 0x0)
  929. rx_sens = 0x3;
  930. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  931. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  932. ha->fw_options[10] |= BIT_5 |
  933. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  934. (tx_sens & (BIT_1 | BIT_0));
  935. /* 2G settings */
  936. swing = (ha->fw_seriallink_options[2] &
  937. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  938. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  939. tx_sens = ha->fw_seriallink_options[1] &
  940. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  941. rx_sens = (ha->fw_seriallink_options[1] &
  942. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  943. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  944. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  945. if (rx_sens == 0x0)
  946. rx_sens = 0x3;
  947. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  948. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  949. ha->fw_options[11] |= BIT_5 |
  950. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  951. (tx_sens & (BIT_1 | BIT_0));
  952. }
  953. /* FCP2 options. */
  954. /* Return command IOCBs without waiting for an ABTS to complete. */
  955. ha->fw_options[3] |= BIT_13;
  956. /* LED scheme. */
  957. if (ha->flags.enable_led_scheme)
  958. ha->fw_options[2] |= BIT_12;
  959. /* Detect ISP6312. */
  960. if (IS_QLA6312(ha))
  961. ha->fw_options[2] |= BIT_13;
  962. /* Update firmware options. */
  963. qla2x00_set_fw_options(vha, ha->fw_options);
  964. }
  965. void
  966. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  967. {
  968. int rval;
  969. struct qla_hw_data *ha = vha->hw;
  970. /* Update Serial Link options. */
  971. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  972. return;
  973. rval = qla2x00_set_serdes_params(vha,
  974. le16_to_cpu(ha->fw_seriallink_options24[1]),
  975. le16_to_cpu(ha->fw_seriallink_options24[2]),
  976. le16_to_cpu(ha->fw_seriallink_options24[3]));
  977. if (rval != QLA_SUCCESS) {
  978. qla_printk(KERN_WARNING, ha,
  979. "Unable to update Serial Link options (%x).\n", rval);
  980. }
  981. }
  982. void
  983. qla2x00_config_rings(struct scsi_qla_host *vha)
  984. {
  985. struct qla_hw_data *ha = vha->hw;
  986. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  987. struct req_que *req = ha->req_q_map[0];
  988. struct rsp_que *rsp = ha->rsp_q_map[0];
  989. /* Setup ring parameters in initialization control block. */
  990. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  991. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  992. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  993. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  994. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  995. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  996. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  997. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  998. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  999. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1000. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1001. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1002. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1003. }
  1004. void
  1005. qla24xx_config_rings(struct scsi_qla_host *vha)
  1006. {
  1007. struct qla_hw_data *ha = vha->hw;
  1008. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1009. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1010. struct qla_msix_entry *msix;
  1011. struct init_cb_24xx *icb;
  1012. uint16_t rid = 0;
  1013. struct req_que *req = ha->req_q_map[0];
  1014. struct rsp_que *rsp = ha->rsp_q_map[0];
  1015. /* Setup ring parameters in initialization control block. */
  1016. icb = (struct init_cb_24xx *)ha->init_cb;
  1017. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1018. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1019. icb->request_q_length = cpu_to_le16(req->length);
  1020. icb->response_q_length = cpu_to_le16(rsp->length);
  1021. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1022. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1023. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1024. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1025. if (ha->mqenable) {
  1026. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1027. icb->rid = __constant_cpu_to_le16(rid);
  1028. if (ha->flags.msix_enabled) {
  1029. msix = &ha->msix_entries[1];
  1030. DEBUG2_17(printk(KERN_INFO
  1031. "Reistering vector 0x%x for base que\n", msix->entry));
  1032. icb->msix = cpu_to_le16(msix->entry);
  1033. }
  1034. /* Use alternate PCI bus number */
  1035. if (MSB(rid))
  1036. icb->firmware_options_2 |=
  1037. __constant_cpu_to_le32(BIT_19);
  1038. /* Use alternate PCI devfn */
  1039. if (LSB(rid))
  1040. icb->firmware_options_2 |=
  1041. __constant_cpu_to_le32(BIT_18);
  1042. icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22);
  1043. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1044. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1045. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1046. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1047. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1048. } else {
  1049. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1050. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1051. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1052. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1053. }
  1054. /* PCI posting */
  1055. RD_REG_DWORD(&ioreg->hccr);
  1056. }
  1057. /**
  1058. * qla2x00_init_rings() - Initializes firmware.
  1059. * @ha: HA context
  1060. *
  1061. * Beginning of request ring has initialization control block already built
  1062. * by nvram config routine.
  1063. *
  1064. * Returns 0 on success.
  1065. */
  1066. static int
  1067. qla2x00_init_rings(scsi_qla_host_t *vha)
  1068. {
  1069. int rval;
  1070. unsigned long flags = 0;
  1071. int cnt, que;
  1072. struct qla_hw_data *ha = vha->hw;
  1073. struct req_que *req;
  1074. struct rsp_que *rsp;
  1075. struct scsi_qla_host *vp;
  1076. struct mid_init_cb_24xx *mid_init_cb =
  1077. (struct mid_init_cb_24xx *) ha->init_cb;
  1078. spin_lock_irqsave(&ha->hardware_lock, flags);
  1079. /* Clear outstanding commands array. */
  1080. for (que = 0; que < ha->max_queues; que++) {
  1081. req = ha->req_q_map[que];
  1082. if (!req)
  1083. continue;
  1084. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1085. req->outstanding_cmds[cnt] = NULL;
  1086. req->current_outstanding_cmd = 0;
  1087. /* Initialize firmware. */
  1088. req->ring_ptr = req->ring;
  1089. req->ring_index = 0;
  1090. req->cnt = req->length;
  1091. }
  1092. for (que = 0; que < ha->max_queues; que++) {
  1093. rsp = ha->rsp_q_map[que];
  1094. if (!rsp)
  1095. continue;
  1096. rsp->ring_ptr = rsp->ring;
  1097. rsp->ring_index = 0;
  1098. /* Initialize response queue entries */
  1099. qla2x00_init_response_q_entries(rsp);
  1100. }
  1101. /* Clear RSCN queue. */
  1102. list_for_each_entry(vp, &ha->vp_list, list) {
  1103. vp->rscn_in_ptr = 0;
  1104. vp->rscn_out_ptr = 0;
  1105. }
  1106. ha->isp_ops->config_rings(vha);
  1107. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1108. /* Update any ISP specific firmware options before initialization. */
  1109. ha->isp_ops->update_fw_options(vha);
  1110. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1111. if (ha->flags.npiv_supported) {
  1112. if (ha->operating_mode == LOOP)
  1113. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1114. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1115. }
  1116. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1117. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1118. if (rval) {
  1119. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1120. vha->host_no));
  1121. } else {
  1122. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1123. vha->host_no));
  1124. }
  1125. return (rval);
  1126. }
  1127. /**
  1128. * qla2x00_fw_ready() - Waits for firmware ready.
  1129. * @ha: HA context
  1130. *
  1131. * Returns 0 on success.
  1132. */
  1133. static int
  1134. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1135. {
  1136. int rval;
  1137. unsigned long wtime, mtime, cs84xx_time;
  1138. uint16_t min_wait; /* Minimum wait time if loop is down */
  1139. uint16_t wait_time; /* Wait time if loop is coming ready */
  1140. uint16_t state[3];
  1141. struct qla_hw_data *ha = vha->hw;
  1142. rval = QLA_SUCCESS;
  1143. /* 20 seconds for loop down. */
  1144. min_wait = 20;
  1145. /*
  1146. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1147. * our own processing.
  1148. */
  1149. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1150. wait_time = min_wait;
  1151. }
  1152. /* Min wait time if loop down */
  1153. mtime = jiffies + (min_wait * HZ);
  1154. /* wait time before firmware ready */
  1155. wtime = jiffies + (wait_time * HZ);
  1156. /* Wait for ISP to finish LIP */
  1157. if (!vha->flags.init_done)
  1158. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1159. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1160. vha->host_no));
  1161. do {
  1162. rval = qla2x00_get_firmware_state(vha, state);
  1163. if (rval == QLA_SUCCESS) {
  1164. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1165. vha->device_flags &= ~DFLG_NO_CABLE;
  1166. }
  1167. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1168. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1169. "84xx=%x.\n", vha->host_no, state[0],
  1170. state[2]));
  1171. if ((state[2] & FSTATE_LOGGED_IN) &&
  1172. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1173. DEBUG16(printk("scsi(%ld): Sending "
  1174. "verify iocb.\n", vha->host_no));
  1175. cs84xx_time = jiffies;
  1176. rval = qla84xx_init_chip(vha);
  1177. if (rval != QLA_SUCCESS)
  1178. break;
  1179. /* Add time taken to initialize. */
  1180. cs84xx_time = jiffies - cs84xx_time;
  1181. wtime += cs84xx_time;
  1182. mtime += cs84xx_time;
  1183. DEBUG16(printk("scsi(%ld): Increasing "
  1184. "wait time by %ld. New time %ld\n",
  1185. vha->host_no, cs84xx_time, wtime));
  1186. }
  1187. } else if (state[0] == FSTATE_READY) {
  1188. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1189. vha->host_no));
  1190. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1191. &ha->login_timeout, &ha->r_a_tov);
  1192. rval = QLA_SUCCESS;
  1193. break;
  1194. }
  1195. rval = QLA_FUNCTION_FAILED;
  1196. if (atomic_read(&vha->loop_down_timer) &&
  1197. state[0] != FSTATE_READY) {
  1198. /* Loop down. Timeout on min_wait for states
  1199. * other than Wait for Login.
  1200. */
  1201. if (time_after_eq(jiffies, mtime)) {
  1202. qla_printk(KERN_INFO, ha,
  1203. "Cable is unplugged...\n");
  1204. vha->device_flags |= DFLG_NO_CABLE;
  1205. break;
  1206. }
  1207. }
  1208. } else {
  1209. /* Mailbox cmd failed. Timeout on min_wait. */
  1210. if (time_after_eq(jiffies, mtime))
  1211. break;
  1212. }
  1213. if (time_after_eq(jiffies, wtime))
  1214. break;
  1215. /* Delay for a while */
  1216. msleep(500);
  1217. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1218. vha->host_no, state[0], jiffies));
  1219. } while (1);
  1220. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1221. vha->host_no, state[0], jiffies));
  1222. if (rval) {
  1223. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1224. vha->host_no));
  1225. }
  1226. return (rval);
  1227. }
  1228. /*
  1229. * qla2x00_configure_hba
  1230. * Setup adapter context.
  1231. *
  1232. * Input:
  1233. * ha = adapter state pointer.
  1234. *
  1235. * Returns:
  1236. * 0 = success
  1237. *
  1238. * Context:
  1239. * Kernel context.
  1240. */
  1241. static int
  1242. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1243. {
  1244. int rval;
  1245. uint16_t loop_id;
  1246. uint16_t topo;
  1247. uint16_t sw_cap;
  1248. uint8_t al_pa;
  1249. uint8_t area;
  1250. uint8_t domain;
  1251. char connect_type[22];
  1252. struct qla_hw_data *ha = vha->hw;
  1253. /* Get host addresses. */
  1254. rval = qla2x00_get_adapter_id(vha,
  1255. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1256. if (rval != QLA_SUCCESS) {
  1257. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1258. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1259. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1260. __func__, vha->host_no));
  1261. } else {
  1262. qla_printk(KERN_WARNING, ha,
  1263. "ERROR -- Unable to get host loop ID.\n");
  1264. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1265. }
  1266. return (rval);
  1267. }
  1268. if (topo == 4) {
  1269. qla_printk(KERN_INFO, ha,
  1270. "Cannot get topology - retrying.\n");
  1271. return (QLA_FUNCTION_FAILED);
  1272. }
  1273. vha->loop_id = loop_id;
  1274. /* initialize */
  1275. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1276. ha->operating_mode = LOOP;
  1277. ha->switch_cap = 0;
  1278. switch (topo) {
  1279. case 0:
  1280. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1281. vha->host_no));
  1282. ha->current_topology = ISP_CFG_NL;
  1283. strcpy(connect_type, "(Loop)");
  1284. break;
  1285. case 1:
  1286. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1287. vha->host_no));
  1288. ha->switch_cap = sw_cap;
  1289. ha->current_topology = ISP_CFG_FL;
  1290. strcpy(connect_type, "(FL_Port)");
  1291. break;
  1292. case 2:
  1293. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1294. vha->host_no));
  1295. ha->operating_mode = P2P;
  1296. ha->current_topology = ISP_CFG_N;
  1297. strcpy(connect_type, "(N_Port-to-N_Port)");
  1298. break;
  1299. case 3:
  1300. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1301. vha->host_no));
  1302. ha->switch_cap = sw_cap;
  1303. ha->operating_mode = P2P;
  1304. ha->current_topology = ISP_CFG_F;
  1305. strcpy(connect_type, "(F_Port)");
  1306. break;
  1307. default:
  1308. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1309. "Using NL.\n",
  1310. vha->host_no, topo));
  1311. ha->current_topology = ISP_CFG_NL;
  1312. strcpy(connect_type, "(Loop)");
  1313. break;
  1314. }
  1315. /* Save Host port and loop ID. */
  1316. /* byte order - Big Endian */
  1317. vha->d_id.b.domain = domain;
  1318. vha->d_id.b.area = area;
  1319. vha->d_id.b.al_pa = al_pa;
  1320. if (!vha->flags.init_done)
  1321. qla_printk(KERN_INFO, ha,
  1322. "Topology - %s, Host Loop address 0x%x\n",
  1323. connect_type, vha->loop_id);
  1324. if (rval) {
  1325. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1326. } else {
  1327. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1328. }
  1329. return(rval);
  1330. }
  1331. static inline void
  1332. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1333. char *def)
  1334. {
  1335. char *st, *en;
  1336. uint16_t index;
  1337. struct qla_hw_data *ha = vha->hw;
  1338. if (memcmp(model, BINZERO, len) != 0) {
  1339. strncpy(ha->model_number, model, len);
  1340. st = en = ha->model_number;
  1341. en += len - 1;
  1342. while (en > st) {
  1343. if (*en != 0x20 && *en != 0x00)
  1344. break;
  1345. *en-- = '\0';
  1346. }
  1347. index = (ha->pdev->subsystem_device & 0xff);
  1348. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1349. index < QLA_MODEL_NAMES)
  1350. strncpy(ha->model_desc,
  1351. qla2x00_model_name[index * 2 + 1],
  1352. sizeof(ha->model_desc) - 1);
  1353. } else {
  1354. index = (ha->pdev->subsystem_device & 0xff);
  1355. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1356. index < QLA_MODEL_NAMES) {
  1357. strcpy(ha->model_number,
  1358. qla2x00_model_name[index * 2]);
  1359. strncpy(ha->model_desc,
  1360. qla2x00_model_name[index * 2 + 1],
  1361. sizeof(ha->model_desc) - 1);
  1362. } else {
  1363. strcpy(ha->model_number, def);
  1364. }
  1365. }
  1366. if (IS_FWI2_CAPABLE(ha))
  1367. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1368. sizeof(ha->model_desc));
  1369. }
  1370. /* On sparc systems, obtain port and node WWN from firmware
  1371. * properties.
  1372. */
  1373. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1374. {
  1375. #ifdef CONFIG_SPARC
  1376. struct qla_hw_data *ha = vha->hw;
  1377. struct pci_dev *pdev = ha->pdev;
  1378. struct device_node *dp = pci_device_to_OF_node(pdev);
  1379. const u8 *val;
  1380. int len;
  1381. val = of_get_property(dp, "port-wwn", &len);
  1382. if (val && len >= WWN_SIZE)
  1383. memcpy(nv->port_name, val, WWN_SIZE);
  1384. val = of_get_property(dp, "node-wwn", &len);
  1385. if (val && len >= WWN_SIZE)
  1386. memcpy(nv->node_name, val, WWN_SIZE);
  1387. #endif
  1388. }
  1389. /*
  1390. * NVRAM configuration for ISP 2xxx
  1391. *
  1392. * Input:
  1393. * ha = adapter block pointer.
  1394. *
  1395. * Output:
  1396. * initialization control block in response_ring
  1397. * host adapters parameters in host adapter block
  1398. *
  1399. * Returns:
  1400. * 0 = success.
  1401. */
  1402. int
  1403. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1404. {
  1405. int rval;
  1406. uint8_t chksum = 0;
  1407. uint16_t cnt;
  1408. uint8_t *dptr1, *dptr2;
  1409. struct qla_hw_data *ha = vha->hw;
  1410. init_cb_t *icb = ha->init_cb;
  1411. nvram_t *nv = ha->nvram;
  1412. uint8_t *ptr = ha->nvram;
  1413. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1414. rval = QLA_SUCCESS;
  1415. /* Determine NVRAM starting address. */
  1416. ha->nvram_size = sizeof(nvram_t);
  1417. ha->nvram_base = 0;
  1418. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1419. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1420. ha->nvram_base = 0x80;
  1421. /* Get NVRAM data and calculate checksum. */
  1422. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1423. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1424. chksum += *ptr++;
  1425. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1426. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1427. /* Bad NVRAM data, set defaults parameters. */
  1428. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1429. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1430. /* Reset NVRAM data. */
  1431. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1432. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1433. nv->nvram_version);
  1434. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1435. "invalid -- WWPN) defaults.\n");
  1436. /*
  1437. * Set default initialization control block.
  1438. */
  1439. memset(nv, 0, ha->nvram_size);
  1440. nv->parameter_block_version = ICB_VERSION;
  1441. if (IS_QLA23XX(ha)) {
  1442. nv->firmware_options[0] = BIT_2 | BIT_1;
  1443. nv->firmware_options[1] = BIT_7 | BIT_5;
  1444. nv->add_firmware_options[0] = BIT_5;
  1445. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1446. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1447. nv->special_options[1] = BIT_7;
  1448. } else if (IS_QLA2200(ha)) {
  1449. nv->firmware_options[0] = BIT_2 | BIT_1;
  1450. nv->firmware_options[1] = BIT_7 | BIT_5;
  1451. nv->add_firmware_options[0] = BIT_5;
  1452. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1453. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1454. } else if (IS_QLA2100(ha)) {
  1455. nv->firmware_options[0] = BIT_3 | BIT_1;
  1456. nv->firmware_options[1] = BIT_5;
  1457. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1458. }
  1459. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1460. nv->execution_throttle = __constant_cpu_to_le16(16);
  1461. nv->retry_count = 8;
  1462. nv->retry_delay = 1;
  1463. nv->port_name[0] = 33;
  1464. nv->port_name[3] = 224;
  1465. nv->port_name[4] = 139;
  1466. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1467. nv->login_timeout = 4;
  1468. /*
  1469. * Set default host adapter parameters
  1470. */
  1471. nv->host_p[1] = BIT_2;
  1472. nv->reset_delay = 5;
  1473. nv->port_down_retry_count = 8;
  1474. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1475. nv->link_down_timeout = 60;
  1476. rval = 1;
  1477. }
  1478. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1479. /*
  1480. * The SN2 does not provide BIOS emulation which means you can't change
  1481. * potentially bogus BIOS settings. Force the use of default settings
  1482. * for link rate and frame size. Hope that the rest of the settings
  1483. * are valid.
  1484. */
  1485. if (ia64_platform_is("sn2")) {
  1486. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1487. if (IS_QLA23XX(ha))
  1488. nv->special_options[1] = BIT_7;
  1489. }
  1490. #endif
  1491. /* Reset Initialization control block */
  1492. memset(icb, 0, ha->init_cb_size);
  1493. /*
  1494. * Setup driver NVRAM options.
  1495. */
  1496. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1497. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1498. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1499. nv->firmware_options[1] &= ~BIT_4;
  1500. if (IS_QLA23XX(ha)) {
  1501. nv->firmware_options[0] |= BIT_2;
  1502. nv->firmware_options[0] &= ~BIT_3;
  1503. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1504. if (IS_QLA2300(ha)) {
  1505. if (ha->fb_rev == FPM_2310) {
  1506. strcpy(ha->model_number, "QLA2310");
  1507. } else {
  1508. strcpy(ha->model_number, "QLA2300");
  1509. }
  1510. } else {
  1511. qla2x00_set_model_info(vha, nv->model_number,
  1512. sizeof(nv->model_number), "QLA23xx");
  1513. }
  1514. } else if (IS_QLA2200(ha)) {
  1515. nv->firmware_options[0] |= BIT_2;
  1516. /*
  1517. * 'Point-to-point preferred, else loop' is not a safe
  1518. * connection mode setting.
  1519. */
  1520. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1521. (BIT_5 | BIT_4)) {
  1522. /* Force 'loop preferred, else point-to-point'. */
  1523. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1524. nv->add_firmware_options[0] |= BIT_5;
  1525. }
  1526. strcpy(ha->model_number, "QLA22xx");
  1527. } else /*if (IS_QLA2100(ha))*/ {
  1528. strcpy(ha->model_number, "QLA2100");
  1529. }
  1530. /*
  1531. * Copy over NVRAM RISC parameter block to initialization control block.
  1532. */
  1533. dptr1 = (uint8_t *)icb;
  1534. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1535. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1536. while (cnt--)
  1537. *dptr1++ = *dptr2++;
  1538. /* Copy 2nd half. */
  1539. dptr1 = (uint8_t *)icb->add_firmware_options;
  1540. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1541. while (cnt--)
  1542. *dptr1++ = *dptr2++;
  1543. /* Use alternate WWN? */
  1544. if (nv->host_p[1] & BIT_7) {
  1545. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1546. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1547. }
  1548. /* Prepare nodename */
  1549. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1550. /*
  1551. * Firmware will apply the following mask if the nodename was
  1552. * not provided.
  1553. */
  1554. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1555. icb->node_name[0] &= 0xF0;
  1556. }
  1557. /*
  1558. * Set host adapter parameters.
  1559. */
  1560. if (nv->host_p[0] & BIT_7)
  1561. ql2xextended_error_logging = 1;
  1562. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1563. /* Always load RISC code on non ISP2[12]00 chips. */
  1564. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1565. ha->flags.disable_risc_code_load = 0;
  1566. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1567. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1568. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1569. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1570. ha->flags.disable_serdes = 0;
  1571. ha->operating_mode =
  1572. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1573. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1574. sizeof(ha->fw_seriallink_options));
  1575. /* save HBA serial number */
  1576. ha->serial0 = icb->port_name[5];
  1577. ha->serial1 = icb->port_name[6];
  1578. ha->serial2 = icb->port_name[7];
  1579. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1580. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1581. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1582. ha->retry_count = nv->retry_count;
  1583. /* Set minimum login_timeout to 4 seconds. */
  1584. if (nv->login_timeout < ql2xlogintimeout)
  1585. nv->login_timeout = ql2xlogintimeout;
  1586. if (nv->login_timeout < 4)
  1587. nv->login_timeout = 4;
  1588. ha->login_timeout = nv->login_timeout;
  1589. icb->login_timeout = nv->login_timeout;
  1590. /* Set minimum RATOV to 100 tenths of a second. */
  1591. ha->r_a_tov = 100;
  1592. ha->loop_reset_delay = nv->reset_delay;
  1593. /* Link Down Timeout = 0:
  1594. *
  1595. * When Port Down timer expires we will start returning
  1596. * I/O's to OS with "DID_NO_CONNECT".
  1597. *
  1598. * Link Down Timeout != 0:
  1599. *
  1600. * The driver waits for the link to come up after link down
  1601. * before returning I/Os to OS with "DID_NO_CONNECT".
  1602. */
  1603. if (nv->link_down_timeout == 0) {
  1604. ha->loop_down_abort_time =
  1605. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1606. } else {
  1607. ha->link_down_timeout = nv->link_down_timeout;
  1608. ha->loop_down_abort_time =
  1609. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1610. }
  1611. /*
  1612. * Need enough time to try and get the port back.
  1613. */
  1614. ha->port_down_retry_count = nv->port_down_retry_count;
  1615. if (qlport_down_retry)
  1616. ha->port_down_retry_count = qlport_down_retry;
  1617. /* Set login_retry_count */
  1618. ha->login_retry_count = nv->retry_count;
  1619. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1620. ha->port_down_retry_count > 3)
  1621. ha->login_retry_count = ha->port_down_retry_count;
  1622. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1623. ha->login_retry_count = ha->port_down_retry_count;
  1624. if (ql2xloginretrycount)
  1625. ha->login_retry_count = ql2xloginretrycount;
  1626. icb->lun_enables = __constant_cpu_to_le16(0);
  1627. icb->command_resource_count = 0;
  1628. icb->immediate_notify_resource_count = 0;
  1629. icb->timeout = __constant_cpu_to_le16(0);
  1630. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1631. /* Enable RIO */
  1632. icb->firmware_options[0] &= ~BIT_3;
  1633. icb->add_firmware_options[0] &=
  1634. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1635. icb->add_firmware_options[0] |= BIT_2;
  1636. icb->response_accumulation_timer = 3;
  1637. icb->interrupt_delay_timer = 5;
  1638. vha->flags.process_response_queue = 1;
  1639. } else {
  1640. /* Enable ZIO. */
  1641. if (!vha->flags.init_done) {
  1642. ha->zio_mode = icb->add_firmware_options[0] &
  1643. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1644. ha->zio_timer = icb->interrupt_delay_timer ?
  1645. icb->interrupt_delay_timer: 2;
  1646. }
  1647. icb->add_firmware_options[0] &=
  1648. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1649. vha->flags.process_response_queue = 0;
  1650. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1651. ha->zio_mode = QLA_ZIO_MODE_6;
  1652. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1653. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1654. ha->zio_timer * 100));
  1655. qla_printk(KERN_INFO, ha,
  1656. "ZIO mode %d enabled; timer delay (%d us).\n",
  1657. ha->zio_mode, ha->zio_timer * 100);
  1658. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1659. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1660. vha->flags.process_response_queue = 1;
  1661. }
  1662. }
  1663. if (rval) {
  1664. DEBUG2_3(printk(KERN_WARNING
  1665. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1666. }
  1667. return (rval);
  1668. }
  1669. static void
  1670. qla2x00_rport_del(void *data)
  1671. {
  1672. fc_port_t *fcport = data;
  1673. struct fc_rport *rport;
  1674. spin_lock_irq(fcport->vha->host->host_lock);
  1675. rport = fcport->drport;
  1676. fcport->drport = NULL;
  1677. spin_unlock_irq(fcport->vha->host->host_lock);
  1678. if (rport)
  1679. fc_remote_port_delete(rport);
  1680. }
  1681. /**
  1682. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1683. * @ha: HA context
  1684. * @flags: allocation flags
  1685. *
  1686. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1687. */
  1688. static fc_port_t *
  1689. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1690. {
  1691. fc_port_t *fcport;
  1692. fcport = kzalloc(sizeof(fc_port_t), flags);
  1693. if (!fcport)
  1694. return NULL;
  1695. /* Setup fcport template structure. */
  1696. fcport->vha = vha;
  1697. fcport->vp_idx = vha->vp_idx;
  1698. fcport->port_type = FCT_UNKNOWN;
  1699. fcport->loop_id = FC_NO_LOOP_ID;
  1700. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1701. fcport->flags = FCF_RLC_SUPPORT;
  1702. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1703. return fcport;
  1704. }
  1705. /*
  1706. * qla2x00_configure_loop
  1707. * Updates Fibre Channel Device Database with what is actually on loop.
  1708. *
  1709. * Input:
  1710. * ha = adapter block pointer.
  1711. *
  1712. * Returns:
  1713. * 0 = success.
  1714. * 1 = error.
  1715. * 2 = database was full and device was not configured.
  1716. */
  1717. static int
  1718. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1719. {
  1720. int rval;
  1721. unsigned long flags, save_flags;
  1722. struct qla_hw_data *ha = vha->hw;
  1723. rval = QLA_SUCCESS;
  1724. /* Get Initiator ID */
  1725. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1726. rval = qla2x00_configure_hba(vha);
  1727. if (rval != QLA_SUCCESS) {
  1728. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1729. vha->host_no));
  1730. return (rval);
  1731. }
  1732. }
  1733. save_flags = flags = vha->dpc_flags;
  1734. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1735. vha->host_no, flags));
  1736. /*
  1737. * If we have both an RSCN and PORT UPDATE pending then handle them
  1738. * both at the same time.
  1739. */
  1740. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1741. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1742. /* Determine what we need to do */
  1743. if (ha->current_topology == ISP_CFG_FL &&
  1744. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1745. vha->flags.rscn_queue_overflow = 1;
  1746. set_bit(RSCN_UPDATE, &flags);
  1747. } else if (ha->current_topology == ISP_CFG_F &&
  1748. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1749. vha->flags.rscn_queue_overflow = 1;
  1750. set_bit(RSCN_UPDATE, &flags);
  1751. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1752. } else if (ha->current_topology == ISP_CFG_N) {
  1753. clear_bit(RSCN_UPDATE, &flags);
  1754. } else if (!vha->flags.online ||
  1755. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1756. vha->flags.rscn_queue_overflow = 1;
  1757. set_bit(RSCN_UPDATE, &flags);
  1758. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1759. }
  1760. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1761. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1762. rval = QLA_FUNCTION_FAILED;
  1763. else
  1764. rval = qla2x00_configure_local_loop(vha);
  1765. }
  1766. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1767. if (LOOP_TRANSITION(vha))
  1768. rval = QLA_FUNCTION_FAILED;
  1769. else
  1770. rval = qla2x00_configure_fabric(vha);
  1771. }
  1772. if (rval == QLA_SUCCESS) {
  1773. if (atomic_read(&vha->loop_down_timer) ||
  1774. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1775. rval = QLA_FUNCTION_FAILED;
  1776. } else {
  1777. atomic_set(&vha->loop_state, LOOP_READY);
  1778. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1779. }
  1780. }
  1781. if (rval) {
  1782. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1783. __func__, vha->host_no));
  1784. } else {
  1785. DEBUG3(printk("%s: exiting normally\n", __func__));
  1786. }
  1787. /* Restore state if a resync event occurred during processing */
  1788. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1789. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1790. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1791. if (test_bit(RSCN_UPDATE, &save_flags))
  1792. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1793. }
  1794. return (rval);
  1795. }
  1796. /*
  1797. * qla2x00_configure_local_loop
  1798. * Updates Fibre Channel Device Database with local loop devices.
  1799. *
  1800. * Input:
  1801. * ha = adapter block pointer.
  1802. *
  1803. * Returns:
  1804. * 0 = success.
  1805. */
  1806. static int
  1807. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  1808. {
  1809. int rval, rval2;
  1810. int found_devs;
  1811. int found;
  1812. fc_port_t *fcport, *new_fcport;
  1813. uint16_t index;
  1814. uint16_t entries;
  1815. char *id_iter;
  1816. uint16_t loop_id;
  1817. uint8_t domain, area, al_pa;
  1818. struct qla_hw_data *ha = vha->hw;
  1819. found_devs = 0;
  1820. new_fcport = NULL;
  1821. entries = MAX_FIBRE_DEVICES;
  1822. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  1823. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  1824. /* Get list of logged in devices. */
  1825. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1826. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  1827. &entries);
  1828. if (rval != QLA_SUCCESS)
  1829. goto cleanup_allocation;
  1830. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1831. ha->host_no, entries));
  1832. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1833. entries * sizeof(struct gid_list_info)));
  1834. /* Allocate temporary fcport for any new fcports discovered. */
  1835. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1836. if (new_fcport == NULL) {
  1837. rval = QLA_MEMORY_ALLOC_FAILED;
  1838. goto cleanup_allocation;
  1839. }
  1840. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1841. /*
  1842. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1843. */
  1844. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1845. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1846. fcport->port_type != FCT_BROADCAST &&
  1847. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1848. DEBUG(printk("scsi(%ld): Marking port lost, "
  1849. "loop_id=0x%04x\n",
  1850. vha->host_no, fcport->loop_id));
  1851. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1852. fcport->flags &= ~FCF_FARP_DONE;
  1853. }
  1854. }
  1855. /* Add devices to port list. */
  1856. id_iter = (char *)ha->gid_list;
  1857. for (index = 0; index < entries; index++) {
  1858. domain = ((struct gid_list_info *)id_iter)->domain;
  1859. area = ((struct gid_list_info *)id_iter)->area;
  1860. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1861. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1862. loop_id = (uint16_t)
  1863. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1864. else
  1865. loop_id = le16_to_cpu(
  1866. ((struct gid_list_info *)id_iter)->loop_id);
  1867. id_iter += ha->gid_list_info_size;
  1868. /* Bypass reserved domain fields. */
  1869. if ((domain & 0xf0) == 0xf0)
  1870. continue;
  1871. /* Bypass if not same domain and area of adapter. */
  1872. if (area && domain &&
  1873. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  1874. continue;
  1875. /* Bypass invalid local loop ID. */
  1876. if (loop_id > LAST_LOCAL_LOOP_ID)
  1877. continue;
  1878. /* Fill in member data. */
  1879. new_fcport->d_id.b.domain = domain;
  1880. new_fcport->d_id.b.area = area;
  1881. new_fcport->d_id.b.al_pa = al_pa;
  1882. new_fcport->loop_id = loop_id;
  1883. new_fcport->vp_idx = vha->vp_idx;
  1884. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  1885. if (rval2 != QLA_SUCCESS) {
  1886. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1887. "information -- get_port_database=%x, "
  1888. "loop_id=0x%04x\n",
  1889. vha->host_no, rval2, new_fcport->loop_id));
  1890. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1891. vha->host_no));
  1892. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1893. continue;
  1894. }
  1895. /* Check for matching device in port list. */
  1896. found = 0;
  1897. fcport = NULL;
  1898. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1899. if (memcmp(new_fcport->port_name, fcport->port_name,
  1900. WWN_SIZE))
  1901. continue;
  1902. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1903. FCF_PERSISTENT_BOUND);
  1904. fcport->loop_id = new_fcport->loop_id;
  1905. fcport->port_type = new_fcport->port_type;
  1906. fcport->d_id.b24 = new_fcport->d_id.b24;
  1907. memcpy(fcport->node_name, new_fcport->node_name,
  1908. WWN_SIZE);
  1909. found++;
  1910. break;
  1911. }
  1912. if (!found) {
  1913. /* New device, add to fcports list. */
  1914. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1915. if (vha->vp_idx) {
  1916. new_fcport->vha = vha;
  1917. new_fcport->vp_idx = vha->vp_idx;
  1918. }
  1919. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  1920. /* Allocate a new replacement fcport. */
  1921. fcport = new_fcport;
  1922. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  1923. if (new_fcport == NULL) {
  1924. rval = QLA_MEMORY_ALLOC_FAILED;
  1925. goto cleanup_allocation;
  1926. }
  1927. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1928. }
  1929. /* Base iIDMA settings on HBA port speed. */
  1930. fcport->fp_speed = ha->link_data_rate;
  1931. qla2x00_update_fcport(vha, fcport);
  1932. found_devs++;
  1933. }
  1934. cleanup_allocation:
  1935. kfree(new_fcport);
  1936. if (rval != QLA_SUCCESS) {
  1937. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1938. "rval=%x\n", vha->host_no, rval));
  1939. }
  1940. if (found_devs) {
  1941. vha->device_flags |= DFLG_LOCAL_DEVICES;
  1942. vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1943. }
  1944. return (rval);
  1945. }
  1946. static void
  1947. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  1948. {
  1949. #define LS_UNKNOWN 2
  1950. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1951. int rval;
  1952. uint16_t mb[6];
  1953. struct qla_hw_data *ha = vha->hw;
  1954. if (!IS_IIDMA_CAPABLE(ha))
  1955. return;
  1956. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1957. fcport->fp_speed > ha->link_data_rate)
  1958. return;
  1959. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  1960. mb);
  1961. if (rval != QLA_SUCCESS) {
  1962. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1963. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1964. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  1965. fcport->port_name[2], fcport->port_name[3],
  1966. fcport->port_name[4], fcport->port_name[5],
  1967. fcport->port_name[6], fcport->port_name[7], rval,
  1968. fcport->fp_speed, mb[0], mb[1]));
  1969. } else {
  1970. DEBUG2(qla_printk(KERN_INFO, ha,
  1971. "iIDMA adjusted to %s GB/s on "
  1972. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1973. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1974. fcport->port_name[1], fcport->port_name[2],
  1975. fcport->port_name[3], fcport->port_name[4],
  1976. fcport->port_name[5], fcport->port_name[6],
  1977. fcport->port_name[7]));
  1978. }
  1979. }
  1980. static void
  1981. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  1982. {
  1983. struct fc_rport_identifiers rport_ids;
  1984. struct fc_rport *rport;
  1985. struct qla_hw_data *ha = vha->hw;
  1986. if (fcport->drport)
  1987. qla2x00_rport_del(fcport);
  1988. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1989. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1990. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1991. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1992. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1993. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  1994. if (!rport) {
  1995. qla_printk(KERN_WARNING, ha,
  1996. "Unable to allocate fc remote port!\n");
  1997. return;
  1998. }
  1999. spin_lock_irq(fcport->vha->host->host_lock);
  2000. *((fc_port_t **)rport->dd_data) = fcport;
  2001. spin_unlock_irq(fcport->vha->host->host_lock);
  2002. rport->supported_classes = fcport->supported_classes;
  2003. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2004. if (fcport->port_type == FCT_INITIATOR)
  2005. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2006. if (fcport->port_type == FCT_TARGET)
  2007. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2008. fc_remote_port_rolechg(rport, rport_ids.roles);
  2009. }
  2010. /*
  2011. * qla2x00_update_fcport
  2012. * Updates device on list.
  2013. *
  2014. * Input:
  2015. * ha = adapter block pointer.
  2016. * fcport = port structure pointer.
  2017. *
  2018. * Return:
  2019. * 0 - Success
  2020. * BIT_0 - error
  2021. *
  2022. * Context:
  2023. * Kernel context.
  2024. */
  2025. void
  2026. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2027. {
  2028. struct qla_hw_data *ha = vha->hw;
  2029. fcport->vha = vha;
  2030. fcport->login_retry = 0;
  2031. fcport->port_login_retry_count = ha->port_down_retry_count *
  2032. PORT_RETRY_TIME;
  2033. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2034. PORT_RETRY_TIME);
  2035. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2036. qla2x00_iidma_fcport(vha, fcport);
  2037. atomic_set(&fcport->state, FCS_ONLINE);
  2038. qla2x00_reg_remote_port(vha, fcport);
  2039. }
  2040. /*
  2041. * qla2x00_configure_fabric
  2042. * Setup SNS devices with loop ID's.
  2043. *
  2044. * Input:
  2045. * ha = adapter block pointer.
  2046. *
  2047. * Returns:
  2048. * 0 = success.
  2049. * BIT_0 = error
  2050. */
  2051. static int
  2052. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2053. {
  2054. int rval, rval2;
  2055. fc_port_t *fcport, *fcptemp;
  2056. uint16_t next_loopid;
  2057. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2058. uint16_t loop_id;
  2059. LIST_HEAD(new_fcports);
  2060. struct qla_hw_data *ha = vha->hw;
  2061. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2062. /* If FL port exists, then SNS is present */
  2063. if (IS_FWI2_CAPABLE(ha))
  2064. loop_id = NPH_F_PORT;
  2065. else
  2066. loop_id = SNS_FL_PORT;
  2067. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2068. if (rval != QLA_SUCCESS) {
  2069. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2070. "Port\n", vha->host_no));
  2071. vha->device_flags &= ~SWITCH_FOUND;
  2072. return (QLA_SUCCESS);
  2073. }
  2074. vha->device_flags |= SWITCH_FOUND;
  2075. /* Mark devices that need re-synchronization. */
  2076. rval2 = qla2x00_device_resync(vha);
  2077. if (rval2 == QLA_RSCNS_HANDLED) {
  2078. /* No point doing the scan, just continue. */
  2079. return (QLA_SUCCESS);
  2080. }
  2081. do {
  2082. /* FDMI support. */
  2083. if (ql2xfdmienable &&
  2084. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2085. qla2x00_fdmi_register(vha);
  2086. /* Ensure we are logged into the SNS. */
  2087. if (IS_FWI2_CAPABLE(ha))
  2088. loop_id = NPH_SNS;
  2089. else
  2090. loop_id = SIMPLE_NAME_SERVER;
  2091. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2092. 0xfc, mb, BIT_1 | BIT_0);
  2093. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2094. DEBUG2(qla_printk(KERN_INFO, ha,
  2095. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2096. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2097. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2098. return (QLA_SUCCESS);
  2099. }
  2100. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2101. if (qla2x00_rft_id(vha)) {
  2102. /* EMPTY */
  2103. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2104. "TYPE failed.\n", vha->host_no));
  2105. }
  2106. if (qla2x00_rff_id(vha)) {
  2107. /* EMPTY */
  2108. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2109. "Features failed.\n", vha->host_no));
  2110. }
  2111. if (qla2x00_rnn_id(vha)) {
  2112. /* EMPTY */
  2113. DEBUG2(printk("scsi(%ld): Register Node Name "
  2114. "failed.\n", vha->host_no));
  2115. } else if (qla2x00_rsnn_nn(vha)) {
  2116. /* EMPTY */
  2117. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2118. "Node Name failed.\n", vha->host_no));
  2119. }
  2120. }
  2121. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2122. if (rval != QLA_SUCCESS)
  2123. break;
  2124. /*
  2125. * Logout all previous fabric devices marked lost, except
  2126. * tape devices.
  2127. */
  2128. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2129. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2130. break;
  2131. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2132. continue;
  2133. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2134. qla2x00_mark_device_lost(vha, fcport,
  2135. ql2xplogiabsentdevice, 0);
  2136. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2137. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2138. fcport->port_type != FCT_INITIATOR &&
  2139. fcport->port_type != FCT_BROADCAST) {
  2140. ha->isp_ops->fabric_logout(vha,
  2141. fcport->loop_id,
  2142. fcport->d_id.b.domain,
  2143. fcport->d_id.b.area,
  2144. fcport->d_id.b.al_pa);
  2145. fcport->loop_id = FC_NO_LOOP_ID;
  2146. }
  2147. }
  2148. }
  2149. /* Starting free loop ID. */
  2150. next_loopid = ha->min_external_loopid;
  2151. /*
  2152. * Scan through our port list and login entries that need to be
  2153. * logged in.
  2154. */
  2155. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2156. if (atomic_read(&vha->loop_down_timer) ||
  2157. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2158. break;
  2159. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2160. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2161. continue;
  2162. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2163. fcport->loop_id = next_loopid;
  2164. rval = qla2x00_find_new_loop_id(
  2165. base_vha, fcport);
  2166. if (rval != QLA_SUCCESS) {
  2167. /* Ran out of IDs to use */
  2168. break;
  2169. }
  2170. }
  2171. /* Login and update database */
  2172. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2173. }
  2174. /* Exit if out of loop IDs. */
  2175. if (rval != QLA_SUCCESS) {
  2176. break;
  2177. }
  2178. /*
  2179. * Login and add the new devices to our port list.
  2180. */
  2181. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2182. if (atomic_read(&vha->loop_down_timer) ||
  2183. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2184. break;
  2185. /* Find a new loop ID to use. */
  2186. fcport->loop_id = next_loopid;
  2187. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2188. if (rval != QLA_SUCCESS) {
  2189. /* Ran out of IDs to use */
  2190. break;
  2191. }
  2192. /* Login and update database */
  2193. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2194. if (vha->vp_idx) {
  2195. fcport->vha = vha;
  2196. fcport->vp_idx = vha->vp_idx;
  2197. }
  2198. list_move_tail(&fcport->list, &vha->vp_fcports);
  2199. }
  2200. } while (0);
  2201. /* Free all new device structures not processed. */
  2202. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2203. list_del(&fcport->list);
  2204. kfree(fcport);
  2205. }
  2206. if (rval) {
  2207. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2208. "rval=%d\n", vha->host_no, rval));
  2209. }
  2210. return (rval);
  2211. }
  2212. /*
  2213. * qla2x00_find_all_fabric_devs
  2214. *
  2215. * Input:
  2216. * ha = adapter block pointer.
  2217. * dev = database device entry pointer.
  2218. *
  2219. * Returns:
  2220. * 0 = success.
  2221. *
  2222. * Context:
  2223. * Kernel context.
  2224. */
  2225. static int
  2226. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2227. struct list_head *new_fcports)
  2228. {
  2229. int rval;
  2230. uint16_t loop_id;
  2231. fc_port_t *fcport, *new_fcport, *fcptemp;
  2232. int found;
  2233. sw_info_t *swl;
  2234. int swl_idx;
  2235. int first_dev, last_dev;
  2236. port_id_t wrap, nxt_d_id;
  2237. struct qla_hw_data *ha = vha->hw;
  2238. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2239. struct scsi_qla_host *tvp;
  2240. rval = QLA_SUCCESS;
  2241. /* Try GID_PT to get device list, else GAN. */
  2242. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2243. if (!swl) {
  2244. /*EMPTY*/
  2245. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2246. "on GA_NXT\n", vha->host_no));
  2247. } else {
  2248. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2249. kfree(swl);
  2250. swl = NULL;
  2251. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2252. kfree(swl);
  2253. swl = NULL;
  2254. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2255. kfree(swl);
  2256. swl = NULL;
  2257. } else if (ql2xiidmaenable &&
  2258. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2259. qla2x00_gpsc(vha, swl);
  2260. }
  2261. }
  2262. swl_idx = 0;
  2263. /* Allocate temporary fcport for any new fcports discovered. */
  2264. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2265. if (new_fcport == NULL) {
  2266. kfree(swl);
  2267. return (QLA_MEMORY_ALLOC_FAILED);
  2268. }
  2269. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2270. /* Set start port ID scan at adapter ID. */
  2271. first_dev = 1;
  2272. last_dev = 0;
  2273. /* Starting free loop ID. */
  2274. loop_id = ha->min_external_loopid;
  2275. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2276. if (qla2x00_is_reserved_id(vha, loop_id))
  2277. continue;
  2278. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2279. break;
  2280. if (swl != NULL) {
  2281. if (last_dev) {
  2282. wrap.b24 = new_fcport->d_id.b24;
  2283. } else {
  2284. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2285. memcpy(new_fcport->node_name,
  2286. swl[swl_idx].node_name, WWN_SIZE);
  2287. memcpy(new_fcport->port_name,
  2288. swl[swl_idx].port_name, WWN_SIZE);
  2289. memcpy(new_fcport->fabric_port_name,
  2290. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2291. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2292. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2293. last_dev = 1;
  2294. }
  2295. swl_idx++;
  2296. }
  2297. } else {
  2298. /* Send GA_NXT to the switch */
  2299. rval = qla2x00_ga_nxt(vha, new_fcport);
  2300. if (rval != QLA_SUCCESS) {
  2301. qla_printk(KERN_WARNING, ha,
  2302. "SNS scan failed -- assuming zero-entry "
  2303. "result...\n");
  2304. list_for_each_entry_safe(fcport, fcptemp,
  2305. new_fcports, list) {
  2306. list_del(&fcport->list);
  2307. kfree(fcport);
  2308. }
  2309. rval = QLA_SUCCESS;
  2310. break;
  2311. }
  2312. }
  2313. /* If wrap on switch device list, exit. */
  2314. if (first_dev) {
  2315. wrap.b24 = new_fcport->d_id.b24;
  2316. first_dev = 0;
  2317. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2318. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2319. vha->host_no, new_fcport->d_id.b.domain,
  2320. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2321. break;
  2322. }
  2323. /* Bypass if same physical adapter. */
  2324. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2325. continue;
  2326. /* Bypass virtual ports of the same host. */
  2327. found = 0;
  2328. if (ha->num_vhosts) {
  2329. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2330. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2331. found = 1;
  2332. break;
  2333. }
  2334. }
  2335. if (found)
  2336. continue;
  2337. }
  2338. /* Bypass if same domain and area of adapter. */
  2339. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2340. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2341. ISP_CFG_FL)
  2342. continue;
  2343. /* Bypass reserved domain fields. */
  2344. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2345. continue;
  2346. /* Locate matching device in database. */
  2347. found = 0;
  2348. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2349. if (memcmp(new_fcport->port_name, fcport->port_name,
  2350. WWN_SIZE))
  2351. continue;
  2352. found++;
  2353. /* Update port state. */
  2354. memcpy(fcport->fabric_port_name,
  2355. new_fcport->fabric_port_name, WWN_SIZE);
  2356. fcport->fp_speed = new_fcport->fp_speed;
  2357. /*
  2358. * If address the same and state FCS_ONLINE, nothing
  2359. * changed.
  2360. */
  2361. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2362. atomic_read(&fcport->state) == FCS_ONLINE) {
  2363. break;
  2364. }
  2365. /*
  2366. * If device was not a fabric device before.
  2367. */
  2368. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2369. fcport->d_id.b24 = new_fcport->d_id.b24;
  2370. fcport->loop_id = FC_NO_LOOP_ID;
  2371. fcport->flags |= (FCF_FABRIC_DEVICE |
  2372. FCF_LOGIN_NEEDED);
  2373. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2374. break;
  2375. }
  2376. /*
  2377. * Port ID changed or device was marked to be updated;
  2378. * Log it out if still logged in and mark it for
  2379. * relogin later.
  2380. */
  2381. fcport->d_id.b24 = new_fcport->d_id.b24;
  2382. fcport->flags |= FCF_LOGIN_NEEDED;
  2383. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2384. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2385. fcport->port_type != FCT_INITIATOR &&
  2386. fcport->port_type != FCT_BROADCAST) {
  2387. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2388. fcport->d_id.b.domain, fcport->d_id.b.area,
  2389. fcport->d_id.b.al_pa);
  2390. fcport->loop_id = FC_NO_LOOP_ID;
  2391. }
  2392. break;
  2393. }
  2394. if (found)
  2395. continue;
  2396. /* If device was not in our fcports list, then add it. */
  2397. list_add_tail(&new_fcport->list, new_fcports);
  2398. /* Allocate a new replacement fcport. */
  2399. nxt_d_id.b24 = new_fcport->d_id.b24;
  2400. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2401. if (new_fcport == NULL) {
  2402. kfree(swl);
  2403. return (QLA_MEMORY_ALLOC_FAILED);
  2404. }
  2405. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2406. new_fcport->d_id.b24 = nxt_d_id.b24;
  2407. }
  2408. kfree(swl);
  2409. kfree(new_fcport);
  2410. if (!list_empty(new_fcports))
  2411. vha->device_flags |= DFLG_FABRIC_DEVICES;
  2412. return (rval);
  2413. }
  2414. /*
  2415. * qla2x00_find_new_loop_id
  2416. * Scan through our port list and find a new usable loop ID.
  2417. *
  2418. * Input:
  2419. * ha: adapter state pointer.
  2420. * dev: port structure pointer.
  2421. *
  2422. * Returns:
  2423. * qla2x00 local function return status code.
  2424. *
  2425. * Context:
  2426. * Kernel context.
  2427. */
  2428. static int
  2429. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2430. {
  2431. int rval;
  2432. int found;
  2433. fc_port_t *fcport;
  2434. uint16_t first_loop_id;
  2435. struct qla_hw_data *ha = vha->hw;
  2436. struct scsi_qla_host *vp;
  2437. struct scsi_qla_host *tvp;
  2438. rval = QLA_SUCCESS;
  2439. /* Save starting loop ID. */
  2440. first_loop_id = dev->loop_id;
  2441. for (;;) {
  2442. /* Skip loop ID if already used by adapter. */
  2443. if (dev->loop_id == vha->loop_id)
  2444. dev->loop_id++;
  2445. /* Skip reserved loop IDs. */
  2446. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2447. dev->loop_id++;
  2448. /* Reset loop ID if passed the end. */
  2449. if (dev->loop_id > ha->max_loop_id) {
  2450. /* first loop ID. */
  2451. dev->loop_id = ha->min_external_loopid;
  2452. }
  2453. /* Check for loop ID being already in use. */
  2454. found = 0;
  2455. fcport = NULL;
  2456. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2457. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2458. if (fcport->loop_id == dev->loop_id &&
  2459. fcport != dev) {
  2460. /* ID possibly in use */
  2461. found++;
  2462. break;
  2463. }
  2464. }
  2465. if (found)
  2466. break;
  2467. }
  2468. /* If not in use then it is free to use. */
  2469. if (!found) {
  2470. break;
  2471. }
  2472. /* ID in use. Try next value. */
  2473. dev->loop_id++;
  2474. /* If wrap around. No free ID to use. */
  2475. if (dev->loop_id == first_loop_id) {
  2476. dev->loop_id = FC_NO_LOOP_ID;
  2477. rval = QLA_FUNCTION_FAILED;
  2478. break;
  2479. }
  2480. }
  2481. return (rval);
  2482. }
  2483. /*
  2484. * qla2x00_device_resync
  2485. * Marks devices in the database that needs resynchronization.
  2486. *
  2487. * Input:
  2488. * ha = adapter block pointer.
  2489. *
  2490. * Context:
  2491. * Kernel context.
  2492. */
  2493. static int
  2494. qla2x00_device_resync(scsi_qla_host_t *vha)
  2495. {
  2496. int rval;
  2497. uint32_t mask;
  2498. fc_port_t *fcport;
  2499. uint32_t rscn_entry;
  2500. uint8_t rscn_out_iter;
  2501. uint8_t format;
  2502. port_id_t d_id;
  2503. rval = QLA_RSCNS_HANDLED;
  2504. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2505. vha->flags.rscn_queue_overflow) {
  2506. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2507. format = MSB(MSW(rscn_entry));
  2508. d_id.b.domain = LSB(MSW(rscn_entry));
  2509. d_id.b.area = MSB(LSW(rscn_entry));
  2510. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2511. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2512. "[%02x/%02x%02x%02x].\n",
  2513. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2514. d_id.b.area, d_id.b.al_pa));
  2515. vha->rscn_out_ptr++;
  2516. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2517. vha->rscn_out_ptr = 0;
  2518. /* Skip duplicate entries. */
  2519. for (rscn_out_iter = vha->rscn_out_ptr;
  2520. !vha->flags.rscn_queue_overflow &&
  2521. rscn_out_iter != vha->rscn_in_ptr;
  2522. rscn_out_iter = (rscn_out_iter ==
  2523. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2524. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2525. break;
  2526. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2527. "entry found at [%d].\n", vha->host_no,
  2528. rscn_out_iter));
  2529. vha->rscn_out_ptr = rscn_out_iter;
  2530. }
  2531. /* Queue overflow, set switch default case. */
  2532. if (vha->flags.rscn_queue_overflow) {
  2533. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2534. "overflow.\n", vha->host_no));
  2535. format = 3;
  2536. vha->flags.rscn_queue_overflow = 0;
  2537. }
  2538. switch (format) {
  2539. case 0:
  2540. mask = 0xffffff;
  2541. break;
  2542. case 1:
  2543. mask = 0xffff00;
  2544. break;
  2545. case 2:
  2546. mask = 0xff0000;
  2547. break;
  2548. default:
  2549. mask = 0x0;
  2550. d_id.b24 = 0;
  2551. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2552. break;
  2553. }
  2554. rval = QLA_SUCCESS;
  2555. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2556. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2557. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2558. fcport->port_type == FCT_BROADCAST)
  2559. continue;
  2560. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2561. if (format != 3 ||
  2562. fcport->port_type != FCT_INITIATOR) {
  2563. qla2x00_mark_device_lost(vha, fcport,
  2564. 0, 0);
  2565. }
  2566. }
  2567. fcport->flags &= ~FCF_FARP_DONE;
  2568. }
  2569. }
  2570. return (rval);
  2571. }
  2572. /*
  2573. * qla2x00_fabric_dev_login
  2574. * Login fabric target device and update FC port database.
  2575. *
  2576. * Input:
  2577. * ha: adapter state pointer.
  2578. * fcport: port structure list pointer.
  2579. * next_loopid: contains value of a new loop ID that can be used
  2580. * by the next login attempt.
  2581. *
  2582. * Returns:
  2583. * qla2x00 local function return status code.
  2584. *
  2585. * Context:
  2586. * Kernel context.
  2587. */
  2588. static int
  2589. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2590. uint16_t *next_loopid)
  2591. {
  2592. int rval;
  2593. int retry;
  2594. uint8_t opts;
  2595. struct qla_hw_data *ha = vha->hw;
  2596. rval = QLA_SUCCESS;
  2597. retry = 0;
  2598. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2599. if (rval == QLA_SUCCESS) {
  2600. /* Send an ADISC to tape devices.*/
  2601. opts = 0;
  2602. if (fcport->flags & FCF_TAPE_PRESENT)
  2603. opts |= BIT_1;
  2604. rval = qla2x00_get_port_database(vha, fcport, opts);
  2605. if (rval != QLA_SUCCESS) {
  2606. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2607. fcport->d_id.b.domain, fcport->d_id.b.area,
  2608. fcport->d_id.b.al_pa);
  2609. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2610. } else {
  2611. qla2x00_update_fcport(vha, fcport);
  2612. }
  2613. }
  2614. return (rval);
  2615. }
  2616. /*
  2617. * qla2x00_fabric_login
  2618. * Issue fabric login command.
  2619. *
  2620. * Input:
  2621. * ha = adapter block pointer.
  2622. * device = pointer to FC device type structure.
  2623. *
  2624. * Returns:
  2625. * 0 - Login successfully
  2626. * 1 - Login failed
  2627. * 2 - Initiator device
  2628. * 3 - Fatal error
  2629. */
  2630. int
  2631. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2632. uint16_t *next_loopid)
  2633. {
  2634. int rval;
  2635. int retry;
  2636. uint16_t tmp_loopid;
  2637. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2638. struct qla_hw_data *ha = vha->hw;
  2639. retry = 0;
  2640. tmp_loopid = 0;
  2641. for (;;) {
  2642. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2643. "for port %02x%02x%02x.\n",
  2644. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2645. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2646. /* Login fcport on switch. */
  2647. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2648. fcport->d_id.b.domain, fcport->d_id.b.area,
  2649. fcport->d_id.b.al_pa, mb, BIT_0);
  2650. if (mb[0] == MBS_PORT_ID_USED) {
  2651. /*
  2652. * Device has another loop ID. The firmware team
  2653. * recommends the driver perform an implicit login with
  2654. * the specified ID again. The ID we just used is save
  2655. * here so we return with an ID that can be tried by
  2656. * the next login.
  2657. */
  2658. retry++;
  2659. tmp_loopid = fcport->loop_id;
  2660. fcport->loop_id = mb[1];
  2661. DEBUG(printk("Fabric Login: port in use - next "
  2662. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2663. fcport->loop_id, fcport->d_id.b.domain,
  2664. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2665. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2666. /*
  2667. * Login succeeded.
  2668. */
  2669. if (retry) {
  2670. /* A retry occurred before. */
  2671. *next_loopid = tmp_loopid;
  2672. } else {
  2673. /*
  2674. * No retry occurred before. Just increment the
  2675. * ID value for next login.
  2676. */
  2677. *next_loopid = (fcport->loop_id + 1);
  2678. }
  2679. if (mb[1] & BIT_0) {
  2680. fcport->port_type = FCT_INITIATOR;
  2681. } else {
  2682. fcport->port_type = FCT_TARGET;
  2683. if (mb[1] & BIT_1) {
  2684. fcport->flags |= FCF_TAPE_PRESENT;
  2685. }
  2686. }
  2687. if (mb[10] & BIT_0)
  2688. fcport->supported_classes |= FC_COS_CLASS2;
  2689. if (mb[10] & BIT_1)
  2690. fcport->supported_classes |= FC_COS_CLASS3;
  2691. rval = QLA_SUCCESS;
  2692. break;
  2693. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2694. /*
  2695. * Loop ID already used, try next loop ID.
  2696. */
  2697. fcport->loop_id++;
  2698. rval = qla2x00_find_new_loop_id(vha, fcport);
  2699. if (rval != QLA_SUCCESS) {
  2700. /* Ran out of loop IDs to use */
  2701. break;
  2702. }
  2703. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2704. /*
  2705. * Firmware possibly timed out during login. If NO
  2706. * retries are left to do then the device is declared
  2707. * dead.
  2708. */
  2709. *next_loopid = fcport->loop_id;
  2710. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2711. fcport->d_id.b.domain, fcport->d_id.b.area,
  2712. fcport->d_id.b.al_pa);
  2713. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2714. rval = 1;
  2715. break;
  2716. } else {
  2717. /*
  2718. * unrecoverable / not handled error
  2719. */
  2720. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2721. "loop_id=%x jiffies=%lx.\n",
  2722. __func__, vha->host_no, mb[0],
  2723. fcport->d_id.b.domain, fcport->d_id.b.area,
  2724. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2725. *next_loopid = fcport->loop_id;
  2726. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2727. fcport->d_id.b.domain, fcport->d_id.b.area,
  2728. fcport->d_id.b.al_pa);
  2729. fcport->loop_id = FC_NO_LOOP_ID;
  2730. fcport->login_retry = 0;
  2731. rval = 3;
  2732. break;
  2733. }
  2734. }
  2735. return (rval);
  2736. }
  2737. /*
  2738. * qla2x00_local_device_login
  2739. * Issue local device login command.
  2740. *
  2741. * Input:
  2742. * ha = adapter block pointer.
  2743. * loop_id = loop id of device to login to.
  2744. *
  2745. * Returns (Where's the #define!!!!):
  2746. * 0 - Login successfully
  2747. * 1 - Login failed
  2748. * 3 - Fatal error
  2749. */
  2750. int
  2751. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2752. {
  2753. int rval;
  2754. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2755. memset(mb, 0, sizeof(mb));
  2756. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2757. if (rval == QLA_SUCCESS) {
  2758. /* Interrogate mailbox registers for any errors */
  2759. if (mb[0] == MBS_COMMAND_ERROR)
  2760. rval = 1;
  2761. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2762. /* device not in PCB table */
  2763. rval = 3;
  2764. }
  2765. return (rval);
  2766. }
  2767. /*
  2768. * qla2x00_loop_resync
  2769. * Resync with fibre channel devices.
  2770. *
  2771. * Input:
  2772. * ha = adapter block pointer.
  2773. *
  2774. * Returns:
  2775. * 0 = success
  2776. */
  2777. int
  2778. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2779. {
  2780. int rval = QLA_SUCCESS;
  2781. uint32_t wait_time;
  2782. struct qla_hw_data *ha = vha->hw;
  2783. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  2784. struct rsp_que *rsp = req->rsp;
  2785. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2786. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2787. if (vha->flags.online) {
  2788. if (!(rval = qla2x00_fw_ready(vha))) {
  2789. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2790. wait_time = 256;
  2791. do {
  2792. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2793. /* Issue a marker after FW becomes ready. */
  2794. qla2x00_marker(vha, req, rsp, 0, 0,
  2795. MK_SYNC_ALL);
  2796. vha->marker_needed = 0;
  2797. /* Remap devices on Loop. */
  2798. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2799. qla2x00_configure_loop(vha);
  2800. wait_time--;
  2801. } while (!atomic_read(&vha->loop_down_timer) &&
  2802. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2803. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2804. &vha->dpc_flags)));
  2805. }
  2806. }
  2807. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2808. return (QLA_FUNCTION_FAILED);
  2809. if (rval)
  2810. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2811. return (rval);
  2812. }
  2813. void
  2814. qla2x00_update_fcports(scsi_qla_host_t *vha)
  2815. {
  2816. fc_port_t *fcport;
  2817. /* Go with deferred removal of rport references. */
  2818. list_for_each_entry(fcport, &vha->vp_fcports, list)
  2819. if (fcport && fcport->drport &&
  2820. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2821. qla2x00_rport_del(fcport);
  2822. }
  2823. /*
  2824. * qla2x00_abort_isp
  2825. * Resets ISP and aborts all outstanding commands.
  2826. *
  2827. * Input:
  2828. * ha = adapter block pointer.
  2829. *
  2830. * Returns:
  2831. * 0 = success
  2832. */
  2833. int
  2834. qla2x00_abort_isp(scsi_qla_host_t *vha)
  2835. {
  2836. int rval;
  2837. uint8_t status = 0;
  2838. struct qla_hw_data *ha = vha->hw;
  2839. struct scsi_qla_host *vp;
  2840. struct scsi_qla_host *tvp;
  2841. struct req_que *req = ha->req_q_map[0];
  2842. if (vha->flags.online) {
  2843. vha->flags.online = 0;
  2844. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  2845. ha->qla_stats.total_isp_aborts++;
  2846. qla_printk(KERN_INFO, ha,
  2847. "Performing ISP error recovery - ha= %p.\n", ha);
  2848. ha->isp_ops->reset_chip(vha);
  2849. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  2850. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  2851. atomic_set(&vha->loop_state, LOOP_DOWN);
  2852. qla2x00_mark_all_devices_lost(vha, 0);
  2853. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2854. qla2x00_mark_all_devices_lost(vp, 0);
  2855. } else {
  2856. if (!atomic_read(&vha->loop_down_timer))
  2857. atomic_set(&vha->loop_down_timer,
  2858. LOOP_DOWN_TIME);
  2859. }
  2860. /* Requeue all commands in outstanding command list. */
  2861. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  2862. ha->isp_ops->get_flash_version(vha, req->ring);
  2863. ha->isp_ops->nvram_config(vha);
  2864. if (!qla2x00_restart_isp(vha)) {
  2865. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2866. if (!atomic_read(&vha->loop_down_timer)) {
  2867. /*
  2868. * Issue marker command only when we are going
  2869. * to start the I/O .
  2870. */
  2871. vha->marker_needed = 1;
  2872. }
  2873. vha->flags.online = 1;
  2874. ha->isp_ops->enable_intrs(ha);
  2875. ha->isp_abort_cnt = 0;
  2876. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2877. if (ha->fce) {
  2878. ha->flags.fce_enabled = 1;
  2879. memset(ha->fce, 0,
  2880. fce_calc_size(ha->fce_bufs));
  2881. rval = qla2x00_enable_fce_trace(vha,
  2882. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2883. &ha->fce_bufs);
  2884. if (rval) {
  2885. qla_printk(KERN_WARNING, ha,
  2886. "Unable to reinitialize FCE "
  2887. "(%d).\n", rval);
  2888. ha->flags.fce_enabled = 0;
  2889. }
  2890. }
  2891. if (ha->eft) {
  2892. memset(ha->eft, 0, EFT_SIZE);
  2893. rval = qla2x00_enable_eft_trace(vha,
  2894. ha->eft_dma, EFT_NUM_BUFFERS);
  2895. if (rval) {
  2896. qla_printk(KERN_WARNING, ha,
  2897. "Unable to reinitialize EFT "
  2898. "(%d).\n", rval);
  2899. }
  2900. }
  2901. } else { /* failed the ISP abort */
  2902. vha->flags.online = 1;
  2903. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  2904. if (ha->isp_abort_cnt == 0) {
  2905. qla_printk(KERN_WARNING, ha,
  2906. "ISP error recovery failed - "
  2907. "board disabled\n");
  2908. /*
  2909. * The next call disables the board
  2910. * completely.
  2911. */
  2912. ha->isp_ops->reset_adapter(vha);
  2913. vha->flags.online = 0;
  2914. clear_bit(ISP_ABORT_RETRY,
  2915. &vha->dpc_flags);
  2916. status = 0;
  2917. } else { /* schedule another ISP abort */
  2918. ha->isp_abort_cnt--;
  2919. DEBUG(printk("qla%ld: ISP abort - "
  2920. "retry remaining %d\n",
  2921. vha->host_no, ha->isp_abort_cnt));
  2922. status = 1;
  2923. }
  2924. } else {
  2925. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2926. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2927. "- retrying (%d) more times\n",
  2928. vha->host_no, ha->isp_abort_cnt));
  2929. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2930. status = 1;
  2931. }
  2932. }
  2933. }
  2934. if (!status) {
  2935. DEBUG(printk(KERN_INFO
  2936. "qla2x00_abort_isp(%ld): succeeded.\n",
  2937. vha->host_no));
  2938. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2939. if (vp->vp_idx)
  2940. qla2x00_vp_abort_isp(vp);
  2941. }
  2942. } else {
  2943. qla_printk(KERN_INFO, ha,
  2944. "qla2x00_abort_isp: **** FAILED ****\n");
  2945. }
  2946. return(status);
  2947. }
  2948. /*
  2949. * qla2x00_restart_isp
  2950. * restarts the ISP after a reset
  2951. *
  2952. * Input:
  2953. * ha = adapter block pointer.
  2954. *
  2955. * Returns:
  2956. * 0 = success
  2957. */
  2958. static int
  2959. qla2x00_restart_isp(scsi_qla_host_t *vha)
  2960. {
  2961. int status = 0;
  2962. uint32_t wait_time;
  2963. struct qla_hw_data *ha = vha->hw;
  2964. struct req_que *req = ha->req_q_map[0];
  2965. struct rsp_que *rsp = ha->rsp_q_map[0];
  2966. /* If firmware needs to be loaded */
  2967. if (qla2x00_isp_firmware(vha)) {
  2968. vha->flags.online = 0;
  2969. status = ha->isp_ops->chip_diag(vha);
  2970. if (!status)
  2971. status = qla2x00_setup_chip(vha);
  2972. }
  2973. if (!status && !(status = qla2x00_init_rings(vha))) {
  2974. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2975. /* Initialize the queues in use */
  2976. qla25xx_init_queues(ha);
  2977. status = qla2x00_fw_ready(vha);
  2978. if (!status) {
  2979. DEBUG(printk("%s(): Start configure loop, "
  2980. "status = %d\n", __func__, status));
  2981. /* Issue a marker after FW becomes ready. */
  2982. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  2983. vha->flags.online = 1;
  2984. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2985. wait_time = 256;
  2986. do {
  2987. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2988. qla2x00_configure_loop(vha);
  2989. wait_time--;
  2990. } while (!atomic_read(&vha->loop_down_timer) &&
  2991. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  2992. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  2993. &vha->dpc_flags)));
  2994. }
  2995. /* if no cable then assume it's good */
  2996. if ((vha->device_flags & DFLG_NO_CABLE))
  2997. status = 0;
  2998. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2999. __func__,
  3000. status));
  3001. }
  3002. return (status);
  3003. }
  3004. static int
  3005. qla25xx_init_queues(struct qla_hw_data *ha)
  3006. {
  3007. struct rsp_que *rsp = NULL;
  3008. struct req_que *req = NULL;
  3009. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3010. int ret = -1;
  3011. int i;
  3012. for (i = 1; i < ha->max_queues; i++) {
  3013. rsp = ha->rsp_q_map[i];
  3014. if (rsp) {
  3015. rsp->options &= ~BIT_0;
  3016. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3017. if (ret != QLA_SUCCESS)
  3018. DEBUG2_17(printk(KERN_WARNING
  3019. "%s Rsp que:%d init failed\n", __func__,
  3020. rsp->id));
  3021. else
  3022. DEBUG2_17(printk(KERN_INFO
  3023. "%s Rsp que:%d inited\n", __func__,
  3024. rsp->id));
  3025. }
  3026. req = ha->req_q_map[i];
  3027. if (req) {
  3028. /* Clear outstanding commands array. */
  3029. req->options &= ~BIT_0;
  3030. ret = qla25xx_init_req_que(base_vha, req);
  3031. if (ret != QLA_SUCCESS)
  3032. DEBUG2_17(printk(KERN_WARNING
  3033. "%s Req que:%d init failed\n", __func__,
  3034. req->id));
  3035. else
  3036. DEBUG2_17(printk(KERN_WARNING
  3037. "%s Req que:%d inited\n", __func__,
  3038. req->id));
  3039. }
  3040. }
  3041. return ret;
  3042. }
  3043. /*
  3044. * qla2x00_reset_adapter
  3045. * Reset adapter.
  3046. *
  3047. * Input:
  3048. * ha = adapter block pointer.
  3049. */
  3050. void
  3051. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3052. {
  3053. unsigned long flags = 0;
  3054. struct qla_hw_data *ha = vha->hw;
  3055. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3056. vha->flags.online = 0;
  3057. ha->isp_ops->disable_intrs(ha);
  3058. spin_lock_irqsave(&ha->hardware_lock, flags);
  3059. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3060. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3061. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3062. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3063. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3064. }
  3065. void
  3066. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3067. {
  3068. unsigned long flags = 0;
  3069. struct qla_hw_data *ha = vha->hw;
  3070. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3071. vha->flags.online = 0;
  3072. ha->isp_ops->disable_intrs(ha);
  3073. spin_lock_irqsave(&ha->hardware_lock, flags);
  3074. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3075. RD_REG_DWORD(&reg->hccr);
  3076. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3077. RD_REG_DWORD(&reg->hccr);
  3078. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3079. if (IS_NOPOLLING_TYPE(ha))
  3080. ha->isp_ops->enable_intrs(ha);
  3081. }
  3082. /* On sparc systems, obtain port and node WWN from firmware
  3083. * properties.
  3084. */
  3085. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3086. struct nvram_24xx *nv)
  3087. {
  3088. #ifdef CONFIG_SPARC
  3089. struct qla_hw_data *ha = vha->hw;
  3090. struct pci_dev *pdev = ha->pdev;
  3091. struct device_node *dp = pci_device_to_OF_node(pdev);
  3092. const u8 *val;
  3093. int len;
  3094. val = of_get_property(dp, "port-wwn", &len);
  3095. if (val && len >= WWN_SIZE)
  3096. memcpy(nv->port_name, val, WWN_SIZE);
  3097. val = of_get_property(dp, "node-wwn", &len);
  3098. if (val && len >= WWN_SIZE)
  3099. memcpy(nv->node_name, val, WWN_SIZE);
  3100. #endif
  3101. }
  3102. int
  3103. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3104. {
  3105. int rval;
  3106. struct init_cb_24xx *icb;
  3107. struct nvram_24xx *nv;
  3108. uint32_t *dptr;
  3109. uint8_t *dptr1, *dptr2;
  3110. uint32_t chksum;
  3111. uint16_t cnt;
  3112. struct qla_hw_data *ha = vha->hw;
  3113. rval = QLA_SUCCESS;
  3114. icb = (struct init_cb_24xx *)ha->init_cb;
  3115. nv = ha->nvram;
  3116. /* Determine NVRAM starting address. */
  3117. ha->nvram_size = sizeof(struct nvram_24xx);
  3118. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3119. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3120. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3121. if (PCI_FUNC(ha->pdev->devfn)) {
  3122. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3123. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3124. }
  3125. /* Get VPD data into cache */
  3126. ha->vpd = ha->nvram + VPD_OFFSET;
  3127. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3128. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3129. /* Get NVRAM data into cache and calculate checksum. */
  3130. dptr = (uint32_t *)nv;
  3131. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3132. ha->nvram_size);
  3133. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3134. chksum += le32_to_cpu(*dptr++);
  3135. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3136. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3137. /* Bad NVRAM data, set defaults parameters. */
  3138. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3139. || nv->id[3] != ' ' ||
  3140. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3141. /* Reset NVRAM data. */
  3142. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3143. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3144. le16_to_cpu(nv->nvram_version));
  3145. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3146. "invalid -- WWPN) defaults.\n");
  3147. /*
  3148. * Set default initialization control block.
  3149. */
  3150. memset(nv, 0, ha->nvram_size);
  3151. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3152. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3153. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3154. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3155. nv->exchange_count = __constant_cpu_to_le16(0);
  3156. nv->hard_address = __constant_cpu_to_le16(124);
  3157. nv->port_name[0] = 0x21;
  3158. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3159. nv->port_name[2] = 0x00;
  3160. nv->port_name[3] = 0xe0;
  3161. nv->port_name[4] = 0x8b;
  3162. nv->port_name[5] = 0x1c;
  3163. nv->port_name[6] = 0x55;
  3164. nv->port_name[7] = 0x86;
  3165. nv->node_name[0] = 0x20;
  3166. nv->node_name[1] = 0x00;
  3167. nv->node_name[2] = 0x00;
  3168. nv->node_name[3] = 0xe0;
  3169. nv->node_name[4] = 0x8b;
  3170. nv->node_name[5] = 0x1c;
  3171. nv->node_name[6] = 0x55;
  3172. nv->node_name[7] = 0x86;
  3173. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3174. nv->login_retry_count = __constant_cpu_to_le16(8);
  3175. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3176. nv->login_timeout = __constant_cpu_to_le16(0);
  3177. nv->firmware_options_1 =
  3178. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3179. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3180. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3181. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3182. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3183. nv->efi_parameters = __constant_cpu_to_le32(0);
  3184. nv->reset_delay = 5;
  3185. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3186. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3187. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3188. rval = 1;
  3189. }
  3190. /* Reset Initialization control block */
  3191. memset(icb, 0, ha->init_cb_size);
  3192. /* Copy 1st segment. */
  3193. dptr1 = (uint8_t *)icb;
  3194. dptr2 = (uint8_t *)&nv->version;
  3195. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3196. while (cnt--)
  3197. *dptr1++ = *dptr2++;
  3198. icb->login_retry_count = nv->login_retry_count;
  3199. icb->link_down_on_nos = nv->link_down_on_nos;
  3200. /* Copy 2nd segment. */
  3201. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3202. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3203. cnt = (uint8_t *)&icb->reserved_3 -
  3204. (uint8_t *)&icb->interrupt_delay_timer;
  3205. while (cnt--)
  3206. *dptr1++ = *dptr2++;
  3207. /*
  3208. * Setup driver NVRAM options.
  3209. */
  3210. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3211. "QLA2462");
  3212. /* Use alternate WWN? */
  3213. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3214. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3215. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3216. }
  3217. /* Prepare nodename */
  3218. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3219. /*
  3220. * Firmware will apply the following mask if the nodename was
  3221. * not provided.
  3222. */
  3223. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3224. icb->node_name[0] &= 0xF0;
  3225. }
  3226. /* Set host adapter parameters. */
  3227. ha->flags.disable_risc_code_load = 0;
  3228. ha->flags.enable_lip_reset = 0;
  3229. ha->flags.enable_lip_full_login =
  3230. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3231. ha->flags.enable_target_reset =
  3232. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3233. ha->flags.enable_led_scheme = 0;
  3234. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3235. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3236. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3237. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3238. sizeof(ha->fw_seriallink_options24));
  3239. /* save HBA serial number */
  3240. ha->serial0 = icb->port_name[5];
  3241. ha->serial1 = icb->port_name[6];
  3242. ha->serial2 = icb->port_name[7];
  3243. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3244. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3245. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3246. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3247. /* Set minimum login_timeout to 4 seconds. */
  3248. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3249. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3250. if (le16_to_cpu(nv->login_timeout) < 4)
  3251. nv->login_timeout = __constant_cpu_to_le16(4);
  3252. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3253. icb->login_timeout = nv->login_timeout;
  3254. /* Set minimum RATOV to 100 tenths of a second. */
  3255. ha->r_a_tov = 100;
  3256. ha->loop_reset_delay = nv->reset_delay;
  3257. /* Link Down Timeout = 0:
  3258. *
  3259. * When Port Down timer expires we will start returning
  3260. * I/O's to OS with "DID_NO_CONNECT".
  3261. *
  3262. * Link Down Timeout != 0:
  3263. *
  3264. * The driver waits for the link to come up after link down
  3265. * before returning I/Os to OS with "DID_NO_CONNECT".
  3266. */
  3267. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3268. ha->loop_down_abort_time =
  3269. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3270. } else {
  3271. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3272. ha->loop_down_abort_time =
  3273. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3274. }
  3275. /* Need enough time to try and get the port back. */
  3276. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3277. if (qlport_down_retry)
  3278. ha->port_down_retry_count = qlport_down_retry;
  3279. /* Set login_retry_count */
  3280. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3281. if (ha->port_down_retry_count ==
  3282. le16_to_cpu(nv->port_down_retry_count) &&
  3283. ha->port_down_retry_count > 3)
  3284. ha->login_retry_count = ha->port_down_retry_count;
  3285. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3286. ha->login_retry_count = ha->port_down_retry_count;
  3287. if (ql2xloginretrycount)
  3288. ha->login_retry_count = ql2xloginretrycount;
  3289. /* Enable ZIO. */
  3290. if (!vha->flags.init_done) {
  3291. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3292. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3293. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3294. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3295. }
  3296. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3297. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3298. vha->flags.process_response_queue = 0;
  3299. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3300. ha->zio_mode = QLA_ZIO_MODE_6;
  3301. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3302. "(%d us).\n", vha->host_no, ha->zio_mode,
  3303. ha->zio_timer * 100));
  3304. qla_printk(KERN_INFO, ha,
  3305. "ZIO mode %d enabled; timer delay (%d us).\n",
  3306. ha->zio_mode, ha->zio_timer * 100);
  3307. icb->firmware_options_2 |= cpu_to_le32(
  3308. (uint32_t)ha->zio_mode);
  3309. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3310. vha->flags.process_response_queue = 1;
  3311. }
  3312. if (rval) {
  3313. DEBUG2_3(printk(KERN_WARNING
  3314. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3315. }
  3316. return (rval);
  3317. }
  3318. static int
  3319. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3320. {
  3321. int rval = QLA_SUCCESS;
  3322. int segments, fragment;
  3323. uint32_t faddr;
  3324. uint32_t *dcode, dlen;
  3325. uint32_t risc_addr;
  3326. uint32_t risc_size;
  3327. uint32_t i;
  3328. struct qla_hw_data *ha = vha->hw;
  3329. struct req_que *req = ha->req_q_map[0];
  3330. qla_printk(KERN_INFO, ha,
  3331. "FW: Loading from flash (%x)...\n", ha->flt_region_fw);
  3332. rval = QLA_SUCCESS;
  3333. segments = FA_RISC_CODE_SEGMENTS;
  3334. faddr = ha->flt_region_fw;
  3335. dcode = (uint32_t *)req->ring;
  3336. *srisc_addr = 0;
  3337. /* Validate firmware image by checking version. */
  3338. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3339. for (i = 0; i < 4; i++)
  3340. dcode[i] = be32_to_cpu(dcode[i]);
  3341. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3342. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3343. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3344. dcode[3] == 0)) {
  3345. qla_printk(KERN_WARNING, ha,
  3346. "Unable to verify integrity of flash firmware image!\n");
  3347. qla_printk(KERN_WARNING, ha,
  3348. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3349. dcode[1], dcode[2], dcode[3]);
  3350. return QLA_FUNCTION_FAILED;
  3351. }
  3352. while (segments && rval == QLA_SUCCESS) {
  3353. /* Read segment's load information. */
  3354. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3355. risc_addr = be32_to_cpu(dcode[2]);
  3356. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3357. risc_size = be32_to_cpu(dcode[3]);
  3358. fragment = 0;
  3359. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3360. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3361. if (dlen > risc_size)
  3362. dlen = risc_size;
  3363. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3364. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3365. vha->host_no, risc_addr, dlen, faddr));
  3366. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3367. for (i = 0; i < dlen; i++)
  3368. dcode[i] = swab32(dcode[i]);
  3369. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3370. dlen);
  3371. if (rval) {
  3372. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3373. "segment %d of firmware\n", vha->host_no,
  3374. fragment));
  3375. qla_printk(KERN_WARNING, ha,
  3376. "[ERROR] Failed to load segment %d of "
  3377. "firmware\n", fragment);
  3378. break;
  3379. }
  3380. faddr += dlen;
  3381. risc_addr += dlen;
  3382. risc_size -= dlen;
  3383. fragment++;
  3384. }
  3385. /* Next segment. */
  3386. segments--;
  3387. }
  3388. return rval;
  3389. }
  3390. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3391. int
  3392. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3393. {
  3394. int rval;
  3395. int i, fragment;
  3396. uint16_t *wcode, *fwcode;
  3397. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3398. struct fw_blob *blob;
  3399. struct qla_hw_data *ha = vha->hw;
  3400. struct req_que *req = ha->req_q_map[0];
  3401. /* Load firmware blob. */
  3402. blob = qla2x00_request_firmware(vha);
  3403. if (!blob) {
  3404. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3405. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3406. "from: " QLA_FW_URL ".\n");
  3407. return QLA_FUNCTION_FAILED;
  3408. }
  3409. rval = QLA_SUCCESS;
  3410. wcode = (uint16_t *)req->ring;
  3411. *srisc_addr = 0;
  3412. fwcode = (uint16_t *)blob->fw->data;
  3413. fwclen = 0;
  3414. /* Validate firmware image by checking version. */
  3415. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3416. qla_printk(KERN_WARNING, ha,
  3417. "Unable to verify integrity of firmware image (%Zd)!\n",
  3418. blob->fw->size);
  3419. goto fail_fw_integrity;
  3420. }
  3421. for (i = 0; i < 4; i++)
  3422. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3423. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3424. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3425. wcode[2] == 0 && wcode[3] == 0)) {
  3426. qla_printk(KERN_WARNING, ha,
  3427. "Unable to verify integrity of firmware image!\n");
  3428. qla_printk(KERN_WARNING, ha,
  3429. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3430. wcode[1], wcode[2], wcode[3]);
  3431. goto fail_fw_integrity;
  3432. }
  3433. seg = blob->segs;
  3434. while (*seg && rval == QLA_SUCCESS) {
  3435. risc_addr = *seg;
  3436. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3437. risc_size = be16_to_cpu(fwcode[3]);
  3438. /* Validate firmware image size. */
  3439. fwclen += risc_size * sizeof(uint16_t);
  3440. if (blob->fw->size < fwclen) {
  3441. qla_printk(KERN_WARNING, ha,
  3442. "Unable to verify integrity of firmware image "
  3443. "(%Zd)!\n", blob->fw->size);
  3444. goto fail_fw_integrity;
  3445. }
  3446. fragment = 0;
  3447. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3448. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3449. if (wlen > risc_size)
  3450. wlen = risc_size;
  3451. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3452. "addr %x, number of words 0x%x.\n", vha->host_no,
  3453. risc_addr, wlen));
  3454. for (i = 0; i < wlen; i++)
  3455. wcode[i] = swab16(fwcode[i]);
  3456. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3457. wlen);
  3458. if (rval) {
  3459. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3460. "segment %d of firmware\n", vha->host_no,
  3461. fragment));
  3462. qla_printk(KERN_WARNING, ha,
  3463. "[ERROR] Failed to load segment %d of "
  3464. "firmware\n", fragment);
  3465. break;
  3466. }
  3467. fwcode += wlen;
  3468. risc_addr += wlen;
  3469. risc_size -= wlen;
  3470. fragment++;
  3471. }
  3472. /* Next segment. */
  3473. seg++;
  3474. }
  3475. return rval;
  3476. fail_fw_integrity:
  3477. return QLA_FUNCTION_FAILED;
  3478. }
  3479. static int
  3480. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3481. {
  3482. int rval;
  3483. int segments, fragment;
  3484. uint32_t *dcode, dlen;
  3485. uint32_t risc_addr;
  3486. uint32_t risc_size;
  3487. uint32_t i;
  3488. struct fw_blob *blob;
  3489. uint32_t *fwcode, fwclen;
  3490. struct qla_hw_data *ha = vha->hw;
  3491. struct req_que *req = ha->req_q_map[0];
  3492. /* Load firmware blob. */
  3493. blob = qla2x00_request_firmware(vha);
  3494. if (!blob) {
  3495. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3496. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3497. "from: " QLA_FW_URL ".\n");
  3498. return QLA_FUNCTION_FAILED;
  3499. }
  3500. qla_printk(KERN_INFO, ha,
  3501. "FW: Loading via request-firmware...\n");
  3502. rval = QLA_SUCCESS;
  3503. segments = FA_RISC_CODE_SEGMENTS;
  3504. dcode = (uint32_t *)req->ring;
  3505. *srisc_addr = 0;
  3506. fwcode = (uint32_t *)blob->fw->data;
  3507. fwclen = 0;
  3508. /* Validate firmware image by checking version. */
  3509. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3510. qla_printk(KERN_WARNING, ha,
  3511. "Unable to verify integrity of firmware image (%Zd)!\n",
  3512. blob->fw->size);
  3513. goto fail_fw_integrity;
  3514. }
  3515. for (i = 0; i < 4; i++)
  3516. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3517. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3518. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3519. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3520. dcode[3] == 0)) {
  3521. qla_printk(KERN_WARNING, ha,
  3522. "Unable to verify integrity of firmware image!\n");
  3523. qla_printk(KERN_WARNING, ha,
  3524. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3525. dcode[1], dcode[2], dcode[3]);
  3526. goto fail_fw_integrity;
  3527. }
  3528. while (segments && rval == QLA_SUCCESS) {
  3529. risc_addr = be32_to_cpu(fwcode[2]);
  3530. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3531. risc_size = be32_to_cpu(fwcode[3]);
  3532. /* Validate firmware image size. */
  3533. fwclen += risc_size * sizeof(uint32_t);
  3534. if (blob->fw->size < fwclen) {
  3535. qla_printk(KERN_WARNING, ha,
  3536. "Unable to verify integrity of firmware image "
  3537. "(%Zd)!\n", blob->fw->size);
  3538. goto fail_fw_integrity;
  3539. }
  3540. fragment = 0;
  3541. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3542. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3543. if (dlen > risc_size)
  3544. dlen = risc_size;
  3545. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3546. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3547. risc_addr, dlen));
  3548. for (i = 0; i < dlen; i++)
  3549. dcode[i] = swab32(fwcode[i]);
  3550. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3551. dlen);
  3552. if (rval) {
  3553. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3554. "segment %d of firmware\n", vha->host_no,
  3555. fragment));
  3556. qla_printk(KERN_WARNING, ha,
  3557. "[ERROR] Failed to load segment %d of "
  3558. "firmware\n", fragment);
  3559. break;
  3560. }
  3561. fwcode += dlen;
  3562. risc_addr += dlen;
  3563. risc_size -= dlen;
  3564. fragment++;
  3565. }
  3566. /* Next segment. */
  3567. segments--;
  3568. }
  3569. return rval;
  3570. fail_fw_integrity:
  3571. return QLA_FUNCTION_FAILED;
  3572. }
  3573. int
  3574. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3575. {
  3576. int rval;
  3577. /*
  3578. * FW Load priority:
  3579. * 1) Firmware via request-firmware interface (.bin file).
  3580. * 2) Firmware residing in flash.
  3581. */
  3582. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3583. if (rval == QLA_SUCCESS)
  3584. return rval;
  3585. return qla24xx_load_risc_flash(vha, srisc_addr);
  3586. }
  3587. int
  3588. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3589. {
  3590. int rval;
  3591. /*
  3592. * FW Load priority:
  3593. * 1) Firmware residing in flash.
  3594. * 2) Firmware via request-firmware interface (.bin file).
  3595. */
  3596. rval = qla24xx_load_risc_flash(vha, srisc_addr);
  3597. if (rval == QLA_SUCCESS)
  3598. return rval;
  3599. return qla24xx_load_risc_blob(vha, srisc_addr);
  3600. }
  3601. void
  3602. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3603. {
  3604. int ret, retries;
  3605. struct qla_hw_data *ha = vha->hw;
  3606. if (!IS_FWI2_CAPABLE(ha))
  3607. return;
  3608. if (!ha->fw_major_version)
  3609. return;
  3610. ret = qla2x00_stop_firmware(vha);
  3611. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3612. retries ; retries--) {
  3613. ha->isp_ops->reset_chip(vha);
  3614. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3615. continue;
  3616. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3617. continue;
  3618. qla_printk(KERN_INFO, ha,
  3619. "Attempting retry of stop-firmware command...\n");
  3620. ret = qla2x00_stop_firmware(vha);
  3621. }
  3622. }
  3623. int
  3624. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3625. {
  3626. int rval = QLA_SUCCESS;
  3627. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3628. struct qla_hw_data *ha = vha->hw;
  3629. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3630. struct req_que *req = ha->req_q_map[vha->req_ques[0]];
  3631. struct rsp_que *rsp = req->rsp;
  3632. if (!vha->vp_idx)
  3633. return -EINVAL;
  3634. rval = qla2x00_fw_ready(base_vha);
  3635. if (rval == QLA_SUCCESS) {
  3636. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3637. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3638. }
  3639. vha->flags.management_server_logged_in = 0;
  3640. /* Login to SNS first */
  3641. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3642. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3643. DEBUG15(qla_printk(KERN_INFO, ha,
  3644. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3645. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3646. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3647. return (QLA_FUNCTION_FAILED);
  3648. }
  3649. atomic_set(&vha->loop_down_timer, 0);
  3650. atomic_set(&vha->loop_state, LOOP_UP);
  3651. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3652. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3653. rval = qla2x00_loop_resync(base_vha);
  3654. return rval;
  3655. }
  3656. /* 84XX Support **************************************************************/
  3657. static LIST_HEAD(qla_cs84xx_list);
  3658. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3659. static struct qla_chip_state_84xx *
  3660. qla84xx_get_chip(struct scsi_qla_host *vha)
  3661. {
  3662. struct qla_chip_state_84xx *cs84xx;
  3663. struct qla_hw_data *ha = vha->hw;
  3664. mutex_lock(&qla_cs84xx_mutex);
  3665. /* Find any shared 84xx chip. */
  3666. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3667. if (cs84xx->bus == ha->pdev->bus) {
  3668. kref_get(&cs84xx->kref);
  3669. goto done;
  3670. }
  3671. }
  3672. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3673. if (!cs84xx)
  3674. goto done;
  3675. kref_init(&cs84xx->kref);
  3676. spin_lock_init(&cs84xx->access_lock);
  3677. mutex_init(&cs84xx->fw_update_mutex);
  3678. cs84xx->bus = ha->pdev->bus;
  3679. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3680. done:
  3681. mutex_unlock(&qla_cs84xx_mutex);
  3682. return cs84xx;
  3683. }
  3684. static void
  3685. __qla84xx_chip_release(struct kref *kref)
  3686. {
  3687. struct qla_chip_state_84xx *cs84xx =
  3688. container_of(kref, struct qla_chip_state_84xx, kref);
  3689. mutex_lock(&qla_cs84xx_mutex);
  3690. list_del(&cs84xx->list);
  3691. mutex_unlock(&qla_cs84xx_mutex);
  3692. kfree(cs84xx);
  3693. }
  3694. void
  3695. qla84xx_put_chip(struct scsi_qla_host *vha)
  3696. {
  3697. struct qla_hw_data *ha = vha->hw;
  3698. if (ha->cs84xx)
  3699. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3700. }
  3701. static int
  3702. qla84xx_init_chip(scsi_qla_host_t *vha)
  3703. {
  3704. int rval;
  3705. uint16_t status[2];
  3706. struct qla_hw_data *ha = vha->hw;
  3707. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3708. rval = qla84xx_verify_chip(vha, status);
  3709. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3710. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3711. QLA_SUCCESS;
  3712. }
  3713. /* 81XX Support **************************************************************/
  3714. int
  3715. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3716. {
  3717. int rval;
  3718. struct init_cb_81xx *icb;
  3719. struct nvram_81xx *nv;
  3720. uint32_t *dptr;
  3721. uint8_t *dptr1, *dptr2;
  3722. uint32_t chksum;
  3723. uint16_t cnt;
  3724. struct qla_hw_data *ha = vha->hw;
  3725. rval = QLA_SUCCESS;
  3726. icb = (struct init_cb_81xx *)ha->init_cb;
  3727. nv = ha->nvram;
  3728. /* Determine NVRAM starting address. */
  3729. ha->nvram_size = sizeof(struct nvram_81xx);
  3730. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3731. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3732. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3733. if (PCI_FUNC(ha->pdev->devfn) & 1) {
  3734. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3735. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3736. }
  3737. /* Get VPD data into cache */
  3738. ha->vpd = ha->nvram + VPD_OFFSET;
  3739. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3740. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3741. /* Get NVRAM data into cache and calculate checksum. */
  3742. dptr = (uint32_t *)nv;
  3743. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3744. ha->nvram_size);
  3745. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3746. chksum += le32_to_cpu(*dptr++);
  3747. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3748. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3749. /* Bad NVRAM data, set defaults parameters. */
  3750. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3751. || nv->id[3] != ' ' ||
  3752. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3753. /* Reset NVRAM data. */
  3754. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3755. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3756. le16_to_cpu(nv->nvram_version));
  3757. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3758. "invalid -- WWPN) defaults.\n");
  3759. /*
  3760. * Set default initialization control block.
  3761. */
  3762. memset(nv, 0, ha->nvram_size);
  3763. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3764. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3765. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3766. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3767. nv->exchange_count = __constant_cpu_to_le16(0);
  3768. nv->port_name[0] = 0x21;
  3769. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3770. nv->port_name[2] = 0x00;
  3771. nv->port_name[3] = 0xe0;
  3772. nv->port_name[4] = 0x8b;
  3773. nv->port_name[5] = 0x1c;
  3774. nv->port_name[6] = 0x55;
  3775. nv->port_name[7] = 0x86;
  3776. nv->node_name[0] = 0x20;
  3777. nv->node_name[1] = 0x00;
  3778. nv->node_name[2] = 0x00;
  3779. nv->node_name[3] = 0xe0;
  3780. nv->node_name[4] = 0x8b;
  3781. nv->node_name[5] = 0x1c;
  3782. nv->node_name[6] = 0x55;
  3783. nv->node_name[7] = 0x86;
  3784. nv->login_retry_count = __constant_cpu_to_le16(8);
  3785. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3786. nv->login_timeout = __constant_cpu_to_le16(0);
  3787. nv->firmware_options_1 =
  3788. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3789. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3790. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3791. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3792. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3793. nv->efi_parameters = __constant_cpu_to_le32(0);
  3794. nv->reset_delay = 5;
  3795. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3796. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3797. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3798. nv->enode_mac[0] = 0x01;
  3799. nv->enode_mac[1] = 0x02;
  3800. nv->enode_mac[2] = 0x03;
  3801. nv->enode_mac[3] = 0x04;
  3802. nv->enode_mac[4] = 0x05;
  3803. nv->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3804. rval = 1;
  3805. }
  3806. /* Reset Initialization control block */
  3807. memset(icb, 0, sizeof(struct init_cb_81xx));
  3808. /* Copy 1st segment. */
  3809. dptr1 = (uint8_t *)icb;
  3810. dptr2 = (uint8_t *)&nv->version;
  3811. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3812. while (cnt--)
  3813. *dptr1++ = *dptr2++;
  3814. icb->login_retry_count = nv->login_retry_count;
  3815. /* Copy 2nd segment. */
  3816. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3817. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3818. cnt = (uint8_t *)&icb->reserved_5 -
  3819. (uint8_t *)&icb->interrupt_delay_timer;
  3820. while (cnt--)
  3821. *dptr1++ = *dptr2++;
  3822. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  3823. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  3824. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  3825. icb->enode_mac[0] = 0x01;
  3826. icb->enode_mac[1] = 0x02;
  3827. icb->enode_mac[2] = 0x03;
  3828. icb->enode_mac[3] = 0x04;
  3829. icb->enode_mac[4] = 0x05;
  3830. icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
  3831. }
  3832. /* Use extended-initialization control block. */
  3833. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  3834. /*
  3835. * Setup driver NVRAM options.
  3836. */
  3837. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3838. "QLE81XX");
  3839. /* Use alternate WWN? */
  3840. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3841. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3842. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3843. }
  3844. /* Prepare nodename */
  3845. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3846. /*
  3847. * Firmware will apply the following mask if the nodename was
  3848. * not provided.
  3849. */
  3850. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3851. icb->node_name[0] &= 0xF0;
  3852. }
  3853. /* Set host adapter parameters. */
  3854. ha->flags.disable_risc_code_load = 0;
  3855. ha->flags.enable_lip_reset = 0;
  3856. ha->flags.enable_lip_full_login =
  3857. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3858. ha->flags.enable_target_reset =
  3859. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3860. ha->flags.enable_led_scheme = 0;
  3861. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3862. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3863. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3864. /* save HBA serial number */
  3865. ha->serial0 = icb->port_name[5];
  3866. ha->serial1 = icb->port_name[6];
  3867. ha->serial2 = icb->port_name[7];
  3868. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3869. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3870. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3871. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3872. /* Set minimum login_timeout to 4 seconds. */
  3873. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3874. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3875. if (le16_to_cpu(nv->login_timeout) < 4)
  3876. nv->login_timeout = __constant_cpu_to_le16(4);
  3877. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3878. icb->login_timeout = nv->login_timeout;
  3879. /* Set minimum RATOV to 100 tenths of a second. */
  3880. ha->r_a_tov = 100;
  3881. ha->loop_reset_delay = nv->reset_delay;
  3882. /* Link Down Timeout = 0:
  3883. *
  3884. * When Port Down timer expires we will start returning
  3885. * I/O's to OS with "DID_NO_CONNECT".
  3886. *
  3887. * Link Down Timeout != 0:
  3888. *
  3889. * The driver waits for the link to come up after link down
  3890. * before returning I/Os to OS with "DID_NO_CONNECT".
  3891. */
  3892. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3893. ha->loop_down_abort_time =
  3894. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3895. } else {
  3896. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3897. ha->loop_down_abort_time =
  3898. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3899. }
  3900. /* Need enough time to try and get the port back. */
  3901. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3902. if (qlport_down_retry)
  3903. ha->port_down_retry_count = qlport_down_retry;
  3904. /* Set login_retry_count */
  3905. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3906. if (ha->port_down_retry_count ==
  3907. le16_to_cpu(nv->port_down_retry_count) &&
  3908. ha->port_down_retry_count > 3)
  3909. ha->login_retry_count = ha->port_down_retry_count;
  3910. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3911. ha->login_retry_count = ha->port_down_retry_count;
  3912. if (ql2xloginretrycount)
  3913. ha->login_retry_count = ql2xloginretrycount;
  3914. /* Enable ZIO. */
  3915. if (!vha->flags.init_done) {
  3916. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3917. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3918. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3919. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3920. }
  3921. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3922. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3923. vha->flags.process_response_queue = 0;
  3924. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3925. ha->zio_mode = QLA_ZIO_MODE_6;
  3926. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3927. "(%d us).\n", vha->host_no, ha->zio_mode,
  3928. ha->zio_timer * 100));
  3929. qla_printk(KERN_INFO, ha,
  3930. "ZIO mode %d enabled; timer delay (%d us).\n",
  3931. ha->zio_mode, ha->zio_timer * 100);
  3932. icb->firmware_options_2 |= cpu_to_le32(
  3933. (uint32_t)ha->zio_mode);
  3934. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3935. vha->flags.process_response_queue = 1;
  3936. }
  3937. if (rval) {
  3938. DEBUG2_3(printk(KERN_WARNING
  3939. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3940. }
  3941. return (rval);
  3942. }
  3943. void
  3944. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  3945. {
  3946. }