iwl4965-base.c 256 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744874587468747874887498750875187528753875487558756875787588759876087618762876387648765876687678768876987708771877287738774877587768777877887798780878187828783878487858786878787888789879087918792879387948795879687978798879988008801880288038804880588068807880888098810881188128813881488158816881788188819882088218822882388248825882688278828882988308831883288338834883588368837883888398840884188428843884488458846884788488849885088518852885388548855885688578858885988608861886288638864886588668867886888698870887188728873887488758876887788788879888088818882888388848885888688878888888988908891889288938894889588968897889888998900890189028903890489058906890789088909891089118912891389148915891689178918891989208921892289238924892589268927892889298930893189328933893489358936893789388939894089418942894389448945894689478948894989508951895289538954895589568957895889598960896189628963896489658966896789688969897089718972897389748975897689778978897989808981898289838984898589868987898889898990899189928993899489958996899789988999900090019002900390049005900690079008900990109011901290139014901590169017901890199020902190229023902490259026902790289029903090319032903390349035903690379038903990409041904290439044904590469047904890499050905190529053905490559056905790589059906090619062906390649065906690679068906990709071907290739074907590769077907890799080908190829083908490859086908790889089909090919092909390949095909690979098909991009101910291039104910591069107910891099110911191129113911491159116911791189119912091219122912391249125912691279128912991309131913291339134913591369137913891399140914191429143914491459146914791489149915091519152915391549155915691579158915991609161916291639164916591669167916891699170917191729173917491759176917791789179918091819182918391849185918691879188918991909191919291939194919591969197919891999200920192029203920492059206920792089209921092119212921392149215921692179218921992209221922292239224922592269227922892299230923192329233923492359236923792389239924092419242924392449245924692479248924992509251925292539254925592569257925892599260926192629263926492659266926792689269927092719272927392749275927692779278927992809281928292839284928592869287928892899290929192929293929492959296929792989299930093019302930393049305930693079308930993109311931293139314931593169317931893199320932193229323932493259326932793289329933093319332933393349335933693379338933993409341934293439344
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/skbuff.h>
  50. #include <linux/netdevice.h>
  51. #include <linux/etherdevice.h>
  52. #include <linux/if_arp.h>
  53. #include <net/ieee80211_radiotap.h>
  54. #include <net/mac80211.h>
  55. #include <asm/div64.h>
  56. #define IWL 4965
  57. #include "iwlwifi.h"
  58. #include "iwl-4965.h"
  59. #include "iwl-helpers.h"
  60. #ifdef CONFIG_IWLWIFI_DEBUG
  61. u32 iwl_debug_level;
  62. #endif
  63. /******************************************************************************
  64. *
  65. * module boiler plate
  66. *
  67. ******************************************************************************/
  68. /* module parameters */
  69. int iwl_param_disable_hw_scan;
  70. int iwl_param_debug;
  71. int iwl_param_disable; /* def: enable radio */
  72. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  73. int iwl_param_hwcrypto; /* def: using software encryption */
  74. int iwl_param_qos_enable = 1;
  75. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  76. /*
  77. * module name, copyright, version, etc.
  78. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  79. */
  80. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  81. #ifdef CONFIG_IWLWIFI_DEBUG
  82. #define VD "d"
  83. #else
  84. #define VD
  85. #endif
  86. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  87. #define VS "s"
  88. #else
  89. #define VS
  90. #endif
  91. #define IWLWIFI_VERSION "0.1.15k" VD VS
  92. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  93. #define DRV_VERSION IWLWIFI_VERSION
  94. /* Change firmware file name, using "-" and incrementing number,
  95. * *only* when uCode interface or architecture changes so that it
  96. * is not compatible with earlier drivers.
  97. * This number will also appear in << 8 position of 1st dword of uCode file */
  98. #define IWL4965_UCODE_API "-1"
  99. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  100. MODULE_VERSION(DRV_VERSION);
  101. MODULE_AUTHOR(DRV_COPYRIGHT);
  102. MODULE_LICENSE("GPL");
  103. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  104. {
  105. u16 fc = le16_to_cpu(hdr->frame_control);
  106. int hdr_len = ieee80211_get_hdrlen(fc);
  107. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  108. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  109. return NULL;
  110. }
  111. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  112. struct iwl_priv *priv, int mode)
  113. {
  114. int i;
  115. for (i = 0; i < 3; i++)
  116. if (priv->modes[i].mode == mode)
  117. return &priv->modes[i];
  118. return NULL;
  119. }
  120. static int iwl_is_empty_essid(const char *essid, int essid_len)
  121. {
  122. /* Single white space is for Linksys APs */
  123. if (essid_len == 1 && essid[0] == ' ')
  124. return 1;
  125. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  126. while (essid_len) {
  127. essid_len--;
  128. if (essid[essid_len] != '\0')
  129. return 0;
  130. }
  131. return 1;
  132. }
  133. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  134. {
  135. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  136. const char *s = essid;
  137. char *d = escaped;
  138. if (iwl_is_empty_essid(essid, essid_len)) {
  139. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  140. return escaped;
  141. }
  142. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  143. while (essid_len--) {
  144. if (*s == '\0') {
  145. *d++ = '\\';
  146. *d++ = '0';
  147. s++;
  148. } else
  149. *d++ = *s++;
  150. }
  151. *d = '\0';
  152. return escaped;
  153. }
  154. static void iwl_print_hex_dump(int level, void *p, u32 len)
  155. {
  156. #ifdef CONFIG_IWLWIFI_DEBUG
  157. if (!(iwl_debug_level & level))
  158. return;
  159. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  160. p, len, 1);
  161. #endif
  162. }
  163. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  164. * DMA services
  165. *
  166. * Theory of operation
  167. *
  168. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  169. * 2 empty entries always kept in the buffer to protect from overflow.
  170. *
  171. * For Tx queue, there are low mark and high mark limits. If, after queuing
  172. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  173. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  174. * Tx queue resumed.
  175. *
  176. * The IWL operates with six queues, one receive queue in the device's
  177. * sram, one transmit queue for sending commands to the device firmware,
  178. * and four transmit queues for data.
  179. ***************************************************/
  180. static int iwl_queue_space(const struct iwl_queue *q)
  181. {
  182. int s = q->last_used - q->first_empty;
  183. if (q->last_used > q->first_empty)
  184. s -= q->n_bd;
  185. if (s <= 0)
  186. s += q->n_window;
  187. /* keep some reserve to not confuse empty and full situations */
  188. s -= 2;
  189. if (s < 0)
  190. s = 0;
  191. return s;
  192. }
  193. /* XXX: n_bd must be power-of-two size */
  194. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  195. {
  196. return ++index & (n_bd - 1);
  197. }
  198. /* XXX: n_bd must be power-of-two size */
  199. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  200. {
  201. return --index & (n_bd - 1);
  202. }
  203. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  204. {
  205. return q->first_empty > q->last_used ?
  206. (i >= q->last_used && i < q->first_empty) :
  207. !(i < q->last_used && i >= q->first_empty);
  208. }
  209. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  210. {
  211. if (is_huge)
  212. return q->n_window;
  213. return index & (q->n_window - 1);
  214. }
  215. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  216. int count, int slots_num, u32 id)
  217. {
  218. q->n_bd = count;
  219. q->n_window = slots_num;
  220. q->id = id;
  221. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  222. * and iwl_queue_dec_wrap are broken. */
  223. BUG_ON(!is_power_of_2(count));
  224. /* slots_num must be power-of-two size, otherwise
  225. * get_cmd_index is broken. */
  226. BUG_ON(!is_power_of_2(slots_num));
  227. q->low_mark = q->n_window / 4;
  228. if (q->low_mark < 4)
  229. q->low_mark = 4;
  230. q->high_mark = q->n_window / 8;
  231. if (q->high_mark < 2)
  232. q->high_mark = 2;
  233. q->first_empty = q->last_used = 0;
  234. return 0;
  235. }
  236. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  237. struct iwl_tx_queue *txq, u32 id)
  238. {
  239. struct pci_dev *dev = priv->pci_dev;
  240. if (id != IWL_CMD_QUEUE_NUM) {
  241. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  242. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  243. if (!txq->txb) {
  244. IWL_ERROR("kmalloc for auxilary BD "
  245. "structures failed\n");
  246. goto error;
  247. }
  248. } else
  249. txq->txb = NULL;
  250. txq->bd = pci_alloc_consistent(dev,
  251. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  252. &txq->q.dma_addr);
  253. if (!txq->bd) {
  254. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  255. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  256. goto error;
  257. }
  258. txq->q.id = id;
  259. return 0;
  260. error:
  261. if (txq->txb) {
  262. kfree(txq->txb);
  263. txq->txb = NULL;
  264. }
  265. return -ENOMEM;
  266. }
  267. int iwl_tx_queue_init(struct iwl_priv *priv,
  268. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  269. {
  270. struct pci_dev *dev = priv->pci_dev;
  271. int len;
  272. int rc = 0;
  273. /* alocate command space + one big command for scan since scan
  274. * command is very huge the system will not have two scan at the
  275. * same time */
  276. len = sizeof(struct iwl_cmd) * slots_num;
  277. if (txq_id == IWL_CMD_QUEUE_NUM)
  278. len += IWL_MAX_SCAN_SIZE;
  279. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  280. if (!txq->cmd)
  281. return -ENOMEM;
  282. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  283. if (rc) {
  284. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  285. return -ENOMEM;
  286. }
  287. txq->need_update = 0;
  288. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  289. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  290. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  291. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  292. iwl_hw_tx_queue_init(priv, txq);
  293. return 0;
  294. }
  295. /**
  296. * iwl_tx_queue_free - Deallocate DMA queue.
  297. * @txq: Transmit queue to deallocate.
  298. *
  299. * Empty queue by removing and destroying all BD's.
  300. * Free all buffers. txq itself is not freed.
  301. *
  302. */
  303. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  304. {
  305. struct iwl_queue *q = &txq->q;
  306. struct pci_dev *dev = priv->pci_dev;
  307. int len;
  308. if (q->n_bd == 0)
  309. return;
  310. /* first, empty all BD's */
  311. for (; q->first_empty != q->last_used;
  312. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  313. iwl_hw_txq_free_tfd(priv, txq);
  314. len = sizeof(struct iwl_cmd) * q->n_window;
  315. if (q->id == IWL_CMD_QUEUE_NUM)
  316. len += IWL_MAX_SCAN_SIZE;
  317. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  318. /* free buffers belonging to queue itself */
  319. if (txq->q.n_bd)
  320. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  321. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  322. if (txq->txb) {
  323. kfree(txq->txb);
  324. txq->txb = NULL;
  325. }
  326. /* 0 fill whole structure */
  327. memset(txq, 0, sizeof(*txq));
  328. }
  329. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  330. /*************** STATION TABLE MANAGEMENT ****
  331. *
  332. * NOTE: This needs to be overhauled to better synchronize between
  333. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  334. *
  335. * mac80211 should also be examined to determine if sta_info is duplicating
  336. * the functionality provided here
  337. */
  338. /**************************************************************/
  339. #if 0 /* temparary disable till we add real remove station */
  340. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  341. {
  342. int index = IWL_INVALID_STATION;
  343. int i;
  344. unsigned long flags;
  345. spin_lock_irqsave(&priv->sta_lock, flags);
  346. if (is_ap)
  347. index = IWL_AP_ID;
  348. else if (is_broadcast_ether_addr(addr))
  349. index = priv->hw_setting.bcast_sta_id;
  350. else
  351. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  352. if (priv->stations[i].used &&
  353. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  354. addr)) {
  355. index = i;
  356. break;
  357. }
  358. if (unlikely(index == IWL_INVALID_STATION))
  359. goto out;
  360. if (priv->stations[index].used) {
  361. priv->stations[index].used = 0;
  362. priv->num_stations--;
  363. }
  364. BUG_ON(priv->num_stations < 0);
  365. out:
  366. spin_unlock_irqrestore(&priv->sta_lock, flags);
  367. return 0;
  368. }
  369. #endif
  370. static void iwl_clear_stations_table(struct iwl_priv *priv)
  371. {
  372. unsigned long flags;
  373. spin_lock_irqsave(&priv->sta_lock, flags);
  374. priv->num_stations = 0;
  375. memset(priv->stations, 0, sizeof(priv->stations));
  376. spin_unlock_irqrestore(&priv->sta_lock, flags);
  377. }
  378. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  379. {
  380. int i;
  381. int index = IWL_INVALID_STATION;
  382. struct iwl_station_entry *station;
  383. unsigned long flags_spin;
  384. DECLARE_MAC_BUF(mac);
  385. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  386. if (is_ap)
  387. index = IWL_AP_ID;
  388. else if (is_broadcast_ether_addr(addr))
  389. index = priv->hw_setting.bcast_sta_id;
  390. else
  391. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  392. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  393. addr)) {
  394. index = i;
  395. break;
  396. }
  397. if (!priv->stations[i].used &&
  398. index == IWL_INVALID_STATION)
  399. index = i;
  400. }
  401. /* These twh conditions has the same outcome but keep them separate
  402. since they have different meaning */
  403. if (unlikely(index == IWL_INVALID_STATION)) {
  404. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  405. return index;
  406. }
  407. if (priv->stations[index].used &&
  408. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. return index;
  411. }
  412. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  413. station = &priv->stations[index];
  414. station->used = 1;
  415. priv->num_stations++;
  416. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  417. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  418. station->sta.mode = 0;
  419. station->sta.sta.sta_id = index;
  420. station->sta.station_flags = 0;
  421. #ifdef CONFIG_IWLWIFI_HT
  422. /* BCAST station and IBSS stations do not work in HT mode */
  423. if (index != priv->hw_setting.bcast_sta_id &&
  424. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  425. iwl4965_set_ht_add_station(priv, index);
  426. #endif /*CONFIG_IWLWIFI_HT*/
  427. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  428. iwl_send_add_station(priv, &station->sta, flags);
  429. return index;
  430. }
  431. /*************** DRIVER STATUS FUNCTIONS *****/
  432. static inline int iwl_is_ready(struct iwl_priv *priv)
  433. {
  434. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  435. * set but EXIT_PENDING is not */
  436. return test_bit(STATUS_READY, &priv->status) &&
  437. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  438. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  439. }
  440. static inline int iwl_is_alive(struct iwl_priv *priv)
  441. {
  442. return test_bit(STATUS_ALIVE, &priv->status);
  443. }
  444. static inline int iwl_is_init(struct iwl_priv *priv)
  445. {
  446. return test_bit(STATUS_INIT, &priv->status);
  447. }
  448. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  449. {
  450. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  451. test_bit(STATUS_RF_KILL_SW, &priv->status);
  452. }
  453. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  454. {
  455. if (iwl_is_rfkill(priv))
  456. return 0;
  457. return iwl_is_ready(priv);
  458. }
  459. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  460. #define IWL_CMD(x) case x : return #x
  461. static const char *get_cmd_string(u8 cmd)
  462. {
  463. switch (cmd) {
  464. IWL_CMD(REPLY_ALIVE);
  465. IWL_CMD(REPLY_ERROR);
  466. IWL_CMD(REPLY_RXON);
  467. IWL_CMD(REPLY_RXON_ASSOC);
  468. IWL_CMD(REPLY_QOS_PARAM);
  469. IWL_CMD(REPLY_RXON_TIMING);
  470. IWL_CMD(REPLY_ADD_STA);
  471. IWL_CMD(REPLY_REMOVE_STA);
  472. IWL_CMD(REPLY_REMOVE_ALL_STA);
  473. IWL_CMD(REPLY_TX);
  474. IWL_CMD(REPLY_RATE_SCALE);
  475. IWL_CMD(REPLY_LEDS_CMD);
  476. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  477. IWL_CMD(RADAR_NOTIFICATION);
  478. IWL_CMD(REPLY_QUIET_CMD);
  479. IWL_CMD(REPLY_CHANNEL_SWITCH);
  480. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  481. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  482. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  483. IWL_CMD(POWER_TABLE_CMD);
  484. IWL_CMD(PM_SLEEP_NOTIFICATION);
  485. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  486. IWL_CMD(REPLY_SCAN_CMD);
  487. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  488. IWL_CMD(SCAN_START_NOTIFICATION);
  489. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  490. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  491. IWL_CMD(BEACON_NOTIFICATION);
  492. IWL_CMD(REPLY_TX_BEACON);
  493. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  494. IWL_CMD(QUIET_NOTIFICATION);
  495. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  496. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  497. IWL_CMD(REPLY_BT_CONFIG);
  498. IWL_CMD(REPLY_STATISTICS_CMD);
  499. IWL_CMD(STATISTICS_NOTIFICATION);
  500. IWL_CMD(REPLY_CARD_STATE_CMD);
  501. IWL_CMD(CARD_STATE_NOTIFICATION);
  502. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  503. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  504. IWL_CMD(SENSITIVITY_CMD);
  505. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  506. IWL_CMD(REPLY_RX_PHY_CMD);
  507. IWL_CMD(REPLY_RX_MPDU_CMD);
  508. IWL_CMD(REPLY_4965_RX);
  509. IWL_CMD(REPLY_COMPRESSED_BA);
  510. default:
  511. return "UNKNOWN";
  512. }
  513. }
  514. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  515. /**
  516. * iwl_enqueue_hcmd - enqueue a uCode command
  517. * @priv: device private data point
  518. * @cmd: a point to the ucode command structure
  519. *
  520. * The function returns < 0 values to indicate the operation is
  521. * failed. On success, it turns the index (> 0) of command in the
  522. * command queue.
  523. */
  524. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  525. {
  526. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  527. struct iwl_queue *q = &txq->q;
  528. struct iwl_tfd_frame *tfd;
  529. u32 *control_flags;
  530. struct iwl_cmd *out_cmd;
  531. u32 idx;
  532. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  533. dma_addr_t phys_addr;
  534. int ret;
  535. unsigned long flags;
  536. /* If any of the command structures end up being larger than
  537. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  538. * we will need to increase the size of the TFD entries */
  539. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  540. !(cmd->meta.flags & CMD_SIZE_HUGE));
  541. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  542. IWL_ERROR("No space for Tx\n");
  543. return -ENOSPC;
  544. }
  545. spin_lock_irqsave(&priv->hcmd_lock, flags);
  546. tfd = &txq->bd[q->first_empty];
  547. memset(tfd, 0, sizeof(*tfd));
  548. control_flags = (u32 *) tfd;
  549. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  550. out_cmd = &txq->cmd[idx];
  551. out_cmd->hdr.cmd = cmd->id;
  552. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  553. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  554. /* At this point, the out_cmd now has all of the incoming cmd
  555. * information */
  556. out_cmd->hdr.flags = 0;
  557. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  558. INDEX_TO_SEQ(q->first_empty));
  559. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  560. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  561. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  562. offsetof(struct iwl_cmd, hdr);
  563. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  564. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  565. "%d bytes at %d[%d]:%d\n",
  566. get_cmd_string(out_cmd->hdr.cmd),
  567. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  568. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  569. txq->need_update = 1;
  570. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  571. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  572. iwl_tx_queue_update_write_ptr(priv, txq);
  573. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  574. return ret ? ret : idx;
  575. }
  576. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  577. {
  578. int ret;
  579. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  580. /* An asynchronous command can not expect an SKB to be set. */
  581. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  582. /* An asynchronous command MUST have a callback. */
  583. BUG_ON(!cmd->meta.u.callback);
  584. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  585. return -EBUSY;
  586. ret = iwl_enqueue_hcmd(priv, cmd);
  587. if (ret < 0) {
  588. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  589. get_cmd_string(cmd->id), ret);
  590. return ret;
  591. }
  592. return 0;
  593. }
  594. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  595. {
  596. int cmd_idx;
  597. int ret;
  598. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  599. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  600. /* A synchronous command can not have a callback set. */
  601. BUG_ON(cmd->meta.u.callback != NULL);
  602. if (atomic_xchg(&entry, 1)) {
  603. IWL_ERROR("Error sending %s: Already sending a host command\n",
  604. get_cmd_string(cmd->id));
  605. return -EBUSY;
  606. }
  607. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  608. if (cmd->meta.flags & CMD_WANT_SKB)
  609. cmd->meta.source = &cmd->meta;
  610. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  611. if (cmd_idx < 0) {
  612. ret = cmd_idx;
  613. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  614. get_cmd_string(cmd->id), ret);
  615. goto out;
  616. }
  617. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  618. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  619. HOST_COMPLETE_TIMEOUT);
  620. if (!ret) {
  621. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  622. IWL_ERROR("Error sending %s: time out after %dms.\n",
  623. get_cmd_string(cmd->id),
  624. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  625. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  626. ret = -ETIMEDOUT;
  627. goto cancel;
  628. }
  629. }
  630. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  631. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  632. get_cmd_string(cmd->id));
  633. ret = -ECANCELED;
  634. goto fail;
  635. }
  636. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  637. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  638. get_cmd_string(cmd->id));
  639. ret = -EIO;
  640. goto fail;
  641. }
  642. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  643. IWL_ERROR("Error: Response NULL in '%s'\n",
  644. get_cmd_string(cmd->id));
  645. ret = -EIO;
  646. goto out;
  647. }
  648. ret = 0;
  649. goto out;
  650. cancel:
  651. if (cmd->meta.flags & CMD_WANT_SKB) {
  652. struct iwl_cmd *qcmd;
  653. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  654. * TX cmd queue. Otherwise in case the cmd comes
  655. * in later, it will possibly set an invalid
  656. * address (cmd->meta.source). */
  657. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  658. qcmd->meta.flags &= ~CMD_WANT_SKB;
  659. }
  660. fail:
  661. if (cmd->meta.u.skb) {
  662. dev_kfree_skb_any(cmd->meta.u.skb);
  663. cmd->meta.u.skb = NULL;
  664. }
  665. out:
  666. atomic_set(&entry, 0);
  667. return ret;
  668. }
  669. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  670. {
  671. /* A command can not be asynchronous AND expect an SKB to be set. */
  672. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  673. (cmd->meta.flags & CMD_WANT_SKB));
  674. if (cmd->meta.flags & CMD_ASYNC)
  675. return iwl_send_cmd_async(priv, cmd);
  676. return iwl_send_cmd_sync(priv, cmd);
  677. }
  678. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  679. {
  680. struct iwl_host_cmd cmd = {
  681. .id = id,
  682. .len = len,
  683. .data = data,
  684. };
  685. return iwl_send_cmd_sync(priv, &cmd);
  686. }
  687. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  688. {
  689. struct iwl_host_cmd cmd = {
  690. .id = id,
  691. .len = sizeof(val),
  692. .data = &val,
  693. };
  694. return iwl_send_cmd_sync(priv, &cmd);
  695. }
  696. int iwl_send_statistics_request(struct iwl_priv *priv)
  697. {
  698. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  699. }
  700. /**
  701. * iwl_rxon_add_station - add station into station table.
  702. *
  703. * there is only one AP station with id= IWL_AP_ID
  704. * NOTE: mutex must be held before calling the this fnction
  705. */
  706. static int iwl_rxon_add_station(struct iwl_priv *priv,
  707. const u8 *addr, int is_ap)
  708. {
  709. u8 sta_id;
  710. sta_id = iwl_add_station(priv, addr, is_ap, 0);
  711. iwl4965_add_station(priv, addr, is_ap);
  712. return sta_id;
  713. }
  714. /**
  715. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  716. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  717. * @channel: Any channel valid for the requested phymode
  718. * In addition to setting the staging RXON, priv->phymode is also set.
  719. *
  720. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  721. * in the staging RXON flag structure based on the phymode
  722. */
  723. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  724. {
  725. if (!iwl_get_channel_info(priv, phymode, channel)) {
  726. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  727. channel, phymode);
  728. return -EINVAL;
  729. }
  730. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  731. (priv->phymode == phymode))
  732. return 0;
  733. priv->staging_rxon.channel = cpu_to_le16(channel);
  734. if (phymode == MODE_IEEE80211A)
  735. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  736. else
  737. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  738. priv->phymode = phymode;
  739. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  740. return 0;
  741. }
  742. /**
  743. * iwl_check_rxon_cmd - validate RXON structure is valid
  744. *
  745. * NOTE: This is really only useful during development and can eventually
  746. * be #ifdef'd out once the driver is stable and folks aren't actively
  747. * making changes
  748. */
  749. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  750. {
  751. int error = 0;
  752. int counter = 1;
  753. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  754. error |= le32_to_cpu(rxon->flags &
  755. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  756. RXON_FLG_RADAR_DETECT_MSK));
  757. if (error)
  758. IWL_WARNING("check 24G fields %d | %d\n",
  759. counter++, error);
  760. } else {
  761. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  762. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  763. if (error)
  764. IWL_WARNING("check 52 fields %d | %d\n",
  765. counter++, error);
  766. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  767. if (error)
  768. IWL_WARNING("check 52 CCK %d | %d\n",
  769. counter++, error);
  770. }
  771. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  772. if (error)
  773. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  774. /* make sure basic rates 6Mbps and 1Mbps are supported */
  775. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  776. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  777. if (error)
  778. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  779. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  780. if (error)
  781. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  782. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  783. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  784. if (error)
  785. IWL_WARNING("check CCK and short slot %d | %d\n",
  786. counter++, error);
  787. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  788. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  789. if (error)
  790. IWL_WARNING("check CCK & auto detect %d | %d\n",
  791. counter++, error);
  792. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  793. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  794. if (error)
  795. IWL_WARNING("check TGG and auto detect %d | %d\n",
  796. counter++, error);
  797. if (error)
  798. IWL_WARNING("Tuning to channel %d\n",
  799. le16_to_cpu(rxon->channel));
  800. if (error) {
  801. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  802. return -1;
  803. }
  804. return 0;
  805. }
  806. /**
  807. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  808. * @priv: staging_rxon is comapred to active_rxon
  809. *
  810. * If the RXON structure is changing sufficient to require a new
  811. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  812. * to indicate a new tune is required.
  813. */
  814. static int iwl_full_rxon_required(struct iwl_priv *priv)
  815. {
  816. /* These items are only settable from the full RXON command */
  817. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  818. compare_ether_addr(priv->staging_rxon.bssid_addr,
  819. priv->active_rxon.bssid_addr) ||
  820. compare_ether_addr(priv->staging_rxon.node_addr,
  821. priv->active_rxon.node_addr) ||
  822. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  823. priv->active_rxon.wlap_bssid_addr) ||
  824. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  825. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  826. (priv->staging_rxon.air_propagation !=
  827. priv->active_rxon.air_propagation) ||
  828. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  829. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  830. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  831. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  832. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  833. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  834. return 1;
  835. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  836. * be updated with the RXON_ASSOC command -- however only some
  837. * flag transitions are allowed using RXON_ASSOC */
  838. /* Check if we are not switching bands */
  839. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  840. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  841. return 1;
  842. /* Check if we are switching association toggle */
  843. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  844. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  845. return 1;
  846. return 0;
  847. }
  848. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  849. {
  850. int rc = 0;
  851. struct iwl_rx_packet *res = NULL;
  852. struct iwl_rxon_assoc_cmd rxon_assoc;
  853. struct iwl_host_cmd cmd = {
  854. .id = REPLY_RXON_ASSOC,
  855. .len = sizeof(rxon_assoc),
  856. .meta.flags = CMD_WANT_SKB,
  857. .data = &rxon_assoc,
  858. };
  859. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  860. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  861. if ((rxon1->flags == rxon2->flags) &&
  862. (rxon1->filter_flags == rxon2->filter_flags) &&
  863. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  864. (rxon1->ofdm_ht_single_stream_basic_rates ==
  865. rxon2->ofdm_ht_single_stream_basic_rates) &&
  866. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  867. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  868. (rxon1->rx_chain == rxon2->rx_chain) &&
  869. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  870. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  871. return 0;
  872. }
  873. rxon_assoc.flags = priv->staging_rxon.flags;
  874. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  875. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  876. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  877. rxon_assoc.reserved = 0;
  878. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  879. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  880. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  881. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  882. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  883. rc = iwl_send_cmd_sync(priv, &cmd);
  884. if (rc)
  885. return rc;
  886. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  887. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  888. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  889. rc = -EIO;
  890. }
  891. priv->alloc_rxb_skb--;
  892. dev_kfree_skb_any(cmd.meta.u.skb);
  893. return rc;
  894. }
  895. /**
  896. * iwl_commit_rxon - commit staging_rxon to hardware
  897. *
  898. * The RXON command in staging_rxon is commited to the hardware and
  899. * the active_rxon structure is updated with the new data. This
  900. * function correctly transitions out of the RXON_ASSOC_MSK state if
  901. * a HW tune is required based on the RXON structure changes.
  902. */
  903. static int iwl_commit_rxon(struct iwl_priv *priv)
  904. {
  905. /* cast away the const for active_rxon in this function */
  906. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  907. DECLARE_MAC_BUF(mac);
  908. int rc = 0;
  909. if (!iwl_is_alive(priv))
  910. return -1;
  911. /* always get timestamp with Rx frame */
  912. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  913. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  914. if (rc) {
  915. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  916. return -EINVAL;
  917. }
  918. /* If we don't need to send a full RXON, we can use
  919. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  920. * and other flags for the current radio configuration. */
  921. if (!iwl_full_rxon_required(priv)) {
  922. rc = iwl_send_rxon_assoc(priv);
  923. if (rc) {
  924. IWL_ERROR("Error setting RXON_ASSOC "
  925. "configuration (%d).\n", rc);
  926. return rc;
  927. }
  928. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  929. return 0;
  930. }
  931. /* station table will be cleared */
  932. priv->assoc_station_added = 0;
  933. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  934. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  935. if (!priv->error_recovering)
  936. priv->start_calib = 0;
  937. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  938. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  939. /* If we are currently associated and the new config requires
  940. * an RXON_ASSOC and the new config wants the associated mask enabled,
  941. * we must clear the associated from the active configuration
  942. * before we apply the new config */
  943. if (iwl_is_associated(priv) &&
  944. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  945. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  946. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  947. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  948. sizeof(struct iwl_rxon_cmd),
  949. &priv->active_rxon);
  950. /* If the mask clearing failed then we set
  951. * active_rxon back to what it was previously */
  952. if (rc) {
  953. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  954. IWL_ERROR("Error clearing ASSOC_MSK on current "
  955. "configuration (%d).\n", rc);
  956. return rc;
  957. }
  958. }
  959. IWL_DEBUG_INFO("Sending RXON\n"
  960. "* with%s RXON_FILTER_ASSOC_MSK\n"
  961. "* channel = %d\n"
  962. "* bssid = %s\n",
  963. ((priv->staging_rxon.filter_flags &
  964. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  965. le16_to_cpu(priv->staging_rxon.channel),
  966. print_mac(mac, priv->staging_rxon.bssid_addr));
  967. /* Apply the new configuration */
  968. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  969. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  970. if (rc) {
  971. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  972. return rc;
  973. }
  974. iwl_clear_stations_table(priv);
  975. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  976. if (!priv->error_recovering)
  977. priv->start_calib = 0;
  978. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  979. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  980. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  981. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  982. /* If we issue a new RXON command which required a tune then we must
  983. * send a new TXPOWER command or we won't be able to Tx any frames */
  984. rc = iwl_hw_reg_send_txpower(priv);
  985. if (rc) {
  986. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  987. return rc;
  988. }
  989. /* Add the broadcast address so we can send broadcast frames */
  990. if (iwl_rxon_add_station(priv, BROADCAST_ADDR, 0) ==
  991. IWL_INVALID_STATION) {
  992. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  993. return -EIO;
  994. }
  995. /* If we have set the ASSOC_MSK and we are in BSS mode then
  996. * add the IWL_AP_ID to the station rate table */
  997. if (iwl_is_associated(priv) &&
  998. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  999. if (iwl_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1000. == IWL_INVALID_STATION) {
  1001. IWL_ERROR("Error adding AP address for transmit.\n");
  1002. return -EIO;
  1003. }
  1004. priv->assoc_station_added = 1;
  1005. }
  1006. return 0;
  1007. }
  1008. static int iwl_send_bt_config(struct iwl_priv *priv)
  1009. {
  1010. struct iwl_bt_cmd bt_cmd = {
  1011. .flags = 3,
  1012. .lead_time = 0xAA,
  1013. .max_kill = 1,
  1014. .kill_ack_mask = 0,
  1015. .kill_cts_mask = 0,
  1016. };
  1017. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1018. sizeof(struct iwl_bt_cmd), &bt_cmd);
  1019. }
  1020. static int iwl_send_scan_abort(struct iwl_priv *priv)
  1021. {
  1022. int rc = 0;
  1023. struct iwl_rx_packet *res;
  1024. struct iwl_host_cmd cmd = {
  1025. .id = REPLY_SCAN_ABORT_CMD,
  1026. .meta.flags = CMD_WANT_SKB,
  1027. };
  1028. /* If there isn't a scan actively going on in the hardware
  1029. * then we are in between scan bands and not actually
  1030. * actively scanning, so don't send the abort command */
  1031. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1032. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1033. return 0;
  1034. }
  1035. rc = iwl_send_cmd_sync(priv, &cmd);
  1036. if (rc) {
  1037. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1038. return rc;
  1039. }
  1040. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1041. if (res->u.status != CAN_ABORT_STATUS) {
  1042. /* The scan abort will return 1 for success or
  1043. * 2 for "failure". A failure condition can be
  1044. * due to simply not being in an active scan which
  1045. * can occur if we send the scan abort before we
  1046. * the microcode has notified us that a scan is
  1047. * completed. */
  1048. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1049. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1050. clear_bit(STATUS_SCAN_HW, &priv->status);
  1051. }
  1052. dev_kfree_skb_any(cmd.meta.u.skb);
  1053. return rc;
  1054. }
  1055. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1056. struct iwl_cmd *cmd,
  1057. struct sk_buff *skb)
  1058. {
  1059. return 1;
  1060. }
  1061. /*
  1062. * CARD_STATE_CMD
  1063. *
  1064. * Use: Sets the internal card state to enable, disable, or halt
  1065. *
  1066. * When in the 'enable' state the card operates as normal.
  1067. * When in the 'disable' state, the card enters into a low power mode.
  1068. * When in the 'halt' state, the card is shut down and must be fully
  1069. * restarted to come back on.
  1070. */
  1071. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1072. {
  1073. struct iwl_host_cmd cmd = {
  1074. .id = REPLY_CARD_STATE_CMD,
  1075. .len = sizeof(u32),
  1076. .data = &flags,
  1077. .meta.flags = meta_flag,
  1078. };
  1079. if (meta_flag & CMD_ASYNC)
  1080. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1081. return iwl_send_cmd(priv, &cmd);
  1082. }
  1083. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1084. struct iwl_cmd *cmd, struct sk_buff *skb)
  1085. {
  1086. struct iwl_rx_packet *res = NULL;
  1087. if (!skb) {
  1088. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1089. return 1;
  1090. }
  1091. res = (struct iwl_rx_packet *)skb->data;
  1092. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1093. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1094. res->hdr.flags);
  1095. return 1;
  1096. }
  1097. switch (res->u.add_sta.status) {
  1098. case ADD_STA_SUCCESS_MSK:
  1099. break;
  1100. default:
  1101. break;
  1102. }
  1103. /* We didn't cache the SKB; let the caller free it */
  1104. return 1;
  1105. }
  1106. int iwl_send_add_station(struct iwl_priv *priv,
  1107. struct iwl_addsta_cmd *sta, u8 flags)
  1108. {
  1109. struct iwl_rx_packet *res = NULL;
  1110. int rc = 0;
  1111. struct iwl_host_cmd cmd = {
  1112. .id = REPLY_ADD_STA,
  1113. .len = sizeof(struct iwl_addsta_cmd),
  1114. .meta.flags = flags,
  1115. .data = sta,
  1116. };
  1117. if (flags & CMD_ASYNC)
  1118. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1119. else
  1120. cmd.meta.flags |= CMD_WANT_SKB;
  1121. rc = iwl_send_cmd(priv, &cmd);
  1122. if (rc || (flags & CMD_ASYNC))
  1123. return rc;
  1124. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1125. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1126. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1127. res->hdr.flags);
  1128. rc = -EIO;
  1129. }
  1130. if (rc == 0) {
  1131. switch (res->u.add_sta.status) {
  1132. case ADD_STA_SUCCESS_MSK:
  1133. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1134. break;
  1135. default:
  1136. rc = -EIO;
  1137. IWL_WARNING("REPLY_ADD_STA failed\n");
  1138. break;
  1139. }
  1140. }
  1141. priv->alloc_rxb_skb--;
  1142. dev_kfree_skb_any(cmd.meta.u.skb);
  1143. return rc;
  1144. }
  1145. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1146. struct ieee80211_key_conf *keyconf,
  1147. u8 sta_id)
  1148. {
  1149. unsigned long flags;
  1150. __le16 key_flags = 0;
  1151. switch (keyconf->alg) {
  1152. case ALG_CCMP:
  1153. key_flags |= STA_KEY_FLG_CCMP;
  1154. key_flags |= cpu_to_le16(
  1155. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1156. key_flags &= ~STA_KEY_FLG_INVALID;
  1157. break;
  1158. case ALG_TKIP:
  1159. case ALG_WEP:
  1160. return -EINVAL;
  1161. default:
  1162. return -EINVAL;
  1163. }
  1164. spin_lock_irqsave(&priv->sta_lock, flags);
  1165. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1166. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1167. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1168. keyconf->keylen);
  1169. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1170. keyconf->keylen);
  1171. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1172. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1173. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1174. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1175. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1176. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1177. return 0;
  1178. }
  1179. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1180. {
  1181. unsigned long flags;
  1182. spin_lock_irqsave(&priv->sta_lock, flags);
  1183. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1184. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1185. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1186. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1187. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1188. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1189. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1190. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1191. return 0;
  1192. }
  1193. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1194. {
  1195. struct list_head *element;
  1196. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1197. priv->frames_count);
  1198. while (!list_empty(&priv->free_frames)) {
  1199. element = priv->free_frames.next;
  1200. list_del(element);
  1201. kfree(list_entry(element, struct iwl_frame, list));
  1202. priv->frames_count--;
  1203. }
  1204. if (priv->frames_count) {
  1205. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1206. priv->frames_count);
  1207. priv->frames_count = 0;
  1208. }
  1209. }
  1210. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1211. {
  1212. struct iwl_frame *frame;
  1213. struct list_head *element;
  1214. if (list_empty(&priv->free_frames)) {
  1215. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1216. if (!frame) {
  1217. IWL_ERROR("Could not allocate frame!\n");
  1218. return NULL;
  1219. }
  1220. priv->frames_count++;
  1221. return frame;
  1222. }
  1223. element = priv->free_frames.next;
  1224. list_del(element);
  1225. return list_entry(element, struct iwl_frame, list);
  1226. }
  1227. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1228. {
  1229. memset(frame, 0, sizeof(*frame));
  1230. list_add(&frame->list, &priv->free_frames);
  1231. }
  1232. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1233. struct ieee80211_hdr *hdr,
  1234. const u8 *dest, int left)
  1235. {
  1236. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1237. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1238. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1239. return 0;
  1240. if (priv->ibss_beacon->len > left)
  1241. return 0;
  1242. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1243. return priv->ibss_beacon->len;
  1244. }
  1245. int iwl_rate_index_from_plcp(int plcp)
  1246. {
  1247. int i = 0;
  1248. if (plcp & RATE_MCS_HT_MSK) {
  1249. i = (plcp & 0xff);
  1250. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1251. i = i - IWL_RATE_MIMO_6M_PLCP;
  1252. i += IWL_FIRST_OFDM_RATE;
  1253. /* skip 9M not supported in ht*/
  1254. if (i >= IWL_RATE_9M_INDEX)
  1255. i += 1;
  1256. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1257. (i <= IWL_LAST_OFDM_RATE))
  1258. return i;
  1259. } else {
  1260. for (i = 0; i < ARRAY_SIZE(iwl_rates); i++)
  1261. if (iwl_rates[i].plcp == (plcp &0xFF))
  1262. return i;
  1263. }
  1264. return -1;
  1265. }
  1266. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1267. {
  1268. u8 i;
  1269. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1270. i = iwl_rates[i].next_ieee) {
  1271. if (rate_mask & (1 << i))
  1272. return iwl_rates[i].plcp;
  1273. }
  1274. return IWL_RATE_INVALID;
  1275. }
  1276. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1277. {
  1278. struct iwl_frame *frame;
  1279. unsigned int frame_size;
  1280. int rc;
  1281. u8 rate;
  1282. frame = iwl_get_free_frame(priv);
  1283. if (!frame) {
  1284. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1285. "command.\n");
  1286. return -ENOMEM;
  1287. }
  1288. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1289. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1290. 0xFF0);
  1291. if (rate == IWL_INVALID_RATE)
  1292. rate = IWL_RATE_6M_PLCP;
  1293. } else {
  1294. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1295. if (rate == IWL_INVALID_RATE)
  1296. rate = IWL_RATE_1M_PLCP;
  1297. }
  1298. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1299. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1300. &frame->u.cmd[0]);
  1301. iwl_free_frame(priv, frame);
  1302. return rc;
  1303. }
  1304. /******************************************************************************
  1305. *
  1306. * EEPROM related functions
  1307. *
  1308. ******************************************************************************/
  1309. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1310. {
  1311. memcpy(mac, priv->eeprom.mac_address, 6);
  1312. }
  1313. /**
  1314. * iwl_eeprom_init - read EEPROM contents
  1315. *
  1316. * Load the EEPROM from adapter into priv->eeprom
  1317. *
  1318. * NOTE: This routine uses the non-debug IO access functions.
  1319. */
  1320. int iwl_eeprom_init(struct iwl_priv *priv)
  1321. {
  1322. u16 *e = (u16 *)&priv->eeprom;
  1323. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1324. u32 r;
  1325. int sz = sizeof(priv->eeprom);
  1326. int rc;
  1327. int i;
  1328. u16 addr;
  1329. /* The EEPROM structure has several padding buffers within it
  1330. * and when adding new EEPROM maps is subject to programmer errors
  1331. * which may be very difficult to identify without explicitly
  1332. * checking the resulting size of the eeprom map. */
  1333. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1334. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1335. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1336. return -ENOENT;
  1337. }
  1338. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1339. if (rc < 0) {
  1340. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1341. return -ENOENT;
  1342. }
  1343. /* eeprom is an array of 16bit values */
  1344. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1345. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1346. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1347. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1348. i += IWL_EEPROM_ACCESS_DELAY) {
  1349. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1350. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1351. break;
  1352. udelay(IWL_EEPROM_ACCESS_DELAY);
  1353. }
  1354. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1355. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1356. rc = -ETIMEDOUT;
  1357. goto done;
  1358. }
  1359. e[addr / 2] = le16_to_cpu(r >> 16);
  1360. }
  1361. rc = 0;
  1362. done:
  1363. iwl_eeprom_release_semaphore(priv);
  1364. return rc;
  1365. }
  1366. /******************************************************************************
  1367. *
  1368. * Misc. internal state and helper functions
  1369. *
  1370. ******************************************************************************/
  1371. #ifdef CONFIG_IWLWIFI_DEBUG
  1372. /**
  1373. * iwl_report_frame - dump frame to syslog during debug sessions
  1374. *
  1375. * hack this function to show different aspects of received frames,
  1376. * including selective frame dumps.
  1377. * group100 parameter selects whether to show 1 out of 100 good frames.
  1378. *
  1379. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1380. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1381. * is 3945-specific and gives bad output for 4965. Need to split the
  1382. * functionality, keep common stuff here.
  1383. */
  1384. void iwl_report_frame(struct iwl_priv *priv,
  1385. struct iwl_rx_packet *pkt,
  1386. struct ieee80211_hdr *header, int group100)
  1387. {
  1388. u32 to_us;
  1389. u32 print_summary = 0;
  1390. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1391. u32 hundred = 0;
  1392. u32 dataframe = 0;
  1393. u16 fc;
  1394. u16 seq_ctl;
  1395. u16 channel;
  1396. u16 phy_flags;
  1397. int rate_sym;
  1398. u16 length;
  1399. u16 status;
  1400. u16 bcn_tmr;
  1401. u32 tsf_low;
  1402. u64 tsf;
  1403. u8 rssi;
  1404. u8 agc;
  1405. u16 sig_avg;
  1406. u16 noise_diff;
  1407. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1408. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1409. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1410. u8 *data = IWL_RX_DATA(pkt);
  1411. /* MAC header */
  1412. fc = le16_to_cpu(header->frame_control);
  1413. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1414. /* metadata */
  1415. channel = le16_to_cpu(rx_hdr->channel);
  1416. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1417. rate_sym = rx_hdr->rate;
  1418. length = le16_to_cpu(rx_hdr->len);
  1419. /* end-of-frame status and timestamp */
  1420. status = le32_to_cpu(rx_end->status);
  1421. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1422. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1423. tsf = le64_to_cpu(rx_end->timestamp);
  1424. /* signal statistics */
  1425. rssi = rx_stats->rssi;
  1426. agc = rx_stats->agc;
  1427. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1428. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1429. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1430. /* if data frame is to us and all is good,
  1431. * (optionally) print summary for only 1 out of every 100 */
  1432. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1433. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1434. dataframe = 1;
  1435. if (!group100)
  1436. print_summary = 1; /* print each frame */
  1437. else if (priv->framecnt_to_us < 100) {
  1438. priv->framecnt_to_us++;
  1439. print_summary = 0;
  1440. } else {
  1441. priv->framecnt_to_us = 0;
  1442. print_summary = 1;
  1443. hundred = 1;
  1444. }
  1445. } else {
  1446. /* print summary for all other frames */
  1447. print_summary = 1;
  1448. }
  1449. if (print_summary) {
  1450. char *title;
  1451. u32 rate;
  1452. if (hundred)
  1453. title = "100Frames";
  1454. else if (fc & IEEE80211_FCTL_RETRY)
  1455. title = "Retry";
  1456. else if (ieee80211_is_assoc_response(fc))
  1457. title = "AscRsp";
  1458. else if (ieee80211_is_reassoc_response(fc))
  1459. title = "RasRsp";
  1460. else if (ieee80211_is_probe_response(fc)) {
  1461. title = "PrbRsp";
  1462. print_dump = 1; /* dump frame contents */
  1463. } else if (ieee80211_is_beacon(fc)) {
  1464. title = "Beacon";
  1465. print_dump = 1; /* dump frame contents */
  1466. } else if (ieee80211_is_atim(fc))
  1467. title = "ATIM";
  1468. else if (ieee80211_is_auth(fc))
  1469. title = "Auth";
  1470. else if (ieee80211_is_deauth(fc))
  1471. title = "DeAuth";
  1472. else if (ieee80211_is_disassoc(fc))
  1473. title = "DisAssoc";
  1474. else
  1475. title = "Frame";
  1476. rate = iwl_rate_index_from_plcp(rate_sym);
  1477. if (rate == -1)
  1478. rate = 0;
  1479. else
  1480. rate = iwl_rates[rate].ieee / 2;
  1481. /* print frame summary.
  1482. * MAC addresses show just the last byte (for brevity),
  1483. * but you can hack it to show more, if you'd like to. */
  1484. if (dataframe)
  1485. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1486. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1487. title, fc, header->addr1[5],
  1488. length, rssi, channel, rate);
  1489. else {
  1490. /* src/dst addresses assume managed mode */
  1491. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1492. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1493. "phy=0x%02x, chnl=%d\n",
  1494. title, fc, header->addr1[5],
  1495. header->addr3[5], rssi,
  1496. tsf_low - priv->scan_start_tsf,
  1497. phy_flags, channel);
  1498. }
  1499. }
  1500. if (print_dump)
  1501. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1502. }
  1503. #endif
  1504. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1505. {
  1506. if (priv->hw_setting.shared_virt)
  1507. pci_free_consistent(priv->pci_dev,
  1508. sizeof(struct iwl_shared),
  1509. priv->hw_setting.shared_virt,
  1510. priv->hw_setting.shared_phys);
  1511. }
  1512. /**
  1513. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1514. *
  1515. * return : set the bit for each supported rate insert in ie
  1516. */
  1517. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1518. u16 basic_rate, int max_count)
  1519. {
  1520. u16 ret_rates = 0, bit;
  1521. int i;
  1522. u8 *rates;
  1523. rates = &(ie[1]);
  1524. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1525. if (bit & supported_rate) {
  1526. ret_rates |= bit;
  1527. rates[*ie] = iwl_rates[i].ieee |
  1528. ((bit & basic_rate) ? 0x80 : 0x00);
  1529. *ie = *ie + 1;
  1530. if (*ie >= max_count)
  1531. break;
  1532. }
  1533. }
  1534. return ret_rates;
  1535. }
  1536. #ifdef CONFIG_IWLWIFI_HT
  1537. void static iwl_set_ht_capab(struct ieee80211_hw *hw,
  1538. struct ieee80211_ht_capability *ht_cap,
  1539. u8 use_wide_chan);
  1540. #endif
  1541. /**
  1542. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1543. */
  1544. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1545. struct ieee80211_mgmt *frame,
  1546. int left, int is_direct)
  1547. {
  1548. int len = 0;
  1549. u8 *pos = NULL;
  1550. u16 ret_rates;
  1551. /* Make sure there is enough space for the probe request,
  1552. * two mandatory IEs and the data */
  1553. left -= 24;
  1554. if (left < 0)
  1555. return 0;
  1556. len += 24;
  1557. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1558. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1559. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1560. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1561. frame->seq_ctrl = 0;
  1562. /* fill in our indirect SSID IE */
  1563. /* ...next IE... */
  1564. left -= 2;
  1565. if (left < 0)
  1566. return 0;
  1567. len += 2;
  1568. pos = &(frame->u.probe_req.variable[0]);
  1569. *pos++ = WLAN_EID_SSID;
  1570. *pos++ = 0;
  1571. /* fill in our direct SSID IE... */
  1572. if (is_direct) {
  1573. /* ...next IE... */
  1574. left -= 2 + priv->essid_len;
  1575. if (left < 0)
  1576. return 0;
  1577. /* ... fill it in... */
  1578. *pos++ = WLAN_EID_SSID;
  1579. *pos++ = priv->essid_len;
  1580. memcpy(pos, priv->essid, priv->essid_len);
  1581. pos += priv->essid_len;
  1582. len += 2 + priv->essid_len;
  1583. }
  1584. /* fill in supported rate */
  1585. /* ...next IE... */
  1586. left -= 2;
  1587. if (left < 0)
  1588. return 0;
  1589. /* ... fill it in... */
  1590. *pos++ = WLAN_EID_SUPP_RATES;
  1591. *pos = 0;
  1592. ret_rates = priv->active_rate = priv->rates_mask;
  1593. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1594. iwl_supported_rate_to_ie(pos, priv->active_rate,
  1595. priv->active_rate_basic, left);
  1596. len += 2 + *pos;
  1597. pos += (*pos) + 1;
  1598. ret_rates = ~ret_rates & priv->active_rate;
  1599. if (ret_rates == 0)
  1600. goto fill_end;
  1601. /* fill in supported extended rate */
  1602. /* ...next IE... */
  1603. left -= 2;
  1604. if (left < 0)
  1605. return 0;
  1606. /* ... fill it in... */
  1607. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1608. *pos = 0;
  1609. iwl_supported_rate_to_ie(pos, ret_rates, priv->active_rate_basic, left);
  1610. if (*pos > 0)
  1611. len += 2 + *pos;
  1612. #ifdef CONFIG_IWLWIFI_HT
  1613. if (is_direct && priv->is_ht_enabled) {
  1614. u8 use_wide_chan = 1;
  1615. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  1616. use_wide_chan = 0;
  1617. pos += (*pos) + 1;
  1618. *pos++ = WLAN_EID_HT_CAPABILITY;
  1619. *pos++ = sizeof(struct ieee80211_ht_capability);
  1620. iwl_set_ht_capab(NULL, (struct ieee80211_ht_capability *)pos,
  1621. use_wide_chan);
  1622. len += 2 + sizeof(struct ieee80211_ht_capability);
  1623. }
  1624. #endif /*CONFIG_IWLWIFI_HT */
  1625. fill_end:
  1626. return (u16)len;
  1627. }
  1628. /*
  1629. * QoS support
  1630. */
  1631. #ifdef CONFIG_IWLWIFI_QOS
  1632. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1633. struct iwl_qosparam_cmd *qos)
  1634. {
  1635. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1636. sizeof(struct iwl_qosparam_cmd), qos);
  1637. }
  1638. static void iwl_reset_qos(struct iwl_priv *priv)
  1639. {
  1640. u16 cw_min = 15;
  1641. u16 cw_max = 1023;
  1642. u8 aifs = 2;
  1643. u8 is_legacy = 0;
  1644. unsigned long flags;
  1645. int i;
  1646. spin_lock_irqsave(&priv->lock, flags);
  1647. priv->qos_data.qos_active = 0;
  1648. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1649. if (priv->qos_data.qos_enable)
  1650. priv->qos_data.qos_active = 1;
  1651. if (!(priv->active_rate & 0xfff0)) {
  1652. cw_min = 31;
  1653. is_legacy = 1;
  1654. }
  1655. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1656. if (priv->qos_data.qos_enable)
  1657. priv->qos_data.qos_active = 1;
  1658. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1659. cw_min = 31;
  1660. is_legacy = 1;
  1661. }
  1662. if (priv->qos_data.qos_active)
  1663. aifs = 3;
  1664. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1665. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1666. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1667. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1668. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1669. if (priv->qos_data.qos_active) {
  1670. i = 1;
  1671. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1672. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1673. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1674. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1675. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1676. i = 2;
  1677. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1678. cpu_to_le16((cw_min + 1) / 2 - 1);
  1679. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1680. cpu_to_le16(cw_max);
  1681. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1682. if (is_legacy)
  1683. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1684. cpu_to_le16(6016);
  1685. else
  1686. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1687. cpu_to_le16(3008);
  1688. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1689. i = 3;
  1690. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1691. cpu_to_le16((cw_min + 1) / 4 - 1);
  1692. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1693. cpu_to_le16((cw_max + 1) / 2 - 1);
  1694. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1695. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1696. if (is_legacy)
  1697. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1698. cpu_to_le16(3264);
  1699. else
  1700. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1701. cpu_to_le16(1504);
  1702. } else {
  1703. for (i = 1; i < 4; i++) {
  1704. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1705. cpu_to_le16(cw_min);
  1706. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1707. cpu_to_le16(cw_max);
  1708. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1709. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1710. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1711. }
  1712. }
  1713. IWL_DEBUG_QOS("set QoS to default \n");
  1714. spin_unlock_irqrestore(&priv->lock, flags);
  1715. }
  1716. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1717. {
  1718. unsigned long flags;
  1719. if (priv == NULL)
  1720. return;
  1721. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1722. return;
  1723. if (!priv->qos_data.qos_enable)
  1724. return;
  1725. spin_lock_irqsave(&priv->lock, flags);
  1726. priv->qos_data.def_qos_parm.qos_flags = 0;
  1727. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1728. !priv->qos_data.qos_cap.q_AP.txop_request)
  1729. priv->qos_data.def_qos_parm.qos_flags |=
  1730. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1731. if (priv->qos_data.qos_active)
  1732. priv->qos_data.def_qos_parm.qos_flags |=
  1733. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1734. spin_unlock_irqrestore(&priv->lock, flags);
  1735. if (force || iwl_is_associated(priv)) {
  1736. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1737. priv->qos_data.qos_active);
  1738. iwl_send_qos_params_command(priv,
  1739. &(priv->qos_data.def_qos_parm));
  1740. }
  1741. }
  1742. #endif /* CONFIG_IWLWIFI_QOS */
  1743. /*
  1744. * Power management (not Tx power!) functions
  1745. */
  1746. #define MSEC_TO_USEC 1024
  1747. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1748. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1749. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1750. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1751. __constant_cpu_to_le32(X1), \
  1752. __constant_cpu_to_le32(X2), \
  1753. __constant_cpu_to_le32(X3), \
  1754. __constant_cpu_to_le32(X4)}
  1755. /* default power management (not Tx power) table values */
  1756. /* for tim 0-10 */
  1757. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1758. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1759. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1760. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1761. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1762. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1763. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1764. };
  1765. /* for tim > 10 */
  1766. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1767. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1768. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1769. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1770. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1771. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1772. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1773. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1774. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1775. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1776. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1777. };
  1778. int iwl_power_init_handle(struct iwl_priv *priv)
  1779. {
  1780. int rc = 0, i;
  1781. struct iwl_power_mgr *pow_data;
  1782. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1783. u16 pci_pm;
  1784. IWL_DEBUG_POWER("Initialize power \n");
  1785. pow_data = &(priv->power_data);
  1786. memset(pow_data, 0, sizeof(*pow_data));
  1787. pow_data->active_index = IWL_POWER_RANGE_0;
  1788. pow_data->dtim_val = 0xffff;
  1789. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1790. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1791. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1792. if (rc != 0)
  1793. return 0;
  1794. else {
  1795. struct iwl_powertable_cmd *cmd;
  1796. IWL_DEBUG_POWER("adjust power command flags\n");
  1797. for (i = 0; i < IWL_POWER_AC; i++) {
  1798. cmd = &pow_data->pwr_range_0[i].cmd;
  1799. if (pci_pm & 0x1)
  1800. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1801. else
  1802. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1803. }
  1804. }
  1805. return rc;
  1806. }
  1807. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1808. struct iwl_powertable_cmd *cmd, u32 mode)
  1809. {
  1810. int rc = 0, i;
  1811. u8 skip;
  1812. u32 max_sleep = 0;
  1813. struct iwl_power_vec_entry *range;
  1814. u8 period = 0;
  1815. struct iwl_power_mgr *pow_data;
  1816. if (mode > IWL_POWER_INDEX_5) {
  1817. IWL_DEBUG_POWER("Error invalid power mode \n");
  1818. return -1;
  1819. }
  1820. pow_data = &(priv->power_data);
  1821. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1822. range = &pow_data->pwr_range_0[0];
  1823. else
  1824. range = &pow_data->pwr_range_1[1];
  1825. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1826. #ifdef IWL_MAC80211_DISABLE
  1827. if (priv->assoc_network != NULL) {
  1828. unsigned long flags;
  1829. period = priv->assoc_network->tim.tim_period;
  1830. }
  1831. #endif /*IWL_MAC80211_DISABLE */
  1832. skip = range[mode].no_dtim;
  1833. if (period == 0) {
  1834. period = 1;
  1835. skip = 0;
  1836. }
  1837. if (skip == 0) {
  1838. max_sleep = period;
  1839. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1840. } else {
  1841. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1842. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1843. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1844. }
  1845. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1846. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1847. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1848. }
  1849. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1850. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1851. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1852. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1853. le32_to_cpu(cmd->sleep_interval[0]),
  1854. le32_to_cpu(cmd->sleep_interval[1]),
  1855. le32_to_cpu(cmd->sleep_interval[2]),
  1856. le32_to_cpu(cmd->sleep_interval[3]),
  1857. le32_to_cpu(cmd->sleep_interval[4]));
  1858. return rc;
  1859. }
  1860. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1861. {
  1862. u32 final_mode = mode;
  1863. int rc;
  1864. struct iwl_powertable_cmd cmd;
  1865. /* If on battery, set to 3,
  1866. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1867. * else user level */
  1868. switch (mode) {
  1869. case IWL_POWER_BATTERY:
  1870. final_mode = IWL_POWER_INDEX_3;
  1871. break;
  1872. case IWL_POWER_AC:
  1873. final_mode = IWL_POWER_MODE_CAM;
  1874. break;
  1875. default:
  1876. final_mode = mode;
  1877. break;
  1878. }
  1879. cmd.keep_alive_beacons = 0;
  1880. iwl_update_power_cmd(priv, &cmd, final_mode);
  1881. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1882. if (final_mode == IWL_POWER_MODE_CAM)
  1883. clear_bit(STATUS_POWER_PMI, &priv->status);
  1884. else
  1885. set_bit(STATUS_POWER_PMI, &priv->status);
  1886. return rc;
  1887. }
  1888. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1889. {
  1890. /* Filter incoming packets to determine if they are targeted toward
  1891. * this network, discarding packets coming from ourselves */
  1892. switch (priv->iw_mode) {
  1893. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1894. /* packets from our adapter are dropped (echo) */
  1895. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1896. return 0;
  1897. /* {broad,multi}cast packets to our IBSS go through */
  1898. if (is_multicast_ether_addr(header->addr1))
  1899. return !compare_ether_addr(header->addr3, priv->bssid);
  1900. /* packets to our adapter go through */
  1901. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1902. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1903. /* packets from our adapter are dropped (echo) */
  1904. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1905. return 0;
  1906. /* {broad,multi}cast packets to our BSS go through */
  1907. if (is_multicast_ether_addr(header->addr1))
  1908. return !compare_ether_addr(header->addr2, priv->bssid);
  1909. /* packets to our adapter go through */
  1910. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1911. }
  1912. return 1;
  1913. }
  1914. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1915. const char *iwl_get_tx_fail_reason(u32 status)
  1916. {
  1917. switch (status & TX_STATUS_MSK) {
  1918. case TX_STATUS_SUCCESS:
  1919. return "SUCCESS";
  1920. TX_STATUS_ENTRY(SHORT_LIMIT);
  1921. TX_STATUS_ENTRY(LONG_LIMIT);
  1922. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1923. TX_STATUS_ENTRY(MGMNT_ABORT);
  1924. TX_STATUS_ENTRY(NEXT_FRAG);
  1925. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1926. TX_STATUS_ENTRY(DEST_PS);
  1927. TX_STATUS_ENTRY(ABORTED);
  1928. TX_STATUS_ENTRY(BT_RETRY);
  1929. TX_STATUS_ENTRY(STA_INVALID);
  1930. TX_STATUS_ENTRY(FRAG_DROPPED);
  1931. TX_STATUS_ENTRY(TID_DISABLE);
  1932. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1933. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1934. TX_STATUS_ENTRY(TX_LOCKED);
  1935. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1936. }
  1937. return "UNKNOWN";
  1938. }
  1939. /**
  1940. * iwl_scan_cancel - Cancel any currently executing HW scan
  1941. *
  1942. * NOTE: priv->mutex is not required before calling this function
  1943. */
  1944. static int iwl_scan_cancel(struct iwl_priv *priv)
  1945. {
  1946. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1947. clear_bit(STATUS_SCANNING, &priv->status);
  1948. return 0;
  1949. }
  1950. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1951. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1952. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1953. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1954. queue_work(priv->workqueue, &priv->abort_scan);
  1955. } else
  1956. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1957. return test_bit(STATUS_SCANNING, &priv->status);
  1958. }
  1959. return 0;
  1960. }
  1961. /**
  1962. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1963. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1964. *
  1965. * NOTE: priv->mutex must be held before calling this function
  1966. */
  1967. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1968. {
  1969. unsigned long now = jiffies;
  1970. int ret;
  1971. ret = iwl_scan_cancel(priv);
  1972. if (ret && ms) {
  1973. mutex_unlock(&priv->mutex);
  1974. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1975. test_bit(STATUS_SCANNING, &priv->status))
  1976. msleep(1);
  1977. mutex_lock(&priv->mutex);
  1978. return test_bit(STATUS_SCANNING, &priv->status);
  1979. }
  1980. return ret;
  1981. }
  1982. static void iwl_sequence_reset(struct iwl_priv *priv)
  1983. {
  1984. /* Reset ieee stats */
  1985. /* We don't reset the net_device_stats (ieee->stats) on
  1986. * re-association */
  1987. priv->last_seq_num = -1;
  1988. priv->last_frag_num = -1;
  1989. priv->last_packet_time = 0;
  1990. iwl_scan_cancel(priv);
  1991. }
  1992. #define MAX_UCODE_BEACON_INTERVAL 4096
  1993. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1994. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1995. {
  1996. u16 new_val = 0;
  1997. u16 beacon_factor = 0;
  1998. beacon_factor =
  1999. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2000. / MAX_UCODE_BEACON_INTERVAL;
  2001. new_val = beacon_val / beacon_factor;
  2002. return cpu_to_le16(new_val);
  2003. }
  2004. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  2005. {
  2006. u64 interval_tm_unit;
  2007. u64 tsf, result;
  2008. unsigned long flags;
  2009. struct ieee80211_conf *conf = NULL;
  2010. u16 beacon_int = 0;
  2011. conf = ieee80211_get_hw_conf(priv->hw);
  2012. spin_lock_irqsave(&priv->lock, flags);
  2013. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2014. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2015. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2016. tsf = priv->timestamp1;
  2017. tsf = ((tsf << 32) | priv->timestamp0);
  2018. beacon_int = priv->beacon_int;
  2019. spin_unlock_irqrestore(&priv->lock, flags);
  2020. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2021. if (beacon_int == 0) {
  2022. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2023. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2024. } else {
  2025. priv->rxon_timing.beacon_interval =
  2026. cpu_to_le16(beacon_int);
  2027. priv->rxon_timing.beacon_interval =
  2028. iwl_adjust_beacon_interval(
  2029. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2030. }
  2031. priv->rxon_timing.atim_window = 0;
  2032. } else {
  2033. priv->rxon_timing.beacon_interval =
  2034. iwl_adjust_beacon_interval(conf->beacon_int);
  2035. /* TODO: we need to get atim_window from upper stack
  2036. * for now we set to 0 */
  2037. priv->rxon_timing.atim_window = 0;
  2038. }
  2039. interval_tm_unit =
  2040. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2041. result = do_div(tsf, interval_tm_unit);
  2042. priv->rxon_timing.beacon_init_val =
  2043. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2044. IWL_DEBUG_ASSOC
  2045. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2046. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2047. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2048. le16_to_cpu(priv->rxon_timing.atim_window));
  2049. }
  2050. static int iwl_scan_initiate(struct iwl_priv *priv)
  2051. {
  2052. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2053. IWL_ERROR("APs don't scan.\n");
  2054. return 0;
  2055. }
  2056. if (!iwl_is_ready_rf(priv)) {
  2057. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2058. return -EIO;
  2059. }
  2060. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2061. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2062. return -EAGAIN;
  2063. }
  2064. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2065. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2066. "Queuing.\n");
  2067. return -EAGAIN;
  2068. }
  2069. IWL_DEBUG_INFO("Starting scan...\n");
  2070. priv->scan_bands = 2;
  2071. set_bit(STATUS_SCANNING, &priv->status);
  2072. priv->scan_start = jiffies;
  2073. priv->scan_pass_start = priv->scan_start;
  2074. queue_work(priv->workqueue, &priv->request_scan);
  2075. return 0;
  2076. }
  2077. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2078. {
  2079. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2080. if (hw_decrypt)
  2081. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2082. else
  2083. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2084. return 0;
  2085. }
  2086. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2087. {
  2088. if (phymode == MODE_IEEE80211A) {
  2089. priv->staging_rxon.flags &=
  2090. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2091. | RXON_FLG_CCK_MSK);
  2092. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2093. } else {
  2094. /* Copied from iwl_bg_post_associate() */
  2095. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2096. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2097. else
  2098. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2099. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2100. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2101. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2102. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2103. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2104. }
  2105. }
  2106. /*
  2107. * initilize rxon structure with default values fromm eeprom
  2108. */
  2109. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2110. {
  2111. const struct iwl_channel_info *ch_info;
  2112. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2113. switch (priv->iw_mode) {
  2114. case IEEE80211_IF_TYPE_AP:
  2115. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2116. break;
  2117. case IEEE80211_IF_TYPE_STA:
  2118. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2119. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2120. break;
  2121. case IEEE80211_IF_TYPE_IBSS:
  2122. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2123. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2124. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2125. RXON_FILTER_ACCEPT_GRP_MSK;
  2126. break;
  2127. case IEEE80211_IF_TYPE_MNTR:
  2128. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2129. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2130. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2131. break;
  2132. }
  2133. #if 0
  2134. /* TODO: Figure out when short_preamble would be set and cache from
  2135. * that */
  2136. if (!hw_to_local(priv->hw)->short_preamble)
  2137. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2138. else
  2139. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2140. #endif
  2141. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2142. le16_to_cpu(priv->staging_rxon.channel));
  2143. if (!ch_info)
  2144. ch_info = &priv->channel_info[0];
  2145. /*
  2146. * in some case A channels are all non IBSS
  2147. * in this case force B/G channel
  2148. */
  2149. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2150. !(is_channel_ibss(ch_info)))
  2151. ch_info = &priv->channel_info[0];
  2152. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2153. if (is_channel_a_band(ch_info))
  2154. priv->phymode = MODE_IEEE80211A;
  2155. else
  2156. priv->phymode = MODE_IEEE80211G;
  2157. iwl_set_flags_for_phymode(priv, priv->phymode);
  2158. priv->staging_rxon.ofdm_basic_rates =
  2159. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2160. priv->staging_rxon.cck_basic_rates =
  2161. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2162. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2163. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2164. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2165. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2166. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2167. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2168. iwl4965_set_rxon_chain(priv);
  2169. }
  2170. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2171. {
  2172. if (!iwl_is_ready_rf(priv))
  2173. return -EAGAIN;
  2174. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2175. const struct iwl_channel_info *ch_info;
  2176. ch_info = iwl_get_channel_info(priv,
  2177. priv->phymode,
  2178. le16_to_cpu(priv->staging_rxon.channel));
  2179. if (!ch_info || !is_channel_ibss(ch_info)) {
  2180. IWL_ERROR("channel %d not IBSS channel\n",
  2181. le16_to_cpu(priv->staging_rxon.channel));
  2182. return -EINVAL;
  2183. }
  2184. }
  2185. cancel_delayed_work(&priv->scan_check);
  2186. if (iwl_scan_cancel_timeout(priv, 100)) {
  2187. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2188. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2189. return -EAGAIN;
  2190. }
  2191. priv->iw_mode = mode;
  2192. iwl_connection_init_rx_config(priv);
  2193. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2194. iwl_clear_stations_table(priv);
  2195. iwl_commit_rxon(priv);
  2196. return 0;
  2197. }
  2198. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2199. struct ieee80211_tx_control *ctl,
  2200. struct iwl_cmd *cmd,
  2201. struct sk_buff *skb_frag,
  2202. int last_frag)
  2203. {
  2204. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2205. switch (keyinfo->alg) {
  2206. case ALG_CCMP:
  2207. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2208. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2209. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2210. break;
  2211. case ALG_TKIP:
  2212. #if 0
  2213. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2214. if (last_frag)
  2215. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2216. 8);
  2217. else
  2218. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2219. #endif
  2220. break;
  2221. case ALG_WEP:
  2222. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2223. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2224. if (keyinfo->keylen == 13)
  2225. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2226. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2227. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2228. "with key %d\n", ctl->key_idx);
  2229. break;
  2230. case ALG_NONE:
  2231. IWL_DEBUG_TX("Tx packet in the clear (encrypt requested).\n");
  2232. break;
  2233. default:
  2234. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2235. break;
  2236. }
  2237. }
  2238. /*
  2239. * handle build REPLY_TX command notification.
  2240. */
  2241. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2242. struct iwl_cmd *cmd,
  2243. struct ieee80211_tx_control *ctrl,
  2244. struct ieee80211_hdr *hdr,
  2245. int is_unicast, u8 std_id)
  2246. {
  2247. __le16 *qc;
  2248. u16 fc = le16_to_cpu(hdr->frame_control);
  2249. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2250. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2251. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2252. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2253. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2254. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2255. if (ieee80211_is_probe_response(fc) &&
  2256. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2257. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2258. } else {
  2259. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2260. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2261. }
  2262. cmd->cmd.tx.sta_id = std_id;
  2263. if (ieee80211_get_morefrag(hdr))
  2264. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2265. qc = ieee80211_get_qos_ctrl(hdr);
  2266. if (qc) {
  2267. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2268. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2269. } else
  2270. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2271. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2272. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2273. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2274. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2275. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2276. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2277. }
  2278. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2279. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2280. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2281. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2282. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2283. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2284. cmd->cmd.tx.timeout.pm_frame_timeout =
  2285. cpu_to_le16(3);
  2286. else
  2287. cmd->cmd.tx.timeout.pm_frame_timeout =
  2288. cpu_to_le16(2);
  2289. } else
  2290. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2291. cmd->cmd.tx.driver_txop = 0;
  2292. cmd->cmd.tx.tx_flags = tx_flags;
  2293. cmd->cmd.tx.next_frame_len = 0;
  2294. }
  2295. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2296. {
  2297. int sta_id;
  2298. u16 fc = le16_to_cpu(hdr->frame_control);
  2299. DECLARE_MAC_BUF(mac);
  2300. /* If this frame is broadcast or not data then use the broadcast
  2301. * station id */
  2302. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2303. is_multicast_ether_addr(hdr->addr1))
  2304. return priv->hw_setting.bcast_sta_id;
  2305. switch (priv->iw_mode) {
  2306. /* If this frame is part of a BSS network (we're a station), then
  2307. * we use the AP's station id */
  2308. case IEEE80211_IF_TYPE_STA:
  2309. return IWL_AP_ID;
  2310. /* If we are an AP, then find the station, or use BCAST */
  2311. case IEEE80211_IF_TYPE_AP:
  2312. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2313. if (sta_id != IWL_INVALID_STATION)
  2314. return sta_id;
  2315. return priv->hw_setting.bcast_sta_id;
  2316. /* If this frame is part of a IBSS network, then we use the
  2317. * target specific station id */
  2318. case IEEE80211_IF_TYPE_IBSS:
  2319. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2320. if (sta_id != IWL_INVALID_STATION)
  2321. return sta_id;
  2322. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2323. if (sta_id != IWL_INVALID_STATION)
  2324. return sta_id;
  2325. IWL_DEBUG_DROP("Station %s not in station map. "
  2326. "Defaulting to broadcast...\n",
  2327. print_mac(mac, hdr->addr1));
  2328. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2329. return priv->hw_setting.bcast_sta_id;
  2330. default:
  2331. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2332. return priv->hw_setting.bcast_sta_id;
  2333. }
  2334. }
  2335. /*
  2336. * start REPLY_TX command process
  2337. */
  2338. static int iwl_tx_skb(struct iwl_priv *priv,
  2339. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2340. {
  2341. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2342. struct iwl_tfd_frame *tfd;
  2343. u32 *control_flags;
  2344. int txq_id = ctl->queue;
  2345. struct iwl_tx_queue *txq = NULL;
  2346. struct iwl_queue *q = NULL;
  2347. dma_addr_t phys_addr;
  2348. dma_addr_t txcmd_phys;
  2349. struct iwl_cmd *out_cmd = NULL;
  2350. u16 len, idx, len_org;
  2351. u8 id, hdr_len, unicast;
  2352. u8 sta_id;
  2353. u16 seq_number = 0;
  2354. u16 fc;
  2355. __le16 *qc;
  2356. u8 wait_write_ptr = 0;
  2357. unsigned long flags;
  2358. int rc;
  2359. spin_lock_irqsave(&priv->lock, flags);
  2360. if (iwl_is_rfkill(priv)) {
  2361. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2362. goto drop_unlock;
  2363. }
  2364. if (!priv->interface_id) {
  2365. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2366. goto drop_unlock;
  2367. }
  2368. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2369. IWL_ERROR("ERROR: No TX rate available.\n");
  2370. goto drop_unlock;
  2371. }
  2372. unicast = !is_multicast_ether_addr(hdr->addr1);
  2373. id = 0;
  2374. fc = le16_to_cpu(hdr->frame_control);
  2375. #ifdef CONFIG_IWLWIFI_DEBUG
  2376. if (ieee80211_is_auth(fc))
  2377. IWL_DEBUG_TX("Sending AUTH frame\n");
  2378. else if (ieee80211_is_assoc_request(fc))
  2379. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2380. else if (ieee80211_is_reassoc_request(fc))
  2381. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2382. #endif
  2383. if (!iwl_is_associated(priv) &&
  2384. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2385. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2386. goto drop_unlock;
  2387. }
  2388. spin_unlock_irqrestore(&priv->lock, flags);
  2389. hdr_len = ieee80211_get_hdrlen(fc);
  2390. sta_id = iwl_get_sta_id(priv, hdr);
  2391. if (sta_id == IWL_INVALID_STATION) {
  2392. DECLARE_MAC_BUF(mac);
  2393. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2394. print_mac(mac, hdr->addr1));
  2395. goto drop;
  2396. }
  2397. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2398. qc = ieee80211_get_qos_ctrl(hdr);
  2399. if (qc) {
  2400. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2401. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2402. IEEE80211_SCTL_SEQ;
  2403. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2404. (hdr->seq_ctrl &
  2405. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2406. seq_number += 0x10;
  2407. #ifdef CONFIG_IWLWIFI_HT
  2408. #ifdef CONFIG_IWLWIFI_HT_AGG
  2409. /* aggregation is on for this <sta,tid> */
  2410. if (ctl->flags & IEEE80211_TXCTL_HT_MPDU_AGG)
  2411. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2412. #endif /* CONFIG_IWLWIFI_HT_AGG */
  2413. #endif /* CONFIG_IWLWIFI_HT */
  2414. }
  2415. txq = &priv->txq[txq_id];
  2416. q = &txq->q;
  2417. spin_lock_irqsave(&priv->lock, flags);
  2418. tfd = &txq->bd[q->first_empty];
  2419. memset(tfd, 0, sizeof(*tfd));
  2420. control_flags = (u32 *) tfd;
  2421. idx = get_cmd_index(q, q->first_empty, 0);
  2422. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2423. txq->txb[q->first_empty].skb[0] = skb;
  2424. memcpy(&(txq->txb[q->first_empty].status.control),
  2425. ctl, sizeof(struct ieee80211_tx_control));
  2426. out_cmd = &txq->cmd[idx];
  2427. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2428. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2429. out_cmd->hdr.cmd = REPLY_TX;
  2430. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2431. INDEX_TO_SEQ(q->first_empty)));
  2432. /* copy frags header */
  2433. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2434. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2435. len = priv->hw_setting.tx_cmd_len +
  2436. sizeof(struct iwl_cmd_header) + hdr_len;
  2437. len_org = len;
  2438. len = (len + 3) & ~3;
  2439. if (len_org != len)
  2440. len_org = 1;
  2441. else
  2442. len_org = 0;
  2443. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2444. offsetof(struct iwl_cmd, hdr);
  2445. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2446. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2447. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2448. /* 802.11 null functions have no payload... */
  2449. len = skb->len - hdr_len;
  2450. if (len) {
  2451. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2452. len, PCI_DMA_TODEVICE);
  2453. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2454. }
  2455. if (len_org)
  2456. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2457. len = (u16)skb->len;
  2458. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2459. /* TODO need this for burst mode later on */
  2460. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2461. /* set is_hcca to 0; it probably will never be implemented */
  2462. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2463. iwl4965_tx_cmd(priv, out_cmd, sta_id, txcmd_phys,
  2464. hdr, hdr_len, ctl, NULL);
  2465. if (!ieee80211_get_morefrag(hdr)) {
  2466. txq->need_update = 1;
  2467. if (qc) {
  2468. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2469. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2470. }
  2471. } else {
  2472. wait_write_ptr = 1;
  2473. txq->need_update = 0;
  2474. }
  2475. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2476. sizeof(out_cmd->cmd.tx));
  2477. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2478. ieee80211_get_hdrlen(fc));
  2479. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2480. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2481. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2482. spin_unlock_irqrestore(&priv->lock, flags);
  2483. if (rc)
  2484. return rc;
  2485. if ((iwl_queue_space(q) < q->high_mark)
  2486. && priv->mac80211_registered) {
  2487. if (wait_write_ptr) {
  2488. spin_lock_irqsave(&priv->lock, flags);
  2489. txq->need_update = 1;
  2490. iwl_tx_queue_update_write_ptr(priv, txq);
  2491. spin_unlock_irqrestore(&priv->lock, flags);
  2492. }
  2493. ieee80211_stop_queue(priv->hw, ctl->queue);
  2494. }
  2495. return 0;
  2496. drop_unlock:
  2497. spin_unlock_irqrestore(&priv->lock, flags);
  2498. drop:
  2499. return -1;
  2500. }
  2501. static void iwl_set_rate(struct iwl_priv *priv)
  2502. {
  2503. const struct ieee80211_hw_mode *hw = NULL;
  2504. struct ieee80211_rate *rate;
  2505. int i;
  2506. hw = iwl_get_hw_mode(priv, priv->phymode);
  2507. priv->active_rate = 0;
  2508. priv->active_rate_basic = 0;
  2509. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2510. hw->mode == MODE_IEEE80211A ?
  2511. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2512. for (i = 0; i < hw->num_rates; i++) {
  2513. rate = &(hw->rates[i]);
  2514. if ((rate->val < IWL_RATE_COUNT) &&
  2515. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2516. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2517. rate->val, iwl_rates[rate->val].plcp,
  2518. (rate->flags & IEEE80211_RATE_BASIC) ?
  2519. "*" : "");
  2520. priv->active_rate |= (1 << rate->val);
  2521. if (rate->flags & IEEE80211_RATE_BASIC)
  2522. priv->active_rate_basic |= (1 << rate->val);
  2523. } else
  2524. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2525. rate->val, iwl_rates[rate->val].plcp);
  2526. }
  2527. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2528. priv->active_rate, priv->active_rate_basic);
  2529. /*
  2530. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2531. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2532. * OFDM
  2533. */
  2534. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2535. priv->staging_rxon.cck_basic_rates =
  2536. ((priv->active_rate_basic &
  2537. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2538. else
  2539. priv->staging_rxon.cck_basic_rates =
  2540. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2541. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2542. priv->staging_rxon.ofdm_basic_rates =
  2543. ((priv->active_rate_basic &
  2544. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2545. IWL_FIRST_OFDM_RATE) & 0xFF;
  2546. else
  2547. priv->staging_rxon.ofdm_basic_rates =
  2548. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2549. }
  2550. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2551. {
  2552. unsigned long flags;
  2553. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2554. return;
  2555. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2556. disable_radio ? "OFF" : "ON");
  2557. if (disable_radio) {
  2558. iwl_scan_cancel(priv);
  2559. /* FIXME: This is a workaround for AP */
  2560. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2561. spin_lock_irqsave(&priv->lock, flags);
  2562. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2563. CSR_UCODE_SW_BIT_RFKILL);
  2564. spin_unlock_irqrestore(&priv->lock, flags);
  2565. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2566. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2567. }
  2568. return;
  2569. }
  2570. spin_lock_irqsave(&priv->lock, flags);
  2571. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2572. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2573. spin_unlock_irqrestore(&priv->lock, flags);
  2574. /* wake up ucode */
  2575. msleep(10);
  2576. spin_lock_irqsave(&priv->lock, flags);
  2577. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2578. if (!iwl_grab_restricted_access(priv))
  2579. iwl_release_restricted_access(priv);
  2580. spin_unlock_irqrestore(&priv->lock, flags);
  2581. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2582. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2583. "disabled by HW switch\n");
  2584. return;
  2585. }
  2586. queue_work(priv->workqueue, &priv->restart);
  2587. return;
  2588. }
  2589. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2590. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2591. {
  2592. u16 fc =
  2593. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2594. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2595. return;
  2596. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2597. return;
  2598. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2599. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2600. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2601. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2602. RX_RES_STATUS_BAD_ICV_MIC)
  2603. stats->flag |= RX_FLAG_MMIC_ERROR;
  2604. case RX_RES_STATUS_SEC_TYPE_WEP:
  2605. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2606. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2607. RX_RES_STATUS_DECRYPT_OK) {
  2608. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2609. stats->flag |= RX_FLAG_DECRYPTED;
  2610. }
  2611. break;
  2612. default:
  2613. break;
  2614. }
  2615. }
  2616. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2617. struct iwl_rx_mem_buffer *rxb,
  2618. void *data, short len,
  2619. struct ieee80211_rx_status *stats,
  2620. u16 phy_flags)
  2621. {
  2622. struct iwl_rt_rx_hdr *iwl_rt;
  2623. /* First cache any information we need before we overwrite
  2624. * the information provided in the skb from the hardware */
  2625. s8 signal = stats->ssi;
  2626. s8 noise = 0;
  2627. int rate = stats->rate;
  2628. u64 tsf = stats->mactime;
  2629. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2630. /* We received data from the HW, so stop the watchdog */
  2631. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2632. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2633. return;
  2634. }
  2635. /* copy the frame data to write after where the radiotap header goes */
  2636. iwl_rt = (void *)rxb->skb->data;
  2637. memmove(iwl_rt->payload, data, len);
  2638. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2639. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2640. /* total header + data */
  2641. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2642. /* Set the size of the skb to the size of the frame */
  2643. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2644. /* Big bitfield of all the fields we provide in radiotap */
  2645. iwl_rt->rt_hdr.it_present =
  2646. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2647. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2648. (1 << IEEE80211_RADIOTAP_RATE) |
  2649. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2650. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2651. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2652. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2653. /* Zero the flags, we'll add to them as we go */
  2654. iwl_rt->rt_flags = 0;
  2655. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2656. /* Convert to dBm */
  2657. iwl_rt->rt_dbmsignal = signal;
  2658. iwl_rt->rt_dbmnoise = noise;
  2659. /* Convert the channel frequency and set the flags */
  2660. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2661. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2662. iwl_rt->rt_chbitmask =
  2663. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2664. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2665. iwl_rt->rt_chbitmask =
  2666. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2667. else /* 802.11g */
  2668. iwl_rt->rt_chbitmask =
  2669. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2670. rate = iwl_rate_index_from_plcp(rate);
  2671. if (rate == -1)
  2672. iwl_rt->rt_rate = 0;
  2673. else
  2674. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2675. /* antenna number */
  2676. iwl_rt->rt_antenna =
  2677. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2678. /* set the preamble flag if we have it */
  2679. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2680. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2681. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2682. stats->flag |= RX_FLAG_RADIOTAP;
  2683. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2684. rxb->skb = NULL;
  2685. }
  2686. #define IWL_PACKET_RETRY_TIME HZ
  2687. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2688. {
  2689. u16 sc = le16_to_cpu(header->seq_ctrl);
  2690. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2691. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2692. u16 *last_seq, *last_frag;
  2693. unsigned long *last_time;
  2694. switch (priv->iw_mode) {
  2695. case IEEE80211_IF_TYPE_IBSS:{
  2696. struct list_head *p;
  2697. struct iwl_ibss_seq *entry = NULL;
  2698. u8 *mac = header->addr2;
  2699. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2700. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2701. entry =
  2702. list_entry(p, struct iwl_ibss_seq, list);
  2703. if (!compare_ether_addr(entry->mac, mac))
  2704. break;
  2705. }
  2706. if (p == &priv->ibss_mac_hash[index]) {
  2707. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2708. if (!entry) {
  2709. IWL_ERROR
  2710. ("Cannot malloc new mac entry\n");
  2711. return 0;
  2712. }
  2713. memcpy(entry->mac, mac, ETH_ALEN);
  2714. entry->seq_num = seq;
  2715. entry->frag_num = frag;
  2716. entry->packet_time = jiffies;
  2717. list_add(&entry->list,
  2718. &priv->ibss_mac_hash[index]);
  2719. return 0;
  2720. }
  2721. last_seq = &entry->seq_num;
  2722. last_frag = &entry->frag_num;
  2723. last_time = &entry->packet_time;
  2724. break;
  2725. }
  2726. case IEEE80211_IF_TYPE_STA:
  2727. last_seq = &priv->last_seq_num;
  2728. last_frag = &priv->last_frag_num;
  2729. last_time = &priv->last_packet_time;
  2730. break;
  2731. default:
  2732. return 0;
  2733. }
  2734. if ((*last_seq == seq) &&
  2735. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2736. if (*last_frag == frag)
  2737. goto drop;
  2738. if (*last_frag + 1 != frag)
  2739. /* out-of-order fragment */
  2740. goto drop;
  2741. } else
  2742. *last_seq = seq;
  2743. *last_frag = frag;
  2744. *last_time = jiffies;
  2745. return 0;
  2746. drop:
  2747. return 1;
  2748. }
  2749. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2750. #include "iwl-spectrum.h"
  2751. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2752. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2753. #define TIME_UNIT 1024
  2754. /*
  2755. * extended beacon time format
  2756. * time in usec will be changed into a 32-bit value in 8:24 format
  2757. * the high 1 byte is the beacon counts
  2758. * the lower 3 bytes is the time in usec within one beacon interval
  2759. */
  2760. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2761. {
  2762. u32 quot;
  2763. u32 rem;
  2764. u32 interval = beacon_interval * 1024;
  2765. if (!interval || !usec)
  2766. return 0;
  2767. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2768. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2769. return (quot << 24) + rem;
  2770. }
  2771. /* base is usually what we get from ucode with each received frame,
  2772. * the same as HW timer counter counting down
  2773. */
  2774. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2775. {
  2776. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2777. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2778. u32 interval = beacon_interval * TIME_UNIT;
  2779. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2780. (addon & BEACON_TIME_MASK_HIGH);
  2781. if (base_low > addon_low)
  2782. res += base_low - addon_low;
  2783. else if (base_low < addon_low) {
  2784. res += interval + base_low - addon_low;
  2785. res += (1 << 24);
  2786. } else
  2787. res += (1 << 24);
  2788. return cpu_to_le32(res);
  2789. }
  2790. static int iwl_get_measurement(struct iwl_priv *priv,
  2791. struct ieee80211_measurement_params *params,
  2792. u8 type)
  2793. {
  2794. struct iwl_spectrum_cmd spectrum;
  2795. struct iwl_rx_packet *res;
  2796. struct iwl_host_cmd cmd = {
  2797. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2798. .data = (void *)&spectrum,
  2799. .meta.flags = CMD_WANT_SKB,
  2800. };
  2801. u32 add_time = le64_to_cpu(params->start_time);
  2802. int rc;
  2803. int spectrum_resp_status;
  2804. int duration = le16_to_cpu(params->duration);
  2805. if (iwl_is_associated(priv))
  2806. add_time =
  2807. iwl_usecs_to_beacons(
  2808. le64_to_cpu(params->start_time) - priv->last_tsf,
  2809. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2810. memset(&spectrum, 0, sizeof(spectrum));
  2811. spectrum.channel_count = cpu_to_le16(1);
  2812. spectrum.flags =
  2813. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2814. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2815. cmd.len = sizeof(spectrum);
  2816. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2817. if (iwl_is_associated(priv))
  2818. spectrum.start_time =
  2819. iwl_add_beacon_time(priv->last_beacon_time,
  2820. add_time,
  2821. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2822. else
  2823. spectrum.start_time = 0;
  2824. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2825. spectrum.channels[0].channel = params->channel;
  2826. spectrum.channels[0].type = type;
  2827. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2828. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2829. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2830. rc = iwl_send_cmd_sync(priv, &cmd);
  2831. if (rc)
  2832. return rc;
  2833. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2834. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2835. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2836. rc = -EIO;
  2837. }
  2838. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2839. switch (spectrum_resp_status) {
  2840. case 0: /* Command will be handled */
  2841. if (res->u.spectrum.id != 0xff) {
  2842. IWL_DEBUG_INFO
  2843. ("Replaced existing measurement: %d\n",
  2844. res->u.spectrum.id);
  2845. priv->measurement_status &= ~MEASUREMENT_READY;
  2846. }
  2847. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2848. rc = 0;
  2849. break;
  2850. case 1: /* Command will not be handled */
  2851. rc = -EAGAIN;
  2852. break;
  2853. }
  2854. dev_kfree_skb_any(cmd.meta.u.skb);
  2855. return rc;
  2856. }
  2857. #endif
  2858. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2859. struct iwl_tx_info *tx_sta)
  2860. {
  2861. tx_sta->status.ack_signal = 0;
  2862. tx_sta->status.excessive_retries = 0;
  2863. tx_sta->status.queue_length = 0;
  2864. tx_sta->status.queue_number = 0;
  2865. if (in_interrupt())
  2866. ieee80211_tx_status_irqsafe(priv->hw,
  2867. tx_sta->skb[0], &(tx_sta->status));
  2868. else
  2869. ieee80211_tx_status(priv->hw,
  2870. tx_sta->skb[0], &(tx_sta->status));
  2871. tx_sta->skb[0] = NULL;
  2872. }
  2873. /**
  2874. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2875. *
  2876. * When FW advances 'R' index, all entries between old and
  2877. * new 'R' index need to be reclaimed. As result, some free space
  2878. * forms. If there is enough free space (> low mark), wake Tx queue.
  2879. */
  2880. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2881. {
  2882. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2883. struct iwl_queue *q = &txq->q;
  2884. int nfreed = 0;
  2885. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2886. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2887. "is out of range [0-%d] %d %d.\n", txq_id,
  2888. index, q->n_bd, q->first_empty, q->last_used);
  2889. return 0;
  2890. }
  2891. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2892. q->last_used != index;
  2893. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2894. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2895. iwl_txstatus_to_ieee(priv,
  2896. &(txq->txb[txq->q.last_used]));
  2897. iwl_hw_txq_free_tfd(priv, txq);
  2898. } else if (nfreed > 1) {
  2899. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2900. q->first_empty, q->last_used);
  2901. queue_work(priv->workqueue, &priv->restart);
  2902. }
  2903. nfreed++;
  2904. }
  2905. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2906. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2907. priv->mac80211_registered)
  2908. ieee80211_wake_queue(priv->hw, txq_id);
  2909. return nfreed;
  2910. }
  2911. static int iwl_is_tx_success(u32 status)
  2912. {
  2913. status &= TX_STATUS_MSK;
  2914. return (status == TX_STATUS_SUCCESS)
  2915. || (status == TX_STATUS_DIRECT_DONE);
  2916. }
  2917. /******************************************************************************
  2918. *
  2919. * Generic RX handler implementations
  2920. *
  2921. ******************************************************************************/
  2922. #ifdef CONFIG_IWLWIFI_HT
  2923. #ifdef CONFIG_IWLWIFI_HT_AGG
  2924. static inline int iwl_get_ra_sta_id(struct iwl_priv *priv,
  2925. struct ieee80211_hdr *hdr)
  2926. {
  2927. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2928. return IWL_AP_ID;
  2929. else {
  2930. u8 *da = ieee80211_get_DA(hdr);
  2931. return iwl_hw_find_station(priv, da);
  2932. }
  2933. }
  2934. static struct ieee80211_hdr *iwl_tx_queue_get_hdr(
  2935. struct iwl_priv *priv, int txq_id, int idx)
  2936. {
  2937. if (priv->txq[txq_id].txb[idx].skb[0])
  2938. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2939. txb[idx].skb[0]->data;
  2940. return NULL;
  2941. }
  2942. static inline u32 iwl_get_scd_ssn(struct iwl_tx_resp *tx_resp)
  2943. {
  2944. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2945. tx_resp->frame_count);
  2946. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2947. }
  2948. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2949. struct iwl_ht_agg *agg,
  2950. struct iwl_tx_resp *tx_resp,
  2951. u16 start_idx)
  2952. {
  2953. u32 status;
  2954. __le32 *frame_status = &tx_resp->status;
  2955. struct ieee80211_tx_status *tx_status = NULL;
  2956. struct ieee80211_hdr *hdr = NULL;
  2957. int i, sh;
  2958. int txq_id, idx;
  2959. u16 seq;
  2960. if (agg->wait_for_ba)
  2961. IWL_DEBUG_TX_REPLY("got tx repsons w/o back\n");
  2962. agg->frame_count = tx_resp->frame_count;
  2963. agg->start_idx = start_idx;
  2964. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2965. agg->bitmap0 = agg->bitmap1 = 0;
  2966. if (agg->frame_count == 1) {
  2967. struct iwl_tx_queue *txq ;
  2968. status = le32_to_cpu(frame_status[0]);
  2969. txq_id = agg->txq_id;
  2970. txq = &priv->txq[txq_id];
  2971. /* FIXME: code repetition */
  2972. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d \n",
  2973. agg->frame_count, agg->start_idx);
  2974. tx_status = &(priv->txq[txq_id].txb[txq->q.last_used].status);
  2975. tx_status->retry_count = tx_resp->failure_frame;
  2976. tx_status->queue_number = status & 0xff;
  2977. tx_status->queue_length = tx_resp->bt_kill_count;
  2978. tx_status->queue_length |= tx_resp->failure_rts;
  2979. tx_status->flags = iwl_is_tx_success(status)?
  2980. IEEE80211_TX_STATUS_ACK : 0;
  2981. tx_status->control.tx_rate =
  2982. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  2983. /* FIXME: code repetition end */
  2984. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2985. status & 0xff, tx_resp->failure_frame);
  2986. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2987. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2988. agg->wait_for_ba = 0;
  2989. } else {
  2990. u64 bitmap = 0;
  2991. int start = agg->start_idx;
  2992. for (i = 0; i < agg->frame_count; i++) {
  2993. u16 sc;
  2994. status = le32_to_cpu(frame_status[i]);
  2995. seq = status >> 16;
  2996. idx = SEQ_TO_INDEX(seq);
  2997. txq_id = SEQ_TO_QUEUE(seq);
  2998. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2999. AGG_TX_STATE_ABORT_MSK))
  3000. continue;
  3001. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3002. agg->frame_count, txq_id, idx);
  3003. hdr = iwl_tx_queue_get_hdr(priv, txq_id, idx);
  3004. sc = le16_to_cpu(hdr->seq_ctrl);
  3005. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3006. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3007. " idx=%d, seq_idx=%d, seq=%d\n",
  3008. idx, SEQ_TO_SN(sc),
  3009. hdr->seq_ctrl);
  3010. return -1;
  3011. }
  3012. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3013. i, idx, SEQ_TO_SN(sc));
  3014. sh = idx - start;
  3015. if (sh > 64) {
  3016. sh = (start - idx) + 0xff;
  3017. bitmap = bitmap << sh;
  3018. sh = 0;
  3019. start = idx;
  3020. } else if (sh < -64)
  3021. sh = 0xff - (start - idx);
  3022. else if (sh < 0) {
  3023. sh = start - idx;
  3024. start = idx;
  3025. bitmap = bitmap << sh;
  3026. sh = 0;
  3027. }
  3028. bitmap |= (1 << sh);
  3029. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3030. start, (u32)(bitmap & 0xFFFFFFFF));
  3031. }
  3032. agg->bitmap0 = bitmap & 0xFFFFFFFF;
  3033. agg->bitmap1 = bitmap >> 32;
  3034. agg->start_idx = start;
  3035. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3036. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%x\n",
  3037. agg->frame_count, agg->start_idx,
  3038. agg->bitmap0);
  3039. if (bitmap)
  3040. agg->wait_for_ba = 1;
  3041. }
  3042. return 0;
  3043. }
  3044. #endif
  3045. #endif
  3046. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  3047. struct iwl_rx_mem_buffer *rxb)
  3048. {
  3049. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3050. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3051. int txq_id = SEQ_TO_QUEUE(sequence);
  3052. int index = SEQ_TO_INDEX(sequence);
  3053. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  3054. struct ieee80211_tx_status *tx_status;
  3055. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3056. u32 status = le32_to_cpu(tx_resp->status);
  3057. #ifdef CONFIG_IWLWIFI_HT
  3058. #ifdef CONFIG_IWLWIFI_HT_AGG
  3059. int tid, sta_id;
  3060. #endif
  3061. #endif
  3062. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3063. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3064. "is out of range [0-%d] %d %d\n", txq_id,
  3065. index, txq->q.n_bd, txq->q.first_empty,
  3066. txq->q.last_used);
  3067. return;
  3068. }
  3069. #ifdef CONFIG_IWLWIFI_HT
  3070. #ifdef CONFIG_IWLWIFI_HT_AGG
  3071. if (txq->sched_retry) {
  3072. const u32 scd_ssn = iwl_get_scd_ssn(tx_resp);
  3073. struct ieee80211_hdr *hdr =
  3074. iwl_tx_queue_get_hdr(priv, txq_id, index);
  3075. struct iwl_ht_agg *agg = NULL;
  3076. __le16 *qc = ieee80211_get_qos_ctrl(hdr);
  3077. if (qc == NULL) {
  3078. IWL_ERROR("BUG_ON qc is null!!!!\n");
  3079. return;
  3080. }
  3081. tid = le16_to_cpu(*qc) & 0xf;
  3082. sta_id = iwl_get_ra_sta_id(priv, hdr);
  3083. if (unlikely(sta_id == IWL_INVALID_STATION)) {
  3084. IWL_ERROR("Station not known for\n");
  3085. return;
  3086. }
  3087. agg = &priv->stations[sta_id].tid[tid].agg;
  3088. iwl4965_tx_status_reply_tx(priv, agg, tx_resp, index);
  3089. if ((tx_resp->frame_count == 1) &&
  3090. !iwl_is_tx_success(status)) {
  3091. /* TODO: send BAR */
  3092. }
  3093. if ((txq->q.last_used != (scd_ssn & 0xff))) {
  3094. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3095. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3096. "%d index %d\n", scd_ssn , index);
  3097. iwl_tx_queue_reclaim(priv, txq_id, index);
  3098. }
  3099. } else {
  3100. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3101. #endif /* CONFIG_IWLWIFI_HT */
  3102. tx_status = &(txq->txb[txq->q.last_used].status);
  3103. tx_status->retry_count = tx_resp->failure_frame;
  3104. tx_status->queue_number = status;
  3105. tx_status->queue_length = tx_resp->bt_kill_count;
  3106. tx_status->queue_length |= tx_resp->failure_rts;
  3107. tx_status->flags =
  3108. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3109. tx_status->control.tx_rate =
  3110. iwl_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3111. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3112. "retries %d\n", txq_id, iwl_get_tx_fail_reason(status),
  3113. status, le32_to_cpu(tx_resp->rate_n_flags),
  3114. tx_resp->failure_frame);
  3115. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3116. if (index != -1)
  3117. iwl_tx_queue_reclaim(priv, txq_id, index);
  3118. #ifdef CONFIG_IWLWIFI_HT
  3119. #ifdef CONFIG_IWLWIFI_HT_AGG
  3120. }
  3121. #endif /* CONFIG_IWLWIFI_HT_AGG */
  3122. #endif /* CONFIG_IWLWIFI_HT */
  3123. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3124. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3125. }
  3126. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  3127. struct iwl_rx_mem_buffer *rxb)
  3128. {
  3129. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3130. struct iwl_alive_resp *palive;
  3131. struct delayed_work *pwork;
  3132. palive = &pkt->u.alive_frame;
  3133. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3134. "0x%01X 0x%01X\n",
  3135. palive->is_valid, palive->ver_type,
  3136. palive->ver_subtype);
  3137. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3138. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3139. memcpy(&priv->card_alive_init,
  3140. &pkt->u.alive_frame,
  3141. sizeof(struct iwl_init_alive_resp));
  3142. pwork = &priv->init_alive_start;
  3143. } else {
  3144. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3145. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3146. sizeof(struct iwl_alive_resp));
  3147. pwork = &priv->alive_start;
  3148. }
  3149. /* We delay the ALIVE response by 5ms to
  3150. * give the HW RF Kill time to activate... */
  3151. if (palive->is_valid == UCODE_VALID_OK)
  3152. queue_delayed_work(priv->workqueue, pwork,
  3153. msecs_to_jiffies(5));
  3154. else
  3155. IWL_WARNING("uCode did not respond OK.\n");
  3156. }
  3157. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  3158. struct iwl_rx_mem_buffer *rxb)
  3159. {
  3160. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3161. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3162. return;
  3163. }
  3164. static void iwl_rx_reply_error(struct iwl_priv *priv,
  3165. struct iwl_rx_mem_buffer *rxb)
  3166. {
  3167. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3168. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3169. "seq 0x%04X ser 0x%08X\n",
  3170. le32_to_cpu(pkt->u.err_resp.error_type),
  3171. get_cmd_string(pkt->u.err_resp.cmd_id),
  3172. pkt->u.err_resp.cmd_id,
  3173. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3174. le32_to_cpu(pkt->u.err_resp.error_info));
  3175. }
  3176. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3177. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  3178. {
  3179. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3180. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3181. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  3182. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3183. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3184. rxon->channel = csa->channel;
  3185. priv->staging_rxon.channel = csa->channel;
  3186. }
  3187. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  3188. struct iwl_rx_mem_buffer *rxb)
  3189. {
  3190. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  3191. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3192. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3193. if (!report->state) {
  3194. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3195. "Spectrum Measure Notification: Start\n");
  3196. return;
  3197. }
  3198. memcpy(&priv->measure_report, report, sizeof(*report));
  3199. priv->measurement_status |= MEASUREMENT_READY;
  3200. #endif
  3201. }
  3202. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  3203. struct iwl_rx_mem_buffer *rxb)
  3204. {
  3205. #ifdef CONFIG_IWLWIFI_DEBUG
  3206. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3207. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3208. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3209. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3210. #endif
  3211. }
  3212. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  3213. struct iwl_rx_mem_buffer *rxb)
  3214. {
  3215. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3216. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3217. "notification for %s:\n",
  3218. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3219. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3220. }
  3221. static void iwl_bg_beacon_update(struct work_struct *work)
  3222. {
  3223. struct iwl_priv *priv =
  3224. container_of(work, struct iwl_priv, beacon_update);
  3225. struct sk_buff *beacon;
  3226. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3227. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  3228. if (!beacon) {
  3229. IWL_ERROR("update beacon failed\n");
  3230. return;
  3231. }
  3232. mutex_lock(&priv->mutex);
  3233. /* new beacon skb is allocated every time; dispose previous.*/
  3234. if (priv->ibss_beacon)
  3235. dev_kfree_skb(priv->ibss_beacon);
  3236. priv->ibss_beacon = beacon;
  3237. mutex_unlock(&priv->mutex);
  3238. iwl_send_beacon_cmd(priv);
  3239. }
  3240. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  3241. struct iwl_rx_mem_buffer *rxb)
  3242. {
  3243. #ifdef CONFIG_IWLWIFI_DEBUG
  3244. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3245. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  3246. u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3247. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3248. "tsf %d %d rate %d\n",
  3249. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3250. beacon->beacon_notify_hdr.failure_frame,
  3251. le32_to_cpu(beacon->ibss_mgr_status),
  3252. le32_to_cpu(beacon->high_tsf),
  3253. le32_to_cpu(beacon->low_tsf), rate);
  3254. #endif
  3255. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3256. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3257. queue_work(priv->workqueue, &priv->beacon_update);
  3258. }
  3259. /* Service response to REPLY_SCAN_CMD (0x80) */
  3260. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3261. struct iwl_rx_mem_buffer *rxb)
  3262. {
  3263. #ifdef CONFIG_IWLWIFI_DEBUG
  3264. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3265. struct iwl_scanreq_notification *notif =
  3266. (struct iwl_scanreq_notification *)pkt->u.raw;
  3267. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3268. #endif
  3269. }
  3270. /* Service SCAN_START_NOTIFICATION (0x82) */
  3271. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3272. struct iwl_rx_mem_buffer *rxb)
  3273. {
  3274. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3275. struct iwl_scanstart_notification *notif =
  3276. (struct iwl_scanstart_notification *)pkt->u.raw;
  3277. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3278. IWL_DEBUG_SCAN("Scan start: "
  3279. "%d [802.11%s] "
  3280. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3281. notif->channel,
  3282. notif->band ? "bg" : "a",
  3283. notif->tsf_high,
  3284. notif->tsf_low, notif->status, notif->beacon_timer);
  3285. }
  3286. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3287. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3288. struct iwl_rx_mem_buffer *rxb)
  3289. {
  3290. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3291. struct iwl_scanresults_notification *notif =
  3292. (struct iwl_scanresults_notification *)pkt->u.raw;
  3293. IWL_DEBUG_SCAN("Scan ch.res: "
  3294. "%d [802.11%s] "
  3295. "(TSF: 0x%08X:%08X) - %d "
  3296. "elapsed=%lu usec (%dms since last)\n",
  3297. notif->channel,
  3298. notif->band ? "bg" : "a",
  3299. le32_to_cpu(notif->tsf_high),
  3300. le32_to_cpu(notif->tsf_low),
  3301. le32_to_cpu(notif->statistics[0]),
  3302. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3303. jiffies_to_msecs(elapsed_jiffies
  3304. (priv->last_scan_jiffies, jiffies)));
  3305. priv->last_scan_jiffies = jiffies;
  3306. }
  3307. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3308. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3309. struct iwl_rx_mem_buffer *rxb)
  3310. {
  3311. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3312. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3313. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3314. scan_notif->scanned_channels,
  3315. scan_notif->tsf_low,
  3316. scan_notif->tsf_high, scan_notif->status);
  3317. /* The HW is no longer scanning */
  3318. clear_bit(STATUS_SCAN_HW, &priv->status);
  3319. /* The scan completion notification came in, so kill that timer... */
  3320. cancel_delayed_work(&priv->scan_check);
  3321. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3322. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3323. jiffies_to_msecs(elapsed_jiffies
  3324. (priv->scan_pass_start, jiffies)));
  3325. /* Remove this scanned band from the list
  3326. * of pending bands to scan */
  3327. priv->scan_bands--;
  3328. /* If a request to abort was given, or the scan did not succeed
  3329. * then we reset the scan state machine and terminate,
  3330. * re-queuing another scan if one has been requested */
  3331. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3332. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3333. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3334. } else {
  3335. /* If there are more bands on this scan pass reschedule */
  3336. if (priv->scan_bands > 0)
  3337. goto reschedule;
  3338. }
  3339. priv->last_scan_jiffies = jiffies;
  3340. IWL_DEBUG_INFO("Setting scan to off\n");
  3341. clear_bit(STATUS_SCANNING, &priv->status);
  3342. IWL_DEBUG_INFO("Scan took %dms\n",
  3343. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3344. queue_work(priv->workqueue, &priv->scan_completed);
  3345. return;
  3346. reschedule:
  3347. priv->scan_pass_start = jiffies;
  3348. queue_work(priv->workqueue, &priv->request_scan);
  3349. }
  3350. /* Handle notification from uCode that card's power state is changing
  3351. * due to software, hardware, or critical temperature RFKILL */
  3352. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3353. struct iwl_rx_mem_buffer *rxb)
  3354. {
  3355. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3356. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3357. unsigned long status = priv->status;
  3358. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3359. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3360. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3361. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3362. RF_CARD_DISABLED)) {
  3363. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3364. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3365. if (!iwl_grab_restricted_access(priv)) {
  3366. iwl_write_restricted(
  3367. priv, HBUS_TARG_MBX_C,
  3368. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3369. iwl_release_restricted_access(priv);
  3370. }
  3371. if (!(flags & RXON_CARD_DISABLED)) {
  3372. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3373. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3374. if (!iwl_grab_restricted_access(priv)) {
  3375. iwl_write_restricted(
  3376. priv, HBUS_TARG_MBX_C,
  3377. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3378. iwl_release_restricted_access(priv);
  3379. }
  3380. }
  3381. if (flags & RF_CARD_DISABLED) {
  3382. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3383. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3384. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3385. if (!iwl_grab_restricted_access(priv))
  3386. iwl_release_restricted_access(priv);
  3387. }
  3388. }
  3389. if (flags & HW_CARD_DISABLED)
  3390. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3391. else
  3392. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3393. if (flags & SW_CARD_DISABLED)
  3394. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3395. else
  3396. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3397. if (!(flags & RXON_CARD_DISABLED))
  3398. iwl_scan_cancel(priv);
  3399. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3400. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3401. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3402. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3403. queue_work(priv->workqueue, &priv->rf_kill);
  3404. else
  3405. wake_up_interruptible(&priv->wait_command_queue);
  3406. }
  3407. /**
  3408. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3409. *
  3410. * Setup the RX handlers for each of the reply types sent from the uCode
  3411. * to the host.
  3412. *
  3413. * This function chains into the hardware specific files for them to setup
  3414. * any hardware specific handlers as well.
  3415. */
  3416. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3417. {
  3418. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3419. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3420. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3421. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3422. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3423. iwl_rx_spectrum_measure_notif;
  3424. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3425. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3426. iwl_rx_pm_debug_statistics_notif;
  3427. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3428. /* NOTE: iwl_rx_statistics is different based on whether
  3429. * the build is for the 3945 or the 4965. See the
  3430. * corresponding implementation in iwl-XXXX.c
  3431. *
  3432. * The same handler is used for both the REPLY to a
  3433. * discrete statistics request from the host as well as
  3434. * for the periodic statistics notification from the uCode
  3435. */
  3436. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3437. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3438. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3439. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3440. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3441. iwl_rx_scan_results_notif;
  3442. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3443. iwl_rx_scan_complete_notif;
  3444. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3445. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3446. /* Setup hardware specific Rx handlers */
  3447. iwl_hw_rx_handler_setup(priv);
  3448. }
  3449. /**
  3450. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3451. * @rxb: Rx buffer to reclaim
  3452. *
  3453. * If an Rx buffer has an async callback associated with it the callback
  3454. * will be executed. The attached skb (if present) will only be freed
  3455. * if the callback returns 1
  3456. */
  3457. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3458. struct iwl_rx_mem_buffer *rxb)
  3459. {
  3460. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3461. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3462. int txq_id = SEQ_TO_QUEUE(sequence);
  3463. int index = SEQ_TO_INDEX(sequence);
  3464. int huge = sequence & SEQ_HUGE_FRAME;
  3465. int cmd_index;
  3466. struct iwl_cmd *cmd;
  3467. /* If a Tx command is being handled and it isn't in the actual
  3468. * command queue then there a command routing bug has been introduced
  3469. * in the queue management code. */
  3470. if (txq_id != IWL_CMD_QUEUE_NUM)
  3471. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3472. txq_id, pkt->hdr.cmd);
  3473. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3474. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3475. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3476. /* Input error checking is done when commands are added to queue. */
  3477. if (cmd->meta.flags & CMD_WANT_SKB) {
  3478. cmd->meta.source->u.skb = rxb->skb;
  3479. rxb->skb = NULL;
  3480. } else if (cmd->meta.u.callback &&
  3481. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3482. rxb->skb = NULL;
  3483. iwl_tx_queue_reclaim(priv, txq_id, index);
  3484. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3485. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3486. wake_up_interruptible(&priv->wait_command_queue);
  3487. }
  3488. }
  3489. /************************** RX-FUNCTIONS ****************************/
  3490. /*
  3491. * Rx theory of operation
  3492. *
  3493. * The host allocates 32 DMA target addresses and passes the host address
  3494. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3495. * 0 to 31
  3496. *
  3497. * Rx Queue Indexes
  3498. * The host/firmware share two index registers for managing the Rx buffers.
  3499. *
  3500. * The READ index maps to the first position that the firmware may be writing
  3501. * to -- the driver can read up to (but not including) this position and get
  3502. * good data.
  3503. * The READ index is managed by the firmware once the card is enabled.
  3504. *
  3505. * The WRITE index maps to the last position the driver has read from -- the
  3506. * position preceding WRITE is the last slot the firmware can place a packet.
  3507. *
  3508. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3509. * WRITE = READ.
  3510. *
  3511. * During initialization the host sets up the READ queue position to the first
  3512. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3513. *
  3514. * When the firmware places a packet in a buffer it will advance the READ index
  3515. * and fire the RX interrupt. The driver can then query the READ index and
  3516. * process as many packets as possible, moving the WRITE index forward as it
  3517. * resets the Rx queue buffers with new memory.
  3518. *
  3519. * The management in the driver is as follows:
  3520. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3521. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3522. * to replensish the iwl->rxq->rx_free.
  3523. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3524. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3525. * 'processed' and 'read' driver indexes as well)
  3526. * + A received packet is processed and handed to the kernel network stack,
  3527. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3528. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3529. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3530. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3531. * were enough free buffers and RX_STALLED is set it is cleared.
  3532. *
  3533. *
  3534. * Driver sequence:
  3535. *
  3536. * iwl_rx_queue_alloc() Allocates rx_free
  3537. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3538. * iwl_rx_queue_restock
  3539. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3540. * queue, updates firmware pointers, and updates
  3541. * the WRITE index. If insufficient rx_free buffers
  3542. * are available, schedules iwl_rx_replenish
  3543. *
  3544. * -- enable interrupts --
  3545. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3546. * READ INDEX, detaching the SKB from the pool.
  3547. * Moves the packet buffer from queue to rx_used.
  3548. * Calls iwl_rx_queue_restock to refill any empty
  3549. * slots.
  3550. * ...
  3551. *
  3552. */
  3553. /**
  3554. * iwl_rx_queue_space - Return number of free slots available in queue.
  3555. */
  3556. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3557. {
  3558. int s = q->read - q->write;
  3559. if (s <= 0)
  3560. s += RX_QUEUE_SIZE;
  3561. /* keep some buffer to not confuse full and empty queue */
  3562. s -= 2;
  3563. if (s < 0)
  3564. s = 0;
  3565. return s;
  3566. }
  3567. /**
  3568. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3569. *
  3570. * NOTE: This function has 3945 and 4965 specific code sections
  3571. * but is declared in base due to the majority of the
  3572. * implementation being the same (only a numeric constant is
  3573. * different)
  3574. *
  3575. */
  3576. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3577. {
  3578. u32 reg = 0;
  3579. int rc = 0;
  3580. unsigned long flags;
  3581. spin_lock_irqsave(&q->lock, flags);
  3582. if (q->need_update == 0)
  3583. goto exit_unlock;
  3584. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3585. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3586. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3587. iwl_set_bit(priv, CSR_GP_CNTRL,
  3588. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3589. goto exit_unlock;
  3590. }
  3591. rc = iwl_grab_restricted_access(priv);
  3592. if (rc)
  3593. goto exit_unlock;
  3594. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3595. q->write & ~0x7);
  3596. iwl_release_restricted_access(priv);
  3597. } else
  3598. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3599. q->need_update = 0;
  3600. exit_unlock:
  3601. spin_unlock_irqrestore(&q->lock, flags);
  3602. return rc;
  3603. }
  3604. /**
  3605. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3606. *
  3607. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3608. */
  3609. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3610. dma_addr_t dma_addr)
  3611. {
  3612. return cpu_to_le32((u32)(dma_addr >> 8));
  3613. }
  3614. /**
  3615. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3616. *
  3617. * If there are slots in the RX queue that need to be restocked,
  3618. * and we have free pre-allocated buffers, fill the ranks as much
  3619. * as we can pulling from rx_free.
  3620. *
  3621. * This moves the 'write' index forward to catch up with 'processed', and
  3622. * also updates the memory address in the firmware to reference the new
  3623. * target buffer.
  3624. */
  3625. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3626. {
  3627. struct iwl_rx_queue *rxq = &priv->rxq;
  3628. struct list_head *element;
  3629. struct iwl_rx_mem_buffer *rxb;
  3630. unsigned long flags;
  3631. int write, rc;
  3632. spin_lock_irqsave(&rxq->lock, flags);
  3633. write = rxq->write & ~0x7;
  3634. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3635. element = rxq->rx_free.next;
  3636. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3637. list_del(element);
  3638. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3639. rxq->queue[rxq->write] = rxb;
  3640. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3641. rxq->free_count--;
  3642. }
  3643. spin_unlock_irqrestore(&rxq->lock, flags);
  3644. /* If the pre-allocated buffer pool is dropping low, schedule to
  3645. * refill it */
  3646. if (rxq->free_count <= RX_LOW_WATERMARK)
  3647. queue_work(priv->workqueue, &priv->rx_replenish);
  3648. /* If we've added more space for the firmware to place data, tell it */
  3649. if ((write != (rxq->write & ~0x7))
  3650. || (abs(rxq->write - rxq->read) > 7)) {
  3651. spin_lock_irqsave(&rxq->lock, flags);
  3652. rxq->need_update = 1;
  3653. spin_unlock_irqrestore(&rxq->lock, flags);
  3654. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3655. if (rc)
  3656. return rc;
  3657. }
  3658. return 0;
  3659. }
  3660. /**
  3661. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3662. *
  3663. * When moving to rx_free an SKB is allocated for the slot.
  3664. *
  3665. * Also restock the Rx queue via iwl_rx_queue_restock.
  3666. * This is called as a scheduled work item (except for during intialization)
  3667. */
  3668. void iwl_rx_replenish(void *data)
  3669. {
  3670. struct iwl_priv *priv = data;
  3671. struct iwl_rx_queue *rxq = &priv->rxq;
  3672. struct list_head *element;
  3673. struct iwl_rx_mem_buffer *rxb;
  3674. unsigned long flags;
  3675. spin_lock_irqsave(&rxq->lock, flags);
  3676. while (!list_empty(&rxq->rx_used)) {
  3677. element = rxq->rx_used.next;
  3678. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3679. rxb->skb =
  3680. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3681. if (!rxb->skb) {
  3682. if (net_ratelimit())
  3683. printk(KERN_CRIT DRV_NAME
  3684. ": Can not allocate SKB buffers\n");
  3685. /* We don't reschedule replenish work here -- we will
  3686. * call the restock method and if it still needs
  3687. * more buffers it will schedule replenish */
  3688. break;
  3689. }
  3690. priv->alloc_rxb_skb++;
  3691. list_del(element);
  3692. rxb->dma_addr =
  3693. pci_map_single(priv->pci_dev, rxb->skb->data,
  3694. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3695. list_add_tail(&rxb->list, &rxq->rx_free);
  3696. rxq->free_count++;
  3697. }
  3698. spin_unlock_irqrestore(&rxq->lock, flags);
  3699. spin_lock_irqsave(&priv->lock, flags);
  3700. iwl_rx_queue_restock(priv);
  3701. spin_unlock_irqrestore(&priv->lock, flags);
  3702. }
  3703. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3704. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3705. * This free routine walks the list of POOL entries and if SKB is set to
  3706. * non NULL it is unmapped and freed
  3707. */
  3708. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3709. {
  3710. int i;
  3711. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3712. if (rxq->pool[i].skb != NULL) {
  3713. pci_unmap_single(priv->pci_dev,
  3714. rxq->pool[i].dma_addr,
  3715. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3716. dev_kfree_skb(rxq->pool[i].skb);
  3717. }
  3718. }
  3719. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3720. rxq->dma_addr);
  3721. rxq->bd = NULL;
  3722. }
  3723. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3724. {
  3725. struct iwl_rx_queue *rxq = &priv->rxq;
  3726. struct pci_dev *dev = priv->pci_dev;
  3727. int i;
  3728. spin_lock_init(&rxq->lock);
  3729. INIT_LIST_HEAD(&rxq->rx_free);
  3730. INIT_LIST_HEAD(&rxq->rx_used);
  3731. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3732. if (!rxq->bd)
  3733. return -ENOMEM;
  3734. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3735. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3736. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3737. /* Set us so that we have processed and used all buffers, but have
  3738. * not restocked the Rx queue with fresh buffers */
  3739. rxq->read = rxq->write = 0;
  3740. rxq->free_count = 0;
  3741. rxq->need_update = 0;
  3742. return 0;
  3743. }
  3744. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3745. {
  3746. unsigned long flags;
  3747. int i;
  3748. spin_lock_irqsave(&rxq->lock, flags);
  3749. INIT_LIST_HEAD(&rxq->rx_free);
  3750. INIT_LIST_HEAD(&rxq->rx_used);
  3751. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3752. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3753. /* In the reset function, these buffers may have been allocated
  3754. * to an SKB, so we need to unmap and free potential storage */
  3755. if (rxq->pool[i].skb != NULL) {
  3756. pci_unmap_single(priv->pci_dev,
  3757. rxq->pool[i].dma_addr,
  3758. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3759. priv->alloc_rxb_skb--;
  3760. dev_kfree_skb(rxq->pool[i].skb);
  3761. rxq->pool[i].skb = NULL;
  3762. }
  3763. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3764. }
  3765. /* Set us so that we have processed and used all buffers, but have
  3766. * not restocked the Rx queue with fresh buffers */
  3767. rxq->read = rxq->write = 0;
  3768. rxq->free_count = 0;
  3769. spin_unlock_irqrestore(&rxq->lock, flags);
  3770. }
  3771. /* Convert linear signal-to-noise ratio into dB */
  3772. static u8 ratio2dB[100] = {
  3773. /* 0 1 2 3 4 5 6 7 8 9 */
  3774. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3775. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3776. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3777. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3778. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3779. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3780. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3781. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3782. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3783. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3784. };
  3785. /* Calculates a relative dB value from a ratio of linear
  3786. * (i.e. not dB) signal levels.
  3787. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3788. int iwl_calc_db_from_ratio(int sig_ratio)
  3789. {
  3790. /* Anything above 1000:1 just report as 60 dB */
  3791. if (sig_ratio > 1000)
  3792. return 60;
  3793. /* Above 100:1, divide by 10 and use table,
  3794. * add 20 dB to make up for divide by 10 */
  3795. if (sig_ratio > 100)
  3796. return (20 + (int)ratio2dB[sig_ratio/10]);
  3797. /* We shouldn't see this */
  3798. if (sig_ratio < 1)
  3799. return 0;
  3800. /* Use table for ratios 1:1 - 99:1 */
  3801. return (int)ratio2dB[sig_ratio];
  3802. }
  3803. #define PERFECT_RSSI (-20) /* dBm */
  3804. #define WORST_RSSI (-95) /* dBm */
  3805. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3806. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3807. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3808. * about formulas used below. */
  3809. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3810. {
  3811. int sig_qual;
  3812. int degradation = PERFECT_RSSI - rssi_dbm;
  3813. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3814. * as indicator; formula is (signal dbm - noise dbm).
  3815. * SNR at or above 40 is a great signal (100%).
  3816. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3817. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3818. if (noise_dbm) {
  3819. if (rssi_dbm - noise_dbm >= 40)
  3820. return 100;
  3821. else if (rssi_dbm < noise_dbm)
  3822. return 0;
  3823. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3824. /* Else use just the signal level.
  3825. * This formula is a least squares fit of data points collected and
  3826. * compared with a reference system that had a percentage (%) display
  3827. * for signal quality. */
  3828. } else
  3829. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3830. (15 * RSSI_RANGE + 62 * degradation)) /
  3831. (RSSI_RANGE * RSSI_RANGE);
  3832. if (sig_qual > 100)
  3833. sig_qual = 100;
  3834. else if (sig_qual < 1)
  3835. sig_qual = 0;
  3836. return sig_qual;
  3837. }
  3838. /**
  3839. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3840. *
  3841. * Uses the priv->rx_handlers callback function array to invoke
  3842. * the appropriate handlers, including command responses,
  3843. * frame-received notifications, and other notifications.
  3844. */
  3845. static void iwl_rx_handle(struct iwl_priv *priv)
  3846. {
  3847. struct iwl_rx_mem_buffer *rxb;
  3848. struct iwl_rx_packet *pkt;
  3849. struct iwl_rx_queue *rxq = &priv->rxq;
  3850. u32 r, i;
  3851. int reclaim;
  3852. unsigned long flags;
  3853. r = iwl_hw_get_rx_read(priv);
  3854. i = rxq->read;
  3855. /* Rx interrupt, but nothing sent from uCode */
  3856. if (i == r)
  3857. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3858. while (i != r) {
  3859. rxb = rxq->queue[i];
  3860. /* If an RXB doesn't have a queue slot associated with it
  3861. * then a bug has been introduced in the queue refilling
  3862. * routines -- catch it here */
  3863. BUG_ON(rxb == NULL);
  3864. rxq->queue[i] = NULL;
  3865. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3866. IWL_RX_BUF_SIZE,
  3867. PCI_DMA_FROMDEVICE);
  3868. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3869. /* Reclaim a command buffer only if this packet is a response
  3870. * to a (driver-originated) command.
  3871. * If the packet (e.g. Rx frame) originated from uCode,
  3872. * there is no command buffer to reclaim.
  3873. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3874. * but apparently a few don't get set; catch them here. */
  3875. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3876. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3877. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3878. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3879. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3880. (pkt->hdr.cmd != REPLY_TX);
  3881. /* Based on type of command response or notification,
  3882. * handle those that need handling via function in
  3883. * rx_handlers table. See iwl_setup_rx_handlers() */
  3884. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3885. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3886. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3887. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3888. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3889. } else {
  3890. /* No handling needed */
  3891. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3892. "r %d i %d No handler needed for %s, 0x%02x\n",
  3893. r, i, get_cmd_string(pkt->hdr.cmd),
  3894. pkt->hdr.cmd);
  3895. }
  3896. if (reclaim) {
  3897. /* Invoke any callbacks, transfer the skb to caller,
  3898. * and fire off the (possibly) blocking iwl_send_cmd()
  3899. * as we reclaim the driver command queue */
  3900. if (rxb && rxb->skb)
  3901. iwl_tx_cmd_complete(priv, rxb);
  3902. else
  3903. IWL_WARNING("Claim null rxb?\n");
  3904. }
  3905. /* For now we just don't re-use anything. We can tweak this
  3906. * later to try and re-use notification packets and SKBs that
  3907. * fail to Rx correctly */
  3908. if (rxb->skb != NULL) {
  3909. priv->alloc_rxb_skb--;
  3910. dev_kfree_skb_any(rxb->skb);
  3911. rxb->skb = NULL;
  3912. }
  3913. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3914. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3915. spin_lock_irqsave(&rxq->lock, flags);
  3916. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3917. spin_unlock_irqrestore(&rxq->lock, flags);
  3918. i = (i + 1) & RX_QUEUE_MASK;
  3919. }
  3920. /* Backtrack one entry */
  3921. priv->rxq.read = i;
  3922. iwl_rx_queue_restock(priv);
  3923. }
  3924. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3925. struct iwl_tx_queue *txq)
  3926. {
  3927. u32 reg = 0;
  3928. int rc = 0;
  3929. int txq_id = txq->q.id;
  3930. if (txq->need_update == 0)
  3931. return rc;
  3932. /* if we're trying to save power */
  3933. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3934. /* wake up nic if it's powered down ...
  3935. * uCode will wake up, and interrupt us again, so next
  3936. * time we'll skip this part. */
  3937. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3938. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3939. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3940. iwl_set_bit(priv, CSR_GP_CNTRL,
  3941. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3942. return rc;
  3943. }
  3944. /* restore this queue's parameters in nic hardware. */
  3945. rc = iwl_grab_restricted_access(priv);
  3946. if (rc)
  3947. return rc;
  3948. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3949. txq->q.first_empty | (txq_id << 8));
  3950. iwl_release_restricted_access(priv);
  3951. /* else not in power-save mode, uCode will never sleep when we're
  3952. * trying to tx (during RFKILL, we're not trying to tx). */
  3953. } else
  3954. iwl_write32(priv, HBUS_TARG_WRPTR,
  3955. txq->q.first_empty | (txq_id << 8));
  3956. txq->need_update = 0;
  3957. return rc;
  3958. }
  3959. #ifdef CONFIG_IWLWIFI_DEBUG
  3960. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3961. {
  3962. DECLARE_MAC_BUF(mac);
  3963. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3964. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3965. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3966. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3967. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3968. le32_to_cpu(rxon->filter_flags));
  3969. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3970. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3971. rxon->ofdm_basic_rates);
  3972. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3973. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3974. print_mac(mac, rxon->node_addr));
  3975. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3976. print_mac(mac, rxon->bssid_addr));
  3977. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3978. }
  3979. #endif
  3980. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3981. {
  3982. IWL_DEBUG_ISR("Enabling interrupts\n");
  3983. set_bit(STATUS_INT_ENABLED, &priv->status);
  3984. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3985. }
  3986. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3987. {
  3988. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3989. /* disable interrupts from uCode/NIC to host */
  3990. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3991. /* acknowledge/clear/reset any interrupts still pending
  3992. * from uCode or flow handler (Rx/Tx DMA) */
  3993. iwl_write32(priv, CSR_INT, 0xffffffff);
  3994. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3995. IWL_DEBUG_ISR("Disabled interrupts\n");
  3996. }
  3997. static const char *desc_lookup(int i)
  3998. {
  3999. switch (i) {
  4000. case 1:
  4001. return "FAIL";
  4002. case 2:
  4003. return "BAD_PARAM";
  4004. case 3:
  4005. return "BAD_CHECKSUM";
  4006. case 4:
  4007. return "NMI_INTERRUPT";
  4008. case 5:
  4009. return "SYSASSERT";
  4010. case 6:
  4011. return "FATAL_ERROR";
  4012. }
  4013. return "UNKNOWN";
  4014. }
  4015. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4016. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4017. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  4018. {
  4019. u32 data2, line;
  4020. u32 desc, time, count, base, data1;
  4021. u32 blink1, blink2, ilink1, ilink2;
  4022. int rc;
  4023. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4024. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4025. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4026. return;
  4027. }
  4028. rc = iwl_grab_restricted_access(priv);
  4029. if (rc) {
  4030. IWL_WARNING("Can not read from adapter at this time.\n");
  4031. return;
  4032. }
  4033. count = iwl_read_restricted_mem(priv, base);
  4034. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4035. IWL_ERROR("Start IWL Error Log Dump:\n");
  4036. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4037. priv->status, priv->config, count);
  4038. }
  4039. desc = iwl_read_restricted_mem(priv, base + 1 * sizeof(u32));
  4040. blink1 = iwl_read_restricted_mem(priv, base + 3 * sizeof(u32));
  4041. blink2 = iwl_read_restricted_mem(priv, base + 4 * sizeof(u32));
  4042. ilink1 = iwl_read_restricted_mem(priv, base + 5 * sizeof(u32));
  4043. ilink2 = iwl_read_restricted_mem(priv, base + 6 * sizeof(u32));
  4044. data1 = iwl_read_restricted_mem(priv, base + 7 * sizeof(u32));
  4045. data2 = iwl_read_restricted_mem(priv, base + 8 * sizeof(u32));
  4046. line = iwl_read_restricted_mem(priv, base + 9 * sizeof(u32));
  4047. time = iwl_read_restricted_mem(priv, base + 11 * sizeof(u32));
  4048. IWL_ERROR("Desc Time "
  4049. "data1 data2 line\n");
  4050. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4051. desc_lookup(desc), desc, time, data1, data2, line);
  4052. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4053. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4054. ilink1, ilink2);
  4055. iwl_release_restricted_access(priv);
  4056. }
  4057. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4058. /**
  4059. * iwl_print_event_log - Dump error event log to syslog
  4060. *
  4061. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  4062. */
  4063. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  4064. u32 num_events, u32 mode)
  4065. {
  4066. u32 i;
  4067. u32 base; /* SRAM byte address of event log header */
  4068. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4069. u32 ptr; /* SRAM byte address of log data */
  4070. u32 ev, time, data; /* event log data */
  4071. if (num_events == 0)
  4072. return;
  4073. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4074. if (mode == 0)
  4075. event_size = 2 * sizeof(u32);
  4076. else
  4077. event_size = 3 * sizeof(u32);
  4078. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4079. /* "time" is actually "data" for mode 0 (no timestamp).
  4080. * place event id # at far right for easier visual parsing. */
  4081. for (i = 0; i < num_events; i++) {
  4082. ev = iwl_read_restricted_mem(priv, ptr);
  4083. ptr += sizeof(u32);
  4084. time = iwl_read_restricted_mem(priv, ptr);
  4085. ptr += sizeof(u32);
  4086. if (mode == 0)
  4087. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4088. else {
  4089. data = iwl_read_restricted_mem(priv, ptr);
  4090. ptr += sizeof(u32);
  4091. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4092. }
  4093. }
  4094. }
  4095. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  4096. {
  4097. int rc;
  4098. u32 base; /* SRAM byte address of event log header */
  4099. u32 capacity; /* event log capacity in # entries */
  4100. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4101. u32 num_wraps; /* # times uCode wrapped to top of log */
  4102. u32 next_entry; /* index of next entry to be written by uCode */
  4103. u32 size; /* # entries that we'll print */
  4104. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4105. if (!iwl_hw_valid_rtc_data_addr(base)) {
  4106. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4107. return;
  4108. }
  4109. rc = iwl_grab_restricted_access(priv);
  4110. if (rc) {
  4111. IWL_WARNING("Can not read from adapter at this time.\n");
  4112. return;
  4113. }
  4114. /* event log header */
  4115. capacity = iwl_read_restricted_mem(priv, base);
  4116. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  4117. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  4118. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  4119. size = num_wraps ? capacity : next_entry;
  4120. /* bail out if nothing in log */
  4121. if (size == 0) {
  4122. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4123. iwl_release_restricted_access(priv);
  4124. return;
  4125. }
  4126. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4127. size, num_wraps);
  4128. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4129. * i.e the next one that uCode would fill. */
  4130. if (num_wraps)
  4131. iwl_print_event_log(priv, next_entry,
  4132. capacity - next_entry, mode);
  4133. /* (then/else) start at top of log */
  4134. iwl_print_event_log(priv, 0, next_entry, mode);
  4135. iwl_release_restricted_access(priv);
  4136. }
  4137. /**
  4138. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  4139. */
  4140. static void iwl_irq_handle_error(struct iwl_priv *priv)
  4141. {
  4142. /* Set the FW error flag -- cleared on iwl_down */
  4143. set_bit(STATUS_FW_ERROR, &priv->status);
  4144. /* Cancel currently queued command. */
  4145. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4146. #ifdef CONFIG_IWLWIFI_DEBUG
  4147. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  4148. iwl_dump_nic_error_log(priv);
  4149. iwl_dump_nic_event_log(priv);
  4150. iwl_print_rx_config_cmd(&priv->staging_rxon);
  4151. }
  4152. #endif
  4153. wake_up_interruptible(&priv->wait_command_queue);
  4154. /* Keep the restart process from trying to send host
  4155. * commands by clearing the INIT status bit */
  4156. clear_bit(STATUS_READY, &priv->status);
  4157. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4158. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4159. "Restarting adapter due to uCode error.\n");
  4160. if (iwl_is_associated(priv)) {
  4161. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4162. sizeof(priv->recovery_rxon));
  4163. priv->error_recovering = 1;
  4164. }
  4165. queue_work(priv->workqueue, &priv->restart);
  4166. }
  4167. }
  4168. static void iwl_error_recovery(struct iwl_priv *priv)
  4169. {
  4170. unsigned long flags;
  4171. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4172. sizeof(priv->staging_rxon));
  4173. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4174. iwl_commit_rxon(priv);
  4175. iwl_rxon_add_station(priv, priv->bssid, 1);
  4176. spin_lock_irqsave(&priv->lock, flags);
  4177. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4178. priv->error_recovering = 0;
  4179. spin_unlock_irqrestore(&priv->lock, flags);
  4180. }
  4181. static void iwl_irq_tasklet(struct iwl_priv *priv)
  4182. {
  4183. u32 inta, handled = 0;
  4184. u32 inta_fh;
  4185. unsigned long flags;
  4186. #ifdef CONFIG_IWLWIFI_DEBUG
  4187. u32 inta_mask;
  4188. #endif
  4189. spin_lock_irqsave(&priv->lock, flags);
  4190. /* Ack/clear/reset pending uCode interrupts.
  4191. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4192. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4193. inta = iwl_read32(priv, CSR_INT);
  4194. iwl_write32(priv, CSR_INT, inta);
  4195. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4196. * Any new interrupts that happen after this, either while we're
  4197. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4198. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4199. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4200. #ifdef CONFIG_IWLWIFI_DEBUG
  4201. if (iwl_debug_level & IWL_DL_ISR) {
  4202. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4203. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4204. inta, inta_mask, inta_fh);
  4205. }
  4206. #endif
  4207. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4208. * atomic, make sure that inta covers all the interrupts that
  4209. * we've discovered, even if FH interrupt came in just after
  4210. * reading CSR_INT. */
  4211. if (inta_fh & CSR_FH_INT_RX_MASK)
  4212. inta |= CSR_INT_BIT_FH_RX;
  4213. if (inta_fh & CSR_FH_INT_TX_MASK)
  4214. inta |= CSR_INT_BIT_FH_TX;
  4215. /* Now service all interrupt bits discovered above. */
  4216. if (inta & CSR_INT_BIT_HW_ERR) {
  4217. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4218. /* Tell the device to stop sending interrupts */
  4219. iwl_disable_interrupts(priv);
  4220. iwl_irq_handle_error(priv);
  4221. handled |= CSR_INT_BIT_HW_ERR;
  4222. spin_unlock_irqrestore(&priv->lock, flags);
  4223. return;
  4224. }
  4225. #ifdef CONFIG_IWLWIFI_DEBUG
  4226. if (iwl_debug_level & (IWL_DL_ISR)) {
  4227. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4228. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  4229. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  4230. /* Alive notification via Rx interrupt will do the real work */
  4231. if (inta & CSR_INT_BIT_ALIVE)
  4232. IWL_DEBUG_ISR("Alive interrupt\n");
  4233. }
  4234. #endif
  4235. /* Safely ignore these bits for debug checks below */
  4236. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  4237. /* HW RF KILL switch toggled (4965 only) */
  4238. if (inta & CSR_INT_BIT_RF_KILL) {
  4239. int hw_rf_kill = 0;
  4240. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  4241. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4242. hw_rf_kill = 1;
  4243. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4244. "RF_KILL bit toggled to %s.\n",
  4245. hw_rf_kill ? "disable radio":"enable radio");
  4246. /* Queue restart only if RF_KILL switch was set to "kill"
  4247. * when we loaded driver, and is now set to "enable".
  4248. * After we're Alive, RF_KILL gets handled by
  4249. * iwl_rx_card_state_notif() */
  4250. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
  4251. queue_work(priv->workqueue, &priv->restart);
  4252. handled |= CSR_INT_BIT_RF_KILL;
  4253. }
  4254. /* Chip got too hot and stopped itself (4965 only) */
  4255. if (inta & CSR_INT_BIT_CT_KILL) {
  4256. IWL_ERROR("Microcode CT kill error detected.\n");
  4257. handled |= CSR_INT_BIT_CT_KILL;
  4258. }
  4259. /* Error detected by uCode */
  4260. if (inta & CSR_INT_BIT_SW_ERR) {
  4261. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4262. inta);
  4263. iwl_irq_handle_error(priv);
  4264. handled |= CSR_INT_BIT_SW_ERR;
  4265. }
  4266. /* uCode wakes up after power-down sleep */
  4267. if (inta & CSR_INT_BIT_WAKEUP) {
  4268. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4269. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  4270. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4271. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4272. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4273. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4274. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4275. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4276. handled |= CSR_INT_BIT_WAKEUP;
  4277. }
  4278. /* All uCode command responses, including Tx command responses,
  4279. * Rx "responses" (frame-received notification), and other
  4280. * notifications from uCode come through here*/
  4281. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4282. iwl_rx_handle(priv);
  4283. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4284. }
  4285. if (inta & CSR_INT_BIT_FH_TX) {
  4286. IWL_DEBUG_ISR("Tx interrupt\n");
  4287. handled |= CSR_INT_BIT_FH_TX;
  4288. }
  4289. if (inta & ~handled)
  4290. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4291. if (inta & ~CSR_INI_SET_MASK) {
  4292. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4293. inta & ~CSR_INI_SET_MASK);
  4294. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4295. }
  4296. /* Re-enable all interrupts */
  4297. iwl_enable_interrupts(priv);
  4298. #ifdef CONFIG_IWLWIFI_DEBUG
  4299. if (iwl_debug_level & (IWL_DL_ISR)) {
  4300. inta = iwl_read32(priv, CSR_INT);
  4301. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4302. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4303. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4304. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4305. }
  4306. #endif
  4307. spin_unlock_irqrestore(&priv->lock, flags);
  4308. }
  4309. static irqreturn_t iwl_isr(int irq, void *data)
  4310. {
  4311. struct iwl_priv *priv = data;
  4312. u32 inta, inta_mask;
  4313. u32 inta_fh;
  4314. if (!priv)
  4315. return IRQ_NONE;
  4316. spin_lock(&priv->lock);
  4317. /* Disable (but don't clear!) interrupts here to avoid
  4318. * back-to-back ISRs and sporadic interrupts from our NIC.
  4319. * If we have something to service, the tasklet will re-enable ints.
  4320. * If we *don't* have something, we'll re-enable before leaving here. */
  4321. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4322. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4323. /* Discover which interrupts are active/pending */
  4324. inta = iwl_read32(priv, CSR_INT);
  4325. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4326. /* Ignore interrupt if there's nothing in NIC to service.
  4327. * This may be due to IRQ shared with another device,
  4328. * or due to sporadic interrupts thrown from our NIC. */
  4329. if (!inta && !inta_fh) {
  4330. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4331. goto none;
  4332. }
  4333. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4334. /* Hardware disappeared */
  4335. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4336. goto none;
  4337. }
  4338. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4339. inta, inta_mask, inta_fh);
  4340. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4341. tasklet_schedule(&priv->irq_tasklet);
  4342. spin_unlock(&priv->lock);
  4343. return IRQ_HANDLED;
  4344. none:
  4345. /* re-enable interrupts here since we don't have anything to service. */
  4346. iwl_enable_interrupts(priv);
  4347. spin_unlock(&priv->lock);
  4348. return IRQ_NONE;
  4349. }
  4350. /************************** EEPROM BANDS ****************************
  4351. *
  4352. * The iwl_eeprom_band definitions below provide the mapping from the
  4353. * EEPROM contents to the specific channel number supported for each
  4354. * band.
  4355. *
  4356. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4357. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4358. * The specific geography and calibration information for that channel
  4359. * is contained in the eeprom map itself.
  4360. *
  4361. * During init, we copy the eeprom information and channel map
  4362. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4363. *
  4364. * channel_map_24/52 provides the index in the channel_info array for a
  4365. * given channel. We have to have two separate maps as there is channel
  4366. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4367. * band_2
  4368. *
  4369. * A value of 0xff stored in the channel_map indicates that the channel
  4370. * is not supported by the hardware at all.
  4371. *
  4372. * A value of 0xfe in the channel_map indicates that the channel is not
  4373. * valid for Tx with the current hardware. This means that
  4374. * while the system can tune and receive on a given channel, it may not
  4375. * be able to associate or transmit any frames on that
  4376. * channel. There is no corresponding channel information for that
  4377. * entry.
  4378. *
  4379. *********************************************************************/
  4380. /* 2.4 GHz */
  4381. static const u8 iwl_eeprom_band_1[14] = {
  4382. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4383. };
  4384. /* 5.2 GHz bands */
  4385. static const u8 iwl_eeprom_band_2[] = {
  4386. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4387. };
  4388. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4389. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4390. };
  4391. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4392. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4393. };
  4394. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4395. 145, 149, 153, 157, 161, 165
  4396. };
  4397. static u8 iwl_eeprom_band_6[] = { /* 2.4 FAT channel */
  4398. 1, 2, 3, 4, 5, 6, 7
  4399. };
  4400. static u8 iwl_eeprom_band_7[] = { /* 5.2 FAT channel */
  4401. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4402. };
  4403. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4404. int *eeprom_ch_count,
  4405. const struct iwl_eeprom_channel
  4406. **eeprom_ch_info,
  4407. const u8 **eeprom_ch_index)
  4408. {
  4409. switch (band) {
  4410. case 1: /* 2.4GHz band */
  4411. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4412. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4413. *eeprom_ch_index = iwl_eeprom_band_1;
  4414. break;
  4415. case 2: /* 5.2GHz band */
  4416. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4417. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4418. *eeprom_ch_index = iwl_eeprom_band_2;
  4419. break;
  4420. case 3: /* 5.2GHz band */
  4421. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4422. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4423. *eeprom_ch_index = iwl_eeprom_band_3;
  4424. break;
  4425. case 4: /* 5.2GHz band */
  4426. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4427. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4428. *eeprom_ch_index = iwl_eeprom_band_4;
  4429. break;
  4430. case 5: /* 5.2GHz band */
  4431. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4432. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4433. *eeprom_ch_index = iwl_eeprom_band_5;
  4434. break;
  4435. case 6:
  4436. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_6);
  4437. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4438. *eeprom_ch_index = iwl_eeprom_band_6;
  4439. break;
  4440. case 7:
  4441. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_7);
  4442. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4443. *eeprom_ch_index = iwl_eeprom_band_7;
  4444. break;
  4445. default:
  4446. BUG();
  4447. return;
  4448. }
  4449. }
  4450. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4451. int phymode, u16 channel)
  4452. {
  4453. int i;
  4454. switch (phymode) {
  4455. case MODE_IEEE80211A:
  4456. for (i = 14; i < priv->channel_count; i++) {
  4457. if (priv->channel_info[i].channel == channel)
  4458. return &priv->channel_info[i];
  4459. }
  4460. break;
  4461. case MODE_IEEE80211B:
  4462. case MODE_IEEE80211G:
  4463. if (channel >= 1 && channel <= 14)
  4464. return &priv->channel_info[channel - 1];
  4465. break;
  4466. }
  4467. return NULL;
  4468. }
  4469. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4470. ? # x " " : "")
  4471. static int iwl_init_channel_map(struct iwl_priv *priv)
  4472. {
  4473. int eeprom_ch_count = 0;
  4474. const u8 *eeprom_ch_index = NULL;
  4475. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4476. int band, ch;
  4477. struct iwl_channel_info *ch_info;
  4478. if (priv->channel_count) {
  4479. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4480. return 0;
  4481. }
  4482. if (priv->eeprom.version < 0x2f) {
  4483. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4484. priv->eeprom.version);
  4485. return -EINVAL;
  4486. }
  4487. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4488. priv->channel_count =
  4489. ARRAY_SIZE(iwl_eeprom_band_1) +
  4490. ARRAY_SIZE(iwl_eeprom_band_2) +
  4491. ARRAY_SIZE(iwl_eeprom_band_3) +
  4492. ARRAY_SIZE(iwl_eeprom_band_4) +
  4493. ARRAY_SIZE(iwl_eeprom_band_5);
  4494. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4495. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4496. priv->channel_count, GFP_KERNEL);
  4497. if (!priv->channel_info) {
  4498. IWL_ERROR("Could not allocate channel_info\n");
  4499. priv->channel_count = 0;
  4500. return -ENOMEM;
  4501. }
  4502. ch_info = priv->channel_info;
  4503. /* Loop through the 5 EEPROM bands adding them in order to the
  4504. * channel map we maintain (that contains additional information than
  4505. * what just in the EEPROM) */
  4506. for (band = 1; band <= 5; band++) {
  4507. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4508. &eeprom_ch_info, &eeprom_ch_index);
  4509. /* Loop through each band adding each of the channels */
  4510. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4511. ch_info->channel = eeprom_ch_index[ch];
  4512. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4513. MODE_IEEE80211A;
  4514. /* permanently store EEPROM's channel regulatory flags
  4515. * and max power in channel info database. */
  4516. ch_info->eeprom = eeprom_ch_info[ch];
  4517. /* Copy the run-time flags so they are there even on
  4518. * invalid channels */
  4519. ch_info->flags = eeprom_ch_info[ch].flags;
  4520. if (!(is_channel_valid(ch_info))) {
  4521. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4522. "No traffic\n",
  4523. ch_info->channel,
  4524. ch_info->flags,
  4525. is_channel_a_band(ch_info) ?
  4526. "5.2" : "2.4");
  4527. ch_info++;
  4528. continue;
  4529. }
  4530. /* Initialize regulatory-based run-time data */
  4531. ch_info->max_power_avg = ch_info->curr_txpow =
  4532. eeprom_ch_info[ch].max_power_avg;
  4533. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4534. ch_info->min_power = 0;
  4535. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4536. " %ddBm): Ad-Hoc %ssupported\n",
  4537. ch_info->channel,
  4538. is_channel_a_band(ch_info) ?
  4539. "5.2" : "2.4",
  4540. CHECK_AND_PRINT(IBSS),
  4541. CHECK_AND_PRINT(ACTIVE),
  4542. CHECK_AND_PRINT(RADAR),
  4543. CHECK_AND_PRINT(WIDE),
  4544. CHECK_AND_PRINT(NARROW),
  4545. CHECK_AND_PRINT(DFS),
  4546. eeprom_ch_info[ch].flags,
  4547. eeprom_ch_info[ch].max_power_avg,
  4548. ((eeprom_ch_info[ch].
  4549. flags & EEPROM_CHANNEL_IBSS)
  4550. && !(eeprom_ch_info[ch].
  4551. flags & EEPROM_CHANNEL_RADAR))
  4552. ? "" : "not ");
  4553. /* Set the user_txpower_limit to the highest power
  4554. * supported by any channel */
  4555. if (eeprom_ch_info[ch].max_power_avg >
  4556. priv->user_txpower_limit)
  4557. priv->user_txpower_limit =
  4558. eeprom_ch_info[ch].max_power_avg;
  4559. ch_info++;
  4560. }
  4561. }
  4562. for (band = 6; band <= 7; band++) {
  4563. int phymode;
  4564. u8 fat_extension_chan;
  4565. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4566. &eeprom_ch_info, &eeprom_ch_index);
  4567. phymode = (band == 6) ? MODE_IEEE80211B : MODE_IEEE80211A;
  4568. /* Loop through each band adding each of the channels */
  4569. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4570. if ((band == 6) &&
  4571. ((eeprom_ch_index[ch] == 5) ||
  4572. (eeprom_ch_index[ch] == 6) ||
  4573. (eeprom_ch_index[ch] == 7)))
  4574. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4575. else
  4576. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4577. iwl4965_set_fat_chan_info(priv, phymode,
  4578. eeprom_ch_index[ch],
  4579. &(eeprom_ch_info[ch]),
  4580. fat_extension_chan);
  4581. iwl4965_set_fat_chan_info(priv, phymode,
  4582. (eeprom_ch_index[ch] + 4),
  4583. &(eeprom_ch_info[ch]),
  4584. HT_IE_EXT_CHANNEL_BELOW);
  4585. }
  4586. }
  4587. return 0;
  4588. }
  4589. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4590. * sending probe req. This should be set long enough to hear probe responses
  4591. * from more than one AP. */
  4592. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4593. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4594. /* For faster active scanning, scan will move to the next channel if fewer than
  4595. * PLCP_QUIET_THRESH packets are heard on this channel within
  4596. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4597. * time if it's a quiet channel (nothing responded to our probe, and there's
  4598. * no other traffic).
  4599. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4600. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4601. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4602. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4603. * Must be set longer than active dwell time.
  4604. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4605. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4606. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4607. #define IWL_PASSIVE_DWELL_BASE (100)
  4608. #define IWL_CHANNEL_TUNE_TIME 5
  4609. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4610. {
  4611. if (phymode == MODE_IEEE80211A)
  4612. return IWL_ACTIVE_DWELL_TIME_52;
  4613. else
  4614. return IWL_ACTIVE_DWELL_TIME_24;
  4615. }
  4616. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4617. {
  4618. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4619. u16 passive = (phymode != MODE_IEEE80211A) ?
  4620. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4621. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4622. if (iwl_is_associated(priv)) {
  4623. /* If we're associated, we clamp the maximum passive
  4624. * dwell time to be 98% of the beacon interval (minus
  4625. * 2 * channel tune time) */
  4626. passive = priv->beacon_int;
  4627. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4628. passive = IWL_PASSIVE_DWELL_BASE;
  4629. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4630. }
  4631. if (passive <= active)
  4632. passive = active + 1;
  4633. return passive;
  4634. }
  4635. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4636. u8 is_active, u8 direct_mask,
  4637. struct iwl_scan_channel *scan_ch)
  4638. {
  4639. const struct ieee80211_channel *channels = NULL;
  4640. const struct ieee80211_hw_mode *hw_mode;
  4641. const struct iwl_channel_info *ch_info;
  4642. u16 passive_dwell = 0;
  4643. u16 active_dwell = 0;
  4644. int added, i;
  4645. hw_mode = iwl_get_hw_mode(priv, phymode);
  4646. if (!hw_mode)
  4647. return 0;
  4648. channels = hw_mode->channels;
  4649. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4650. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4651. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4652. if (channels[i].chan ==
  4653. le16_to_cpu(priv->active_rxon.channel)) {
  4654. if (iwl_is_associated(priv)) {
  4655. IWL_DEBUG_SCAN
  4656. ("Skipping current channel %d\n",
  4657. le16_to_cpu(priv->active_rxon.channel));
  4658. continue;
  4659. }
  4660. } else if (priv->only_active_channel)
  4661. continue;
  4662. scan_ch->channel = channels[i].chan;
  4663. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4664. if (!is_channel_valid(ch_info)) {
  4665. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4666. scan_ch->channel);
  4667. continue;
  4668. }
  4669. if (!is_active || is_channel_passive(ch_info) ||
  4670. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4671. scan_ch->type = 0; /* passive */
  4672. else
  4673. scan_ch->type = 1; /* active */
  4674. if (scan_ch->type & 1)
  4675. scan_ch->type |= (direct_mask << 1);
  4676. if (is_channel_narrow(ch_info))
  4677. scan_ch->type |= (1 << 7);
  4678. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4679. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4680. /* Set power levels to defaults */
  4681. scan_ch->tpc.dsp_atten = 110;
  4682. /* scan_pwr_info->tpc.dsp_atten; */
  4683. /*scan_pwr_info->tpc.tx_gain; */
  4684. if (phymode == MODE_IEEE80211A)
  4685. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4686. else {
  4687. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4688. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4689. * power level
  4690. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4691. */
  4692. }
  4693. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4694. scan_ch->channel,
  4695. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4696. (scan_ch->type & 1) ?
  4697. active_dwell : passive_dwell);
  4698. scan_ch++;
  4699. added++;
  4700. }
  4701. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4702. return added;
  4703. }
  4704. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4705. {
  4706. int i, j;
  4707. for (i = 0; i < 3; i++) {
  4708. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4709. for (j = 0; j < hw_mode->num_channels; j++)
  4710. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4711. }
  4712. }
  4713. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4714. struct ieee80211_rate *rates)
  4715. {
  4716. int i;
  4717. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4718. rates[i].rate = iwl_rates[i].ieee * 5;
  4719. rates[i].val = i; /* Rate scaling will work on indexes */
  4720. rates[i].val2 = i;
  4721. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4722. /* Only OFDM have the bits-per-symbol set */
  4723. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4724. rates[i].flags |= IEEE80211_RATE_OFDM;
  4725. else {
  4726. /*
  4727. * If CCK 1M then set rate flag to CCK else CCK_2
  4728. * which is CCK | PREAMBLE2
  4729. */
  4730. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4731. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4732. }
  4733. /* Set up which ones are basic rates... */
  4734. if (IWL_BASIC_RATES_MASK & (1 << i))
  4735. rates[i].flags |= IEEE80211_RATE_BASIC;
  4736. }
  4737. iwl4965_init_hw_rates(priv, rates);
  4738. }
  4739. /**
  4740. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4741. */
  4742. static int iwl_init_geos(struct iwl_priv *priv)
  4743. {
  4744. struct iwl_channel_info *ch;
  4745. struct ieee80211_hw_mode *modes;
  4746. struct ieee80211_channel *channels;
  4747. struct ieee80211_channel *geo_ch;
  4748. struct ieee80211_rate *rates;
  4749. int i = 0;
  4750. enum {
  4751. A = 0,
  4752. B = 1,
  4753. G = 2,
  4754. A_11N = 3,
  4755. G_11N = 4,
  4756. };
  4757. int mode_count = 5;
  4758. if (priv->modes) {
  4759. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4760. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4761. return 0;
  4762. }
  4763. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4764. GFP_KERNEL);
  4765. if (!modes)
  4766. return -ENOMEM;
  4767. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4768. priv->channel_count, GFP_KERNEL);
  4769. if (!channels) {
  4770. kfree(modes);
  4771. return -ENOMEM;
  4772. }
  4773. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4774. GFP_KERNEL);
  4775. if (!rates) {
  4776. kfree(modes);
  4777. kfree(channels);
  4778. return -ENOMEM;
  4779. }
  4780. /* 0 = 802.11a
  4781. * 1 = 802.11b
  4782. * 2 = 802.11g
  4783. */
  4784. /* 5.2GHz channels start after the 2.4GHz channels */
  4785. modes[A].mode = MODE_IEEE80211A;
  4786. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4787. modes[A].rates = rates;
  4788. modes[A].num_rates = 8; /* just OFDM */
  4789. modes[A].rates = &rates[4];
  4790. modes[A].num_channels = 0;
  4791. modes[B].mode = MODE_IEEE80211B;
  4792. modes[B].channels = channels;
  4793. modes[B].rates = rates;
  4794. modes[B].num_rates = 4; /* just CCK */
  4795. modes[B].num_channels = 0;
  4796. modes[G].mode = MODE_IEEE80211G;
  4797. modes[G].channels = channels;
  4798. modes[G].rates = rates;
  4799. modes[G].num_rates = 12; /* OFDM & CCK */
  4800. modes[G].num_channels = 0;
  4801. modes[G_11N].mode = MODE_IEEE80211G;
  4802. modes[G_11N].channels = channels;
  4803. modes[G_11N].num_rates = 13; /* OFDM & CCK */
  4804. modes[G_11N].rates = rates;
  4805. modes[G_11N].num_channels = 0;
  4806. modes[A_11N].mode = MODE_IEEE80211A;
  4807. modes[A_11N].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4808. modes[A_11N].rates = &rates[4];
  4809. modes[A_11N].num_rates = 9; /* just OFDM */
  4810. modes[A_11N].num_channels = 0;
  4811. priv->ieee_channels = channels;
  4812. priv->ieee_rates = rates;
  4813. iwl_init_hw_rates(priv, rates);
  4814. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4815. ch = &priv->channel_info[i];
  4816. if (!is_channel_valid(ch)) {
  4817. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4818. "skipping.\n",
  4819. ch->channel, is_channel_a_band(ch) ?
  4820. "5.2" : "2.4");
  4821. continue;
  4822. }
  4823. if (is_channel_a_band(ch)) {
  4824. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4825. modes[A_11N].num_channels++;
  4826. } else {
  4827. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4828. modes[G].num_channels++;
  4829. modes[G_11N].num_channels++;
  4830. }
  4831. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4832. geo_ch->chan = ch->channel;
  4833. geo_ch->power_level = ch->max_power_avg;
  4834. geo_ch->antenna_max = 0xff;
  4835. if (is_channel_valid(ch)) {
  4836. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4837. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4838. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4839. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4840. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4841. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4842. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4843. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4844. priv->max_channel_txpower_limit =
  4845. ch->max_power_avg;
  4846. }
  4847. geo_ch->val = geo_ch->flag;
  4848. }
  4849. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4850. printk(KERN_INFO DRV_NAME
  4851. ": Incorrectly detected BG card as ABG. Please send "
  4852. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4853. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4854. priv->is_abg = 0;
  4855. }
  4856. printk(KERN_INFO DRV_NAME
  4857. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4858. modes[G].num_channels, modes[A].num_channels);
  4859. /*
  4860. * NOTE: We register these in preference of order -- the
  4861. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4862. * a phymode based on rates or AP capabilities but seems to
  4863. * configure it purely on if the channel being configured
  4864. * is supported by a mode -- and the first match is taken
  4865. */
  4866. if (modes[G].num_channels)
  4867. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4868. if (modes[B].num_channels)
  4869. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4870. if (modes[A].num_channels)
  4871. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4872. priv->modes = modes;
  4873. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4874. return 0;
  4875. }
  4876. /******************************************************************************
  4877. *
  4878. * uCode download functions
  4879. *
  4880. ******************************************************************************/
  4881. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4882. {
  4883. if (priv->ucode_code.v_addr != NULL) {
  4884. pci_free_consistent(priv->pci_dev,
  4885. priv->ucode_code.len,
  4886. priv->ucode_code.v_addr,
  4887. priv->ucode_code.p_addr);
  4888. priv->ucode_code.v_addr = NULL;
  4889. }
  4890. if (priv->ucode_data.v_addr != NULL) {
  4891. pci_free_consistent(priv->pci_dev,
  4892. priv->ucode_data.len,
  4893. priv->ucode_data.v_addr,
  4894. priv->ucode_data.p_addr);
  4895. priv->ucode_data.v_addr = NULL;
  4896. }
  4897. if (priv->ucode_data_backup.v_addr != NULL) {
  4898. pci_free_consistent(priv->pci_dev,
  4899. priv->ucode_data_backup.len,
  4900. priv->ucode_data_backup.v_addr,
  4901. priv->ucode_data_backup.p_addr);
  4902. priv->ucode_data_backup.v_addr = NULL;
  4903. }
  4904. if (priv->ucode_init.v_addr != NULL) {
  4905. pci_free_consistent(priv->pci_dev,
  4906. priv->ucode_init.len,
  4907. priv->ucode_init.v_addr,
  4908. priv->ucode_init.p_addr);
  4909. priv->ucode_init.v_addr = NULL;
  4910. }
  4911. if (priv->ucode_init_data.v_addr != NULL) {
  4912. pci_free_consistent(priv->pci_dev,
  4913. priv->ucode_init_data.len,
  4914. priv->ucode_init_data.v_addr,
  4915. priv->ucode_init_data.p_addr);
  4916. priv->ucode_init_data.v_addr = NULL;
  4917. }
  4918. if (priv->ucode_boot.v_addr != NULL) {
  4919. pci_free_consistent(priv->pci_dev,
  4920. priv->ucode_boot.len,
  4921. priv->ucode_boot.v_addr,
  4922. priv->ucode_boot.p_addr);
  4923. priv->ucode_boot.v_addr = NULL;
  4924. }
  4925. }
  4926. /**
  4927. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4928. * looking at all data.
  4929. */
  4930. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4931. {
  4932. u32 val;
  4933. u32 save_len = len;
  4934. int rc = 0;
  4935. u32 errcnt;
  4936. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4937. rc = iwl_grab_restricted_access(priv);
  4938. if (rc)
  4939. return rc;
  4940. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4941. errcnt = 0;
  4942. for (; len > 0; len -= sizeof(u32), image++) {
  4943. /* read data comes through single port, auto-incr addr */
  4944. /* NOTE: Use the debugless read so we don't flood kernel log
  4945. * if IWL_DL_IO is set */
  4946. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4947. if (val != le32_to_cpu(*image)) {
  4948. IWL_ERROR("uCode INST section is invalid at "
  4949. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4950. save_len - len, val, le32_to_cpu(*image));
  4951. rc = -EIO;
  4952. errcnt++;
  4953. if (errcnt >= 20)
  4954. break;
  4955. }
  4956. }
  4957. iwl_release_restricted_access(priv);
  4958. if (!errcnt)
  4959. IWL_DEBUG_INFO
  4960. ("ucode image in INSTRUCTION memory is good\n");
  4961. return rc;
  4962. }
  4963. /**
  4964. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4965. * using sample data 100 bytes apart. If these sample points are good,
  4966. * it's a pretty good bet that everything between them is good, too.
  4967. */
  4968. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4969. {
  4970. u32 val;
  4971. int rc = 0;
  4972. u32 errcnt = 0;
  4973. u32 i;
  4974. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4975. rc = iwl_grab_restricted_access(priv);
  4976. if (rc)
  4977. return rc;
  4978. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4979. /* read data comes through single port, auto-incr addr */
  4980. /* NOTE: Use the debugless read so we don't flood kernel log
  4981. * if IWL_DL_IO is set */
  4982. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4983. i + RTC_INST_LOWER_BOUND);
  4984. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4985. if (val != le32_to_cpu(*image)) {
  4986. #if 0 /* Enable this if you want to see details */
  4987. IWL_ERROR("uCode INST section is invalid at "
  4988. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4989. i, val, *image);
  4990. #endif
  4991. rc = -EIO;
  4992. errcnt++;
  4993. if (errcnt >= 3)
  4994. break;
  4995. }
  4996. }
  4997. iwl_release_restricted_access(priv);
  4998. return rc;
  4999. }
  5000. /**
  5001. * iwl_verify_ucode - determine which instruction image is in SRAM,
  5002. * and verify its contents
  5003. */
  5004. static int iwl_verify_ucode(struct iwl_priv *priv)
  5005. {
  5006. __le32 *image;
  5007. u32 len;
  5008. int rc = 0;
  5009. /* Try bootstrap */
  5010. image = (__le32 *)priv->ucode_boot.v_addr;
  5011. len = priv->ucode_boot.len;
  5012. rc = iwl_verify_inst_sparse(priv, image, len);
  5013. if (rc == 0) {
  5014. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5015. return 0;
  5016. }
  5017. /* Try initialize */
  5018. image = (__le32 *)priv->ucode_init.v_addr;
  5019. len = priv->ucode_init.len;
  5020. rc = iwl_verify_inst_sparse(priv, image, len);
  5021. if (rc == 0) {
  5022. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5023. return 0;
  5024. }
  5025. /* Try runtime/protocol */
  5026. image = (__le32 *)priv->ucode_code.v_addr;
  5027. len = priv->ucode_code.len;
  5028. rc = iwl_verify_inst_sparse(priv, image, len);
  5029. if (rc == 0) {
  5030. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5031. return 0;
  5032. }
  5033. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5034. /* Show first several data entries in instruction SRAM.
  5035. * Selection of bootstrap image is arbitrary. */
  5036. image = (__le32 *)priv->ucode_boot.v_addr;
  5037. len = priv->ucode_boot.len;
  5038. rc = iwl_verify_inst_full(priv, image, len);
  5039. return rc;
  5040. }
  5041. /* check contents of special bootstrap uCode SRAM */
  5042. static int iwl_verify_bsm(struct iwl_priv *priv)
  5043. {
  5044. __le32 *image = priv->ucode_boot.v_addr;
  5045. u32 len = priv->ucode_boot.len;
  5046. u32 reg;
  5047. u32 val;
  5048. IWL_DEBUG_INFO("Begin verify bsm\n");
  5049. /* verify BSM SRAM contents */
  5050. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  5051. for (reg = BSM_SRAM_LOWER_BOUND;
  5052. reg < BSM_SRAM_LOWER_BOUND + len;
  5053. reg += sizeof(u32), image ++) {
  5054. val = iwl_read_restricted_reg(priv, reg);
  5055. if (val != le32_to_cpu(*image)) {
  5056. IWL_ERROR("BSM uCode verification failed at "
  5057. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5058. BSM_SRAM_LOWER_BOUND,
  5059. reg - BSM_SRAM_LOWER_BOUND, len,
  5060. val, le32_to_cpu(*image));
  5061. return -EIO;
  5062. }
  5063. }
  5064. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5065. return 0;
  5066. }
  5067. /**
  5068. * iwl_load_bsm - Load bootstrap instructions
  5069. *
  5070. * BSM operation:
  5071. *
  5072. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5073. * in special SRAM that does not power down during RFKILL. When powering back
  5074. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5075. * the bootstrap program into the on-board processor, and starts it.
  5076. *
  5077. * The bootstrap program loads (via DMA) instructions and data for a new
  5078. * program from host DRAM locations indicated by the host driver in the
  5079. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5080. * automatically.
  5081. *
  5082. * When initializing the NIC, the host driver points the BSM to the
  5083. * "initialize" uCode image. This uCode sets up some internal data, then
  5084. * notifies host via "initialize alive" that it is complete.
  5085. *
  5086. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5087. * normal runtime uCode instructions and a backup uCode data cache buffer
  5088. * (filled initially with starting data values for the on-board processor),
  5089. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5090. * which begins normal operation.
  5091. *
  5092. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5093. * the backup data cache in DRAM before SRAM is powered down.
  5094. *
  5095. * When powering back up, the BSM loads the bootstrap program. This reloads
  5096. * the runtime uCode instructions and the backup data cache into SRAM,
  5097. * and re-launches the runtime uCode from where it left off.
  5098. */
  5099. static int iwl_load_bsm(struct iwl_priv *priv)
  5100. {
  5101. __le32 *image = priv->ucode_boot.v_addr;
  5102. u32 len = priv->ucode_boot.len;
  5103. dma_addr_t pinst;
  5104. dma_addr_t pdata;
  5105. u32 inst_len;
  5106. u32 data_len;
  5107. int rc;
  5108. int i;
  5109. u32 done;
  5110. u32 reg_offset;
  5111. IWL_DEBUG_INFO("Begin load bsm\n");
  5112. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5113. if (len > IWL_MAX_BSM_SIZE)
  5114. return -EINVAL;
  5115. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5116. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  5117. * NOTE: iwl_initialize_alive_start() will replace these values,
  5118. * after the "initialize" uCode has run, to point to
  5119. * runtime/protocol instructions and backup data cache. */
  5120. pinst = priv->ucode_init.p_addr >> 4;
  5121. pdata = priv->ucode_init_data.p_addr >> 4;
  5122. inst_len = priv->ucode_init.len;
  5123. data_len = priv->ucode_init_data.len;
  5124. rc = iwl_grab_restricted_access(priv);
  5125. if (rc)
  5126. return rc;
  5127. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5128. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5129. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5130. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5131. /* Fill BSM memory with bootstrap instructions */
  5132. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5133. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5134. reg_offset += sizeof(u32), image++)
  5135. _iwl_write_restricted_reg(priv, reg_offset,
  5136. le32_to_cpu(*image));
  5137. rc = iwl_verify_bsm(priv);
  5138. if (rc) {
  5139. iwl_release_restricted_access(priv);
  5140. return rc;
  5141. }
  5142. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5143. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5144. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  5145. RTC_INST_LOWER_BOUND);
  5146. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5147. /* Load bootstrap code into instruction SRAM now,
  5148. * to prepare to load "initialize" uCode */
  5149. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5150. BSM_WR_CTRL_REG_BIT_START);
  5151. /* Wait for load of bootstrap uCode to finish */
  5152. for (i = 0; i < 100; i++) {
  5153. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  5154. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5155. break;
  5156. udelay(10);
  5157. }
  5158. if (i < 100)
  5159. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5160. else {
  5161. IWL_ERROR("BSM write did not complete!\n");
  5162. return -EIO;
  5163. }
  5164. /* Enable future boot loads whenever power management unit triggers it
  5165. * (e.g. when powering back up after power-save shutdown) */
  5166. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  5167. BSM_WR_CTRL_REG_BIT_START_EN);
  5168. iwl_release_restricted_access(priv);
  5169. return 0;
  5170. }
  5171. static void iwl_nic_start(struct iwl_priv *priv)
  5172. {
  5173. /* Remove all resets to allow NIC to operate */
  5174. iwl_write32(priv, CSR_RESET, 0);
  5175. }
  5176. /**
  5177. * iwl_read_ucode - Read uCode images from disk file.
  5178. *
  5179. * Copy into buffers for card to fetch via bus-mastering
  5180. */
  5181. static int iwl_read_ucode(struct iwl_priv *priv)
  5182. {
  5183. struct iwl_ucode *ucode;
  5184. int rc = 0;
  5185. const struct firmware *ucode_raw;
  5186. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5187. u8 *src;
  5188. size_t len;
  5189. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5190. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5191. * request_firmware() is synchronous, file is in memory on return. */
  5192. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5193. if (rc < 0) {
  5194. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  5195. goto error;
  5196. }
  5197. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5198. name, ucode_raw->size);
  5199. /* Make sure that we got at least our header! */
  5200. if (ucode_raw->size < sizeof(*ucode)) {
  5201. IWL_ERROR("File size way too small!\n");
  5202. rc = -EINVAL;
  5203. goto err_release;
  5204. }
  5205. /* Data from ucode file: header followed by uCode images */
  5206. ucode = (void *)ucode_raw->data;
  5207. ver = le32_to_cpu(ucode->ver);
  5208. inst_size = le32_to_cpu(ucode->inst_size);
  5209. data_size = le32_to_cpu(ucode->data_size);
  5210. init_size = le32_to_cpu(ucode->init_size);
  5211. init_data_size = le32_to_cpu(ucode->init_data_size);
  5212. boot_size = le32_to_cpu(ucode->boot_size);
  5213. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5214. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5215. inst_size);
  5216. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5217. data_size);
  5218. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5219. init_size);
  5220. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5221. init_data_size);
  5222. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5223. boot_size);
  5224. /* Verify size of file vs. image size info in file's header */
  5225. if (ucode_raw->size < sizeof(*ucode) +
  5226. inst_size + data_size + init_size +
  5227. init_data_size + boot_size) {
  5228. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5229. (int)ucode_raw->size);
  5230. rc = -EINVAL;
  5231. goto err_release;
  5232. }
  5233. /* Verify that uCode images will fit in card's SRAM */
  5234. if (inst_size > IWL_MAX_INST_SIZE) {
  5235. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  5236. (int)inst_size);
  5237. rc = -EINVAL;
  5238. goto err_release;
  5239. }
  5240. if (data_size > IWL_MAX_DATA_SIZE) {
  5241. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  5242. (int)data_size);
  5243. rc = -EINVAL;
  5244. goto err_release;
  5245. }
  5246. if (init_size > IWL_MAX_INST_SIZE) {
  5247. IWL_DEBUG_INFO
  5248. ("uCode init instr len %d too large to fit in card\n",
  5249. (int)init_size);
  5250. rc = -EINVAL;
  5251. goto err_release;
  5252. }
  5253. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5254. IWL_DEBUG_INFO
  5255. ("uCode init data len %d too large to fit in card\n",
  5256. (int)init_data_size);
  5257. rc = -EINVAL;
  5258. goto err_release;
  5259. }
  5260. if (boot_size > IWL_MAX_BSM_SIZE) {
  5261. IWL_DEBUG_INFO
  5262. ("uCode boot instr len %d too large to fit in bsm\n",
  5263. (int)boot_size);
  5264. rc = -EINVAL;
  5265. goto err_release;
  5266. }
  5267. /* Allocate ucode buffers for card's bus-master loading ... */
  5268. /* Runtime instructions and 2 copies of data:
  5269. * 1) unmodified from disk
  5270. * 2) backup cache for save/restore during power-downs */
  5271. priv->ucode_code.len = inst_size;
  5272. priv->ucode_code.v_addr =
  5273. pci_alloc_consistent(priv->pci_dev,
  5274. priv->ucode_code.len,
  5275. &(priv->ucode_code.p_addr));
  5276. priv->ucode_data.len = data_size;
  5277. priv->ucode_data.v_addr =
  5278. pci_alloc_consistent(priv->pci_dev,
  5279. priv->ucode_data.len,
  5280. &(priv->ucode_data.p_addr));
  5281. priv->ucode_data_backup.len = data_size;
  5282. priv->ucode_data_backup.v_addr =
  5283. pci_alloc_consistent(priv->pci_dev,
  5284. priv->ucode_data_backup.len,
  5285. &(priv->ucode_data_backup.p_addr));
  5286. /* Initialization instructions and data */
  5287. priv->ucode_init.len = init_size;
  5288. priv->ucode_init.v_addr =
  5289. pci_alloc_consistent(priv->pci_dev,
  5290. priv->ucode_init.len,
  5291. &(priv->ucode_init.p_addr));
  5292. priv->ucode_init_data.len = init_data_size;
  5293. priv->ucode_init_data.v_addr =
  5294. pci_alloc_consistent(priv->pci_dev,
  5295. priv->ucode_init_data.len,
  5296. &(priv->ucode_init_data.p_addr));
  5297. /* Bootstrap (instructions only, no data) */
  5298. priv->ucode_boot.len = boot_size;
  5299. priv->ucode_boot.v_addr =
  5300. pci_alloc_consistent(priv->pci_dev,
  5301. priv->ucode_boot.len,
  5302. &(priv->ucode_boot.p_addr));
  5303. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  5304. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  5305. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  5306. goto err_pci_alloc;
  5307. /* Copy images into buffers for card's bus-master reads ... */
  5308. /* Runtime instructions (first block of data in file) */
  5309. src = &ucode->data[0];
  5310. len = priv->ucode_code.len;
  5311. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  5312. (int)len);
  5313. memcpy(priv->ucode_code.v_addr, src, len);
  5314. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5315. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5316. /* Runtime data (2nd block)
  5317. * NOTE: Copy into backup buffer will be done in iwl_up() */
  5318. src = &ucode->data[inst_size];
  5319. len = priv->ucode_data.len;
  5320. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5321. (int)len);
  5322. memcpy(priv->ucode_data.v_addr, src, len);
  5323. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5324. /* Initialization instructions (3rd block) */
  5325. if (init_size) {
  5326. src = &ucode->data[inst_size + data_size];
  5327. len = priv->ucode_init.len;
  5328. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5329. (int)len);
  5330. memcpy(priv->ucode_init.v_addr, src, len);
  5331. }
  5332. /* Initialization data (4th block) */
  5333. if (init_data_size) {
  5334. src = &ucode->data[inst_size + data_size + init_size];
  5335. len = priv->ucode_init_data.len;
  5336. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5337. (int)len);
  5338. memcpy(priv->ucode_init_data.v_addr, src, len);
  5339. }
  5340. /* Bootstrap instructions (5th block) */
  5341. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5342. len = priv->ucode_boot.len;
  5343. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5344. (int)len);
  5345. memcpy(priv->ucode_boot.v_addr, src, len);
  5346. /* We have our copies now, allow OS release its copies */
  5347. release_firmware(ucode_raw);
  5348. return 0;
  5349. err_pci_alloc:
  5350. IWL_ERROR("failed to allocate pci memory\n");
  5351. rc = -ENOMEM;
  5352. iwl_dealloc_ucode_pci(priv);
  5353. err_release:
  5354. release_firmware(ucode_raw);
  5355. error:
  5356. return rc;
  5357. }
  5358. /**
  5359. * iwl_set_ucode_ptrs - Set uCode address location
  5360. *
  5361. * Tell initialization uCode where to find runtime uCode.
  5362. *
  5363. * BSM registers initially contain pointers to initialization uCode.
  5364. * We need to replace them to load runtime uCode inst and data,
  5365. * and to save runtime data when powering down.
  5366. */
  5367. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5368. {
  5369. dma_addr_t pinst;
  5370. dma_addr_t pdata;
  5371. int rc = 0;
  5372. unsigned long flags;
  5373. /* bits 35:4 for 4965 */
  5374. pinst = priv->ucode_code.p_addr >> 4;
  5375. pdata = priv->ucode_data_backup.p_addr >> 4;
  5376. spin_lock_irqsave(&priv->lock, flags);
  5377. rc = iwl_grab_restricted_access(priv);
  5378. if (rc) {
  5379. spin_unlock_irqrestore(&priv->lock, flags);
  5380. return rc;
  5381. }
  5382. /* Tell bootstrap uCode where to find image to load */
  5383. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5384. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5385. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5386. priv->ucode_data.len);
  5387. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5388. * that all new ptr/size info is in place */
  5389. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5390. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5391. iwl_release_restricted_access(priv);
  5392. spin_unlock_irqrestore(&priv->lock, flags);
  5393. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5394. return rc;
  5395. }
  5396. /**
  5397. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5398. *
  5399. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5400. *
  5401. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5402. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5403. * (3945 does not contain this data).
  5404. *
  5405. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5406. */
  5407. static void iwl_init_alive_start(struct iwl_priv *priv)
  5408. {
  5409. /* Check alive response for "valid" sign from uCode */
  5410. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5411. /* We had an error bringing up the hardware, so take it
  5412. * all the way back down so we can try again */
  5413. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5414. goto restart;
  5415. }
  5416. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5417. * This is a paranoid check, because we would not have gotten the
  5418. * "initialize" alive if code weren't properly loaded. */
  5419. if (iwl_verify_ucode(priv)) {
  5420. /* Runtime instruction load was bad;
  5421. * take it all the way back down so we can try again */
  5422. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5423. goto restart;
  5424. }
  5425. /* Calculate temperature */
  5426. priv->temperature = iwl4965_get_temperature(priv);
  5427. /* Send pointers to protocol/runtime uCode image ... init code will
  5428. * load and launch runtime uCode, which will send us another "Alive"
  5429. * notification. */
  5430. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5431. if (iwl_set_ucode_ptrs(priv)) {
  5432. /* Runtime instruction load won't happen;
  5433. * take it all the way back down so we can try again */
  5434. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5435. goto restart;
  5436. }
  5437. return;
  5438. restart:
  5439. queue_work(priv->workqueue, &priv->restart);
  5440. }
  5441. /**
  5442. * iwl_alive_start - called after REPLY_ALIVE notification received
  5443. * from protocol/runtime uCode (initialization uCode's
  5444. * Alive gets handled by iwl_init_alive_start()).
  5445. */
  5446. static void iwl_alive_start(struct iwl_priv *priv)
  5447. {
  5448. int rc = 0;
  5449. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5450. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5451. /* We had an error bringing up the hardware, so take it
  5452. * all the way back down so we can try again */
  5453. IWL_DEBUG_INFO("Alive failed.\n");
  5454. goto restart;
  5455. }
  5456. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5457. * This is a paranoid check, because we would not have gotten the
  5458. * "runtime" alive if code weren't properly loaded. */
  5459. if (iwl_verify_ucode(priv)) {
  5460. /* Runtime instruction load was bad;
  5461. * take it all the way back down so we can try again */
  5462. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5463. goto restart;
  5464. }
  5465. iwl_clear_stations_table(priv);
  5466. rc = iwl4965_alive_notify(priv);
  5467. if (rc) {
  5468. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5469. rc);
  5470. goto restart;
  5471. }
  5472. /* After the ALIVE response, we can process host commands */
  5473. set_bit(STATUS_ALIVE, &priv->status);
  5474. /* Clear out the uCode error bit if it is set */
  5475. clear_bit(STATUS_FW_ERROR, &priv->status);
  5476. rc = iwl_init_channel_map(priv);
  5477. if (rc) {
  5478. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5479. return;
  5480. }
  5481. iwl_init_geos(priv);
  5482. if (iwl_is_rfkill(priv))
  5483. return;
  5484. if (!priv->mac80211_registered) {
  5485. /* Unlock so any user space entry points can call back into
  5486. * the driver without a deadlock... */
  5487. mutex_unlock(&priv->mutex);
  5488. iwl_rate_control_register(priv->hw);
  5489. rc = ieee80211_register_hw(priv->hw);
  5490. priv->hw->conf.beacon_int = 100;
  5491. mutex_lock(&priv->mutex);
  5492. if (rc) {
  5493. IWL_ERROR("Failed to register network "
  5494. "device (error %d)\n", rc);
  5495. return;
  5496. }
  5497. priv->mac80211_registered = 1;
  5498. iwl_reset_channel_flag(priv);
  5499. } else
  5500. ieee80211_start_queues(priv->hw);
  5501. priv->active_rate = priv->rates_mask;
  5502. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5503. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5504. if (iwl_is_associated(priv)) {
  5505. struct iwl_rxon_cmd *active_rxon =
  5506. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5507. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5508. sizeof(priv->staging_rxon));
  5509. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5510. } else {
  5511. /* Initialize our rx_config data */
  5512. iwl_connection_init_rx_config(priv);
  5513. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5514. }
  5515. /* Configure BT coexistence */
  5516. iwl_send_bt_config(priv);
  5517. /* Configure the adapter for unassociated operation */
  5518. iwl_commit_rxon(priv);
  5519. /* At this point, the NIC is initialized and operational */
  5520. priv->notif_missed_beacons = 0;
  5521. set_bit(STATUS_READY, &priv->status);
  5522. iwl4965_rf_kill_ct_config(priv);
  5523. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5524. if (priv->error_recovering)
  5525. iwl_error_recovery(priv);
  5526. return;
  5527. restart:
  5528. queue_work(priv->workqueue, &priv->restart);
  5529. }
  5530. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5531. static void __iwl_down(struct iwl_priv *priv)
  5532. {
  5533. unsigned long flags;
  5534. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5535. struct ieee80211_conf *conf = NULL;
  5536. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5537. conf = ieee80211_get_hw_conf(priv->hw);
  5538. if (!exit_pending)
  5539. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5540. iwl_clear_stations_table(priv);
  5541. /* Unblock any waiting calls */
  5542. wake_up_interruptible_all(&priv->wait_command_queue);
  5543. iwl_cancel_deferred_work(priv);
  5544. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5545. * exiting the module */
  5546. if (!exit_pending)
  5547. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5548. /* stop and reset the on-board processor */
  5549. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5550. /* tell the device to stop sending interrupts */
  5551. iwl_disable_interrupts(priv);
  5552. if (priv->mac80211_registered)
  5553. ieee80211_stop_queues(priv->hw);
  5554. /* If we have not previously called iwl_init() then
  5555. * clear all bits but the RF Kill and SUSPEND bits and return */
  5556. if (!iwl_is_init(priv)) {
  5557. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5558. STATUS_RF_KILL_HW |
  5559. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5560. STATUS_RF_KILL_SW |
  5561. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5562. STATUS_IN_SUSPEND;
  5563. goto exit;
  5564. }
  5565. /* ...otherwise clear out all the status bits but the RF Kill and
  5566. * SUSPEND bits and continue taking the NIC down. */
  5567. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5568. STATUS_RF_KILL_HW |
  5569. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5570. STATUS_RF_KILL_SW |
  5571. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5572. STATUS_IN_SUSPEND |
  5573. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5574. STATUS_FW_ERROR;
  5575. spin_lock_irqsave(&priv->lock, flags);
  5576. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5577. spin_unlock_irqrestore(&priv->lock, flags);
  5578. iwl_hw_txq_ctx_stop(priv);
  5579. iwl_hw_rxq_stop(priv);
  5580. spin_lock_irqsave(&priv->lock, flags);
  5581. if (!iwl_grab_restricted_access(priv)) {
  5582. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5583. APMG_CLK_VAL_DMA_CLK_RQT);
  5584. iwl_release_restricted_access(priv);
  5585. }
  5586. spin_unlock_irqrestore(&priv->lock, flags);
  5587. udelay(5);
  5588. iwl_hw_nic_stop_master(priv);
  5589. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5590. iwl_hw_nic_reset(priv);
  5591. exit:
  5592. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5593. if (priv->ibss_beacon)
  5594. dev_kfree_skb(priv->ibss_beacon);
  5595. priv->ibss_beacon = NULL;
  5596. /* clear out any free frames */
  5597. iwl_clear_free_frames(priv);
  5598. }
  5599. static void iwl_down(struct iwl_priv *priv)
  5600. {
  5601. mutex_lock(&priv->mutex);
  5602. __iwl_down(priv);
  5603. mutex_unlock(&priv->mutex);
  5604. }
  5605. #define MAX_HW_RESTARTS 5
  5606. static int __iwl_up(struct iwl_priv *priv)
  5607. {
  5608. DECLARE_MAC_BUF(mac);
  5609. int rc, i;
  5610. u32 hw_rf_kill = 0;
  5611. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5612. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5613. return -EIO;
  5614. }
  5615. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5616. IWL_WARNING("Radio disabled by SW RF kill (module "
  5617. "parameter)\n");
  5618. return 0;
  5619. }
  5620. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5621. rc = iwl_hw_nic_init(priv);
  5622. if (rc) {
  5623. IWL_ERROR("Unable to int nic\n");
  5624. return rc;
  5625. }
  5626. /* make sure rfkill handshake bits are cleared */
  5627. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5628. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5629. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5630. /* clear (again), then enable host interrupts */
  5631. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5632. iwl_enable_interrupts(priv);
  5633. /* really make sure rfkill handshake bits are cleared */
  5634. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5635. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5636. /* Copy original ucode data image from disk into backup cache.
  5637. * This will be used to initialize the on-board processor's
  5638. * data SRAM for a clean start when the runtime program first loads. */
  5639. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5640. priv->ucode_data.len);
  5641. /* If platform's RF_KILL switch is set to KILL,
  5642. * wait for BIT_INT_RF_KILL interrupt before loading uCode
  5643. * and getting things started */
  5644. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  5645. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  5646. hw_rf_kill = 1;
  5647. if (test_bit(STATUS_RF_KILL_HW, &priv->status) || hw_rf_kill) {
  5648. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5649. return 0;
  5650. }
  5651. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5652. iwl_clear_stations_table(priv);
  5653. /* load bootstrap state machine,
  5654. * load bootstrap program into processor's memory,
  5655. * prepare to load the "initialize" uCode */
  5656. rc = iwl_load_bsm(priv);
  5657. if (rc) {
  5658. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5659. continue;
  5660. }
  5661. /* start card; "initialize" will load runtime ucode */
  5662. iwl_nic_start(priv);
  5663. /* MAC Address location in EEPROM same for 3945/4965 */
  5664. get_eeprom_mac(priv, priv->mac_addr);
  5665. IWL_DEBUG_INFO("MAC address: %s\n",
  5666. print_mac(mac, priv->mac_addr));
  5667. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5668. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5669. return 0;
  5670. }
  5671. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5672. __iwl_down(priv);
  5673. /* tried to restart and config the device for as long as our
  5674. * patience could withstand */
  5675. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5676. return -EIO;
  5677. }
  5678. /*****************************************************************************
  5679. *
  5680. * Workqueue callbacks
  5681. *
  5682. *****************************************************************************/
  5683. static void iwl_bg_init_alive_start(struct work_struct *data)
  5684. {
  5685. struct iwl_priv *priv =
  5686. container_of(data, struct iwl_priv, init_alive_start.work);
  5687. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5688. return;
  5689. mutex_lock(&priv->mutex);
  5690. iwl_init_alive_start(priv);
  5691. mutex_unlock(&priv->mutex);
  5692. }
  5693. static void iwl_bg_alive_start(struct work_struct *data)
  5694. {
  5695. struct iwl_priv *priv =
  5696. container_of(data, struct iwl_priv, alive_start.work);
  5697. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5698. return;
  5699. mutex_lock(&priv->mutex);
  5700. iwl_alive_start(priv);
  5701. mutex_unlock(&priv->mutex);
  5702. }
  5703. static void iwl_bg_rf_kill(struct work_struct *work)
  5704. {
  5705. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5706. wake_up_interruptible(&priv->wait_command_queue);
  5707. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5708. return;
  5709. mutex_lock(&priv->mutex);
  5710. if (!iwl_is_rfkill(priv)) {
  5711. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5712. "HW and/or SW RF Kill no longer active, restarting "
  5713. "device\n");
  5714. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5715. queue_work(priv->workqueue, &priv->restart);
  5716. } else {
  5717. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5718. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5719. "disabled by SW switch\n");
  5720. else
  5721. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5722. "Kill switch must be turned off for "
  5723. "wireless networking to work.\n");
  5724. }
  5725. mutex_unlock(&priv->mutex);
  5726. }
  5727. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5728. static void iwl_bg_scan_check(struct work_struct *data)
  5729. {
  5730. struct iwl_priv *priv =
  5731. container_of(data, struct iwl_priv, scan_check.work);
  5732. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5733. return;
  5734. mutex_lock(&priv->mutex);
  5735. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5736. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5737. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5738. "Scan completion watchdog resetting adapter (%dms)\n",
  5739. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5740. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5741. queue_work(priv->workqueue, &priv->restart);
  5742. }
  5743. mutex_unlock(&priv->mutex);
  5744. }
  5745. static void iwl_bg_request_scan(struct work_struct *data)
  5746. {
  5747. struct iwl_priv *priv =
  5748. container_of(data, struct iwl_priv, request_scan);
  5749. struct iwl_host_cmd cmd = {
  5750. .id = REPLY_SCAN_CMD,
  5751. .len = sizeof(struct iwl_scan_cmd),
  5752. .meta.flags = CMD_SIZE_HUGE,
  5753. };
  5754. int rc = 0;
  5755. struct iwl_scan_cmd *scan;
  5756. struct ieee80211_conf *conf = NULL;
  5757. u8 direct_mask;
  5758. int phymode;
  5759. conf = ieee80211_get_hw_conf(priv->hw);
  5760. mutex_lock(&priv->mutex);
  5761. if (!iwl_is_ready(priv)) {
  5762. IWL_WARNING("request scan called when driver not ready.\n");
  5763. goto done;
  5764. }
  5765. /* Make sure the scan wasn't cancelled before this queued work
  5766. * was given the chance to run... */
  5767. if (!test_bit(STATUS_SCANNING, &priv->status))
  5768. goto done;
  5769. /* This should never be called or scheduled if there is currently
  5770. * a scan active in the hardware. */
  5771. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5772. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5773. "Ignoring second request.\n");
  5774. rc = -EIO;
  5775. goto done;
  5776. }
  5777. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5778. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5779. goto done;
  5780. }
  5781. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5782. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5783. goto done;
  5784. }
  5785. if (iwl_is_rfkill(priv)) {
  5786. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5787. goto done;
  5788. }
  5789. if (!test_bit(STATUS_READY, &priv->status)) {
  5790. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5791. goto done;
  5792. }
  5793. if (!priv->scan_bands) {
  5794. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5795. goto done;
  5796. }
  5797. if (!priv->scan) {
  5798. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5799. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5800. if (!priv->scan) {
  5801. rc = -ENOMEM;
  5802. goto done;
  5803. }
  5804. }
  5805. scan = priv->scan;
  5806. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5807. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5808. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5809. if (iwl_is_associated(priv)) {
  5810. u16 interval = 0;
  5811. u32 extra;
  5812. u32 suspend_time = 100;
  5813. u32 scan_suspend_time = 100;
  5814. unsigned long flags;
  5815. IWL_DEBUG_INFO("Scanning while associated...\n");
  5816. spin_lock_irqsave(&priv->lock, flags);
  5817. interval = priv->beacon_int;
  5818. spin_unlock_irqrestore(&priv->lock, flags);
  5819. scan->suspend_time = 0;
  5820. scan->max_out_time = cpu_to_le32(600 * 1024);
  5821. if (!interval)
  5822. interval = suspend_time;
  5823. extra = (suspend_time / interval) << 22;
  5824. scan_suspend_time = (extra |
  5825. ((suspend_time % interval) * 1024));
  5826. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5827. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5828. scan_suspend_time, interval);
  5829. }
  5830. /* We should add the ability for user to lock to PASSIVE ONLY */
  5831. if (priv->one_direct_scan) {
  5832. IWL_DEBUG_SCAN
  5833. ("Kicking off one direct scan for '%s'\n",
  5834. iwl_escape_essid(priv->direct_ssid,
  5835. priv->direct_ssid_len));
  5836. scan->direct_scan[0].id = WLAN_EID_SSID;
  5837. scan->direct_scan[0].len = priv->direct_ssid_len;
  5838. memcpy(scan->direct_scan[0].ssid,
  5839. priv->direct_ssid, priv->direct_ssid_len);
  5840. direct_mask = 1;
  5841. } else if (!iwl_is_associated(priv)) {
  5842. scan->direct_scan[0].id = WLAN_EID_SSID;
  5843. scan->direct_scan[0].len = priv->essid_len;
  5844. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5845. direct_mask = 1;
  5846. } else
  5847. direct_mask = 0;
  5848. /* We don't build a direct scan probe request; the uCode will do
  5849. * that based on the direct_mask added to each channel entry */
  5850. scan->tx_cmd.len = cpu_to_le16(
  5851. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5852. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5853. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5854. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5855. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5856. /* flags + rate selection */
  5857. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5858. switch (priv->scan_bands) {
  5859. case 2:
  5860. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5861. scan->tx_cmd.rate_n_flags =
  5862. iwl_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5863. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5864. scan->good_CRC_th = 0;
  5865. phymode = MODE_IEEE80211G;
  5866. break;
  5867. case 1:
  5868. scan->tx_cmd.rate_n_flags =
  5869. iwl_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5870. RATE_MCS_ANT_B_MSK);
  5871. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5872. phymode = MODE_IEEE80211A;
  5873. break;
  5874. default:
  5875. IWL_WARNING("Invalid scan band count\n");
  5876. goto done;
  5877. }
  5878. /* select Rx chains */
  5879. /* Force use of chains B and C (0x6) for scan Rx.
  5880. * Avoid A (0x1) because of its off-channel reception on A-band.
  5881. * MIMO is not used here, but value is required to make uCode happy. */
  5882. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5883. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5884. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5885. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5886. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5887. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5888. if (direct_mask)
  5889. IWL_DEBUG_SCAN
  5890. ("Initiating direct scan for %s.\n",
  5891. iwl_escape_essid(priv->essid, priv->essid_len));
  5892. else
  5893. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5894. scan->channel_count =
  5895. iwl_get_channels_for_scan(
  5896. priv, phymode, 1, /* active */
  5897. direct_mask,
  5898. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5899. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5900. scan->channel_count * sizeof(struct iwl_scan_channel);
  5901. cmd.data = scan;
  5902. scan->len = cpu_to_le16(cmd.len);
  5903. set_bit(STATUS_SCAN_HW, &priv->status);
  5904. rc = iwl_send_cmd_sync(priv, &cmd);
  5905. if (rc)
  5906. goto done;
  5907. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5908. IWL_SCAN_CHECK_WATCHDOG);
  5909. mutex_unlock(&priv->mutex);
  5910. return;
  5911. done:
  5912. /* inform mac80211 sacn aborted */
  5913. queue_work(priv->workqueue, &priv->scan_completed);
  5914. mutex_unlock(&priv->mutex);
  5915. }
  5916. static void iwl_bg_up(struct work_struct *data)
  5917. {
  5918. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5919. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5920. return;
  5921. mutex_lock(&priv->mutex);
  5922. __iwl_up(priv);
  5923. mutex_unlock(&priv->mutex);
  5924. }
  5925. static void iwl_bg_restart(struct work_struct *data)
  5926. {
  5927. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5928. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5929. return;
  5930. iwl_down(priv);
  5931. queue_work(priv->workqueue, &priv->up);
  5932. }
  5933. static void iwl_bg_rx_replenish(struct work_struct *data)
  5934. {
  5935. struct iwl_priv *priv =
  5936. container_of(data, struct iwl_priv, rx_replenish);
  5937. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5938. return;
  5939. mutex_lock(&priv->mutex);
  5940. iwl_rx_replenish(priv);
  5941. mutex_unlock(&priv->mutex);
  5942. }
  5943. static void iwl_bg_post_associate(struct work_struct *data)
  5944. {
  5945. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5946. post_associate.work);
  5947. int rc = 0;
  5948. struct ieee80211_conf *conf = NULL;
  5949. DECLARE_MAC_BUF(mac);
  5950. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5951. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5952. return;
  5953. }
  5954. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5955. priv->assoc_id,
  5956. print_mac(mac, priv->active_rxon.bssid_addr));
  5957. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5958. return;
  5959. mutex_lock(&priv->mutex);
  5960. conf = ieee80211_get_hw_conf(priv->hw);
  5961. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5962. iwl_commit_rxon(priv);
  5963. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5964. iwl_setup_rxon_timing(priv);
  5965. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5966. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5967. if (rc)
  5968. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5969. "Attempting to continue.\n");
  5970. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5971. #ifdef CONFIG_IWLWIFI_HT
  5972. if (priv->is_ht_enabled && priv->current_assoc_ht.is_ht)
  5973. iwl4965_set_rxon_ht(priv, &priv->current_assoc_ht);
  5974. else {
  5975. priv->active_rate_ht[0] = 0;
  5976. priv->active_rate_ht[1] = 0;
  5977. priv->current_channel_width = IWL_CHANNEL_WIDTH_20MHZ;
  5978. }
  5979. #endif /* CONFIG_IWLWIFI_HT*/
  5980. iwl4965_set_rxon_chain(priv);
  5981. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5982. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5983. priv->assoc_id, priv->beacon_int);
  5984. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5985. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5986. else
  5987. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5988. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5989. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5990. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5991. else
  5992. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5993. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5994. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5995. }
  5996. iwl_commit_rxon(priv);
  5997. switch (priv->iw_mode) {
  5998. case IEEE80211_IF_TYPE_STA:
  5999. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  6000. break;
  6001. case IEEE80211_IF_TYPE_IBSS:
  6002. /* clear out the station table */
  6003. iwl_clear_stations_table(priv);
  6004. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6005. iwl_rxon_add_station(priv, priv->bssid, 0);
  6006. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  6007. iwl_send_beacon_cmd(priv);
  6008. break;
  6009. default:
  6010. IWL_ERROR("%s Should not be called in %d mode\n",
  6011. __FUNCTION__, priv->iw_mode);
  6012. break;
  6013. }
  6014. iwl_sequence_reset(priv);
  6015. #ifdef CONFIG_IWLWIFI_SENSITIVITY
  6016. /* Enable Rx differential gain and sensitivity calibrations */
  6017. iwl4965_chain_noise_reset(priv);
  6018. priv->start_calib = 1;
  6019. #endif /* CONFIG_IWLWIFI_SENSITIVITY */
  6020. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6021. priv->assoc_station_added = 1;
  6022. #ifdef CONFIG_IWLWIFI_QOS
  6023. iwl_activate_qos(priv, 0);
  6024. #endif /* CONFIG_IWLWIFI_QOS */
  6025. mutex_unlock(&priv->mutex);
  6026. }
  6027. static void iwl_bg_abort_scan(struct work_struct *work)
  6028. {
  6029. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  6030. abort_scan);
  6031. if (!iwl_is_ready(priv))
  6032. return;
  6033. mutex_lock(&priv->mutex);
  6034. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6035. iwl_send_scan_abort(priv);
  6036. mutex_unlock(&priv->mutex);
  6037. }
  6038. static void iwl_bg_scan_completed(struct work_struct *work)
  6039. {
  6040. struct iwl_priv *priv =
  6041. container_of(work, struct iwl_priv, scan_completed);
  6042. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6043. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6044. return;
  6045. ieee80211_scan_completed(priv->hw);
  6046. /* Since setting the TXPOWER may have been deferred while
  6047. * performing the scan, fire one off */
  6048. mutex_lock(&priv->mutex);
  6049. iwl_hw_reg_send_txpower(priv);
  6050. mutex_unlock(&priv->mutex);
  6051. }
  6052. /*****************************************************************************
  6053. *
  6054. * mac80211 entry point functions
  6055. *
  6056. *****************************************************************************/
  6057. static int iwl_mac_start(struct ieee80211_hw *hw)
  6058. {
  6059. struct iwl_priv *priv = hw->priv;
  6060. IWL_DEBUG_MAC80211("enter\n");
  6061. /* we should be verifying the device is ready to be opened */
  6062. mutex_lock(&priv->mutex);
  6063. priv->is_open = 1;
  6064. if (!iwl_is_rfkill(priv))
  6065. ieee80211_start_queues(priv->hw);
  6066. mutex_unlock(&priv->mutex);
  6067. IWL_DEBUG_MAC80211("leave\n");
  6068. return 0;
  6069. }
  6070. static void iwl_mac_stop(struct ieee80211_hw *hw)
  6071. {
  6072. struct iwl_priv *priv = hw->priv;
  6073. IWL_DEBUG_MAC80211("enter\n");
  6074. priv->is_open = 0;
  6075. /*netif_stop_queue(dev); */
  6076. flush_workqueue(priv->workqueue);
  6077. IWL_DEBUG_MAC80211("leave\n");
  6078. }
  6079. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6080. struct ieee80211_tx_control *ctl)
  6081. {
  6082. struct iwl_priv *priv = hw->priv;
  6083. IWL_DEBUG_MAC80211("enter\n");
  6084. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6085. IWL_DEBUG_MAC80211("leave - monitor\n");
  6086. return -1;
  6087. }
  6088. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6089. ctl->tx_rate);
  6090. if (iwl_tx_skb(priv, skb, ctl))
  6091. dev_kfree_skb_any(skb);
  6092. IWL_DEBUG_MAC80211("leave\n");
  6093. return 0;
  6094. }
  6095. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  6096. struct ieee80211_if_init_conf *conf)
  6097. {
  6098. struct iwl_priv *priv = hw->priv;
  6099. unsigned long flags;
  6100. DECLARE_MAC_BUF(mac);
  6101. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  6102. if (conf->mac_addr)
  6103. IWL_DEBUG_MAC80211("enter: MAC %s\n",
  6104. print_mac(mac, conf->mac_addr));
  6105. if (priv->interface_id) {
  6106. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  6107. return 0;
  6108. }
  6109. spin_lock_irqsave(&priv->lock, flags);
  6110. priv->interface_id = conf->if_id;
  6111. spin_unlock_irqrestore(&priv->lock, flags);
  6112. mutex_lock(&priv->mutex);
  6113. iwl_set_mode(priv, conf->type);
  6114. IWL_DEBUG_MAC80211("leave\n");
  6115. mutex_unlock(&priv->mutex);
  6116. return 0;
  6117. }
  6118. /**
  6119. * iwl_mac_config - mac80211 config callback
  6120. *
  6121. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6122. * be set inappropriately and the driver currently sets the hardware up to
  6123. * use it whenever needed.
  6124. */
  6125. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6126. {
  6127. struct iwl_priv *priv = hw->priv;
  6128. const struct iwl_channel_info *ch_info;
  6129. unsigned long flags;
  6130. mutex_lock(&priv->mutex);
  6131. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  6132. if (!iwl_is_ready(priv)) {
  6133. IWL_DEBUG_MAC80211("leave - not ready\n");
  6134. mutex_unlock(&priv->mutex);
  6135. return -EIO;
  6136. }
  6137. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  6138. * what is exposed through include/ declrations */
  6139. if (unlikely(!iwl_param_disable_hw_scan &&
  6140. test_bit(STATUS_SCANNING, &priv->status))) {
  6141. IWL_DEBUG_MAC80211("leave - scanning\n");
  6142. mutex_unlock(&priv->mutex);
  6143. return 0;
  6144. }
  6145. spin_lock_irqsave(&priv->lock, flags);
  6146. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  6147. if (!is_channel_valid(ch_info)) {
  6148. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  6149. conf->channel, conf->phymode);
  6150. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6151. spin_unlock_irqrestore(&priv->lock, flags);
  6152. mutex_unlock(&priv->mutex);
  6153. return -EINVAL;
  6154. }
  6155. #ifdef CONFIG_IWLWIFI_HT
  6156. /* if we are switching fron ht to 2.4 clear flags
  6157. * from any ht related info since 2.4 does not
  6158. * support ht */
  6159. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6160. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6161. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6162. #endif
  6163. )
  6164. priv->staging_rxon.flags = 0;
  6165. #endif /* CONFIG_IWLWIFI_HT */
  6166. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  6167. iwl_set_flags_for_phymode(priv, conf->phymode);
  6168. /* The list of supported rates and rate mask can be different
  6169. * for each phymode; since the phymode may have changed, reset
  6170. * the rate mask to what mac80211 lists */
  6171. iwl_set_rate(priv);
  6172. spin_unlock_irqrestore(&priv->lock, flags);
  6173. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6174. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6175. iwl_hw_channel_switch(priv, conf->channel);
  6176. mutex_unlock(&priv->mutex);
  6177. return 0;
  6178. }
  6179. #endif
  6180. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  6181. if (!conf->radio_enabled) {
  6182. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6183. mutex_unlock(&priv->mutex);
  6184. return 0;
  6185. }
  6186. if (iwl_is_rfkill(priv)) {
  6187. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6188. mutex_unlock(&priv->mutex);
  6189. return -EIO;
  6190. }
  6191. iwl_set_rate(priv);
  6192. if (memcmp(&priv->active_rxon,
  6193. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6194. iwl_commit_rxon(priv);
  6195. else
  6196. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6197. IWL_DEBUG_MAC80211("leave\n");
  6198. mutex_unlock(&priv->mutex);
  6199. return 0;
  6200. }
  6201. static void iwl_config_ap(struct iwl_priv *priv)
  6202. {
  6203. int rc = 0;
  6204. if (priv->status & STATUS_EXIT_PENDING)
  6205. return;
  6206. /* The following should be done only at AP bring up */
  6207. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6208. /* RXON - unassoc (to set timing command) */
  6209. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6210. iwl_commit_rxon(priv);
  6211. /* RXON Timing */
  6212. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  6213. iwl_setup_rxon_timing(priv);
  6214. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6215. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6216. if (rc)
  6217. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6218. "Attempting to continue.\n");
  6219. iwl4965_set_rxon_chain(priv);
  6220. /* FIXME: what should be the assoc_id for AP? */
  6221. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6222. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6223. priv->staging_rxon.flags |=
  6224. RXON_FLG_SHORT_PREAMBLE_MSK;
  6225. else
  6226. priv->staging_rxon.flags &=
  6227. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6228. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6229. if (priv->assoc_capability &
  6230. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6231. priv->staging_rxon.flags |=
  6232. RXON_FLG_SHORT_SLOT_MSK;
  6233. else
  6234. priv->staging_rxon.flags &=
  6235. ~RXON_FLG_SHORT_SLOT_MSK;
  6236. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6237. priv->staging_rxon.flags &=
  6238. ~RXON_FLG_SHORT_SLOT_MSK;
  6239. }
  6240. /* restore RXON assoc */
  6241. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6242. iwl_commit_rxon(priv);
  6243. #ifdef CONFIG_IWLWIFI_QOS
  6244. iwl_activate_qos(priv, 1);
  6245. #endif
  6246. iwl_rxon_add_station(priv, BROADCAST_ADDR, 0);
  6247. }
  6248. iwl_send_beacon_cmd(priv);
  6249. /* FIXME - we need to add code here to detect a totally new
  6250. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6251. * clear sta table, add BCAST sta... */
  6252. }
  6253. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  6254. struct ieee80211_if_conf *conf)
  6255. {
  6256. struct iwl_priv *priv = hw->priv;
  6257. DECLARE_MAC_BUF(mac);
  6258. unsigned long flags;
  6259. int rc;
  6260. if (conf == NULL)
  6261. return -EIO;
  6262. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6263. (!conf->beacon || !conf->ssid_len)) {
  6264. IWL_DEBUG_MAC80211
  6265. ("Leaving in AP mode because HostAPD is not ready.\n");
  6266. return 0;
  6267. }
  6268. mutex_lock(&priv->mutex);
  6269. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  6270. if (conf->bssid)
  6271. IWL_DEBUG_MAC80211("bssid: %s\n",
  6272. print_mac(mac, conf->bssid));
  6273. /*
  6274. * very dubious code was here; the probe filtering flag is never set:
  6275. *
  6276. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6277. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6278. */
  6279. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6280. IWL_DEBUG_MAC80211("leave - scanning\n");
  6281. mutex_unlock(&priv->mutex);
  6282. return 0;
  6283. }
  6284. if (priv->interface_id != if_id) {
  6285. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  6286. mutex_unlock(&priv->mutex);
  6287. return 0;
  6288. }
  6289. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6290. if (!conf->bssid) {
  6291. conf->bssid = priv->mac_addr;
  6292. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6293. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6294. print_mac(mac, conf->bssid));
  6295. }
  6296. if (priv->ibss_beacon)
  6297. dev_kfree_skb(priv->ibss_beacon);
  6298. priv->ibss_beacon = conf->beacon;
  6299. }
  6300. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6301. !is_multicast_ether_addr(conf->bssid)) {
  6302. /* If there is currently a HW scan going on in the background
  6303. * then we need to cancel it else the RXON below will fail. */
  6304. if (iwl_scan_cancel_timeout(priv, 100)) {
  6305. IWL_WARNING("Aborted scan still in progress "
  6306. "after 100ms\n");
  6307. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6308. mutex_unlock(&priv->mutex);
  6309. return -EAGAIN;
  6310. }
  6311. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6312. /* TODO: Audit driver for usage of these members and see
  6313. * if mac80211 deprecates them (priv->bssid looks like it
  6314. * shouldn't be there, but I haven't scanned the IBSS code
  6315. * to verify) - jpk */
  6316. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6317. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6318. iwl_config_ap(priv);
  6319. else {
  6320. priv->staging_rxon.filter_flags |=
  6321. RXON_FILTER_ASSOC_MSK;
  6322. rc = iwl_commit_rxon(priv);
  6323. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6324. iwl_rxon_add_station(
  6325. priv, priv->active_rxon.bssid_addr, 1);
  6326. }
  6327. } else {
  6328. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6329. iwl_commit_rxon(priv);
  6330. }
  6331. spin_lock_irqsave(&priv->lock, flags);
  6332. if (!conf->ssid_len)
  6333. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6334. else
  6335. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6336. priv->essid_len = conf->ssid_len;
  6337. spin_unlock_irqrestore(&priv->lock, flags);
  6338. IWL_DEBUG_MAC80211("leave\n");
  6339. mutex_unlock(&priv->mutex);
  6340. return 0;
  6341. }
  6342. static void iwl_configure_filter(struct ieee80211_hw *hw,
  6343. unsigned int changed_flags,
  6344. unsigned int *total_flags,
  6345. int mc_count, struct dev_addr_list *mc_list)
  6346. {
  6347. /*
  6348. * XXX: dummy
  6349. * see also iwl_connection_init_rx_config
  6350. */
  6351. *total_flags = 0;
  6352. }
  6353. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6354. struct ieee80211_if_init_conf *conf)
  6355. {
  6356. struct iwl_priv *priv = hw->priv;
  6357. IWL_DEBUG_MAC80211("enter\n");
  6358. mutex_lock(&priv->mutex);
  6359. if (priv->interface_id == conf->if_id) {
  6360. priv->interface_id = 0;
  6361. memset(priv->bssid, 0, ETH_ALEN);
  6362. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6363. priv->essid_len = 0;
  6364. }
  6365. mutex_unlock(&priv->mutex);
  6366. IWL_DEBUG_MAC80211("leave\n");
  6367. }
  6368. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6369. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6370. {
  6371. int rc = 0;
  6372. unsigned long flags;
  6373. struct iwl_priv *priv = hw->priv;
  6374. IWL_DEBUG_MAC80211("enter\n");
  6375. spin_lock_irqsave(&priv->lock, flags);
  6376. if (!iwl_is_ready_rf(priv)) {
  6377. rc = -EIO;
  6378. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6379. goto out_unlock;
  6380. }
  6381. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6382. rc = -EIO;
  6383. IWL_ERROR("ERROR: APs don't scan\n");
  6384. goto out_unlock;
  6385. }
  6386. /* if we just finished scan ask for delay */
  6387. if (priv->last_scan_jiffies &&
  6388. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6389. jiffies)) {
  6390. rc = -EAGAIN;
  6391. goto out_unlock;
  6392. }
  6393. if (len) {
  6394. IWL_DEBUG_SCAN("direct scan for "
  6395. "%s [%d]\n ",
  6396. iwl_escape_essid(ssid, len), (int)len);
  6397. priv->one_direct_scan = 1;
  6398. priv->direct_ssid_len = (u8)
  6399. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6400. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6401. }
  6402. rc = iwl_scan_initiate(priv);
  6403. IWL_DEBUG_MAC80211("leave\n");
  6404. out_unlock:
  6405. spin_unlock_irqrestore(&priv->lock, flags);
  6406. return rc;
  6407. }
  6408. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6409. const u8 *local_addr, const u8 *addr,
  6410. struct ieee80211_key_conf *key)
  6411. {
  6412. struct iwl_priv *priv = hw->priv;
  6413. DECLARE_MAC_BUF(mac);
  6414. int rc = 0;
  6415. u8 sta_id;
  6416. IWL_DEBUG_MAC80211("enter\n");
  6417. if (!iwl_param_hwcrypto) {
  6418. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6419. return -EOPNOTSUPP;
  6420. }
  6421. if (is_zero_ether_addr(addr))
  6422. /* only support pairwise keys */
  6423. return -EOPNOTSUPP;
  6424. sta_id = iwl_hw_find_station(priv, addr);
  6425. if (sta_id == IWL_INVALID_STATION) {
  6426. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6427. print_mac(mac, addr));
  6428. return -EINVAL;
  6429. }
  6430. mutex_lock(&priv->mutex);
  6431. switch (cmd) {
  6432. case SET_KEY:
  6433. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6434. if (!rc) {
  6435. iwl_set_rxon_hwcrypto(priv, 1);
  6436. iwl_commit_rxon(priv);
  6437. key->hw_key_idx = sta_id;
  6438. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6439. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6440. }
  6441. break;
  6442. case DISABLE_KEY:
  6443. rc = iwl_clear_sta_key_info(priv, sta_id);
  6444. if (!rc) {
  6445. iwl_set_rxon_hwcrypto(priv, 0);
  6446. iwl_commit_rxon(priv);
  6447. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6448. }
  6449. break;
  6450. default:
  6451. rc = -EINVAL;
  6452. }
  6453. IWL_DEBUG_MAC80211("leave\n");
  6454. mutex_unlock(&priv->mutex);
  6455. return rc;
  6456. }
  6457. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6458. const struct ieee80211_tx_queue_params *params)
  6459. {
  6460. struct iwl_priv *priv = hw->priv;
  6461. #ifdef CONFIG_IWLWIFI_QOS
  6462. unsigned long flags;
  6463. int q;
  6464. #endif /* CONFIG_IWL_QOS */
  6465. IWL_DEBUG_MAC80211("enter\n");
  6466. if (!iwl_is_ready_rf(priv)) {
  6467. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6468. return -EIO;
  6469. }
  6470. if (queue >= AC_NUM) {
  6471. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6472. return 0;
  6473. }
  6474. #ifdef CONFIG_IWLWIFI_QOS
  6475. if (!priv->qos_data.qos_enable) {
  6476. priv->qos_data.qos_active = 0;
  6477. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6478. return 0;
  6479. }
  6480. q = AC_NUM - 1 - queue;
  6481. spin_lock_irqsave(&priv->lock, flags);
  6482. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6483. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6484. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6485. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6486. cpu_to_le16((params->burst_time * 100));
  6487. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6488. priv->qos_data.qos_active = 1;
  6489. spin_unlock_irqrestore(&priv->lock, flags);
  6490. mutex_lock(&priv->mutex);
  6491. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6492. iwl_activate_qos(priv, 1);
  6493. else if (priv->assoc_id && iwl_is_associated(priv))
  6494. iwl_activate_qos(priv, 0);
  6495. mutex_unlock(&priv->mutex);
  6496. #endif /*CONFIG_IWLWIFI_QOS */
  6497. IWL_DEBUG_MAC80211("leave\n");
  6498. return 0;
  6499. }
  6500. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6501. struct ieee80211_tx_queue_stats *stats)
  6502. {
  6503. struct iwl_priv *priv = hw->priv;
  6504. int i, avail;
  6505. struct iwl_tx_queue *txq;
  6506. struct iwl_queue *q;
  6507. unsigned long flags;
  6508. IWL_DEBUG_MAC80211("enter\n");
  6509. if (!iwl_is_ready_rf(priv)) {
  6510. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6511. return -EIO;
  6512. }
  6513. spin_lock_irqsave(&priv->lock, flags);
  6514. for (i = 0; i < AC_NUM; i++) {
  6515. txq = &priv->txq[i];
  6516. q = &txq->q;
  6517. avail = iwl_queue_space(q);
  6518. stats->data[i].len = q->n_window - avail;
  6519. stats->data[i].limit = q->n_window - q->high_mark;
  6520. stats->data[i].count = q->n_window;
  6521. }
  6522. spin_unlock_irqrestore(&priv->lock, flags);
  6523. IWL_DEBUG_MAC80211("leave\n");
  6524. return 0;
  6525. }
  6526. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6527. struct ieee80211_low_level_stats *stats)
  6528. {
  6529. IWL_DEBUG_MAC80211("enter\n");
  6530. IWL_DEBUG_MAC80211("leave\n");
  6531. return 0;
  6532. }
  6533. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6534. {
  6535. IWL_DEBUG_MAC80211("enter\n");
  6536. IWL_DEBUG_MAC80211("leave\n");
  6537. return 0;
  6538. }
  6539. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6540. {
  6541. struct iwl_priv *priv = hw->priv;
  6542. unsigned long flags;
  6543. mutex_lock(&priv->mutex);
  6544. IWL_DEBUG_MAC80211("enter\n");
  6545. priv->lq_mngr.lq_ready = 0;
  6546. #ifdef CONFIG_IWLWIFI_HT
  6547. spin_lock_irqsave(&priv->lock, flags);
  6548. memset(&priv->current_assoc_ht, 0, sizeof(struct sta_ht_info));
  6549. spin_unlock_irqrestore(&priv->lock, flags);
  6550. #ifdef CONFIG_IWLWIFI_HT_AGG
  6551. /* if (priv->lq_mngr.agg_ctrl.granted_ba)
  6552. iwl4965_turn_off_agg(priv, TID_ALL_SPECIFIED);*/
  6553. memset(&(priv->lq_mngr.agg_ctrl), 0, sizeof(struct iwl_agg_control));
  6554. priv->lq_mngr.agg_ctrl.tid_traffic_load_threshold = 10;
  6555. priv->lq_mngr.agg_ctrl.ba_timeout = 5000;
  6556. priv->lq_mngr.agg_ctrl.auto_agg = 1;
  6557. if (priv->lq_mngr.agg_ctrl.auto_agg)
  6558. priv->lq_mngr.agg_ctrl.requested_ba = TID_ALL_ENABLED;
  6559. #endif /*CONFIG_IWLWIFI_HT_AGG */
  6560. #endif /* CONFIG_IWLWIFI_HT */
  6561. #ifdef CONFIG_IWLWIFI_QOS
  6562. iwl_reset_qos(priv);
  6563. #endif
  6564. cancel_delayed_work(&priv->post_associate);
  6565. spin_lock_irqsave(&priv->lock, flags);
  6566. priv->assoc_id = 0;
  6567. priv->assoc_capability = 0;
  6568. priv->call_post_assoc_from_beacon = 0;
  6569. priv->assoc_station_added = 0;
  6570. /* new association get rid of ibss beacon skb */
  6571. if (priv->ibss_beacon)
  6572. dev_kfree_skb(priv->ibss_beacon);
  6573. priv->ibss_beacon = NULL;
  6574. priv->beacon_int = priv->hw->conf.beacon_int;
  6575. priv->timestamp1 = 0;
  6576. priv->timestamp0 = 0;
  6577. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6578. priv->beacon_int = 0;
  6579. spin_unlock_irqrestore(&priv->lock, flags);
  6580. /* Per mac80211.h: This is only used in IBSS mode... */
  6581. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6582. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6583. mutex_unlock(&priv->mutex);
  6584. return;
  6585. }
  6586. if (!iwl_is_ready_rf(priv)) {
  6587. IWL_DEBUG_MAC80211("leave - not ready\n");
  6588. mutex_unlock(&priv->mutex);
  6589. return;
  6590. }
  6591. priv->only_active_channel = 0;
  6592. iwl_set_rate(priv);
  6593. mutex_unlock(&priv->mutex);
  6594. IWL_DEBUG_MAC80211("leave\n");
  6595. }
  6596. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6597. struct ieee80211_tx_control *control)
  6598. {
  6599. struct iwl_priv *priv = hw->priv;
  6600. unsigned long flags;
  6601. mutex_lock(&priv->mutex);
  6602. IWL_DEBUG_MAC80211("enter\n");
  6603. if (!iwl_is_ready_rf(priv)) {
  6604. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6605. mutex_unlock(&priv->mutex);
  6606. return -EIO;
  6607. }
  6608. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6609. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6610. mutex_unlock(&priv->mutex);
  6611. return -EIO;
  6612. }
  6613. spin_lock_irqsave(&priv->lock, flags);
  6614. if (priv->ibss_beacon)
  6615. dev_kfree_skb(priv->ibss_beacon);
  6616. priv->ibss_beacon = skb;
  6617. priv->assoc_id = 0;
  6618. IWL_DEBUG_MAC80211("leave\n");
  6619. spin_unlock_irqrestore(&priv->lock, flags);
  6620. #ifdef CONFIG_IWLWIFI_QOS
  6621. iwl_reset_qos(priv);
  6622. #endif
  6623. queue_work(priv->workqueue, &priv->post_associate.work);
  6624. mutex_unlock(&priv->mutex);
  6625. return 0;
  6626. }
  6627. #ifdef CONFIG_IWLWIFI_HT
  6628. union ht_cap_info {
  6629. struct {
  6630. u16 advanced_coding_cap :1;
  6631. u16 supported_chan_width_set :1;
  6632. u16 mimo_power_save_mode :2;
  6633. u16 green_field :1;
  6634. u16 short_GI20 :1;
  6635. u16 short_GI40 :1;
  6636. u16 tx_stbc :1;
  6637. u16 rx_stbc :1;
  6638. u16 beam_forming :1;
  6639. u16 delayed_ba :1;
  6640. u16 maximal_amsdu_size :1;
  6641. u16 cck_mode_at_40MHz :1;
  6642. u16 psmp_support :1;
  6643. u16 stbc_ctrl_frame_support :1;
  6644. u16 sig_txop_protection_support :1;
  6645. };
  6646. u16 val;
  6647. } __attribute__ ((packed));
  6648. union ht_param_info{
  6649. struct {
  6650. u8 max_rx_ampdu_factor :2;
  6651. u8 mpdu_density :3;
  6652. u8 reserved :3;
  6653. };
  6654. u8 val;
  6655. } __attribute__ ((packed));
  6656. union ht_exra_param_info {
  6657. struct {
  6658. u8 ext_chan_offset :2;
  6659. u8 tx_chan_width :1;
  6660. u8 rifs_mode :1;
  6661. u8 controlled_access_only :1;
  6662. u8 service_interval_granularity :3;
  6663. };
  6664. u8 val;
  6665. } __attribute__ ((packed));
  6666. union ht_operation_mode{
  6667. struct {
  6668. u16 op_mode :2;
  6669. u16 non_GF :1;
  6670. u16 reserved :13;
  6671. };
  6672. u16 val;
  6673. } __attribute__ ((packed));
  6674. static int sta_ht_info_init(struct ieee80211_ht_capability *ht_cap,
  6675. struct ieee80211_ht_additional_info *ht_extra,
  6676. struct sta_ht_info *ht_info_ap,
  6677. struct sta_ht_info *ht_info)
  6678. {
  6679. union ht_cap_info cap;
  6680. union ht_operation_mode op_mode;
  6681. union ht_param_info param_info;
  6682. union ht_exra_param_info extra_param_info;
  6683. IWL_DEBUG_MAC80211("enter: \n");
  6684. if (!ht_info) {
  6685. IWL_DEBUG_MAC80211("leave: ht_info is NULL\n");
  6686. return -1;
  6687. }
  6688. if (ht_cap) {
  6689. cap.val = (u16) le16_to_cpu(ht_cap->capabilities_info);
  6690. param_info.val = ht_cap->mac_ht_params_info;
  6691. ht_info->is_ht = 1;
  6692. if (cap.short_GI20)
  6693. ht_info->sgf |= 0x1;
  6694. if (cap.short_GI40)
  6695. ht_info->sgf |= 0x2;
  6696. ht_info->is_green_field = cap.green_field;
  6697. ht_info->max_amsdu_size = cap.maximal_amsdu_size;
  6698. ht_info->supported_chan_width = cap.supported_chan_width_set;
  6699. ht_info->tx_mimo_ps_mode = cap.mimo_power_save_mode;
  6700. memcpy(ht_info->supp_rates, ht_cap->supported_mcs_set, 16);
  6701. ht_info->ampdu_factor = param_info.max_rx_ampdu_factor;
  6702. ht_info->mpdu_density = param_info.mpdu_density;
  6703. IWL_DEBUG_MAC80211("SISO mask 0x%X MIMO mask 0x%X \n",
  6704. ht_cap->supported_mcs_set[0],
  6705. ht_cap->supported_mcs_set[1]);
  6706. if (ht_info_ap) {
  6707. ht_info->control_channel = ht_info_ap->control_channel;
  6708. ht_info->extension_chan_offset =
  6709. ht_info_ap->extension_chan_offset;
  6710. ht_info->tx_chan_width = ht_info_ap->tx_chan_width;
  6711. ht_info->operating_mode = ht_info_ap->operating_mode;
  6712. }
  6713. if (ht_extra) {
  6714. extra_param_info.val = ht_extra->ht_param;
  6715. ht_info->control_channel = ht_extra->control_chan;
  6716. ht_info->extension_chan_offset =
  6717. extra_param_info.ext_chan_offset;
  6718. ht_info->tx_chan_width = extra_param_info.tx_chan_width;
  6719. op_mode.val = (u16)
  6720. le16_to_cpu(ht_extra->operation_mode);
  6721. ht_info->operating_mode = op_mode.op_mode;
  6722. IWL_DEBUG_MAC80211("control channel %d\n",
  6723. ht_extra->control_chan);
  6724. }
  6725. } else
  6726. ht_info->is_ht = 0;
  6727. IWL_DEBUG_MAC80211("leave\n");
  6728. return 0;
  6729. }
  6730. static int iwl_mac_conf_ht(struct ieee80211_hw *hw,
  6731. struct ieee80211_ht_capability *ht_cap,
  6732. struct ieee80211_ht_additional_info *ht_extra)
  6733. {
  6734. struct iwl_priv *priv = hw->priv;
  6735. int rs;
  6736. IWL_DEBUG_MAC80211("enter: \n");
  6737. rs = sta_ht_info_init(ht_cap, ht_extra, NULL, &priv->current_assoc_ht);
  6738. iwl4965_set_rxon_chain(priv);
  6739. if (priv && priv->assoc_id &&
  6740. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6741. unsigned long flags;
  6742. spin_lock_irqsave(&priv->lock, flags);
  6743. if (priv->beacon_int)
  6744. queue_work(priv->workqueue, &priv->post_associate.work);
  6745. else
  6746. priv->call_post_assoc_from_beacon = 1;
  6747. spin_unlock_irqrestore(&priv->lock, flags);
  6748. }
  6749. IWL_DEBUG_MAC80211("leave: control channel %d\n",
  6750. ht_extra->control_chan);
  6751. return rs;
  6752. }
  6753. static void iwl_set_ht_capab(struct ieee80211_hw *hw,
  6754. struct ieee80211_ht_capability *ht_cap,
  6755. u8 use_wide_chan)
  6756. {
  6757. union ht_cap_info cap;
  6758. union ht_param_info param_info;
  6759. memset(&cap, 0, sizeof(union ht_cap_info));
  6760. memset(&param_info, 0, sizeof(union ht_param_info));
  6761. cap.maximal_amsdu_size = HT_IE_MAX_AMSDU_SIZE_4K;
  6762. cap.green_field = 1;
  6763. cap.short_GI20 = 1;
  6764. cap.short_GI40 = 1;
  6765. cap.supported_chan_width_set = use_wide_chan;
  6766. cap.mimo_power_save_mode = 0x3;
  6767. param_info.max_rx_ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  6768. param_info.mpdu_density = CFG_HT_MPDU_DENSITY_DEF;
  6769. ht_cap->capabilities_info = (__le16) cpu_to_le16(cap.val);
  6770. ht_cap->mac_ht_params_info = (u8) param_info.val;
  6771. ht_cap->supported_mcs_set[0] = 0xff;
  6772. ht_cap->supported_mcs_set[1] = 0xff;
  6773. ht_cap->supported_mcs_set[4] =
  6774. (cap.supported_chan_width_set) ? 0x1: 0x0;
  6775. }
  6776. static void iwl_mac_get_ht_capab(struct ieee80211_hw *hw,
  6777. struct ieee80211_ht_capability *ht_cap)
  6778. {
  6779. u8 use_wide_channel = 1;
  6780. struct iwl_priv *priv = hw->priv;
  6781. IWL_DEBUG_MAC80211("enter: \n");
  6782. if (priv->channel_width != IWL_CHANNEL_WIDTH_40MHZ)
  6783. use_wide_channel = 0;
  6784. /* no fat tx allowed on 2.4GHZ */
  6785. if (priv->phymode != MODE_IEEE80211A)
  6786. use_wide_channel = 0;
  6787. iwl_set_ht_capab(hw, ht_cap, use_wide_channel);
  6788. IWL_DEBUG_MAC80211("leave: \n");
  6789. }
  6790. #endif /*CONFIG_IWLWIFI_HT*/
  6791. /*****************************************************************************
  6792. *
  6793. * sysfs attributes
  6794. *
  6795. *****************************************************************************/
  6796. #ifdef CONFIG_IWLWIFI_DEBUG
  6797. /*
  6798. * The following adds a new attribute to the sysfs representation
  6799. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6800. * used for controlling the debug level.
  6801. *
  6802. * See the level definitions in iwl for details.
  6803. */
  6804. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6805. {
  6806. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6807. }
  6808. static ssize_t store_debug_level(struct device_driver *d,
  6809. const char *buf, size_t count)
  6810. {
  6811. char *p = (char *)buf;
  6812. u32 val;
  6813. val = simple_strtoul(p, &p, 0);
  6814. if (p == buf)
  6815. printk(KERN_INFO DRV_NAME
  6816. ": %s is not in hex or decimal form.\n", buf);
  6817. else
  6818. iwl_debug_level = val;
  6819. return strnlen(buf, count);
  6820. }
  6821. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6822. show_debug_level, store_debug_level);
  6823. #endif /* CONFIG_IWLWIFI_DEBUG */
  6824. static ssize_t show_rf_kill(struct device *d,
  6825. struct device_attribute *attr, char *buf)
  6826. {
  6827. /*
  6828. * 0 - RF kill not enabled
  6829. * 1 - SW based RF kill active (sysfs)
  6830. * 2 - HW based RF kill active
  6831. * 3 - Both HW and SW based RF kill active
  6832. */
  6833. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6834. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6835. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6836. return sprintf(buf, "%i\n", val);
  6837. }
  6838. static ssize_t store_rf_kill(struct device *d,
  6839. struct device_attribute *attr,
  6840. const char *buf, size_t count)
  6841. {
  6842. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6843. mutex_lock(&priv->mutex);
  6844. iwl_radio_kill_sw(priv, buf[0] == '1');
  6845. mutex_unlock(&priv->mutex);
  6846. return count;
  6847. }
  6848. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6849. static ssize_t show_temperature(struct device *d,
  6850. struct device_attribute *attr, char *buf)
  6851. {
  6852. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6853. if (!iwl_is_alive(priv))
  6854. return -EAGAIN;
  6855. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6856. }
  6857. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6858. static ssize_t show_rs_window(struct device *d,
  6859. struct device_attribute *attr,
  6860. char *buf)
  6861. {
  6862. struct iwl_priv *priv = d->driver_data;
  6863. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6864. }
  6865. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6866. static ssize_t show_tx_power(struct device *d,
  6867. struct device_attribute *attr, char *buf)
  6868. {
  6869. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6870. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6871. }
  6872. static ssize_t store_tx_power(struct device *d,
  6873. struct device_attribute *attr,
  6874. const char *buf, size_t count)
  6875. {
  6876. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6877. char *p = (char *)buf;
  6878. u32 val;
  6879. val = simple_strtoul(p, &p, 10);
  6880. if (p == buf)
  6881. printk(KERN_INFO DRV_NAME
  6882. ": %s is not in decimal form.\n", buf);
  6883. else
  6884. iwl_hw_reg_set_txpower(priv, val);
  6885. return count;
  6886. }
  6887. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6888. static ssize_t show_flags(struct device *d,
  6889. struct device_attribute *attr, char *buf)
  6890. {
  6891. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6892. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6893. }
  6894. static ssize_t store_flags(struct device *d,
  6895. struct device_attribute *attr,
  6896. const char *buf, size_t count)
  6897. {
  6898. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6899. u32 flags = simple_strtoul(buf, NULL, 0);
  6900. mutex_lock(&priv->mutex);
  6901. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6902. /* Cancel any currently running scans... */
  6903. if (iwl_scan_cancel_timeout(priv, 100))
  6904. IWL_WARNING("Could not cancel scan.\n");
  6905. else {
  6906. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6907. flags);
  6908. priv->staging_rxon.flags = cpu_to_le32(flags);
  6909. iwl_commit_rxon(priv);
  6910. }
  6911. }
  6912. mutex_unlock(&priv->mutex);
  6913. return count;
  6914. }
  6915. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6916. static ssize_t show_filter_flags(struct device *d,
  6917. struct device_attribute *attr, char *buf)
  6918. {
  6919. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6920. return sprintf(buf, "0x%04X\n",
  6921. le32_to_cpu(priv->active_rxon.filter_flags));
  6922. }
  6923. static ssize_t store_filter_flags(struct device *d,
  6924. struct device_attribute *attr,
  6925. const char *buf, size_t count)
  6926. {
  6927. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6928. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6929. mutex_lock(&priv->mutex);
  6930. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6931. /* Cancel any currently running scans... */
  6932. if (iwl_scan_cancel_timeout(priv, 100))
  6933. IWL_WARNING("Could not cancel scan.\n");
  6934. else {
  6935. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6936. "0x%04X\n", filter_flags);
  6937. priv->staging_rxon.filter_flags =
  6938. cpu_to_le32(filter_flags);
  6939. iwl_commit_rxon(priv);
  6940. }
  6941. }
  6942. mutex_unlock(&priv->mutex);
  6943. return count;
  6944. }
  6945. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6946. store_filter_flags);
  6947. static ssize_t show_tune(struct device *d,
  6948. struct device_attribute *attr, char *buf)
  6949. {
  6950. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6951. return sprintf(buf, "0x%04X\n",
  6952. (priv->phymode << 8) |
  6953. le16_to_cpu(priv->active_rxon.channel));
  6954. }
  6955. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6956. static ssize_t store_tune(struct device *d,
  6957. struct device_attribute *attr,
  6958. const char *buf, size_t count)
  6959. {
  6960. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6961. char *p = (char *)buf;
  6962. u16 tune = simple_strtoul(p, &p, 0);
  6963. u8 phymode = (tune >> 8) & 0xff;
  6964. u16 channel = tune & 0xff;
  6965. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6966. mutex_lock(&priv->mutex);
  6967. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6968. (priv->phymode != phymode)) {
  6969. const struct iwl_channel_info *ch_info;
  6970. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6971. if (!ch_info) {
  6972. IWL_WARNING("Requested invalid phymode/channel "
  6973. "combination: %d %d\n", phymode, channel);
  6974. mutex_unlock(&priv->mutex);
  6975. return -EINVAL;
  6976. }
  6977. /* Cancel any currently running scans... */
  6978. if (iwl_scan_cancel_timeout(priv, 100))
  6979. IWL_WARNING("Could not cancel scan.\n");
  6980. else {
  6981. IWL_DEBUG_INFO("Committing phymode and "
  6982. "rxon.channel = %d %d\n",
  6983. phymode, channel);
  6984. iwl_set_rxon_channel(priv, phymode, channel);
  6985. iwl_set_flags_for_phymode(priv, phymode);
  6986. iwl_set_rate(priv);
  6987. iwl_commit_rxon(priv);
  6988. }
  6989. }
  6990. mutex_unlock(&priv->mutex);
  6991. return count;
  6992. }
  6993. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6994. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6995. static ssize_t show_measurement(struct device *d,
  6996. struct device_attribute *attr, char *buf)
  6997. {
  6998. struct iwl_priv *priv = dev_get_drvdata(d);
  6999. struct iwl_spectrum_notification measure_report;
  7000. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  7001. u8 *data = (u8 *) & measure_report;
  7002. unsigned long flags;
  7003. spin_lock_irqsave(&priv->lock, flags);
  7004. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  7005. spin_unlock_irqrestore(&priv->lock, flags);
  7006. return 0;
  7007. }
  7008. memcpy(&measure_report, &priv->measure_report, size);
  7009. priv->measurement_status = 0;
  7010. spin_unlock_irqrestore(&priv->lock, flags);
  7011. while (size && (PAGE_SIZE - len)) {
  7012. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7013. PAGE_SIZE - len, 1);
  7014. len = strlen(buf);
  7015. if (PAGE_SIZE - len)
  7016. buf[len++] = '\n';
  7017. ofs += 16;
  7018. size -= min(size, 16U);
  7019. }
  7020. return len;
  7021. }
  7022. static ssize_t store_measurement(struct device *d,
  7023. struct device_attribute *attr,
  7024. const char *buf, size_t count)
  7025. {
  7026. struct iwl_priv *priv = dev_get_drvdata(d);
  7027. struct ieee80211_measurement_params params = {
  7028. .channel = le16_to_cpu(priv->active_rxon.channel),
  7029. .start_time = cpu_to_le64(priv->last_tsf),
  7030. .duration = cpu_to_le16(1),
  7031. };
  7032. u8 type = IWL_MEASURE_BASIC;
  7033. u8 buffer[32];
  7034. u8 channel;
  7035. if (count) {
  7036. char *p = buffer;
  7037. strncpy(buffer, buf, min(sizeof(buffer), count));
  7038. channel = simple_strtoul(p, NULL, 0);
  7039. if (channel)
  7040. params.channel = channel;
  7041. p = buffer;
  7042. while (*p && *p != ' ')
  7043. p++;
  7044. if (*p)
  7045. type = simple_strtoul(p + 1, NULL, 0);
  7046. }
  7047. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7048. "channel %d (for '%s')\n", type, params.channel, buf);
  7049. iwl_get_measurement(priv, &params, type);
  7050. return count;
  7051. }
  7052. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7053. show_measurement, store_measurement);
  7054. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  7055. static ssize_t store_retry_rate(struct device *d,
  7056. struct device_attribute *attr,
  7057. const char *buf, size_t count)
  7058. {
  7059. struct iwl_priv *priv = dev_get_drvdata(d);
  7060. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7061. if (priv->retry_rate <= 0)
  7062. priv->retry_rate = 1;
  7063. return count;
  7064. }
  7065. static ssize_t show_retry_rate(struct device *d,
  7066. struct device_attribute *attr, char *buf)
  7067. {
  7068. struct iwl_priv *priv = dev_get_drvdata(d);
  7069. return sprintf(buf, "%d", priv->retry_rate);
  7070. }
  7071. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7072. store_retry_rate);
  7073. static ssize_t store_power_level(struct device *d,
  7074. struct device_attribute *attr,
  7075. const char *buf, size_t count)
  7076. {
  7077. struct iwl_priv *priv = dev_get_drvdata(d);
  7078. int rc;
  7079. int mode;
  7080. mode = simple_strtoul(buf, NULL, 0);
  7081. mutex_lock(&priv->mutex);
  7082. if (!iwl_is_ready(priv)) {
  7083. rc = -EAGAIN;
  7084. goto out;
  7085. }
  7086. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7087. mode = IWL_POWER_AC;
  7088. else
  7089. mode |= IWL_POWER_ENABLED;
  7090. if (mode != priv->power_mode) {
  7091. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7092. if (rc) {
  7093. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7094. goto out;
  7095. }
  7096. priv->power_mode = mode;
  7097. }
  7098. rc = count;
  7099. out:
  7100. mutex_unlock(&priv->mutex);
  7101. return rc;
  7102. }
  7103. #define MAX_WX_STRING 80
  7104. /* Values are in microsecond */
  7105. static const s32 timeout_duration[] = {
  7106. 350000,
  7107. 250000,
  7108. 75000,
  7109. 37000,
  7110. 25000,
  7111. };
  7112. static const s32 period_duration[] = {
  7113. 400000,
  7114. 700000,
  7115. 1000000,
  7116. 1000000,
  7117. 1000000
  7118. };
  7119. static ssize_t show_power_level(struct device *d,
  7120. struct device_attribute *attr, char *buf)
  7121. {
  7122. struct iwl_priv *priv = dev_get_drvdata(d);
  7123. int level = IWL_POWER_LEVEL(priv->power_mode);
  7124. char *p = buf;
  7125. p += sprintf(p, "%d ", level);
  7126. switch (level) {
  7127. case IWL_POWER_MODE_CAM:
  7128. case IWL_POWER_AC:
  7129. p += sprintf(p, "(AC)");
  7130. break;
  7131. case IWL_POWER_BATTERY:
  7132. p += sprintf(p, "(BATTERY)");
  7133. break;
  7134. default:
  7135. p += sprintf(p,
  7136. "(Timeout %dms, Period %dms)",
  7137. timeout_duration[level - 1] / 1000,
  7138. period_duration[level - 1] / 1000);
  7139. }
  7140. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7141. p += sprintf(p, " OFF\n");
  7142. else
  7143. p += sprintf(p, " \n");
  7144. return (p - buf + 1);
  7145. }
  7146. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7147. store_power_level);
  7148. static ssize_t show_channels(struct device *d,
  7149. struct device_attribute *attr, char *buf)
  7150. {
  7151. struct iwl_priv *priv = dev_get_drvdata(d);
  7152. int len = 0, i;
  7153. struct ieee80211_channel *channels = NULL;
  7154. const struct ieee80211_hw_mode *hw_mode = NULL;
  7155. int count = 0;
  7156. if (!iwl_is_ready(priv))
  7157. return -EAGAIN;
  7158. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  7159. if (!hw_mode)
  7160. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  7161. if (hw_mode) {
  7162. channels = hw_mode->channels;
  7163. count = hw_mode->num_channels;
  7164. }
  7165. len +=
  7166. sprintf(&buf[len],
  7167. "Displaying %d channels in 2.4GHz band "
  7168. "(802.11bg):\n", count);
  7169. for (i = 0; i < count; i++)
  7170. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7171. channels[i].chan,
  7172. channels[i].power_level,
  7173. channels[i].
  7174. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7175. " (IEEE 802.11h required)" : "",
  7176. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7177. || (channels[i].
  7178. flag &
  7179. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7180. ", IBSS",
  7181. channels[i].
  7182. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7183. "active/passive" : "passive only");
  7184. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  7185. if (hw_mode) {
  7186. channels = hw_mode->channels;
  7187. count = hw_mode->num_channels;
  7188. } else {
  7189. channels = NULL;
  7190. count = 0;
  7191. }
  7192. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  7193. "(802.11a):\n", count);
  7194. for (i = 0; i < count; i++)
  7195. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  7196. channels[i].chan,
  7197. channels[i].power_level,
  7198. channels[i].
  7199. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  7200. " (IEEE 802.11h required)" : "",
  7201. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  7202. || (channels[i].
  7203. flag &
  7204. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  7205. ", IBSS",
  7206. channels[i].
  7207. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  7208. "active/passive" : "passive only");
  7209. return len;
  7210. }
  7211. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7212. static ssize_t show_statistics(struct device *d,
  7213. struct device_attribute *attr, char *buf)
  7214. {
  7215. struct iwl_priv *priv = dev_get_drvdata(d);
  7216. u32 size = sizeof(struct iwl_notif_statistics);
  7217. u32 len = 0, ofs = 0;
  7218. u8 *data = (u8 *) & priv->statistics;
  7219. int rc = 0;
  7220. if (!iwl_is_alive(priv))
  7221. return -EAGAIN;
  7222. mutex_lock(&priv->mutex);
  7223. rc = iwl_send_statistics_request(priv);
  7224. mutex_unlock(&priv->mutex);
  7225. if (rc) {
  7226. len = sprintf(buf,
  7227. "Error sending statistics request: 0x%08X\n", rc);
  7228. return len;
  7229. }
  7230. while (size && (PAGE_SIZE - len)) {
  7231. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7232. PAGE_SIZE - len, 1);
  7233. len = strlen(buf);
  7234. if (PAGE_SIZE - len)
  7235. buf[len++] = '\n';
  7236. ofs += 16;
  7237. size -= min(size, 16U);
  7238. }
  7239. return len;
  7240. }
  7241. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7242. static ssize_t show_antenna(struct device *d,
  7243. struct device_attribute *attr, char *buf)
  7244. {
  7245. struct iwl_priv *priv = dev_get_drvdata(d);
  7246. if (!iwl_is_alive(priv))
  7247. return -EAGAIN;
  7248. return sprintf(buf, "%d\n", priv->antenna);
  7249. }
  7250. static ssize_t store_antenna(struct device *d,
  7251. struct device_attribute *attr,
  7252. const char *buf, size_t count)
  7253. {
  7254. int ant;
  7255. struct iwl_priv *priv = dev_get_drvdata(d);
  7256. if (count == 0)
  7257. return 0;
  7258. if (sscanf(buf, "%1i", &ant) != 1) {
  7259. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7260. return count;
  7261. }
  7262. if ((ant >= 0) && (ant <= 2)) {
  7263. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7264. priv->antenna = (enum iwl_antenna)ant;
  7265. } else
  7266. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7267. return count;
  7268. }
  7269. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7270. static ssize_t show_status(struct device *d,
  7271. struct device_attribute *attr, char *buf)
  7272. {
  7273. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  7274. if (!iwl_is_alive(priv))
  7275. return -EAGAIN;
  7276. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7277. }
  7278. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7279. static ssize_t dump_error_log(struct device *d,
  7280. struct device_attribute *attr,
  7281. const char *buf, size_t count)
  7282. {
  7283. char *p = (char *)buf;
  7284. if (p[0] == '1')
  7285. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  7286. return strnlen(buf, count);
  7287. }
  7288. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7289. static ssize_t dump_event_log(struct device *d,
  7290. struct device_attribute *attr,
  7291. const char *buf, size_t count)
  7292. {
  7293. char *p = (char *)buf;
  7294. if (p[0] == '1')
  7295. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  7296. return strnlen(buf, count);
  7297. }
  7298. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7299. /*****************************************************************************
  7300. *
  7301. * driver setup and teardown
  7302. *
  7303. *****************************************************************************/
  7304. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  7305. {
  7306. priv->workqueue = create_workqueue(DRV_NAME);
  7307. init_waitqueue_head(&priv->wait_command_queue);
  7308. INIT_WORK(&priv->up, iwl_bg_up);
  7309. INIT_WORK(&priv->restart, iwl_bg_restart);
  7310. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  7311. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  7312. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  7313. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  7314. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  7315. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  7316. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  7317. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  7318. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  7319. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  7320. iwl_hw_setup_deferred_work(priv);
  7321. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7322. iwl_irq_tasklet, (unsigned long)priv);
  7323. }
  7324. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  7325. {
  7326. iwl_hw_cancel_deferred_work(priv);
  7327. cancel_delayed_work(&priv->scan_check);
  7328. cancel_delayed_work(&priv->alive_start);
  7329. cancel_delayed_work(&priv->post_associate);
  7330. cancel_work_sync(&priv->beacon_update);
  7331. }
  7332. static struct attribute *iwl_sysfs_entries[] = {
  7333. &dev_attr_antenna.attr,
  7334. &dev_attr_channels.attr,
  7335. &dev_attr_dump_errors.attr,
  7336. &dev_attr_dump_events.attr,
  7337. &dev_attr_flags.attr,
  7338. &dev_attr_filter_flags.attr,
  7339. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  7340. &dev_attr_measurement.attr,
  7341. #endif
  7342. &dev_attr_power_level.attr,
  7343. &dev_attr_retry_rate.attr,
  7344. &dev_attr_rf_kill.attr,
  7345. &dev_attr_rs_window.attr,
  7346. &dev_attr_statistics.attr,
  7347. &dev_attr_status.attr,
  7348. &dev_attr_temperature.attr,
  7349. &dev_attr_tune.attr,
  7350. &dev_attr_tx_power.attr,
  7351. NULL
  7352. };
  7353. static struct attribute_group iwl_attribute_group = {
  7354. .name = NULL, /* put in device directory */
  7355. .attrs = iwl_sysfs_entries,
  7356. };
  7357. static struct ieee80211_ops iwl_hw_ops = {
  7358. .tx = iwl_mac_tx,
  7359. .start = iwl_mac_start,
  7360. .stop = iwl_mac_stop,
  7361. .add_interface = iwl_mac_add_interface,
  7362. .remove_interface = iwl_mac_remove_interface,
  7363. .config = iwl_mac_config,
  7364. .config_interface = iwl_mac_config_interface,
  7365. .configure_filter = iwl_configure_filter,
  7366. .set_key = iwl_mac_set_key,
  7367. .get_stats = iwl_mac_get_stats,
  7368. .get_tx_stats = iwl_mac_get_tx_stats,
  7369. .conf_tx = iwl_mac_conf_tx,
  7370. .get_tsf = iwl_mac_get_tsf,
  7371. .reset_tsf = iwl_mac_reset_tsf,
  7372. .beacon_update = iwl_mac_beacon_update,
  7373. #ifdef CONFIG_IWLWIFI_HT
  7374. .conf_ht = iwl_mac_conf_ht,
  7375. .get_ht_capab = iwl_mac_get_ht_capab,
  7376. #ifdef CONFIG_IWLWIFI_HT_AGG
  7377. .ht_tx_agg_start = iwl_mac_ht_tx_agg_start,
  7378. .ht_tx_agg_stop = iwl_mac_ht_tx_agg_stop,
  7379. .ht_rx_agg_start = iwl_mac_ht_rx_agg_start,
  7380. .ht_rx_agg_stop = iwl_mac_ht_rx_agg_stop,
  7381. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7382. #endif /* CONFIG_IWLWIFI_HT */
  7383. .hw_scan = iwl_mac_hw_scan
  7384. };
  7385. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7386. {
  7387. int err = 0;
  7388. struct iwl_priv *priv;
  7389. struct ieee80211_hw *hw;
  7390. int i;
  7391. if (iwl_param_disable_hw_scan) {
  7392. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7393. iwl_hw_ops.hw_scan = NULL;
  7394. }
  7395. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7396. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7397. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7398. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7399. err = -EINVAL;
  7400. goto out;
  7401. }
  7402. /* mac80211 allocates memory for this device instance, including
  7403. * space for this driver's private structure */
  7404. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  7405. if (hw == NULL) {
  7406. IWL_ERROR("Can not allocate network device\n");
  7407. err = -ENOMEM;
  7408. goto out;
  7409. }
  7410. SET_IEEE80211_DEV(hw, &pdev->dev);
  7411. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7412. priv = hw->priv;
  7413. priv->hw = hw;
  7414. priv->pci_dev = pdev;
  7415. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  7416. #ifdef CONFIG_IWLWIFI_DEBUG
  7417. iwl_debug_level = iwl_param_debug;
  7418. atomic_set(&priv->restrict_refcnt, 0);
  7419. #endif
  7420. priv->retry_rate = 1;
  7421. priv->ibss_beacon = NULL;
  7422. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7423. * the range of signal quality values that we'll provide.
  7424. * Negative values for level/noise indicate that we'll provide dBm.
  7425. * For WE, at least, non-0 values here *enable* display of values
  7426. * in app (iwconfig). */
  7427. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7428. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7429. hw->max_signal = 100; /* link quality indication (%) */
  7430. /* Tell mac80211 our Tx characteristics */
  7431. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7432. hw->queues = 4;
  7433. #ifdef CONFIG_IWLWIFI_HT
  7434. #ifdef CONFIG_IWLWIFI_HT_AGG
  7435. hw->queues = 16;
  7436. #endif /* CONFIG_IWLWIFI_HT_AGG */
  7437. #endif /* CONFIG_IWLWIFI_HT */
  7438. spin_lock_init(&priv->lock);
  7439. spin_lock_init(&priv->power_data.lock);
  7440. spin_lock_init(&priv->sta_lock);
  7441. spin_lock_init(&priv->hcmd_lock);
  7442. spin_lock_init(&priv->lq_mngr.lock);
  7443. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7444. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7445. INIT_LIST_HEAD(&priv->free_frames);
  7446. mutex_init(&priv->mutex);
  7447. if (pci_enable_device(pdev)) {
  7448. err = -ENODEV;
  7449. goto out_ieee80211_free_hw;
  7450. }
  7451. pci_set_master(pdev);
  7452. iwl_clear_stations_table(priv);
  7453. priv->data_retry_limit = -1;
  7454. priv->ieee_channels = NULL;
  7455. priv->ieee_rates = NULL;
  7456. priv->phymode = -1;
  7457. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7458. if (!err)
  7459. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7460. if (err) {
  7461. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7462. goto out_pci_disable_device;
  7463. }
  7464. pci_set_drvdata(pdev, priv);
  7465. err = pci_request_regions(pdev, DRV_NAME);
  7466. if (err)
  7467. goto out_pci_disable_device;
  7468. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7469. * PCI Tx retries from interfering with C3 CPU state */
  7470. pci_write_config_byte(pdev, 0x41, 0x00);
  7471. priv->hw_base = pci_iomap(pdev, 0, 0);
  7472. if (!priv->hw_base) {
  7473. err = -ENODEV;
  7474. goto out_pci_release_regions;
  7475. }
  7476. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7477. (unsigned long long) pci_resource_len(pdev, 0));
  7478. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7479. /* Initialize module parameter values here */
  7480. if (iwl_param_disable) {
  7481. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7482. IWL_DEBUG_INFO("Radio disabled.\n");
  7483. }
  7484. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7485. priv->ps_mode = 0;
  7486. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7487. priv->is_ht_enabled = 1;
  7488. priv->channel_width = IWL_CHANNEL_WIDTH_40MHZ;
  7489. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7490. priv->ps_mode = IWL_MIMO_PS_NONE;
  7491. priv->cck_power_index_compensation = iwl_read32(
  7492. priv, CSR_HW_REV_WA_REG);
  7493. iwl4965_set_rxon_chain(priv);
  7494. printk(KERN_INFO DRV_NAME
  7495. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7496. /* Device-specific setup */
  7497. if (iwl_hw_set_hw_setting(priv)) {
  7498. IWL_ERROR("failed to set hw settings\n");
  7499. mutex_unlock(&priv->mutex);
  7500. goto out_iounmap;
  7501. }
  7502. #ifdef CONFIG_IWLWIFI_QOS
  7503. if (iwl_param_qos_enable)
  7504. priv->qos_data.qos_enable = 1;
  7505. iwl_reset_qos(priv);
  7506. priv->qos_data.qos_active = 0;
  7507. priv->qos_data.qos_cap.val = 0;
  7508. #endif /* CONFIG_IWLWIFI_QOS */
  7509. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7510. iwl_setup_deferred_work(priv);
  7511. iwl_setup_rx_handlers(priv);
  7512. priv->rates_mask = IWL_RATES_MASK;
  7513. /* If power management is turned on, default to AC mode */
  7514. priv->power_mode = IWL_POWER_AC;
  7515. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7516. pci_enable_msi(pdev);
  7517. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7518. if (err) {
  7519. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7520. goto out_disable_msi;
  7521. }
  7522. mutex_lock(&priv->mutex);
  7523. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7524. if (err) {
  7525. IWL_ERROR("failed to create sysfs device attributes\n");
  7526. mutex_unlock(&priv->mutex);
  7527. goto out_release_irq;
  7528. }
  7529. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7530. * ucode filename and max sizes are card-specific. */
  7531. err = iwl_read_ucode(priv);
  7532. if (err) {
  7533. IWL_ERROR("Could not read microcode: %d\n", err);
  7534. mutex_unlock(&priv->mutex);
  7535. goto out_pci_alloc;
  7536. }
  7537. mutex_unlock(&priv->mutex);
  7538. IWL_DEBUG_INFO("Queing UP work.\n");
  7539. queue_work(priv->workqueue, &priv->up);
  7540. return 0;
  7541. out_pci_alloc:
  7542. iwl_dealloc_ucode_pci(priv);
  7543. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7544. out_release_irq:
  7545. free_irq(pdev->irq, priv);
  7546. out_disable_msi:
  7547. pci_disable_msi(pdev);
  7548. destroy_workqueue(priv->workqueue);
  7549. priv->workqueue = NULL;
  7550. iwl_unset_hw_setting(priv);
  7551. out_iounmap:
  7552. pci_iounmap(pdev, priv->hw_base);
  7553. out_pci_release_regions:
  7554. pci_release_regions(pdev);
  7555. out_pci_disable_device:
  7556. pci_disable_device(pdev);
  7557. pci_set_drvdata(pdev, NULL);
  7558. out_ieee80211_free_hw:
  7559. ieee80211_free_hw(priv->hw);
  7560. out:
  7561. return err;
  7562. }
  7563. static void iwl_pci_remove(struct pci_dev *pdev)
  7564. {
  7565. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7566. struct list_head *p, *q;
  7567. int i;
  7568. if (!priv)
  7569. return;
  7570. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7571. mutex_lock(&priv->mutex);
  7572. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7573. __iwl_down(priv);
  7574. mutex_unlock(&priv->mutex);
  7575. /* Free MAC hash list for ADHOC */
  7576. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7577. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7578. list_del(p);
  7579. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7580. }
  7581. }
  7582. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7583. iwl_dealloc_ucode_pci(priv);
  7584. if (priv->rxq.bd)
  7585. iwl_rx_queue_free(priv, &priv->rxq);
  7586. iwl_hw_txq_ctx_free(priv);
  7587. iwl_unset_hw_setting(priv);
  7588. iwl_clear_stations_table(priv);
  7589. if (priv->mac80211_registered) {
  7590. ieee80211_unregister_hw(priv->hw);
  7591. iwl_rate_control_unregister(priv->hw);
  7592. }
  7593. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7594. * priv->workqueue... so we can't take down the workqueue
  7595. * until now... */
  7596. destroy_workqueue(priv->workqueue);
  7597. priv->workqueue = NULL;
  7598. free_irq(pdev->irq, priv);
  7599. pci_disable_msi(pdev);
  7600. pci_iounmap(pdev, priv->hw_base);
  7601. pci_release_regions(pdev);
  7602. pci_disable_device(pdev);
  7603. pci_set_drvdata(pdev, NULL);
  7604. kfree(priv->channel_info);
  7605. kfree(priv->ieee_channels);
  7606. kfree(priv->ieee_rates);
  7607. if (priv->ibss_beacon)
  7608. dev_kfree_skb(priv->ibss_beacon);
  7609. ieee80211_free_hw(priv->hw);
  7610. }
  7611. #ifdef CONFIG_PM
  7612. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7613. {
  7614. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7615. mutex_lock(&priv->mutex);
  7616. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7617. /* Take down the device; powers it off, etc. */
  7618. __iwl_down(priv);
  7619. if (priv->mac80211_registered)
  7620. ieee80211_stop_queues(priv->hw);
  7621. pci_save_state(pdev);
  7622. pci_disable_device(pdev);
  7623. pci_set_power_state(pdev, PCI_D3hot);
  7624. mutex_unlock(&priv->mutex);
  7625. return 0;
  7626. }
  7627. static void iwl_resume(struct iwl_priv *priv)
  7628. {
  7629. unsigned long flags;
  7630. /* The following it a temporary work around due to the
  7631. * suspend / resume not fully initializing the NIC correctly.
  7632. * Without all of the following, resume will not attempt to take
  7633. * down the NIC (it shouldn't really need to) and will just try
  7634. * and bring the NIC back up. However that fails during the
  7635. * ucode verification process. This then causes iwl_down to be
  7636. * called *after* iwl_hw_nic_init() has succeeded -- which
  7637. * then lets the next init sequence succeed. So, we've
  7638. * replicated all of that NIC init code here... */
  7639. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7640. iwl_hw_nic_init(priv);
  7641. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7642. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7643. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7644. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7645. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7646. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7647. /* tell the device to stop sending interrupts */
  7648. iwl_disable_interrupts(priv);
  7649. spin_lock_irqsave(&priv->lock, flags);
  7650. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7651. if (!iwl_grab_restricted_access(priv)) {
  7652. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7653. APMG_CLK_VAL_DMA_CLK_RQT);
  7654. iwl_release_restricted_access(priv);
  7655. }
  7656. spin_unlock_irqrestore(&priv->lock, flags);
  7657. udelay(5);
  7658. iwl_hw_nic_reset(priv);
  7659. /* Bring the device back up */
  7660. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7661. queue_work(priv->workqueue, &priv->up);
  7662. }
  7663. static int iwl_pci_resume(struct pci_dev *pdev)
  7664. {
  7665. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7666. int err;
  7667. printk(KERN_INFO "Coming out of suspend...\n");
  7668. mutex_lock(&priv->mutex);
  7669. pci_set_power_state(pdev, PCI_D0);
  7670. err = pci_enable_device(pdev);
  7671. pci_restore_state(pdev);
  7672. /*
  7673. * Suspend/Resume resets the PCI configuration space, so we have to
  7674. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7675. * from interfering with C3 CPU state. pci_restore_state won't help
  7676. * here since it only restores the first 64 bytes pci config header.
  7677. */
  7678. pci_write_config_byte(pdev, 0x41, 0x00);
  7679. iwl_resume(priv);
  7680. mutex_unlock(&priv->mutex);
  7681. return 0;
  7682. }
  7683. #endif /* CONFIG_PM */
  7684. /*****************************************************************************
  7685. *
  7686. * driver and module entry point
  7687. *
  7688. *****************************************************************************/
  7689. static struct pci_driver iwl_driver = {
  7690. .name = DRV_NAME,
  7691. .id_table = iwl_hw_card_ids,
  7692. .probe = iwl_pci_probe,
  7693. .remove = __devexit_p(iwl_pci_remove),
  7694. #ifdef CONFIG_PM
  7695. .suspend = iwl_pci_suspend,
  7696. .resume = iwl_pci_resume,
  7697. #endif
  7698. };
  7699. static int __init iwl_init(void)
  7700. {
  7701. int ret;
  7702. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7703. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7704. ret = pci_register_driver(&iwl_driver);
  7705. if (ret) {
  7706. IWL_ERROR("Unable to initialize PCI module\n");
  7707. return ret;
  7708. }
  7709. #ifdef CONFIG_IWLWIFI_DEBUG
  7710. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7711. if (ret) {
  7712. IWL_ERROR("Unable to create driver sysfs file\n");
  7713. pci_unregister_driver(&iwl_driver);
  7714. return ret;
  7715. }
  7716. #endif
  7717. return ret;
  7718. }
  7719. static void __exit iwl_exit(void)
  7720. {
  7721. #ifdef CONFIG_IWLWIFI_DEBUG
  7722. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7723. #endif
  7724. pci_unregister_driver(&iwl_driver);
  7725. }
  7726. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7727. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7728. module_param_named(disable, iwl_param_disable, int, 0444);
  7729. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7730. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7731. MODULE_PARM_DESC(hwcrypto,
  7732. "using hardware crypto engine (default 0 [software])\n");
  7733. module_param_named(debug, iwl_param_debug, int, 0444);
  7734. MODULE_PARM_DESC(debug, "debug output mask");
  7735. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7736. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7737. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7738. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7739. /* QoS */
  7740. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7741. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7742. module_exit(iwl_exit);
  7743. module_init(iwl_init);