cx23885-cards.c 18 KB

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  1. /*
  2. * Driver for the Conexant CX23885 PCIe bridge
  3. *
  4. * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <linux/delay.h>
  25. #include <media/cx25840.h>
  26. #include "cx23885.h"
  27. #include "tuner-xc2028.h"
  28. /* ------------------------------------------------------------------ */
  29. /* board config info */
  30. struct cx23885_board cx23885_boards[] = {
  31. [CX23885_BOARD_UNKNOWN] = {
  32. .name = "UNKNOWN/GENERIC",
  33. /* Ensure safe default for unknown boards */
  34. .clk_freq = 0,
  35. .input = {{
  36. .type = CX23885_VMUX_COMPOSITE1,
  37. .vmux = 0,
  38. }, {
  39. .type = CX23885_VMUX_COMPOSITE2,
  40. .vmux = 1,
  41. }, {
  42. .type = CX23885_VMUX_COMPOSITE3,
  43. .vmux = 2,
  44. }, {
  45. .type = CX23885_VMUX_COMPOSITE4,
  46. .vmux = 3,
  47. } },
  48. },
  49. [CX23885_BOARD_HAUPPAUGE_HVR1800lp] = {
  50. .name = "Hauppauge WinTV-HVR1800lp",
  51. .portc = CX23885_MPEG_DVB,
  52. .input = {{
  53. .type = CX23885_VMUX_TELEVISION,
  54. .vmux = 0,
  55. .gpio0 = 0xff00,
  56. }, {
  57. .type = CX23885_VMUX_DEBUG,
  58. .vmux = 0,
  59. .gpio0 = 0xff01,
  60. }, {
  61. .type = CX23885_VMUX_COMPOSITE1,
  62. .vmux = 1,
  63. .gpio0 = 0xff02,
  64. }, {
  65. .type = CX23885_VMUX_SVIDEO,
  66. .vmux = 2,
  67. .gpio0 = 0xff02,
  68. } },
  69. },
  70. [CX23885_BOARD_HAUPPAUGE_HVR1800] = {
  71. .name = "Hauppauge WinTV-HVR1800",
  72. .porta = CX23885_ANALOG_VIDEO,
  73. .portb = CX23885_MPEG_ENCODER,
  74. .portc = CX23885_MPEG_DVB,
  75. .tuner_type = TUNER_PHILIPS_TDA8290,
  76. .tuner_addr = 0x42, /* 0x84 >> 1 */
  77. .input = {{
  78. .type = CX23885_VMUX_TELEVISION,
  79. .vmux = CX25840_VIN7_CH3 |
  80. CX25840_VIN5_CH2 |
  81. CX25840_VIN2_CH1,
  82. .gpio0 = 0,
  83. }, {
  84. .type = CX23885_VMUX_COMPOSITE1,
  85. .vmux = CX25840_VIN7_CH3 |
  86. CX25840_VIN4_CH2 |
  87. CX25840_VIN6_CH1,
  88. .gpio0 = 0,
  89. }, {
  90. .type = CX23885_VMUX_SVIDEO,
  91. .vmux = CX25840_VIN7_CH3 |
  92. CX25840_VIN4_CH2 |
  93. CX25840_VIN8_CH1 |
  94. CX25840_SVIDEO_ON,
  95. .gpio0 = 0,
  96. } },
  97. },
  98. [CX23885_BOARD_HAUPPAUGE_HVR1250] = {
  99. .name = "Hauppauge WinTV-HVR1250",
  100. .portc = CX23885_MPEG_DVB,
  101. .input = {{
  102. .type = CX23885_VMUX_TELEVISION,
  103. .vmux = 0,
  104. .gpio0 = 0xff00,
  105. }, {
  106. .type = CX23885_VMUX_DEBUG,
  107. .vmux = 0,
  108. .gpio0 = 0xff01,
  109. }, {
  110. .type = CX23885_VMUX_COMPOSITE1,
  111. .vmux = 1,
  112. .gpio0 = 0xff02,
  113. }, {
  114. .type = CX23885_VMUX_SVIDEO,
  115. .vmux = 2,
  116. .gpio0 = 0xff02,
  117. } },
  118. },
  119. [CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP] = {
  120. .name = "DViCO FusionHDTV5 Express",
  121. .portb = CX23885_MPEG_DVB,
  122. },
  123. [CX23885_BOARD_HAUPPAUGE_HVR1500Q] = {
  124. .name = "Hauppauge WinTV-HVR1500Q",
  125. .portc = CX23885_MPEG_DVB,
  126. },
  127. [CX23885_BOARD_HAUPPAUGE_HVR1500] = {
  128. .name = "Hauppauge WinTV-HVR1500",
  129. .portc = CX23885_MPEG_DVB,
  130. },
  131. [CX23885_BOARD_HAUPPAUGE_HVR1200] = {
  132. .name = "Hauppauge WinTV-HVR1200",
  133. .portc = CX23885_MPEG_DVB,
  134. },
  135. [CX23885_BOARD_HAUPPAUGE_HVR1700] = {
  136. .name = "Hauppauge WinTV-HVR1700",
  137. .portc = CX23885_MPEG_DVB,
  138. },
  139. [CX23885_BOARD_HAUPPAUGE_HVR1400] = {
  140. .name = "Hauppauge WinTV-HVR1400",
  141. .portc = CX23885_MPEG_DVB,
  142. },
  143. [CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP] = {
  144. .name = "DViCO FusionHDTV7 Dual Express",
  145. .portb = CX23885_MPEG_DVB,
  146. .portc = CX23885_MPEG_DVB,
  147. },
  148. [CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP] = {
  149. .name = "DViCO FusionHDTV DVB-T Dual Express",
  150. .portb = CX23885_MPEG_DVB,
  151. .portc = CX23885_MPEG_DVB,
  152. },
  153. [CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H] = {
  154. .name = "Leadtek Winfast PxDVR3200 H",
  155. .portc = CX23885_MPEG_DVB,
  156. },
  157. };
  158. const unsigned int cx23885_bcount = ARRAY_SIZE(cx23885_boards);
  159. /* ------------------------------------------------------------------ */
  160. /* PCI subsystem IDs */
  161. struct cx23885_subid cx23885_subids[] = {
  162. {
  163. .subvendor = 0x0070,
  164. .subdevice = 0x3400,
  165. .card = CX23885_BOARD_UNKNOWN,
  166. }, {
  167. .subvendor = 0x0070,
  168. .subdevice = 0x7600,
  169. .card = CX23885_BOARD_HAUPPAUGE_HVR1800lp,
  170. }, {
  171. .subvendor = 0x0070,
  172. .subdevice = 0x7800,
  173. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  174. }, {
  175. .subvendor = 0x0070,
  176. .subdevice = 0x7801,
  177. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  178. }, {
  179. .subvendor = 0x0070,
  180. .subdevice = 0x7809,
  181. .card = CX23885_BOARD_HAUPPAUGE_HVR1800,
  182. }, {
  183. .subvendor = 0x0070,
  184. .subdevice = 0x7911,
  185. .card = CX23885_BOARD_HAUPPAUGE_HVR1250,
  186. }, {
  187. .subvendor = 0x18ac,
  188. .subdevice = 0xd500,
  189. .card = CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP,
  190. }, {
  191. .subvendor = 0x0070,
  192. .subdevice = 0x7790,
  193. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  194. }, {
  195. .subvendor = 0x0070,
  196. .subdevice = 0x7797,
  197. .card = CX23885_BOARD_HAUPPAUGE_HVR1500Q,
  198. }, {
  199. .subvendor = 0x0070,
  200. .subdevice = 0x7710,
  201. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  202. }, {
  203. .subvendor = 0x0070,
  204. .subdevice = 0x7717,
  205. .card = CX23885_BOARD_HAUPPAUGE_HVR1500,
  206. }, {
  207. .subvendor = 0x0070,
  208. .subdevice = 0x71d1,
  209. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  210. }, {
  211. .subvendor = 0x0070,
  212. .subdevice = 0x71d3,
  213. .card = CX23885_BOARD_HAUPPAUGE_HVR1200,
  214. }, {
  215. .subvendor = 0x0070,
  216. .subdevice = 0x8101,
  217. .card = CX23885_BOARD_HAUPPAUGE_HVR1700,
  218. }, {
  219. .subvendor = 0x0070,
  220. .subdevice = 0x8010,
  221. .card = CX23885_BOARD_HAUPPAUGE_HVR1400,
  222. }, {
  223. .subvendor = 0x18ac,
  224. .subdevice = 0xd618,
  225. .card = CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP,
  226. }, {
  227. .subvendor = 0x18ac,
  228. .subdevice = 0xdb78,
  229. .card = CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP,
  230. }, {
  231. .subvendor = 0x107d,
  232. .subdevice = 0x6681,
  233. .card = CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H,
  234. },
  235. };
  236. const unsigned int cx23885_idcount = ARRAY_SIZE(cx23885_subids);
  237. void cx23885_card_list(struct cx23885_dev *dev)
  238. {
  239. int i;
  240. if (0 == dev->pci->subsystem_vendor &&
  241. 0 == dev->pci->subsystem_device) {
  242. printk(KERN_INFO
  243. "%s: Board has no valid PCIe Subsystem ID and can't\n"
  244. "%s: be autodetected. Pass card=<n> insmod option\n"
  245. "%s: to workaround that. Redirect complaints to the\n"
  246. "%s: vendor of the TV card. Best regards,\n"
  247. "%s: -- tux\n",
  248. dev->name, dev->name, dev->name, dev->name, dev->name);
  249. } else {
  250. printk(KERN_INFO
  251. "%s: Your board isn't known (yet) to the driver.\n"
  252. "%s: Try to pick one of the existing card configs via\n"
  253. "%s: card=<n> insmod option. Updating to the latest\n"
  254. "%s: version might help as well.\n",
  255. dev->name, dev->name, dev->name, dev->name);
  256. }
  257. printk(KERN_INFO "%s: Here is a list of valid choices for the card=<n> insmod option:\n",
  258. dev->name);
  259. for (i = 0; i < cx23885_bcount; i++)
  260. printk(KERN_INFO "%s: card=%d -> %s\n",
  261. dev->name, i, cx23885_boards[i].name);
  262. }
  263. static void hauppauge_eeprom(struct cx23885_dev *dev, u8 *eeprom_data)
  264. {
  265. struct tveeprom tv;
  266. tveeprom_hauppauge_analog(&dev->i2c_bus[0].i2c_client, &tv,
  267. eeprom_data);
  268. /* Make sure we support the board model */
  269. switch (tv.model) {
  270. case 71009:
  271. /* WinTV-HVR1200 (PCIe, Retail, full height)
  272. * DVB-T and basic analog */
  273. case 71359:
  274. /* WinTV-HVR1200 (PCIe, OEM, half height)
  275. * DVB-T and basic analog */
  276. case 71439:
  277. /* WinTV-HVR1200 (PCIe, OEM, half height)
  278. * DVB-T and basic analog */
  279. case 71449:
  280. /* WinTV-HVR1200 (PCIe, OEM, full height)
  281. * DVB-T and basic analog */
  282. case 71939:
  283. /* WinTV-HVR1200 (PCIe, OEM, half height)
  284. * DVB-T and basic analog */
  285. case 71949:
  286. /* WinTV-HVR1200 (PCIe, OEM, full height)
  287. * DVB-T and basic analog */
  288. case 71959:
  289. /* WinTV-HVR1200 (PCIe, OEM, full height)
  290. * DVB-T and basic analog */
  291. case 71979:
  292. /* WinTV-HVR1200 (PCIe, OEM, half height)
  293. * DVB-T and basic analog */
  294. case 71999:
  295. /* WinTV-HVR1200 (PCIe, OEM, full height)
  296. * DVB-T and basic analog */
  297. case 76601:
  298. /* WinTV-HVR1800lp (PCIe, Retail, No IR, Dual
  299. channel ATSC and MPEG2 HW Encoder */
  300. case 77001:
  301. /* WinTV-HVR1500 (Express Card, OEM, No IR, ATSC
  302. and Basic analog */
  303. case 77011:
  304. /* WinTV-HVR1500 (Express Card, Retail, No IR, ATSC
  305. and Basic analog */
  306. case 77041:
  307. /* WinTV-HVR1500Q (Express Card, OEM, No IR, ATSC/QAM
  308. and Basic analog */
  309. case 77051:
  310. /* WinTV-HVR1500Q (Express Card, Retail, No IR, ATSC/QAM
  311. and Basic analog */
  312. case 78011:
  313. /* WinTV-HVR1800 (PCIe, Retail, 3.5mm in, IR, No FM,
  314. Dual channel ATSC and MPEG2 HW Encoder */
  315. case 78501:
  316. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  317. Dual channel ATSC and MPEG2 HW Encoder */
  318. case 78521:
  319. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, FM,
  320. Dual channel ATSC and MPEG2 HW Encoder */
  321. case 78531:
  322. /* WinTV-HVR1800 (PCIe, OEM, RCA in, No IR, No FM,
  323. Dual channel ATSC and MPEG2 HW Encoder */
  324. case 78631:
  325. /* WinTV-HVR1800 (PCIe, OEM, No IR, No FM,
  326. Dual channel ATSC and MPEG2 HW Encoder */
  327. case 79001:
  328. /* WinTV-HVR1250 (PCIe, Retail, IR, full height,
  329. ATSC and Basic analog */
  330. case 79101:
  331. /* WinTV-HVR1250 (PCIe, Retail, IR, half height,
  332. ATSC and Basic analog */
  333. case 79561:
  334. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  335. ATSC and Basic analog */
  336. case 79571:
  337. /* WinTV-HVR1250 (PCIe, OEM, No IR, full height,
  338. ATSC and Basic analog */
  339. case 79671:
  340. /* WinTV-HVR1250 (PCIe, OEM, No IR, half height,
  341. ATSC and Basic analog */
  342. case 80019:
  343. /* WinTV-HVR1400 (Express Card, Retail, IR,
  344. * DVB-T and Basic analog */
  345. case 81509:
  346. /* WinTV-HVR1700 (PCIe, OEM, No IR, half height)
  347. * DVB-T and MPEG2 HW Encoder */
  348. case 81519:
  349. /* WinTV-HVR1700 (PCIe, OEM, No IR, full height)
  350. * DVB-T and MPEG2 HW Encoder */
  351. break;
  352. default:
  353. printk(KERN_WARNING "%s: warning: unknown hauppauge model #%d\n",
  354. dev->name, tv.model);
  355. break;
  356. }
  357. printk(KERN_INFO "%s: hauppauge eeprom: model=%d\n",
  358. dev->name, tv.model);
  359. }
  360. int cx23885_tuner_callback(void *priv, int component, int command, int arg)
  361. {
  362. struct cx23885_tsport *port = priv;
  363. struct cx23885_dev *dev = port->dev;
  364. u32 bitmask = 0;
  365. if (command == XC2028_RESET_CLK)
  366. return 0;
  367. if (command != 0) {
  368. printk(KERN_ERR "%s(): Unknown command 0x%x.\n",
  369. __func__, command);
  370. return -EINVAL;
  371. }
  372. switch (dev->board) {
  373. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  374. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  375. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  376. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  377. /* Tuner Reset Command */
  378. bitmask = 0x04;
  379. break;
  380. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  381. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  382. /* Two identical tuners on two different i2c buses,
  383. * we need to reset the correct gpio. */
  384. if (port->nr == 0)
  385. bitmask = 0x01;
  386. else if (port->nr == 1)
  387. bitmask = 0x04;
  388. break;
  389. }
  390. if (bitmask) {
  391. /* Drive the tuner into reset and back out */
  392. cx_clear(GP0_IO, bitmask);
  393. mdelay(200);
  394. cx_set(GP0_IO, bitmask);
  395. }
  396. return 0;
  397. }
  398. void cx23885_gpio_setup(struct cx23885_dev *dev)
  399. {
  400. switch (dev->board) {
  401. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  402. /* GPIO-0 cx24227 demodulator reset */
  403. cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */
  404. break;
  405. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  406. /* GPIO-0 cx24227 demodulator */
  407. /* GPIO-2 xc3028 tuner */
  408. /* Put the parts into reset */
  409. cx_set(GP0_IO, 0x00050000);
  410. cx_clear(GP0_IO, 0x00000005);
  411. msleep(5);
  412. /* Bring the parts out of reset */
  413. cx_set(GP0_IO, 0x00050005);
  414. break;
  415. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  416. /* GPIO-0 cx24227 demodulator reset */
  417. /* GPIO-2 xc5000 tuner reset */
  418. cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */
  419. break;
  420. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  421. /* GPIO-0 656_CLK */
  422. /* GPIO-1 656_D0 */
  423. /* GPIO-2 8295A Reset */
  424. /* GPIO-3-10 cx23417 data0-7 */
  425. /* GPIO-11-14 cx23417 addr0-3 */
  426. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  427. /* GPIO-19 IR_RX */
  428. /* CX23417 GPIO's */
  429. /* EIO15 Zilog Reset */
  430. /* EIO14 S5H1409/CX24227 Reset */
  431. /* Force the TDA8295A into reset and back */
  432. cx_set(GP0_IO, 0x00040004);
  433. mdelay(20);
  434. cx_clear(GP0_IO, 0x00000004);
  435. mdelay(20);
  436. cx_set(GP0_IO, 0x00040004);
  437. mdelay(20);
  438. break;
  439. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  440. /* GPIO-0 tda10048 demodulator reset */
  441. /* GPIO-2 tda18271 tuner reset */
  442. /* Put the parts into reset and back */
  443. cx_set(GP0_IO, 0x00050000);
  444. mdelay(20);
  445. cx_clear(GP0_IO, 0x00000005);
  446. mdelay(20);
  447. cx_set(GP0_IO, 0x00050005);
  448. break;
  449. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  450. /* GPIO-0 TDA10048 demodulator reset */
  451. /* GPIO-2 TDA8295A Reset */
  452. /* GPIO-3-10 cx23417 data0-7 */
  453. /* GPIO-11-14 cx23417 addr0-3 */
  454. /* GPIO-15-18 cx23417 READY, CS, RD, WR */
  455. /* The following GPIO's are on the interna AVCore (cx25840) */
  456. /* GPIO-19 IR_RX */
  457. /* GPIO-20 IR_TX 416/DVBT Select */
  458. /* GPIO-21 IIS DAT */
  459. /* GPIO-22 IIS WCLK */
  460. /* GPIO-23 IIS BCLK */
  461. /* Put the parts into reset and back */
  462. cx_set(GP0_IO, 0x00050000);
  463. mdelay(20);
  464. cx_clear(GP0_IO, 0x00000005);
  465. mdelay(20);
  466. cx_set(GP0_IO, 0x00050005);
  467. break;
  468. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  469. /* GPIO-0 Dibcom7000p demodulator reset */
  470. /* GPIO-2 xc3028L tuner reset */
  471. /* GPIO-13 LED */
  472. /* Put the parts into reset and back */
  473. cx_set(GP0_IO, 0x00050000);
  474. mdelay(20);
  475. cx_clear(GP0_IO, 0x00000005);
  476. mdelay(20);
  477. cx_set(GP0_IO, 0x00050005);
  478. break;
  479. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  480. /* GPIO-0 xc5000 tuner reset i2c bus 0 */
  481. /* GPIO-1 s5h1409 demod reset i2c bus 0 */
  482. /* GPIO-2 xc5000 tuner reset i2c bus 1 */
  483. /* GPIO-3 s5h1409 demod reset i2c bus 0 */
  484. /* Put the parts into reset and back */
  485. cx_set(GP0_IO, 0x000f0000);
  486. mdelay(20);
  487. cx_clear(GP0_IO, 0x0000000f);
  488. mdelay(20);
  489. cx_set(GP0_IO, 0x000f000f);
  490. break;
  491. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  492. /* GPIO-0 portb xc3028 reset */
  493. /* GPIO-1 portb zl10353 reset */
  494. /* GPIO-2 portc xc3028 reset */
  495. /* GPIO-3 portc zl10353 reset */
  496. /* Put the parts into reset and back */
  497. cx_set(GP0_IO, 0x000f0000);
  498. mdelay(20);
  499. cx_clear(GP0_IO, 0x0000000f);
  500. mdelay(20);
  501. cx_set(GP0_IO, 0x000f000f);
  502. break;
  503. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  504. /* GPIO-2 xc3028 tuner reset */
  505. /* The following GPIO's are on the internal AVCore (cx25840) */
  506. /* GPIO-? zl10353 demod reset */
  507. /* Put the parts into reset and back */
  508. cx_set(GP0_IO, 0x00040000);
  509. mdelay(20);
  510. cx_clear(GP0_IO, 0x00000004);
  511. mdelay(20);
  512. cx_set(GP0_IO, 0x00040004);
  513. break;
  514. }
  515. }
  516. int cx23885_ir_init(struct cx23885_dev *dev)
  517. {
  518. switch (dev->board) {
  519. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  520. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  521. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  522. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  523. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  524. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  525. /* FIXME: Implement me */
  526. break;
  527. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  528. request_module("ir-kbd-i2c");
  529. break;
  530. }
  531. return 0;
  532. }
  533. void cx23885_card_setup(struct cx23885_dev *dev)
  534. {
  535. struct cx23885_tsport *ts1 = &dev->ts1;
  536. struct cx23885_tsport *ts2 = &dev->ts2;
  537. static u8 eeprom[256];
  538. if (dev->i2c_bus[0].i2c_rc == 0) {
  539. dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
  540. tveeprom_read(&dev->i2c_bus[0].i2c_client,
  541. eeprom, sizeof(eeprom));
  542. }
  543. switch (dev->board) {
  544. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  545. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  546. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  547. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  548. if (dev->i2c_bus[0].i2c_rc == 0)
  549. hauppauge_eeprom(dev, eeprom+0x80);
  550. break;
  551. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  552. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  553. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  554. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  555. if (dev->i2c_bus[0].i2c_rc == 0)
  556. hauppauge_eeprom(dev, eeprom+0xc0);
  557. break;
  558. }
  559. switch (dev->board) {
  560. case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
  561. case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP:
  562. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  563. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  564. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  565. /* break omitted intentionally */
  566. case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
  567. ts1->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  568. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  569. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  570. break;
  571. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  572. /* Defaults for VID B - Analog encoder */
  573. /* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
  574. ts1->gen_ctrl_val = 0x10e;
  575. ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  576. ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  577. /* APB_TSVALERR_POL (active low)*/
  578. ts1->vld_misc_val = 0x2000;
  579. ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
  580. /* Defaults for VID C */
  581. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  582. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  583. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  584. break;
  585. case CX23885_BOARD_HAUPPAUGE_HVR1250:
  586. case CX23885_BOARD_HAUPPAUGE_HVR1500:
  587. case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
  588. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  589. case CX23885_BOARD_HAUPPAUGE_HVR1200:
  590. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  591. case CX23885_BOARD_HAUPPAUGE_HVR1400:
  592. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  593. default:
  594. ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
  595. ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
  596. ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
  597. }
  598. /* Certain boards support analog, or require the avcore to be
  599. * loaded, ensure this happens.
  600. */
  601. switch (dev->board) {
  602. case CX23885_BOARD_HAUPPAUGE_HVR1800:
  603. case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
  604. case CX23885_BOARD_HAUPPAUGE_HVR1700:
  605. case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
  606. request_module("cx25840");
  607. break;
  608. }
  609. }
  610. /* ------------------------------------------------------------------ */