dma-s3c2410.c 4.4 KB

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  1. /* linux/arch/arm/mach-s3c2410/dma.c
  2. *
  3. * Copyright (c) 2006 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * S3C2410 DMA selection
  7. *
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/device.h>
  17. #include <linux/serial_core.h>
  18. #include <mach/map.h>
  19. #include <mach/dma.h>
  20. #include <plat/cpu.h>
  21. #include <plat/dma-s3c24xx.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-gpio.h>
  24. #include <plat/regs-dma.h>
  25. #include <mach/regs-lcd.h>
  26. #include <mach/regs-sdi.h>
  27. #include <plat/regs-spi.h>
  28. static struct s3c24xx_dma_map __initdata s3c2410_dma_mappings[] = {
  29. [DMACH_XD0] = {
  30. .name = "xdreq0",
  31. .channels[0] = S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
  32. },
  33. [DMACH_XD1] = {
  34. .name = "xdreq1",
  35. .channels[1] = S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
  36. },
  37. [DMACH_SDI] = {
  38. .name = "sdi",
  39. .channels[0] = S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
  40. .channels[2] = S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
  41. .channels[3] = S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
  42. },
  43. [DMACH_SPI0] = {
  44. .name = "spi0",
  45. .channels[1] = S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
  46. },
  47. [DMACH_SPI1] = {
  48. .name = "spi1",
  49. .channels[3] = S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
  50. },
  51. [DMACH_UART0] = {
  52. .name = "uart0",
  53. .channels[0] = S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
  54. },
  55. [DMACH_UART1] = {
  56. .name = "uart1",
  57. .channels[1] = S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
  58. },
  59. [DMACH_UART2] = {
  60. .name = "uart2",
  61. .channels[3] = S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
  62. },
  63. [DMACH_TIMER] = {
  64. .name = "timer",
  65. .channels[0] = S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
  66. .channels[2] = S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
  67. .channels[3] = S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
  68. },
  69. [DMACH_I2S_IN] = {
  70. .name = "i2s-sdi",
  71. .channels[1] = S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
  72. .channels[2] = S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
  73. },
  74. [DMACH_I2S_OUT] = {
  75. .name = "i2s-sdo",
  76. .channels[2] = S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
  77. },
  78. [DMACH_USB_EP1] = {
  79. .name = "usb-ep1",
  80. .channels[0] = S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
  81. },
  82. [DMACH_USB_EP2] = {
  83. .name = "usb-ep2",
  84. .channels[1] = S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
  85. },
  86. [DMACH_USB_EP3] = {
  87. .name = "usb-ep3",
  88. .channels[2] = S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
  89. },
  90. [DMACH_USB_EP4] = {
  91. .name = "usb-ep4",
  92. .channels[3] =S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
  93. },
  94. };
  95. static void s3c2410_dma_select(struct s3c2410_dma_chan *chan,
  96. struct s3c24xx_dma_map *map)
  97. {
  98. chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
  99. }
  100. static struct s3c24xx_dma_selection __initdata s3c2410_dma_sel = {
  101. .select = s3c2410_dma_select,
  102. .dcon_mask = 7 << 24,
  103. .map = s3c2410_dma_mappings,
  104. .map_size = ARRAY_SIZE(s3c2410_dma_mappings),
  105. };
  106. static struct s3c24xx_dma_order __initdata s3c2410_dma_order = {
  107. .channels = {
  108. [DMACH_SDI] = {
  109. .list = {
  110. [0] = 3 | DMA_CH_VALID,
  111. [1] = 2 | DMA_CH_VALID,
  112. [2] = 0 | DMA_CH_VALID,
  113. },
  114. },
  115. [DMACH_I2S_IN] = {
  116. .list = {
  117. [0] = 1 | DMA_CH_VALID,
  118. [1] = 2 | DMA_CH_VALID,
  119. },
  120. },
  121. },
  122. };
  123. static int __init s3c2410_dma_add(struct device *dev,
  124. struct subsys_interface *sif)
  125. {
  126. s3c2410_dma_init();
  127. s3c24xx_dma_order_set(&s3c2410_dma_order);
  128. return s3c24xx_dma_init_map(&s3c2410_dma_sel);
  129. }
  130. #if defined(CONFIG_CPU_S3C2410)
  131. static struct subsys_interface s3c2410_dma_interface = {
  132. .name = "s3c2410_dma",
  133. .subsys = &s3c2410_subsys,
  134. .add_dev = s3c2410_dma_add,
  135. };
  136. static int __init s3c2410_dma_drvinit(void)
  137. {
  138. return subsys_interface_register(&s3c2410_dma_interface);
  139. }
  140. arch_initcall(s3c2410_dma_drvinit);
  141. static struct subsys_interface s3c2410a_dma_interface = {
  142. .name = "s3c2410a_dma",
  143. .subsys = &s3c2410a_subsys,
  144. .add_dev = s3c2410_dma_add,
  145. };
  146. static int __init s3c2410a_dma_drvinit(void)
  147. {
  148. return subsys_interface_register(&s3c2410a_dma_interface);
  149. }
  150. arch_initcall(s3c2410a_dma_drvinit);
  151. #endif
  152. #if defined(CONFIG_CPU_S3C2442)
  153. /* S3C2442 DMA contains the same selection table as the S3C2410 */
  154. static struct subsys_interface s3c2442_dma_interface = {
  155. .name = "s3c2442_dma",
  156. .subsys = &s3c2442_subsys,
  157. .add_dev = s3c2410_dma_add,
  158. };
  159. static int __init s3c2442_dma_drvinit(void)
  160. {
  161. return subsys_interface_register(&s3c2442_dma_interface);
  162. }
  163. arch_initcall(s3c2442_dma_drvinit);
  164. #endif