musb_gadget_ep0.c 25 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017
  1. /*
  2. * MUSB OTG peripheral driver ep0 handling
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. * Copyright (C) 2008-2009 MontaVista Software, Inc. <source@mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  24. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  25. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  26. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  27. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  28. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  29. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  30. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  31. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  32. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  33. *
  34. */
  35. #include <linux/kernel.h>
  36. #include <linux/list.h>
  37. #include <linux/timer.h>
  38. #include <linux/spinlock.h>
  39. #include <linux/init.h>
  40. #include <linux/device.h>
  41. #include <linux/interrupt.h>
  42. #include "musb_core.h"
  43. /* ep0 is always musb->endpoints[0].ep_in */
  44. #define next_ep0_request(musb) next_in_request(&(musb)->endpoints[0])
  45. /*
  46. * locking note: we use only the controller lock, for simpler correctness.
  47. * It's always held with IRQs blocked.
  48. *
  49. * It protects the ep0 request queue as well as ep0_state, not just the
  50. * controller and indexed registers. And that lock stays held unless it
  51. * needs to be dropped to allow reentering this driver ... like upcalls to
  52. * the gadget driver, or adjusting endpoint halt status.
  53. */
  54. static char *decode_ep0stage(u8 stage)
  55. {
  56. switch (stage) {
  57. case MUSB_EP0_STAGE_IDLE: return "idle";
  58. case MUSB_EP0_STAGE_SETUP: return "setup";
  59. case MUSB_EP0_STAGE_TX: return "in";
  60. case MUSB_EP0_STAGE_RX: return "out";
  61. case MUSB_EP0_STAGE_ACKWAIT: return "wait";
  62. case MUSB_EP0_STAGE_STATUSIN: return "in/status";
  63. case MUSB_EP0_STAGE_STATUSOUT: return "out/status";
  64. default: return "?";
  65. }
  66. }
  67. /* handle a standard GET_STATUS request
  68. * Context: caller holds controller lock
  69. */
  70. static int service_tx_status_request(
  71. struct musb *musb,
  72. const struct usb_ctrlrequest *ctrlrequest)
  73. {
  74. void __iomem *mbase = musb->mregs;
  75. int handled = 1;
  76. u8 result[2], epnum = 0;
  77. const u8 recip = ctrlrequest->bRequestType & USB_RECIP_MASK;
  78. result[1] = 0;
  79. switch (recip) {
  80. case USB_RECIP_DEVICE:
  81. result[0] = musb->is_self_powered << USB_DEVICE_SELF_POWERED;
  82. result[0] |= musb->may_wakeup << USB_DEVICE_REMOTE_WAKEUP;
  83. #ifdef CONFIG_USB_MUSB_OTG
  84. if (musb->g.is_otg) {
  85. result[0] |= musb->g.b_hnp_enable
  86. << USB_DEVICE_B_HNP_ENABLE;
  87. result[0] |= musb->g.a_alt_hnp_support
  88. << USB_DEVICE_A_ALT_HNP_SUPPORT;
  89. result[0] |= musb->g.a_hnp_support
  90. << USB_DEVICE_A_HNP_SUPPORT;
  91. }
  92. #endif
  93. break;
  94. case USB_RECIP_INTERFACE:
  95. result[0] = 0;
  96. break;
  97. case USB_RECIP_ENDPOINT: {
  98. int is_in;
  99. struct musb_ep *ep;
  100. u16 tmp;
  101. void __iomem *regs;
  102. epnum = (u8) ctrlrequest->wIndex;
  103. if (!epnum) {
  104. result[0] = 0;
  105. break;
  106. }
  107. is_in = epnum & USB_DIR_IN;
  108. if (is_in) {
  109. epnum &= 0x0f;
  110. ep = &musb->endpoints[epnum].ep_in;
  111. } else {
  112. ep = &musb->endpoints[epnum].ep_out;
  113. }
  114. regs = musb->endpoints[epnum].regs;
  115. if (epnum >= MUSB_C_NUM_EPS || !ep->desc) {
  116. handled = -EINVAL;
  117. break;
  118. }
  119. musb_ep_select(mbase, epnum);
  120. if (is_in)
  121. tmp = musb_readw(regs, MUSB_TXCSR)
  122. & MUSB_TXCSR_P_SENDSTALL;
  123. else
  124. tmp = musb_readw(regs, MUSB_RXCSR)
  125. & MUSB_RXCSR_P_SENDSTALL;
  126. musb_ep_select(mbase, 0);
  127. result[0] = tmp ? 1 : 0;
  128. } break;
  129. default:
  130. /* class, vendor, etc ... delegate */
  131. handled = 0;
  132. break;
  133. }
  134. /* fill up the fifo; caller updates csr0 */
  135. if (handled > 0) {
  136. u16 len = le16_to_cpu(ctrlrequest->wLength);
  137. if (len > 2)
  138. len = 2;
  139. musb_write_fifo(&musb->endpoints[0], len, result);
  140. }
  141. return handled;
  142. }
  143. /*
  144. * handle a control-IN request, the end0 buffer contains the current request
  145. * that is supposed to be a standard control request. Assumes the fifo to
  146. * be at least 2 bytes long.
  147. *
  148. * @return 0 if the request was NOT HANDLED,
  149. * < 0 when error
  150. * > 0 when the request is processed
  151. *
  152. * Context: caller holds controller lock
  153. */
  154. static int
  155. service_in_request(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
  156. {
  157. int handled = 0; /* not handled */
  158. if ((ctrlrequest->bRequestType & USB_TYPE_MASK)
  159. == USB_TYPE_STANDARD) {
  160. switch (ctrlrequest->bRequest) {
  161. case USB_REQ_GET_STATUS:
  162. handled = service_tx_status_request(musb,
  163. ctrlrequest);
  164. break;
  165. /* case USB_REQ_SYNC_FRAME: */
  166. default:
  167. break;
  168. }
  169. }
  170. return handled;
  171. }
  172. /*
  173. * Context: caller holds controller lock
  174. */
  175. static void musb_g_ep0_giveback(struct musb *musb, struct usb_request *req)
  176. {
  177. musb_g_giveback(&musb->endpoints[0].ep_in, req, 0);
  178. musb->ep0_state = MUSB_EP0_STAGE_SETUP;
  179. }
  180. /*
  181. * Tries to start B-device HNP negotiation if enabled via sysfs
  182. */
  183. static inline void musb_try_b_hnp_enable(struct musb *musb)
  184. {
  185. void __iomem *mbase = musb->mregs;
  186. u8 devctl;
  187. DBG(1, "HNP: Setting HR\n");
  188. devctl = musb_readb(mbase, MUSB_DEVCTL);
  189. musb_writeb(mbase, MUSB_DEVCTL, devctl | MUSB_DEVCTL_HR);
  190. }
  191. /*
  192. * Handle all control requests with no DATA stage, including standard
  193. * requests such as:
  194. * USB_REQ_SET_CONFIGURATION, USB_REQ_SET_INTERFACE, unrecognized
  195. * always delegated to the gadget driver
  196. * USB_REQ_SET_ADDRESS, USB_REQ_CLEAR_FEATURE, USB_REQ_SET_FEATURE
  197. * always handled here, except for class/vendor/... features
  198. *
  199. * Context: caller holds controller lock
  200. */
  201. static int
  202. service_zero_data_request(struct musb *musb,
  203. struct usb_ctrlrequest *ctrlrequest)
  204. __releases(musb->lock)
  205. __acquires(musb->lock)
  206. {
  207. int handled = -EINVAL;
  208. void __iomem *mbase = musb->mregs;
  209. const u8 recip = ctrlrequest->bRequestType & USB_RECIP_MASK;
  210. /* the gadget driver handles everything except what we MUST handle */
  211. if ((ctrlrequest->bRequestType & USB_TYPE_MASK)
  212. == USB_TYPE_STANDARD) {
  213. switch (ctrlrequest->bRequest) {
  214. case USB_REQ_SET_ADDRESS:
  215. /* change it after the status stage */
  216. musb->set_address = true;
  217. musb->address = (u8) (ctrlrequest->wValue & 0x7f);
  218. handled = 1;
  219. break;
  220. case USB_REQ_CLEAR_FEATURE:
  221. switch (recip) {
  222. case USB_RECIP_DEVICE:
  223. if (ctrlrequest->wValue
  224. != USB_DEVICE_REMOTE_WAKEUP)
  225. break;
  226. musb->may_wakeup = 0;
  227. handled = 1;
  228. break;
  229. case USB_RECIP_INTERFACE:
  230. break;
  231. case USB_RECIP_ENDPOINT:{
  232. const u8 num = ctrlrequest->wIndex & 0x0f;
  233. struct musb_ep *musb_ep;
  234. if (num == 0
  235. || num >= MUSB_C_NUM_EPS
  236. || ctrlrequest->wValue
  237. != USB_ENDPOINT_HALT)
  238. break;
  239. if (ctrlrequest->wIndex & USB_DIR_IN)
  240. musb_ep = &musb->endpoints[num].ep_in;
  241. else
  242. musb_ep = &musb->endpoints[num].ep_out;
  243. if (!musb_ep->desc)
  244. break;
  245. /* REVISIT do it directly, no locking games */
  246. spin_unlock(&musb->lock);
  247. musb_gadget_set_halt(&musb_ep->end_point, 0);
  248. spin_lock(&musb->lock);
  249. /* select ep0 again */
  250. musb_ep_select(mbase, 0);
  251. handled = 1;
  252. } break;
  253. default:
  254. /* class, vendor, etc ... delegate */
  255. handled = 0;
  256. break;
  257. }
  258. break;
  259. case USB_REQ_SET_FEATURE:
  260. switch (recip) {
  261. case USB_RECIP_DEVICE:
  262. handled = 1;
  263. switch (ctrlrequest->wValue) {
  264. case USB_DEVICE_REMOTE_WAKEUP:
  265. musb->may_wakeup = 1;
  266. break;
  267. case USB_DEVICE_TEST_MODE:
  268. if (musb->g.speed != USB_SPEED_HIGH)
  269. goto stall;
  270. if (ctrlrequest->wIndex & 0xff)
  271. goto stall;
  272. switch (ctrlrequest->wIndex >> 8) {
  273. case 1:
  274. pr_debug("TEST_J\n");
  275. /* TEST_J */
  276. musb->test_mode_nr =
  277. MUSB_TEST_J;
  278. break;
  279. case 2:
  280. /* TEST_K */
  281. pr_debug("TEST_K\n");
  282. musb->test_mode_nr =
  283. MUSB_TEST_K;
  284. break;
  285. case 3:
  286. /* TEST_SE0_NAK */
  287. pr_debug("TEST_SE0_NAK\n");
  288. musb->test_mode_nr =
  289. MUSB_TEST_SE0_NAK;
  290. break;
  291. case 4:
  292. /* TEST_PACKET */
  293. pr_debug("TEST_PACKET\n");
  294. musb->test_mode_nr =
  295. MUSB_TEST_PACKET;
  296. break;
  297. default:
  298. goto stall;
  299. }
  300. /* enter test mode after irq */
  301. if (handled > 0)
  302. musb->test_mode = true;
  303. break;
  304. #ifdef CONFIG_USB_MUSB_OTG
  305. case USB_DEVICE_B_HNP_ENABLE:
  306. if (!musb->g.is_otg)
  307. goto stall;
  308. musb->g.b_hnp_enable = 1;
  309. musb_try_b_hnp_enable(musb);
  310. break;
  311. case USB_DEVICE_A_HNP_SUPPORT:
  312. if (!musb->g.is_otg)
  313. goto stall;
  314. musb->g.a_hnp_support = 1;
  315. break;
  316. case USB_DEVICE_A_ALT_HNP_SUPPORT:
  317. if (!musb->g.is_otg)
  318. goto stall;
  319. musb->g.a_alt_hnp_support = 1;
  320. break;
  321. #endif
  322. stall:
  323. default:
  324. handled = -EINVAL;
  325. break;
  326. }
  327. break;
  328. case USB_RECIP_INTERFACE:
  329. break;
  330. case USB_RECIP_ENDPOINT:{
  331. const u8 epnum =
  332. ctrlrequest->wIndex & 0x0f;
  333. struct musb_ep *musb_ep;
  334. struct musb_hw_ep *ep;
  335. void __iomem *regs;
  336. int is_in;
  337. u16 csr;
  338. if (epnum == 0
  339. || epnum >= MUSB_C_NUM_EPS
  340. || ctrlrequest->wValue
  341. != USB_ENDPOINT_HALT)
  342. break;
  343. ep = musb->endpoints + epnum;
  344. regs = ep->regs;
  345. is_in = ctrlrequest->wIndex & USB_DIR_IN;
  346. if (is_in)
  347. musb_ep = &ep->ep_in;
  348. else
  349. musb_ep = &ep->ep_out;
  350. if (!musb_ep->desc)
  351. break;
  352. musb_ep_select(mbase, epnum);
  353. if (is_in) {
  354. csr = musb_readw(regs,
  355. MUSB_TXCSR);
  356. if (csr & MUSB_TXCSR_FIFONOTEMPTY)
  357. csr |= MUSB_TXCSR_FLUSHFIFO;
  358. csr |= MUSB_TXCSR_P_SENDSTALL
  359. | MUSB_TXCSR_CLRDATATOG
  360. | MUSB_TXCSR_P_WZC_BITS;
  361. musb_writew(regs, MUSB_TXCSR,
  362. csr);
  363. } else {
  364. csr = musb_readw(regs,
  365. MUSB_RXCSR);
  366. csr |= MUSB_RXCSR_P_SENDSTALL
  367. | MUSB_RXCSR_FLUSHFIFO
  368. | MUSB_RXCSR_CLRDATATOG
  369. | MUSB_RXCSR_P_WZC_BITS;
  370. musb_writew(regs, MUSB_RXCSR,
  371. csr);
  372. }
  373. /* select ep0 again */
  374. musb_ep_select(mbase, 0);
  375. handled = 1;
  376. } break;
  377. default:
  378. /* class, vendor, etc ... delegate */
  379. handled = 0;
  380. break;
  381. }
  382. break;
  383. default:
  384. /* delegate SET_CONFIGURATION, etc */
  385. handled = 0;
  386. }
  387. } else
  388. handled = 0;
  389. return handled;
  390. }
  391. /* we have an ep0out data packet
  392. * Context: caller holds controller lock
  393. */
  394. static void ep0_rxstate(struct musb *musb)
  395. {
  396. void __iomem *regs = musb->control_ep->regs;
  397. struct usb_request *req;
  398. u16 count, csr;
  399. req = next_ep0_request(musb);
  400. /* read packet and ack; or stall because of gadget driver bug:
  401. * should have provided the rx buffer before setup() returned.
  402. */
  403. if (req) {
  404. void *buf = req->buf + req->actual;
  405. unsigned len = req->length - req->actual;
  406. /* read the buffer */
  407. count = musb_readb(regs, MUSB_COUNT0);
  408. if (count > len) {
  409. req->status = -EOVERFLOW;
  410. count = len;
  411. }
  412. musb_read_fifo(&musb->endpoints[0], count, buf);
  413. req->actual += count;
  414. csr = MUSB_CSR0_P_SVDRXPKTRDY;
  415. if (count < 64 || req->actual == req->length) {
  416. musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
  417. csr |= MUSB_CSR0_P_DATAEND;
  418. } else
  419. req = NULL;
  420. } else
  421. csr = MUSB_CSR0_P_SVDRXPKTRDY | MUSB_CSR0_P_SENDSTALL;
  422. /* Completion handler may choose to stall, e.g. because the
  423. * message just received holds invalid data.
  424. */
  425. if (req) {
  426. musb->ackpend = csr;
  427. musb_g_ep0_giveback(musb, req);
  428. if (!musb->ackpend)
  429. return;
  430. musb->ackpend = 0;
  431. }
  432. musb_ep_select(musb->mregs, 0);
  433. musb_writew(regs, MUSB_CSR0, csr);
  434. }
  435. /*
  436. * transmitting to the host (IN), this code might be called from IRQ
  437. * and from kernel thread.
  438. *
  439. * Context: caller holds controller lock
  440. */
  441. static void ep0_txstate(struct musb *musb)
  442. {
  443. void __iomem *regs = musb->control_ep->regs;
  444. struct usb_request *request = next_ep0_request(musb);
  445. u16 csr = MUSB_CSR0_TXPKTRDY;
  446. u8 *fifo_src;
  447. u8 fifo_count;
  448. if (!request) {
  449. /* WARN_ON(1); */
  450. DBG(2, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0));
  451. return;
  452. }
  453. /* load the data */
  454. fifo_src = (u8 *) request->buf + request->actual;
  455. fifo_count = min((unsigned) MUSB_EP0_FIFOSIZE,
  456. request->length - request->actual);
  457. musb_write_fifo(&musb->endpoints[0], fifo_count, fifo_src);
  458. request->actual += fifo_count;
  459. /* update the flags */
  460. if (fifo_count < MUSB_MAX_END0_PACKET
  461. || (request->actual == request->length
  462. && !request->zero)) {
  463. musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
  464. csr |= MUSB_CSR0_P_DATAEND;
  465. } else
  466. request = NULL;
  467. /* report completions as soon as the fifo's loaded; there's no
  468. * win in waiting till this last packet gets acked. (other than
  469. * very precise fault reporting, needed by USB TMC; possible with
  470. * this hardware, but not usable from portable gadget drivers.)
  471. */
  472. if (request) {
  473. musb->ackpend = csr;
  474. musb_g_ep0_giveback(musb, request);
  475. if (!musb->ackpend)
  476. return;
  477. musb->ackpend = 0;
  478. }
  479. /* send it out, triggering a "txpktrdy cleared" irq */
  480. musb_ep_select(musb->mregs, 0);
  481. musb_writew(regs, MUSB_CSR0, csr);
  482. }
  483. /*
  484. * Read a SETUP packet (struct usb_ctrlrequest) from the hardware.
  485. * Fields are left in USB byte-order.
  486. *
  487. * Context: caller holds controller lock.
  488. */
  489. static void
  490. musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req)
  491. {
  492. struct usb_request *r;
  493. void __iomem *regs = musb->control_ep->regs;
  494. musb_read_fifo(&musb->endpoints[0], sizeof *req, (u8 *)req);
  495. /* NOTE: earlier 2.6 versions changed setup packets to host
  496. * order, but now USB packets always stay in USB byte order.
  497. */
  498. DBG(3, "SETUP req%02x.%02x v%04x i%04x l%d\n",
  499. req->bRequestType,
  500. req->bRequest,
  501. le16_to_cpu(req->wValue),
  502. le16_to_cpu(req->wIndex),
  503. le16_to_cpu(req->wLength));
  504. /* clean up any leftover transfers */
  505. r = next_ep0_request(musb);
  506. if (r)
  507. musb_g_ep0_giveback(musb, r);
  508. /* For zero-data requests we want to delay the STATUS stage to
  509. * avoid SETUPEND errors. If we read data (OUT), delay accepting
  510. * packets until there's a buffer to store them in.
  511. *
  512. * If we write data, the controller acts happier if we enable
  513. * the TX FIFO right away, and give the controller a moment
  514. * to switch modes...
  515. */
  516. musb->set_address = false;
  517. musb->ackpend = MUSB_CSR0_P_SVDRXPKTRDY;
  518. if (req->wLength == 0) {
  519. if (req->bRequestType & USB_DIR_IN)
  520. musb->ackpend |= MUSB_CSR0_TXPKTRDY;
  521. musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT;
  522. } else if (req->bRequestType & USB_DIR_IN) {
  523. musb->ep0_state = MUSB_EP0_STAGE_TX;
  524. musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDRXPKTRDY);
  525. while ((musb_readw(regs, MUSB_CSR0)
  526. & MUSB_CSR0_RXPKTRDY) != 0)
  527. cpu_relax();
  528. musb->ackpend = 0;
  529. } else
  530. musb->ep0_state = MUSB_EP0_STAGE_RX;
  531. }
  532. static int
  533. forward_to_driver(struct musb *musb, const struct usb_ctrlrequest *ctrlrequest)
  534. __releases(musb->lock)
  535. __acquires(musb->lock)
  536. {
  537. int retval;
  538. if (!musb->gadget_driver)
  539. return -EOPNOTSUPP;
  540. spin_unlock(&musb->lock);
  541. retval = musb->gadget_driver->setup(&musb->g, ctrlrequest);
  542. spin_lock(&musb->lock);
  543. return retval;
  544. }
  545. /*
  546. * Handle peripheral ep0 interrupt
  547. *
  548. * Context: irq handler; we won't re-enter the driver that way.
  549. */
  550. irqreturn_t musb_g_ep0_irq(struct musb *musb)
  551. {
  552. u16 csr;
  553. u16 len;
  554. void __iomem *mbase = musb->mregs;
  555. void __iomem *regs = musb->endpoints[0].regs;
  556. irqreturn_t retval = IRQ_NONE;
  557. musb_ep_select(mbase, 0); /* select ep0 */
  558. csr = musb_readw(regs, MUSB_CSR0);
  559. len = musb_readb(regs, MUSB_COUNT0);
  560. DBG(4, "csr %04x, count %d, myaddr %d, ep0stage %s\n",
  561. csr, len,
  562. musb_readb(mbase, MUSB_FADDR),
  563. decode_ep0stage(musb->ep0_state));
  564. /* I sent a stall.. need to acknowledge it now.. */
  565. if (csr & MUSB_CSR0_P_SENTSTALL) {
  566. musb_writew(regs, MUSB_CSR0,
  567. csr & ~MUSB_CSR0_P_SENTSTALL);
  568. retval = IRQ_HANDLED;
  569. musb->ep0_state = MUSB_EP0_STAGE_IDLE;
  570. csr = musb_readw(regs, MUSB_CSR0);
  571. }
  572. /* request ended "early" */
  573. if (csr & MUSB_CSR0_P_SETUPEND) {
  574. musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SVDSETUPEND);
  575. retval = IRQ_HANDLED;
  576. /* Transition into the early status phase */
  577. switch (musb->ep0_state) {
  578. case MUSB_EP0_STAGE_TX:
  579. musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT;
  580. break;
  581. case MUSB_EP0_STAGE_RX:
  582. musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
  583. break;
  584. default:
  585. ERR("SetupEnd came in a wrong ep0stage %s",
  586. decode_ep0stage(musb->ep0_state));
  587. }
  588. csr = musb_readw(regs, MUSB_CSR0);
  589. /* NOTE: request may need completion */
  590. }
  591. /* docs from Mentor only describe tx, rx, and idle/setup states.
  592. * we need to handle nuances around status stages, and also the
  593. * case where status and setup stages come back-to-back ...
  594. */
  595. switch (musb->ep0_state) {
  596. case MUSB_EP0_STAGE_TX:
  597. /* irq on clearing txpktrdy */
  598. if ((csr & MUSB_CSR0_TXPKTRDY) == 0) {
  599. ep0_txstate(musb);
  600. retval = IRQ_HANDLED;
  601. }
  602. break;
  603. case MUSB_EP0_STAGE_RX:
  604. /* irq on set rxpktrdy */
  605. if (csr & MUSB_CSR0_RXPKTRDY) {
  606. ep0_rxstate(musb);
  607. retval = IRQ_HANDLED;
  608. }
  609. break;
  610. case MUSB_EP0_STAGE_STATUSIN:
  611. /* end of sequence #2 (OUT/RX state) or #3 (no data) */
  612. /* update address (if needed) only @ the end of the
  613. * status phase per usb spec, which also guarantees
  614. * we get 10 msec to receive this irq... until this
  615. * is done we won't see the next packet.
  616. */
  617. if (musb->set_address) {
  618. musb->set_address = false;
  619. musb_writeb(mbase, MUSB_FADDR, musb->address);
  620. }
  621. /* enter test mode if needed (exit by reset) */
  622. else if (musb->test_mode) {
  623. DBG(1, "entering TESTMODE\n");
  624. if (MUSB_TEST_PACKET == musb->test_mode_nr)
  625. musb_load_testpacket(musb);
  626. musb_writeb(mbase, MUSB_TESTMODE,
  627. musb->test_mode_nr);
  628. }
  629. /* FALLTHROUGH */
  630. case MUSB_EP0_STAGE_STATUSOUT:
  631. /* end of sequence #1: write to host (TX state) */
  632. {
  633. struct usb_request *req;
  634. req = next_ep0_request(musb);
  635. if (req)
  636. musb_g_ep0_giveback(musb, req);
  637. }
  638. /*
  639. * In case when several interrupts can get coalesced,
  640. * check to see if we've already received a SETUP packet...
  641. */
  642. if (csr & MUSB_CSR0_RXPKTRDY)
  643. goto setup;
  644. retval = IRQ_HANDLED;
  645. musb->ep0_state = MUSB_EP0_STAGE_IDLE;
  646. break;
  647. case MUSB_EP0_STAGE_IDLE:
  648. /*
  649. * This state is typically (but not always) indiscernible
  650. * from the status states since the corresponding interrupts
  651. * tend to happen within too little period of time (with only
  652. * a zero-length packet in between) and so get coalesced...
  653. */
  654. retval = IRQ_HANDLED;
  655. musb->ep0_state = MUSB_EP0_STAGE_SETUP;
  656. /* FALLTHROUGH */
  657. case MUSB_EP0_STAGE_SETUP:
  658. setup:
  659. if (csr & MUSB_CSR0_RXPKTRDY) {
  660. struct usb_ctrlrequest setup;
  661. int handled = 0;
  662. if (len != 8) {
  663. ERR("SETUP packet len %d != 8 ?\n", len);
  664. break;
  665. }
  666. musb_read_setup(musb, &setup);
  667. retval = IRQ_HANDLED;
  668. /* sometimes the RESET won't be reported */
  669. if (unlikely(musb->g.speed == USB_SPEED_UNKNOWN)) {
  670. u8 power;
  671. printk(KERN_NOTICE "%s: peripheral reset "
  672. "irq lost!\n",
  673. musb_driver_name);
  674. power = musb_readb(mbase, MUSB_POWER);
  675. musb->g.speed = (power & MUSB_POWER_HSMODE)
  676. ? USB_SPEED_HIGH : USB_SPEED_FULL;
  677. }
  678. switch (musb->ep0_state) {
  679. /* sequence #3 (no data stage), includes requests
  680. * we can't forward (notably SET_ADDRESS and the
  681. * device/endpoint feature set/clear operations)
  682. * plus SET_CONFIGURATION and others we must
  683. */
  684. case MUSB_EP0_STAGE_ACKWAIT:
  685. handled = service_zero_data_request(
  686. musb, &setup);
  687. /* status stage might be immediate */
  688. if (handled > 0) {
  689. musb->ackpend |= MUSB_CSR0_P_DATAEND;
  690. musb->ep0_state =
  691. MUSB_EP0_STAGE_STATUSIN;
  692. }
  693. break;
  694. /* sequence #1 (IN to host), includes GET_STATUS
  695. * requests that we can't forward, GET_DESCRIPTOR
  696. * and others that we must
  697. */
  698. case MUSB_EP0_STAGE_TX:
  699. handled = service_in_request(musb, &setup);
  700. if (handled > 0) {
  701. musb->ackpend = MUSB_CSR0_TXPKTRDY
  702. | MUSB_CSR0_P_DATAEND;
  703. musb->ep0_state =
  704. MUSB_EP0_STAGE_STATUSOUT;
  705. }
  706. break;
  707. /* sequence #2 (OUT from host), always forward */
  708. default: /* MUSB_EP0_STAGE_RX */
  709. break;
  710. }
  711. DBG(3, "handled %d, csr %04x, ep0stage %s\n",
  712. handled, csr,
  713. decode_ep0stage(musb->ep0_state));
  714. /* unless we need to delegate this to the gadget
  715. * driver, we know how to wrap this up: csr0 has
  716. * not yet been written.
  717. */
  718. if (handled < 0)
  719. goto stall;
  720. else if (handled > 0)
  721. goto finish;
  722. handled = forward_to_driver(musb, &setup);
  723. if (handled < 0) {
  724. musb_ep_select(mbase, 0);
  725. stall:
  726. DBG(3, "stall (%d)\n", handled);
  727. musb->ackpend |= MUSB_CSR0_P_SENDSTALL;
  728. musb->ep0_state = MUSB_EP0_STAGE_IDLE;
  729. finish:
  730. musb_writew(regs, MUSB_CSR0,
  731. musb->ackpend);
  732. musb->ackpend = 0;
  733. }
  734. }
  735. break;
  736. case MUSB_EP0_STAGE_ACKWAIT:
  737. /* This should not happen. But happens with tusb6010 with
  738. * g_file_storage and high speed. Do nothing.
  739. */
  740. retval = IRQ_HANDLED;
  741. break;
  742. default:
  743. /* "can't happen" */
  744. WARN_ON(1);
  745. musb_writew(regs, MUSB_CSR0, MUSB_CSR0_P_SENDSTALL);
  746. musb->ep0_state = MUSB_EP0_STAGE_IDLE;
  747. break;
  748. }
  749. return retval;
  750. }
  751. static int
  752. musb_g_ep0_enable(struct usb_ep *ep, const struct usb_endpoint_descriptor *desc)
  753. {
  754. /* always enabled */
  755. return -EINVAL;
  756. }
  757. static int musb_g_ep0_disable(struct usb_ep *e)
  758. {
  759. /* always enabled */
  760. return -EINVAL;
  761. }
  762. static int
  763. musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)
  764. {
  765. struct musb_ep *ep;
  766. struct musb_request *req;
  767. struct musb *musb;
  768. int status;
  769. unsigned long lockflags;
  770. void __iomem *regs;
  771. if (!e || !r)
  772. return -EINVAL;
  773. ep = to_musb_ep(e);
  774. musb = ep->musb;
  775. regs = musb->control_ep->regs;
  776. req = to_musb_request(r);
  777. req->musb = musb;
  778. req->request.actual = 0;
  779. req->request.status = -EINPROGRESS;
  780. req->tx = ep->is_in;
  781. spin_lock_irqsave(&musb->lock, lockflags);
  782. if (!list_empty(&ep->req_list)) {
  783. status = -EBUSY;
  784. goto cleanup;
  785. }
  786. switch (musb->ep0_state) {
  787. case MUSB_EP0_STAGE_RX: /* control-OUT data */
  788. case MUSB_EP0_STAGE_TX: /* control-IN data */
  789. case MUSB_EP0_STAGE_ACKWAIT: /* zero-length data */
  790. status = 0;
  791. break;
  792. default:
  793. DBG(1, "ep0 request queued in state %d\n",
  794. musb->ep0_state);
  795. status = -EINVAL;
  796. goto cleanup;
  797. }
  798. /* add request to the list */
  799. list_add_tail(&(req->request.list), &(ep->req_list));
  800. DBG(3, "queue to %s (%s), length=%d\n",
  801. ep->name, ep->is_in ? "IN/TX" : "OUT/RX",
  802. req->request.length);
  803. musb_ep_select(musb->mregs, 0);
  804. /* sequence #1, IN ... start writing the data */
  805. if (musb->ep0_state == MUSB_EP0_STAGE_TX)
  806. ep0_txstate(musb);
  807. /* sequence #3, no-data ... issue IN status */
  808. else if (musb->ep0_state == MUSB_EP0_STAGE_ACKWAIT) {
  809. if (req->request.length)
  810. status = -EINVAL;
  811. else {
  812. musb->ep0_state = MUSB_EP0_STAGE_STATUSIN;
  813. musb_writew(regs, MUSB_CSR0,
  814. musb->ackpend | MUSB_CSR0_P_DATAEND);
  815. musb->ackpend = 0;
  816. musb_g_ep0_giveback(ep->musb, r);
  817. }
  818. /* else for sequence #2 (OUT), caller provides a buffer
  819. * before the next packet arrives. deferred responses
  820. * (after SETUP is acked) are racey.
  821. */
  822. } else if (musb->ackpend) {
  823. musb_writew(regs, MUSB_CSR0, musb->ackpend);
  824. musb->ackpend = 0;
  825. }
  826. cleanup:
  827. spin_unlock_irqrestore(&musb->lock, lockflags);
  828. return status;
  829. }
  830. static int musb_g_ep0_dequeue(struct usb_ep *ep, struct usb_request *req)
  831. {
  832. /* we just won't support this */
  833. return -EINVAL;
  834. }
  835. static int musb_g_ep0_halt(struct usb_ep *e, int value)
  836. {
  837. struct musb_ep *ep;
  838. struct musb *musb;
  839. void __iomem *base, *regs;
  840. unsigned long flags;
  841. int status;
  842. u16 csr;
  843. if (!e || !value)
  844. return -EINVAL;
  845. ep = to_musb_ep(e);
  846. musb = ep->musb;
  847. base = musb->mregs;
  848. regs = musb->control_ep->regs;
  849. status = 0;
  850. spin_lock_irqsave(&musb->lock, flags);
  851. if (!list_empty(&ep->req_list)) {
  852. status = -EBUSY;
  853. goto cleanup;
  854. }
  855. musb_ep_select(base, 0);
  856. csr = musb->ackpend;
  857. switch (musb->ep0_state) {
  858. /* Stalls are usually issued after parsing SETUP packet, either
  859. * directly in irq context from setup() or else later.
  860. */
  861. case MUSB_EP0_STAGE_TX: /* control-IN data */
  862. case MUSB_EP0_STAGE_ACKWAIT: /* STALL for zero-length data */
  863. case MUSB_EP0_STAGE_RX: /* control-OUT data */
  864. csr = musb_readw(regs, MUSB_CSR0);
  865. /* FALLTHROUGH */
  866. /* It's also OK to issue stalls during callbacks when a non-empty
  867. * DATA stage buffer has been read (or even written).
  868. */
  869. case MUSB_EP0_STAGE_STATUSIN: /* control-OUT status */
  870. case MUSB_EP0_STAGE_STATUSOUT: /* control-IN status */
  871. csr |= MUSB_CSR0_P_SENDSTALL;
  872. musb_writew(regs, MUSB_CSR0, csr);
  873. musb->ep0_state = MUSB_EP0_STAGE_IDLE;
  874. musb->ackpend = 0;
  875. break;
  876. default:
  877. DBG(1, "ep0 can't halt in state %d\n", musb->ep0_state);
  878. status = -EINVAL;
  879. }
  880. cleanup:
  881. spin_unlock_irqrestore(&musb->lock, flags);
  882. return status;
  883. }
  884. const struct usb_ep_ops musb_g_ep0_ops = {
  885. .enable = musb_g_ep0_enable,
  886. .disable = musb_g_ep0_disable,
  887. .alloc_request = musb_alloc_request,
  888. .free_request = musb_free_request,
  889. .queue = musb_g_ep0_queue,
  890. .dequeue = musb_g_ep0_dequeue,
  891. .set_halt = musb_g_ep0_halt,
  892. };