libata-core.c 141 KB

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  1. /*
  2. * libata-core.c - helper library for ATA
  3. *
  4. * Maintained by: Jeff Garzik <jgarzik@pobox.com>
  5. * Please ALWAYS copy linux-ide@vger.kernel.org
  6. * on emails.
  7. *
  8. * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
  9. * Copyright 2003-2004 Jeff Garzik
  10. *
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2, or (at your option)
  15. * any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; see the file COPYING. If not, write to
  24. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. *
  27. * libata documentation is available via 'make {ps|pdf}docs',
  28. * as Documentation/DocBook/libata.*
  29. *
  30. * Hardware documentation available from http://www.t13.org/ and
  31. * http://www.sata-io.org/
  32. *
  33. */
  34. #include <linux/config.h>
  35. #include <linux/kernel.h>
  36. #include <linux/module.h>
  37. #include <linux/pci.h>
  38. #include <linux/init.h>
  39. #include <linux/list.h>
  40. #include <linux/mm.h>
  41. #include <linux/highmem.h>
  42. #include <linux/spinlock.h>
  43. #include <linux/blkdev.h>
  44. #include <linux/delay.h>
  45. #include <linux/timer.h>
  46. #include <linux/interrupt.h>
  47. #include <linux/completion.h>
  48. #include <linux/suspend.h>
  49. #include <linux/workqueue.h>
  50. #include <linux/jiffies.h>
  51. #include <linux/scatterlist.h>
  52. #include <scsi/scsi.h>
  53. #include "scsi_priv.h"
  54. #include <scsi/scsi_cmnd.h>
  55. #include <scsi/scsi_host.h>
  56. #include <linux/libata.h>
  57. #include <asm/io.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/byteorder.h>
  60. #include "libata.h"
  61. /* debounce timing parameters in msecs { interval, duration, timeout } */
  62. const unsigned long sata_deb_timing_boot[] = { 5, 100, 2000 };
  63. const unsigned long sata_deb_timing_eh[] = { 25, 500, 2000 };
  64. const unsigned long sata_deb_timing_before_fsrst[] = { 100, 2000, 5000 };
  65. static unsigned int ata_dev_init_params(struct ata_device *dev,
  66. u16 heads, u16 sectors);
  67. static unsigned int ata_dev_set_xfermode(struct ata_device *dev);
  68. static void ata_dev_xfermask(struct ata_device *dev);
  69. static unsigned int ata_unique_id = 1;
  70. static struct workqueue_struct *ata_wq;
  71. struct workqueue_struct *ata_aux_wq;
  72. int atapi_enabled = 1;
  73. module_param(atapi_enabled, int, 0444);
  74. MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
  75. int atapi_dmadir = 0;
  76. module_param(atapi_dmadir, int, 0444);
  77. MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
  78. int libata_fua = 0;
  79. module_param_named(fua, libata_fua, int, 0444);
  80. MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
  81. MODULE_AUTHOR("Jeff Garzik");
  82. MODULE_DESCRIPTION("Library module for ATA devices");
  83. MODULE_LICENSE("GPL");
  84. MODULE_VERSION(DRV_VERSION);
  85. /**
  86. * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
  87. * @tf: Taskfile to convert
  88. * @fis: Buffer into which data will output
  89. * @pmp: Port multiplier port
  90. *
  91. * Converts a standard ATA taskfile to a Serial ATA
  92. * FIS structure (Register - Host to Device).
  93. *
  94. * LOCKING:
  95. * Inherited from caller.
  96. */
  97. void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
  98. {
  99. fis[0] = 0x27; /* Register - Host to Device FIS */
  100. fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
  101. bit 7 indicates Command FIS */
  102. fis[2] = tf->command;
  103. fis[3] = tf->feature;
  104. fis[4] = tf->lbal;
  105. fis[5] = tf->lbam;
  106. fis[6] = tf->lbah;
  107. fis[7] = tf->device;
  108. fis[8] = tf->hob_lbal;
  109. fis[9] = tf->hob_lbam;
  110. fis[10] = tf->hob_lbah;
  111. fis[11] = tf->hob_feature;
  112. fis[12] = tf->nsect;
  113. fis[13] = tf->hob_nsect;
  114. fis[14] = 0;
  115. fis[15] = tf->ctl;
  116. fis[16] = 0;
  117. fis[17] = 0;
  118. fis[18] = 0;
  119. fis[19] = 0;
  120. }
  121. /**
  122. * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
  123. * @fis: Buffer from which data will be input
  124. * @tf: Taskfile to output
  125. *
  126. * Converts a serial ATA FIS structure to a standard ATA taskfile.
  127. *
  128. * LOCKING:
  129. * Inherited from caller.
  130. */
  131. void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
  132. {
  133. tf->command = fis[2]; /* status */
  134. tf->feature = fis[3]; /* error */
  135. tf->lbal = fis[4];
  136. tf->lbam = fis[5];
  137. tf->lbah = fis[6];
  138. tf->device = fis[7];
  139. tf->hob_lbal = fis[8];
  140. tf->hob_lbam = fis[9];
  141. tf->hob_lbah = fis[10];
  142. tf->nsect = fis[12];
  143. tf->hob_nsect = fis[13];
  144. }
  145. static const u8 ata_rw_cmds[] = {
  146. /* pio multi */
  147. ATA_CMD_READ_MULTI,
  148. ATA_CMD_WRITE_MULTI,
  149. ATA_CMD_READ_MULTI_EXT,
  150. ATA_CMD_WRITE_MULTI_EXT,
  151. 0,
  152. 0,
  153. 0,
  154. ATA_CMD_WRITE_MULTI_FUA_EXT,
  155. /* pio */
  156. ATA_CMD_PIO_READ,
  157. ATA_CMD_PIO_WRITE,
  158. ATA_CMD_PIO_READ_EXT,
  159. ATA_CMD_PIO_WRITE_EXT,
  160. 0,
  161. 0,
  162. 0,
  163. 0,
  164. /* dma */
  165. ATA_CMD_READ,
  166. ATA_CMD_WRITE,
  167. ATA_CMD_READ_EXT,
  168. ATA_CMD_WRITE_EXT,
  169. 0,
  170. 0,
  171. 0,
  172. ATA_CMD_WRITE_FUA_EXT
  173. };
  174. /**
  175. * ata_rwcmd_protocol - set taskfile r/w commands and protocol
  176. * @qc: command to examine and configure
  177. *
  178. * Examine the device configuration and tf->flags to calculate
  179. * the proper read/write commands and protocol to use.
  180. *
  181. * LOCKING:
  182. * caller.
  183. */
  184. int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
  185. {
  186. struct ata_taskfile *tf = &qc->tf;
  187. struct ata_device *dev = qc->dev;
  188. u8 cmd;
  189. int index, fua, lba48, write;
  190. fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
  191. lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
  192. write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
  193. if (dev->flags & ATA_DFLAG_PIO) {
  194. tf->protocol = ATA_PROT_PIO;
  195. index = dev->multi_count ? 0 : 8;
  196. } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
  197. /* Unable to use DMA due to host limitation */
  198. tf->protocol = ATA_PROT_PIO;
  199. index = dev->multi_count ? 0 : 8;
  200. } else {
  201. tf->protocol = ATA_PROT_DMA;
  202. index = 16;
  203. }
  204. cmd = ata_rw_cmds[index + fua + lba48 + write];
  205. if (cmd) {
  206. tf->command = cmd;
  207. return 0;
  208. }
  209. return -1;
  210. }
  211. /**
  212. * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
  213. * @pio_mask: pio_mask
  214. * @mwdma_mask: mwdma_mask
  215. * @udma_mask: udma_mask
  216. *
  217. * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
  218. * unsigned int xfer_mask.
  219. *
  220. * LOCKING:
  221. * None.
  222. *
  223. * RETURNS:
  224. * Packed xfer_mask.
  225. */
  226. static unsigned int ata_pack_xfermask(unsigned int pio_mask,
  227. unsigned int mwdma_mask,
  228. unsigned int udma_mask)
  229. {
  230. return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
  231. ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
  232. ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
  233. }
  234. /**
  235. * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
  236. * @xfer_mask: xfer_mask to unpack
  237. * @pio_mask: resulting pio_mask
  238. * @mwdma_mask: resulting mwdma_mask
  239. * @udma_mask: resulting udma_mask
  240. *
  241. * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
  242. * Any NULL distination masks will be ignored.
  243. */
  244. static void ata_unpack_xfermask(unsigned int xfer_mask,
  245. unsigned int *pio_mask,
  246. unsigned int *mwdma_mask,
  247. unsigned int *udma_mask)
  248. {
  249. if (pio_mask)
  250. *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
  251. if (mwdma_mask)
  252. *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
  253. if (udma_mask)
  254. *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
  255. }
  256. static const struct ata_xfer_ent {
  257. int shift, bits;
  258. u8 base;
  259. } ata_xfer_tbl[] = {
  260. { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
  261. { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
  262. { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
  263. { -1, },
  264. };
  265. /**
  266. * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
  267. * @xfer_mask: xfer_mask of interest
  268. *
  269. * Return matching XFER_* value for @xfer_mask. Only the highest
  270. * bit of @xfer_mask is considered.
  271. *
  272. * LOCKING:
  273. * None.
  274. *
  275. * RETURNS:
  276. * Matching XFER_* value, 0 if no match found.
  277. */
  278. static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
  279. {
  280. int highbit = fls(xfer_mask) - 1;
  281. const struct ata_xfer_ent *ent;
  282. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  283. if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
  284. return ent->base + highbit - ent->shift;
  285. return 0;
  286. }
  287. /**
  288. * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
  289. * @xfer_mode: XFER_* of interest
  290. *
  291. * Return matching xfer_mask for @xfer_mode.
  292. *
  293. * LOCKING:
  294. * None.
  295. *
  296. * RETURNS:
  297. * Matching xfer_mask, 0 if no match found.
  298. */
  299. static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
  300. {
  301. const struct ata_xfer_ent *ent;
  302. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  303. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  304. return 1 << (ent->shift + xfer_mode - ent->base);
  305. return 0;
  306. }
  307. /**
  308. * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
  309. * @xfer_mode: XFER_* of interest
  310. *
  311. * Return matching xfer_shift for @xfer_mode.
  312. *
  313. * LOCKING:
  314. * None.
  315. *
  316. * RETURNS:
  317. * Matching xfer_shift, -1 if no match found.
  318. */
  319. static int ata_xfer_mode2shift(unsigned int xfer_mode)
  320. {
  321. const struct ata_xfer_ent *ent;
  322. for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
  323. if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
  324. return ent->shift;
  325. return -1;
  326. }
  327. /**
  328. * ata_mode_string - convert xfer_mask to string
  329. * @xfer_mask: mask of bits supported; only highest bit counts.
  330. *
  331. * Determine string which represents the highest speed
  332. * (highest bit in @modemask).
  333. *
  334. * LOCKING:
  335. * None.
  336. *
  337. * RETURNS:
  338. * Constant C string representing highest speed listed in
  339. * @mode_mask, or the constant C string "<n/a>".
  340. */
  341. static const char *ata_mode_string(unsigned int xfer_mask)
  342. {
  343. static const char * const xfer_mode_str[] = {
  344. "PIO0",
  345. "PIO1",
  346. "PIO2",
  347. "PIO3",
  348. "PIO4",
  349. "MWDMA0",
  350. "MWDMA1",
  351. "MWDMA2",
  352. "UDMA/16",
  353. "UDMA/25",
  354. "UDMA/33",
  355. "UDMA/44",
  356. "UDMA/66",
  357. "UDMA/100",
  358. "UDMA/133",
  359. "UDMA7",
  360. };
  361. int highbit;
  362. highbit = fls(xfer_mask) - 1;
  363. if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
  364. return xfer_mode_str[highbit];
  365. return "<n/a>";
  366. }
  367. static const char *sata_spd_string(unsigned int spd)
  368. {
  369. static const char * const spd_str[] = {
  370. "1.5 Gbps",
  371. "3.0 Gbps",
  372. };
  373. if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
  374. return "<unknown>";
  375. return spd_str[spd - 1];
  376. }
  377. void ata_dev_disable(struct ata_device *dev)
  378. {
  379. if (ata_dev_enabled(dev)) {
  380. ata_dev_printk(dev, KERN_WARNING, "disabled\n");
  381. dev->class++;
  382. }
  383. }
  384. /**
  385. * ata_pio_devchk - PATA device presence detection
  386. * @ap: ATA channel to examine
  387. * @device: Device to examine (starting at zero)
  388. *
  389. * This technique was originally described in
  390. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  391. * later found its way into the ATA/ATAPI spec.
  392. *
  393. * Write a pattern to the ATA shadow registers,
  394. * and if a device is present, it will respond by
  395. * correctly storing and echoing back the
  396. * ATA shadow register contents.
  397. *
  398. * LOCKING:
  399. * caller.
  400. */
  401. static unsigned int ata_pio_devchk(struct ata_port *ap,
  402. unsigned int device)
  403. {
  404. struct ata_ioports *ioaddr = &ap->ioaddr;
  405. u8 nsect, lbal;
  406. ap->ops->dev_select(ap, device);
  407. outb(0x55, ioaddr->nsect_addr);
  408. outb(0xaa, ioaddr->lbal_addr);
  409. outb(0xaa, ioaddr->nsect_addr);
  410. outb(0x55, ioaddr->lbal_addr);
  411. outb(0x55, ioaddr->nsect_addr);
  412. outb(0xaa, ioaddr->lbal_addr);
  413. nsect = inb(ioaddr->nsect_addr);
  414. lbal = inb(ioaddr->lbal_addr);
  415. if ((nsect == 0x55) && (lbal == 0xaa))
  416. return 1; /* we found a device */
  417. return 0; /* nothing found */
  418. }
  419. /**
  420. * ata_mmio_devchk - PATA device presence detection
  421. * @ap: ATA channel to examine
  422. * @device: Device to examine (starting at zero)
  423. *
  424. * This technique was originally described in
  425. * Hale Landis's ATADRVR (www.ata-atapi.com), and
  426. * later found its way into the ATA/ATAPI spec.
  427. *
  428. * Write a pattern to the ATA shadow registers,
  429. * and if a device is present, it will respond by
  430. * correctly storing and echoing back the
  431. * ATA shadow register contents.
  432. *
  433. * LOCKING:
  434. * caller.
  435. */
  436. static unsigned int ata_mmio_devchk(struct ata_port *ap,
  437. unsigned int device)
  438. {
  439. struct ata_ioports *ioaddr = &ap->ioaddr;
  440. u8 nsect, lbal;
  441. ap->ops->dev_select(ap, device);
  442. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  443. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  444. writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
  445. writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
  446. writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
  447. writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
  448. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  449. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  450. if ((nsect == 0x55) && (lbal == 0xaa))
  451. return 1; /* we found a device */
  452. return 0; /* nothing found */
  453. }
  454. /**
  455. * ata_devchk - PATA device presence detection
  456. * @ap: ATA channel to examine
  457. * @device: Device to examine (starting at zero)
  458. *
  459. * Dispatch ATA device presence detection, depending
  460. * on whether we are using PIO or MMIO to talk to the
  461. * ATA shadow registers.
  462. *
  463. * LOCKING:
  464. * caller.
  465. */
  466. static unsigned int ata_devchk(struct ata_port *ap,
  467. unsigned int device)
  468. {
  469. if (ap->flags & ATA_FLAG_MMIO)
  470. return ata_mmio_devchk(ap, device);
  471. return ata_pio_devchk(ap, device);
  472. }
  473. /**
  474. * ata_dev_classify - determine device type based on ATA-spec signature
  475. * @tf: ATA taskfile register set for device to be identified
  476. *
  477. * Determine from taskfile register contents whether a device is
  478. * ATA or ATAPI, as per "Signature and persistence" section
  479. * of ATA/PI spec (volume 1, sect 5.14).
  480. *
  481. * LOCKING:
  482. * None.
  483. *
  484. * RETURNS:
  485. * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
  486. * the event of failure.
  487. */
  488. unsigned int ata_dev_classify(const struct ata_taskfile *tf)
  489. {
  490. /* Apple's open source Darwin code hints that some devices only
  491. * put a proper signature into the LBA mid/high registers,
  492. * So, we only check those. It's sufficient for uniqueness.
  493. */
  494. if (((tf->lbam == 0) && (tf->lbah == 0)) ||
  495. ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
  496. DPRINTK("found ATA device by sig\n");
  497. return ATA_DEV_ATA;
  498. }
  499. if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
  500. ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
  501. DPRINTK("found ATAPI device by sig\n");
  502. return ATA_DEV_ATAPI;
  503. }
  504. DPRINTK("unknown device\n");
  505. return ATA_DEV_UNKNOWN;
  506. }
  507. /**
  508. * ata_dev_try_classify - Parse returned ATA device signature
  509. * @ap: ATA channel to examine
  510. * @device: Device to examine (starting at zero)
  511. * @r_err: Value of error register on completion
  512. *
  513. * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
  514. * an ATA/ATAPI-defined set of values is placed in the ATA
  515. * shadow registers, indicating the results of device detection
  516. * and diagnostics.
  517. *
  518. * Select the ATA device, and read the values from the ATA shadow
  519. * registers. Then parse according to the Error register value,
  520. * and the spec-defined values examined by ata_dev_classify().
  521. *
  522. * LOCKING:
  523. * caller.
  524. *
  525. * RETURNS:
  526. * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
  527. */
  528. static unsigned int
  529. ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
  530. {
  531. struct ata_taskfile tf;
  532. unsigned int class;
  533. u8 err;
  534. ap->ops->dev_select(ap, device);
  535. memset(&tf, 0, sizeof(tf));
  536. ap->ops->tf_read(ap, &tf);
  537. err = tf.feature;
  538. if (r_err)
  539. *r_err = err;
  540. /* see if device passed diags */
  541. if (err == 1)
  542. /* do nothing */ ;
  543. else if ((device == 0) && (err == 0x81))
  544. /* do nothing */ ;
  545. else
  546. return ATA_DEV_NONE;
  547. /* determine if device is ATA or ATAPI */
  548. class = ata_dev_classify(&tf);
  549. if (class == ATA_DEV_UNKNOWN)
  550. return ATA_DEV_NONE;
  551. if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
  552. return ATA_DEV_NONE;
  553. return class;
  554. }
  555. /**
  556. * ata_id_string - Convert IDENTIFY DEVICE page into string
  557. * @id: IDENTIFY DEVICE results we will examine
  558. * @s: string into which data is output
  559. * @ofs: offset into identify device page
  560. * @len: length of string to return. must be an even number.
  561. *
  562. * The strings in the IDENTIFY DEVICE page are broken up into
  563. * 16-bit chunks. Run through the string, and output each
  564. * 8-bit chunk linearly, regardless of platform.
  565. *
  566. * LOCKING:
  567. * caller.
  568. */
  569. void ata_id_string(const u16 *id, unsigned char *s,
  570. unsigned int ofs, unsigned int len)
  571. {
  572. unsigned int c;
  573. while (len > 0) {
  574. c = id[ofs] >> 8;
  575. *s = c;
  576. s++;
  577. c = id[ofs] & 0xff;
  578. *s = c;
  579. s++;
  580. ofs++;
  581. len -= 2;
  582. }
  583. }
  584. /**
  585. * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
  586. * @id: IDENTIFY DEVICE results we will examine
  587. * @s: string into which data is output
  588. * @ofs: offset into identify device page
  589. * @len: length of string to return. must be an odd number.
  590. *
  591. * This function is identical to ata_id_string except that it
  592. * trims trailing spaces and terminates the resulting string with
  593. * null. @len must be actual maximum length (even number) + 1.
  594. *
  595. * LOCKING:
  596. * caller.
  597. */
  598. void ata_id_c_string(const u16 *id, unsigned char *s,
  599. unsigned int ofs, unsigned int len)
  600. {
  601. unsigned char *p;
  602. WARN_ON(!(len & 1));
  603. ata_id_string(id, s, ofs, len - 1);
  604. p = s + strnlen(s, len - 1);
  605. while (p > s && p[-1] == ' ')
  606. p--;
  607. *p = '\0';
  608. }
  609. static u64 ata_id_n_sectors(const u16 *id)
  610. {
  611. if (ata_id_has_lba(id)) {
  612. if (ata_id_has_lba48(id))
  613. return ata_id_u64(id, 100);
  614. else
  615. return ata_id_u32(id, 60);
  616. } else {
  617. if (ata_id_current_chs_valid(id))
  618. return ata_id_u32(id, 57);
  619. else
  620. return id[1] * id[3] * id[6];
  621. }
  622. }
  623. /**
  624. * ata_noop_dev_select - Select device 0/1 on ATA bus
  625. * @ap: ATA channel to manipulate
  626. * @device: ATA device (numbered from zero) to select
  627. *
  628. * This function performs no actual function.
  629. *
  630. * May be used as the dev_select() entry in ata_port_operations.
  631. *
  632. * LOCKING:
  633. * caller.
  634. */
  635. void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
  636. {
  637. }
  638. /**
  639. * ata_std_dev_select - Select device 0/1 on ATA bus
  640. * @ap: ATA channel to manipulate
  641. * @device: ATA device (numbered from zero) to select
  642. *
  643. * Use the method defined in the ATA specification to
  644. * make either device 0, or device 1, active on the
  645. * ATA channel. Works with both PIO and MMIO.
  646. *
  647. * May be used as the dev_select() entry in ata_port_operations.
  648. *
  649. * LOCKING:
  650. * caller.
  651. */
  652. void ata_std_dev_select (struct ata_port *ap, unsigned int device)
  653. {
  654. u8 tmp;
  655. if (device == 0)
  656. tmp = ATA_DEVICE_OBS;
  657. else
  658. tmp = ATA_DEVICE_OBS | ATA_DEV1;
  659. if (ap->flags & ATA_FLAG_MMIO) {
  660. writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
  661. } else {
  662. outb(tmp, ap->ioaddr.device_addr);
  663. }
  664. ata_pause(ap); /* needed; also flushes, for mmio */
  665. }
  666. /**
  667. * ata_dev_select - Select device 0/1 on ATA bus
  668. * @ap: ATA channel to manipulate
  669. * @device: ATA device (numbered from zero) to select
  670. * @wait: non-zero to wait for Status register BSY bit to clear
  671. * @can_sleep: non-zero if context allows sleeping
  672. *
  673. * Use the method defined in the ATA specification to
  674. * make either device 0, or device 1, active on the
  675. * ATA channel.
  676. *
  677. * This is a high-level version of ata_std_dev_select(),
  678. * which additionally provides the services of inserting
  679. * the proper pauses and status polling, where needed.
  680. *
  681. * LOCKING:
  682. * caller.
  683. */
  684. void ata_dev_select(struct ata_port *ap, unsigned int device,
  685. unsigned int wait, unsigned int can_sleep)
  686. {
  687. VPRINTK("ENTER, ata%u: device %u, wait %u\n",
  688. ap->id, device, wait);
  689. if (wait)
  690. ata_wait_idle(ap);
  691. ap->ops->dev_select(ap, device);
  692. if (wait) {
  693. if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
  694. msleep(150);
  695. ata_wait_idle(ap);
  696. }
  697. }
  698. /**
  699. * ata_dump_id - IDENTIFY DEVICE info debugging output
  700. * @id: IDENTIFY DEVICE page to dump
  701. *
  702. * Dump selected 16-bit words from the given IDENTIFY DEVICE
  703. * page.
  704. *
  705. * LOCKING:
  706. * caller.
  707. */
  708. static inline void ata_dump_id(const u16 *id)
  709. {
  710. DPRINTK("49==0x%04x "
  711. "53==0x%04x "
  712. "63==0x%04x "
  713. "64==0x%04x "
  714. "75==0x%04x \n",
  715. id[49],
  716. id[53],
  717. id[63],
  718. id[64],
  719. id[75]);
  720. DPRINTK("80==0x%04x "
  721. "81==0x%04x "
  722. "82==0x%04x "
  723. "83==0x%04x "
  724. "84==0x%04x \n",
  725. id[80],
  726. id[81],
  727. id[82],
  728. id[83],
  729. id[84]);
  730. DPRINTK("88==0x%04x "
  731. "93==0x%04x\n",
  732. id[88],
  733. id[93]);
  734. }
  735. /**
  736. * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
  737. * @id: IDENTIFY data to compute xfer mask from
  738. *
  739. * Compute the xfermask for this device. This is not as trivial
  740. * as it seems if we must consider early devices correctly.
  741. *
  742. * FIXME: pre IDE drive timing (do we care ?).
  743. *
  744. * LOCKING:
  745. * None.
  746. *
  747. * RETURNS:
  748. * Computed xfermask
  749. */
  750. static unsigned int ata_id_xfermask(const u16 *id)
  751. {
  752. unsigned int pio_mask, mwdma_mask, udma_mask;
  753. /* Usual case. Word 53 indicates word 64 is valid */
  754. if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
  755. pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
  756. pio_mask <<= 3;
  757. pio_mask |= 0x7;
  758. } else {
  759. /* If word 64 isn't valid then Word 51 high byte holds
  760. * the PIO timing number for the maximum. Turn it into
  761. * a mask.
  762. */
  763. pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
  764. /* But wait.. there's more. Design your standards by
  765. * committee and you too can get a free iordy field to
  766. * process. However its the speeds not the modes that
  767. * are supported... Note drivers using the timing API
  768. * will get this right anyway
  769. */
  770. }
  771. mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
  772. udma_mask = 0;
  773. if (id[ATA_ID_FIELD_VALID] & (1 << 2))
  774. udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
  775. return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
  776. }
  777. /**
  778. * ata_port_queue_task - Queue port_task
  779. * @ap: The ata_port to queue port_task for
  780. * @fn: workqueue function to be scheduled
  781. * @data: data value to pass to workqueue function
  782. * @delay: delay time for workqueue function
  783. *
  784. * Schedule @fn(@data) for execution after @delay jiffies using
  785. * port_task. There is one port_task per port and it's the
  786. * user(low level driver)'s responsibility to make sure that only
  787. * one task is active at any given time.
  788. *
  789. * libata core layer takes care of synchronization between
  790. * port_task and EH. ata_port_queue_task() may be ignored for EH
  791. * synchronization.
  792. *
  793. * LOCKING:
  794. * Inherited from caller.
  795. */
  796. void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
  797. unsigned long delay)
  798. {
  799. int rc;
  800. if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
  801. return;
  802. PREPARE_WORK(&ap->port_task, fn, data);
  803. if (!delay)
  804. rc = queue_work(ata_wq, &ap->port_task);
  805. else
  806. rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
  807. /* rc == 0 means that another user is using port task */
  808. WARN_ON(rc == 0);
  809. }
  810. /**
  811. * ata_port_flush_task - Flush port_task
  812. * @ap: The ata_port to flush port_task for
  813. *
  814. * After this function completes, port_task is guranteed not to
  815. * be running or scheduled.
  816. *
  817. * LOCKING:
  818. * Kernel thread context (may sleep)
  819. */
  820. void ata_port_flush_task(struct ata_port *ap)
  821. {
  822. unsigned long flags;
  823. DPRINTK("ENTER\n");
  824. spin_lock_irqsave(&ap->host_set->lock, flags);
  825. ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
  826. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  827. DPRINTK("flush #1\n");
  828. flush_workqueue(ata_wq);
  829. /*
  830. * At this point, if a task is running, it's guaranteed to see
  831. * the FLUSH flag; thus, it will never queue pio tasks again.
  832. * Cancel and flush.
  833. */
  834. if (!cancel_delayed_work(&ap->port_task)) {
  835. DPRINTK("flush #2\n");
  836. flush_workqueue(ata_wq);
  837. }
  838. spin_lock_irqsave(&ap->host_set->lock, flags);
  839. ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
  840. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  841. DPRINTK("EXIT\n");
  842. }
  843. void ata_qc_complete_internal(struct ata_queued_cmd *qc)
  844. {
  845. struct completion *waiting = qc->private_data;
  846. complete(waiting);
  847. }
  848. /**
  849. * ata_exec_internal - execute libata internal command
  850. * @dev: Device to which the command is sent
  851. * @tf: Taskfile registers for the command and the result
  852. * @cdb: CDB for packet command
  853. * @dma_dir: Data tranfer direction of the command
  854. * @buf: Data buffer of the command
  855. * @buflen: Length of data buffer
  856. *
  857. * Executes libata internal command with timeout. @tf contains
  858. * command on entry and result on return. Timeout and error
  859. * conditions are reported via return value. No recovery action
  860. * is taken after a command times out. It's caller's duty to
  861. * clean up after timeout.
  862. *
  863. * LOCKING:
  864. * None. Should be called with kernel context, might sleep.
  865. *
  866. * RETURNS:
  867. * Zero on success, AC_ERR_* mask on failure
  868. */
  869. unsigned ata_exec_internal(struct ata_device *dev,
  870. struct ata_taskfile *tf, const u8 *cdb,
  871. int dma_dir, void *buf, unsigned int buflen)
  872. {
  873. struct ata_port *ap = dev->ap;
  874. u8 command = tf->command;
  875. struct ata_queued_cmd *qc;
  876. unsigned int tag, preempted_tag;
  877. u32 preempted_sactive, preempted_qc_active;
  878. DECLARE_COMPLETION(wait);
  879. unsigned long flags;
  880. unsigned int err_mask;
  881. int rc;
  882. spin_lock_irqsave(&ap->host_set->lock, flags);
  883. /* no internal command while frozen */
  884. if (ap->flags & ATA_FLAG_FROZEN) {
  885. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  886. return AC_ERR_SYSTEM;
  887. }
  888. /* initialize internal qc */
  889. /* XXX: Tag 0 is used for drivers with legacy EH as some
  890. * drivers choke if any other tag is given. This breaks
  891. * ata_tag_internal() test for those drivers. Don't use new
  892. * EH stuff without converting to it.
  893. */
  894. if (ap->ops->error_handler)
  895. tag = ATA_TAG_INTERNAL;
  896. else
  897. tag = 0;
  898. if (test_and_set_bit(tag, &ap->qc_allocated))
  899. BUG();
  900. qc = __ata_qc_from_tag(ap, tag);
  901. qc->tag = tag;
  902. qc->scsicmd = NULL;
  903. qc->ap = ap;
  904. qc->dev = dev;
  905. ata_qc_reinit(qc);
  906. preempted_tag = ap->active_tag;
  907. preempted_sactive = ap->sactive;
  908. preempted_qc_active = ap->qc_active;
  909. ap->active_tag = ATA_TAG_POISON;
  910. ap->sactive = 0;
  911. ap->qc_active = 0;
  912. /* prepare & issue qc */
  913. qc->tf = *tf;
  914. if (cdb)
  915. memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
  916. qc->flags |= ATA_QCFLAG_RESULT_TF;
  917. qc->dma_dir = dma_dir;
  918. if (dma_dir != DMA_NONE) {
  919. ata_sg_init_one(qc, buf, buflen);
  920. qc->nsect = buflen / ATA_SECT_SIZE;
  921. }
  922. qc->private_data = &wait;
  923. qc->complete_fn = ata_qc_complete_internal;
  924. ata_qc_issue(qc);
  925. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  926. rc = wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL);
  927. ata_port_flush_task(ap);
  928. if (!rc) {
  929. spin_lock_irqsave(&ap->host_set->lock, flags);
  930. /* We're racing with irq here. If we lose, the
  931. * following test prevents us from completing the qc
  932. * twice. If we win, the port is frozen and will be
  933. * cleaned up by ->post_internal_cmd().
  934. */
  935. if (qc->flags & ATA_QCFLAG_ACTIVE) {
  936. qc->err_mask |= AC_ERR_TIMEOUT;
  937. if (ap->ops->error_handler)
  938. ata_port_freeze(ap);
  939. else
  940. ata_qc_complete(qc);
  941. ata_dev_printk(dev, KERN_WARNING,
  942. "qc timeout (cmd 0x%x)\n", command);
  943. }
  944. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  945. }
  946. /* do post_internal_cmd */
  947. if (ap->ops->post_internal_cmd)
  948. ap->ops->post_internal_cmd(qc);
  949. if (qc->flags & ATA_QCFLAG_FAILED && !qc->err_mask) {
  950. ata_dev_printk(dev, KERN_WARNING, "zero err_mask for failed "
  951. "internal command, assuming AC_ERR_OTHER\n");
  952. qc->err_mask |= AC_ERR_OTHER;
  953. }
  954. /* finish up */
  955. spin_lock_irqsave(&ap->host_set->lock, flags);
  956. *tf = qc->result_tf;
  957. err_mask = qc->err_mask;
  958. ata_qc_free(qc);
  959. ap->active_tag = preempted_tag;
  960. ap->sactive = preempted_sactive;
  961. ap->qc_active = preempted_qc_active;
  962. /* XXX - Some LLDDs (sata_mv) disable port on command failure.
  963. * Until those drivers are fixed, we detect the condition
  964. * here, fail the command with AC_ERR_SYSTEM and reenable the
  965. * port.
  966. *
  967. * Note that this doesn't change any behavior as internal
  968. * command failure results in disabling the device in the
  969. * higher layer for LLDDs without new reset/EH callbacks.
  970. *
  971. * Kill the following code as soon as those drivers are fixed.
  972. */
  973. if (ap->flags & ATA_FLAG_DISABLED) {
  974. err_mask |= AC_ERR_SYSTEM;
  975. ata_port_probe(ap);
  976. }
  977. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  978. return err_mask;
  979. }
  980. /**
  981. * ata_pio_need_iordy - check if iordy needed
  982. * @adev: ATA device
  983. *
  984. * Check if the current speed of the device requires IORDY. Used
  985. * by various controllers for chip configuration.
  986. */
  987. unsigned int ata_pio_need_iordy(const struct ata_device *adev)
  988. {
  989. int pio;
  990. int speed = adev->pio_mode - XFER_PIO_0;
  991. if (speed < 2)
  992. return 0;
  993. if (speed > 2)
  994. return 1;
  995. /* If we have no drive specific rule, then PIO 2 is non IORDY */
  996. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
  997. pio = adev->id[ATA_ID_EIDE_PIO];
  998. /* Is the speed faster than the drive allows non IORDY ? */
  999. if (pio) {
  1000. /* This is cycle times not frequency - watch the logic! */
  1001. if (pio > 240) /* PIO2 is 240nS per cycle */
  1002. return 1;
  1003. return 0;
  1004. }
  1005. }
  1006. return 0;
  1007. }
  1008. /**
  1009. * ata_dev_read_id - Read ID data from the specified device
  1010. * @dev: target device
  1011. * @p_class: pointer to class of the target device (may be changed)
  1012. * @post_reset: is this read ID post-reset?
  1013. * @id: buffer to read IDENTIFY data into
  1014. *
  1015. * Read ID data from the specified device. ATA_CMD_ID_ATA is
  1016. * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
  1017. * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
  1018. * for pre-ATA4 drives.
  1019. *
  1020. * LOCKING:
  1021. * Kernel thread context (may sleep)
  1022. *
  1023. * RETURNS:
  1024. * 0 on success, -errno otherwise.
  1025. */
  1026. int ata_dev_read_id(struct ata_device *dev, unsigned int *p_class,
  1027. int post_reset, u16 *id)
  1028. {
  1029. struct ata_port *ap = dev->ap;
  1030. unsigned int class = *p_class;
  1031. struct ata_taskfile tf;
  1032. unsigned int err_mask = 0;
  1033. const char *reason;
  1034. int rc;
  1035. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1036. ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
  1037. retry:
  1038. ata_tf_init(dev, &tf);
  1039. switch (class) {
  1040. case ATA_DEV_ATA:
  1041. tf.command = ATA_CMD_ID_ATA;
  1042. break;
  1043. case ATA_DEV_ATAPI:
  1044. tf.command = ATA_CMD_ID_ATAPI;
  1045. break;
  1046. default:
  1047. rc = -ENODEV;
  1048. reason = "unsupported class";
  1049. goto err_out;
  1050. }
  1051. tf.protocol = ATA_PROT_PIO;
  1052. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_FROM_DEVICE,
  1053. id, sizeof(id[0]) * ATA_ID_WORDS);
  1054. if (err_mask) {
  1055. rc = -EIO;
  1056. reason = "I/O error";
  1057. goto err_out;
  1058. }
  1059. swap_buf_le16(id, ATA_ID_WORDS);
  1060. /* sanity check */
  1061. if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
  1062. rc = -EINVAL;
  1063. reason = "device reports illegal type";
  1064. goto err_out;
  1065. }
  1066. if (post_reset && class == ATA_DEV_ATA) {
  1067. /*
  1068. * The exact sequence expected by certain pre-ATA4 drives is:
  1069. * SRST RESET
  1070. * IDENTIFY
  1071. * INITIALIZE DEVICE PARAMETERS
  1072. * anything else..
  1073. * Some drives were very specific about that exact sequence.
  1074. */
  1075. if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
  1076. err_mask = ata_dev_init_params(dev, id[3], id[6]);
  1077. if (err_mask) {
  1078. rc = -EIO;
  1079. reason = "INIT_DEV_PARAMS failed";
  1080. goto err_out;
  1081. }
  1082. /* current CHS translation info (id[53-58]) might be
  1083. * changed. reread the identify device info.
  1084. */
  1085. post_reset = 0;
  1086. goto retry;
  1087. }
  1088. }
  1089. *p_class = class;
  1090. return 0;
  1091. err_out:
  1092. ata_dev_printk(dev, KERN_WARNING, "failed to IDENTIFY "
  1093. "(%s, err_mask=0x%x)\n", reason, err_mask);
  1094. return rc;
  1095. }
  1096. static inline u8 ata_dev_knobble(struct ata_device *dev)
  1097. {
  1098. return ((dev->ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
  1099. }
  1100. static void ata_dev_config_ncq(struct ata_device *dev,
  1101. char *desc, size_t desc_sz)
  1102. {
  1103. struct ata_port *ap = dev->ap;
  1104. int hdepth = 0, ddepth = ata_id_queue_depth(dev->id);
  1105. if (!ata_id_has_ncq(dev->id)) {
  1106. desc[0] = '\0';
  1107. return;
  1108. }
  1109. if (ap->flags & ATA_FLAG_NCQ) {
  1110. hdepth = min(ap->host->can_queue, ATA_MAX_QUEUE - 1);
  1111. dev->flags |= ATA_DFLAG_NCQ;
  1112. }
  1113. if (hdepth >= ddepth)
  1114. snprintf(desc, desc_sz, "NCQ (depth %d)", ddepth);
  1115. else
  1116. snprintf(desc, desc_sz, "NCQ (depth %d/%d)", hdepth, ddepth);
  1117. }
  1118. /**
  1119. * ata_dev_configure - Configure the specified ATA/ATAPI device
  1120. * @dev: Target device to configure
  1121. * @print_info: Enable device info printout
  1122. *
  1123. * Configure @dev according to @dev->id. Generic and low-level
  1124. * driver specific fixups are also applied.
  1125. *
  1126. * LOCKING:
  1127. * Kernel thread context (may sleep)
  1128. *
  1129. * RETURNS:
  1130. * 0 on success, -errno otherwise
  1131. */
  1132. int ata_dev_configure(struct ata_device *dev, int print_info)
  1133. {
  1134. struct ata_port *ap = dev->ap;
  1135. const u16 *id = dev->id;
  1136. unsigned int xfer_mask;
  1137. int i, rc;
  1138. if (!ata_dev_enabled(dev)) {
  1139. DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
  1140. ap->id, dev->devno);
  1141. return 0;
  1142. }
  1143. DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
  1144. /* print device capabilities */
  1145. if (print_info)
  1146. ata_dev_printk(dev, KERN_DEBUG, "cfg 49:%04x 82:%04x 83:%04x "
  1147. "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
  1148. id[49], id[82], id[83], id[84],
  1149. id[85], id[86], id[87], id[88]);
  1150. /* initialize to-be-configured parameters */
  1151. dev->flags &= ~ATA_DFLAG_CFG_MASK;
  1152. dev->max_sectors = 0;
  1153. dev->cdb_len = 0;
  1154. dev->n_sectors = 0;
  1155. dev->cylinders = 0;
  1156. dev->heads = 0;
  1157. dev->sectors = 0;
  1158. /*
  1159. * common ATA, ATAPI feature tests
  1160. */
  1161. /* find max transfer mode; for printk only */
  1162. xfer_mask = ata_id_xfermask(id);
  1163. ata_dump_id(id);
  1164. /* ATA-specific feature tests */
  1165. if (dev->class == ATA_DEV_ATA) {
  1166. dev->n_sectors = ata_id_n_sectors(id);
  1167. if (ata_id_has_lba(id)) {
  1168. const char *lba_desc;
  1169. char ncq_desc[20];
  1170. lba_desc = "LBA";
  1171. dev->flags |= ATA_DFLAG_LBA;
  1172. if (ata_id_has_lba48(id)) {
  1173. dev->flags |= ATA_DFLAG_LBA48;
  1174. lba_desc = "LBA48";
  1175. }
  1176. /* config NCQ */
  1177. ata_dev_config_ncq(dev, ncq_desc, sizeof(ncq_desc));
  1178. /* print device info to dmesg */
  1179. if (print_info)
  1180. ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
  1181. "max %s, %Lu sectors: %s %s\n",
  1182. ata_id_major_version(id),
  1183. ata_mode_string(xfer_mask),
  1184. (unsigned long long)dev->n_sectors,
  1185. lba_desc, ncq_desc);
  1186. } else {
  1187. /* CHS */
  1188. /* Default translation */
  1189. dev->cylinders = id[1];
  1190. dev->heads = id[3];
  1191. dev->sectors = id[6];
  1192. if (ata_id_current_chs_valid(id)) {
  1193. /* Current CHS translation is valid. */
  1194. dev->cylinders = id[54];
  1195. dev->heads = id[55];
  1196. dev->sectors = id[56];
  1197. }
  1198. /* print device info to dmesg */
  1199. if (print_info)
  1200. ata_dev_printk(dev, KERN_INFO, "ATA-%d, "
  1201. "max %s, %Lu sectors: CHS %u/%u/%u\n",
  1202. ata_id_major_version(id),
  1203. ata_mode_string(xfer_mask),
  1204. (unsigned long long)dev->n_sectors,
  1205. dev->cylinders, dev->heads, dev->sectors);
  1206. }
  1207. if (dev->id[59] & 0x100) {
  1208. dev->multi_count = dev->id[59] & 0xff;
  1209. DPRINTK("ata%u: dev %u multi count %u\n",
  1210. ap->id, dev->devno, dev->multi_count);
  1211. }
  1212. dev->cdb_len = 16;
  1213. }
  1214. /* ATAPI-specific feature tests */
  1215. else if (dev->class == ATA_DEV_ATAPI) {
  1216. char *cdb_intr_string = "";
  1217. rc = atapi_cdb_len(id);
  1218. if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
  1219. ata_dev_printk(dev, KERN_WARNING,
  1220. "unsupported CDB len\n");
  1221. rc = -EINVAL;
  1222. goto err_out_nosup;
  1223. }
  1224. dev->cdb_len = (unsigned int) rc;
  1225. if (ata_id_cdb_intr(dev->id)) {
  1226. dev->flags |= ATA_DFLAG_CDB_INTR;
  1227. cdb_intr_string = ", CDB intr";
  1228. }
  1229. /* print device info to dmesg */
  1230. if (print_info)
  1231. ata_dev_printk(dev, KERN_INFO, "ATAPI, max %s%s\n",
  1232. ata_mode_string(xfer_mask),
  1233. cdb_intr_string);
  1234. }
  1235. ap->host->max_cmd_len = 0;
  1236. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1237. ap->host->max_cmd_len = max_t(unsigned int,
  1238. ap->host->max_cmd_len,
  1239. ap->device[i].cdb_len);
  1240. /* limit bridge transfers to udma5, 200 sectors */
  1241. if (ata_dev_knobble(dev)) {
  1242. if (print_info)
  1243. ata_dev_printk(dev, KERN_INFO,
  1244. "applying bridge limits\n");
  1245. dev->udma_mask &= ATA_UDMA5;
  1246. dev->max_sectors = ATA_MAX_SECTORS;
  1247. }
  1248. if (ap->ops->dev_config)
  1249. ap->ops->dev_config(ap, dev);
  1250. DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
  1251. return 0;
  1252. err_out_nosup:
  1253. DPRINTK("EXIT, err\n");
  1254. return rc;
  1255. }
  1256. /**
  1257. * ata_bus_probe - Reset and probe ATA bus
  1258. * @ap: Bus to probe
  1259. *
  1260. * Master ATA bus probing function. Initiates a hardware-dependent
  1261. * bus reset, then attempts to identify any devices found on
  1262. * the bus.
  1263. *
  1264. * LOCKING:
  1265. * PCI/etc. bus probe sem.
  1266. *
  1267. * RETURNS:
  1268. * Zero on success, negative errno otherwise.
  1269. */
  1270. static int ata_bus_probe(struct ata_port *ap)
  1271. {
  1272. unsigned int classes[ATA_MAX_DEVICES];
  1273. int tries[ATA_MAX_DEVICES];
  1274. int i, rc, down_xfermask;
  1275. struct ata_device *dev;
  1276. ata_port_probe(ap);
  1277. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1278. tries[i] = ATA_PROBE_MAX_TRIES;
  1279. retry:
  1280. down_xfermask = 0;
  1281. /* reset and determine device classes */
  1282. ap->ops->phy_reset(ap);
  1283. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1284. dev = &ap->device[i];
  1285. if (!(ap->flags & ATA_FLAG_DISABLED) &&
  1286. dev->class != ATA_DEV_UNKNOWN)
  1287. classes[dev->devno] = dev->class;
  1288. else
  1289. classes[dev->devno] = ATA_DEV_NONE;
  1290. dev->class = ATA_DEV_UNKNOWN;
  1291. }
  1292. ata_port_probe(ap);
  1293. /* after the reset the device state is PIO 0 and the controller
  1294. state is undefined. Record the mode */
  1295. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1296. ap->device[i].pio_mode = XFER_PIO_0;
  1297. /* read IDENTIFY page and configure devices */
  1298. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1299. dev = &ap->device[i];
  1300. if (tries[i])
  1301. dev->class = classes[i];
  1302. if (!ata_dev_enabled(dev))
  1303. continue;
  1304. rc = ata_dev_read_id(dev, &dev->class, 1, dev->id);
  1305. if (rc)
  1306. goto fail;
  1307. rc = ata_dev_configure(dev, 1);
  1308. if (rc)
  1309. goto fail;
  1310. }
  1311. /* configure transfer mode */
  1312. rc = ata_set_mode(ap, &dev);
  1313. if (rc) {
  1314. down_xfermask = 1;
  1315. goto fail;
  1316. }
  1317. for (i = 0; i < ATA_MAX_DEVICES; i++)
  1318. if (ata_dev_enabled(&ap->device[i]))
  1319. return 0;
  1320. /* no device present, disable port */
  1321. ata_port_disable(ap);
  1322. ap->ops->port_disable(ap);
  1323. return -ENODEV;
  1324. fail:
  1325. switch (rc) {
  1326. case -EINVAL:
  1327. case -ENODEV:
  1328. tries[dev->devno] = 0;
  1329. break;
  1330. case -EIO:
  1331. sata_down_spd_limit(ap);
  1332. /* fall through */
  1333. default:
  1334. tries[dev->devno]--;
  1335. if (down_xfermask &&
  1336. ata_down_xfermask_limit(dev, tries[dev->devno] == 1))
  1337. tries[dev->devno] = 0;
  1338. }
  1339. if (!tries[dev->devno]) {
  1340. ata_down_xfermask_limit(dev, 1);
  1341. ata_dev_disable(dev);
  1342. }
  1343. goto retry;
  1344. }
  1345. /**
  1346. * ata_port_probe - Mark port as enabled
  1347. * @ap: Port for which we indicate enablement
  1348. *
  1349. * Modify @ap data structure such that the system
  1350. * thinks that the entire port is enabled.
  1351. *
  1352. * LOCKING: host_set lock, or some other form of
  1353. * serialization.
  1354. */
  1355. void ata_port_probe(struct ata_port *ap)
  1356. {
  1357. ap->flags &= ~ATA_FLAG_DISABLED;
  1358. }
  1359. /**
  1360. * sata_print_link_status - Print SATA link status
  1361. * @ap: SATA port to printk link status about
  1362. *
  1363. * This function prints link speed and status of a SATA link.
  1364. *
  1365. * LOCKING:
  1366. * None.
  1367. */
  1368. static void sata_print_link_status(struct ata_port *ap)
  1369. {
  1370. u32 sstatus, scontrol, tmp;
  1371. if (sata_scr_read(ap, SCR_STATUS, &sstatus))
  1372. return;
  1373. sata_scr_read(ap, SCR_CONTROL, &scontrol);
  1374. if (ata_port_online(ap)) {
  1375. tmp = (sstatus >> 4) & 0xf;
  1376. ata_port_printk(ap, KERN_INFO,
  1377. "SATA link up %s (SStatus %X SControl %X)\n",
  1378. sata_spd_string(tmp), sstatus, scontrol);
  1379. } else {
  1380. ata_port_printk(ap, KERN_INFO,
  1381. "SATA link down (SStatus %X SControl %X)\n",
  1382. sstatus, scontrol);
  1383. }
  1384. }
  1385. /**
  1386. * __sata_phy_reset - Wake/reset a low-level SATA PHY
  1387. * @ap: SATA port associated with target SATA PHY.
  1388. *
  1389. * This function issues commands to standard SATA Sxxx
  1390. * PHY registers, to wake up the phy (and device), and
  1391. * clear any reset condition.
  1392. *
  1393. * LOCKING:
  1394. * PCI/etc. bus probe sem.
  1395. *
  1396. */
  1397. void __sata_phy_reset(struct ata_port *ap)
  1398. {
  1399. u32 sstatus;
  1400. unsigned long timeout = jiffies + (HZ * 5);
  1401. if (ap->flags & ATA_FLAG_SATA_RESET) {
  1402. /* issue phy wake/reset */
  1403. sata_scr_write_flush(ap, SCR_CONTROL, 0x301);
  1404. /* Couldn't find anything in SATA I/II specs, but
  1405. * AHCI-1.1 10.4.2 says at least 1 ms. */
  1406. mdelay(1);
  1407. }
  1408. /* phy wake/clear reset */
  1409. sata_scr_write_flush(ap, SCR_CONTROL, 0x300);
  1410. /* wait for phy to become ready, if necessary */
  1411. do {
  1412. msleep(200);
  1413. sata_scr_read(ap, SCR_STATUS, &sstatus);
  1414. if ((sstatus & 0xf) != 1)
  1415. break;
  1416. } while (time_before(jiffies, timeout));
  1417. /* print link status */
  1418. sata_print_link_status(ap);
  1419. /* TODO: phy layer with polling, timeouts, etc. */
  1420. if (!ata_port_offline(ap))
  1421. ata_port_probe(ap);
  1422. else
  1423. ata_port_disable(ap);
  1424. if (ap->flags & ATA_FLAG_DISABLED)
  1425. return;
  1426. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  1427. ata_port_disable(ap);
  1428. return;
  1429. }
  1430. ap->cbl = ATA_CBL_SATA;
  1431. }
  1432. /**
  1433. * sata_phy_reset - Reset SATA bus.
  1434. * @ap: SATA port associated with target SATA PHY.
  1435. *
  1436. * This function resets the SATA bus, and then probes
  1437. * the bus for devices.
  1438. *
  1439. * LOCKING:
  1440. * PCI/etc. bus probe sem.
  1441. *
  1442. */
  1443. void sata_phy_reset(struct ata_port *ap)
  1444. {
  1445. __sata_phy_reset(ap);
  1446. if (ap->flags & ATA_FLAG_DISABLED)
  1447. return;
  1448. ata_bus_reset(ap);
  1449. }
  1450. /**
  1451. * ata_dev_pair - return other device on cable
  1452. * @adev: device
  1453. *
  1454. * Obtain the other device on the same cable, or if none is
  1455. * present NULL is returned
  1456. */
  1457. struct ata_device *ata_dev_pair(struct ata_device *adev)
  1458. {
  1459. struct ata_port *ap = adev->ap;
  1460. struct ata_device *pair = &ap->device[1 - adev->devno];
  1461. if (!ata_dev_enabled(pair))
  1462. return NULL;
  1463. return pair;
  1464. }
  1465. /**
  1466. * ata_port_disable - Disable port.
  1467. * @ap: Port to be disabled.
  1468. *
  1469. * Modify @ap data structure such that the system
  1470. * thinks that the entire port is disabled, and should
  1471. * never attempt to probe or communicate with devices
  1472. * on this port.
  1473. *
  1474. * LOCKING: host_set lock, or some other form of
  1475. * serialization.
  1476. */
  1477. void ata_port_disable(struct ata_port *ap)
  1478. {
  1479. ap->device[0].class = ATA_DEV_NONE;
  1480. ap->device[1].class = ATA_DEV_NONE;
  1481. ap->flags |= ATA_FLAG_DISABLED;
  1482. }
  1483. /**
  1484. * sata_down_spd_limit - adjust SATA spd limit downward
  1485. * @ap: Port to adjust SATA spd limit for
  1486. *
  1487. * Adjust SATA spd limit of @ap downward. Note that this
  1488. * function only adjusts the limit. The change must be applied
  1489. * using sata_set_spd().
  1490. *
  1491. * LOCKING:
  1492. * Inherited from caller.
  1493. *
  1494. * RETURNS:
  1495. * 0 on success, negative errno on failure
  1496. */
  1497. int sata_down_spd_limit(struct ata_port *ap)
  1498. {
  1499. u32 sstatus, spd, mask;
  1500. int rc, highbit;
  1501. rc = sata_scr_read(ap, SCR_STATUS, &sstatus);
  1502. if (rc)
  1503. return rc;
  1504. mask = ap->sata_spd_limit;
  1505. if (mask <= 1)
  1506. return -EINVAL;
  1507. highbit = fls(mask) - 1;
  1508. mask &= ~(1 << highbit);
  1509. spd = (sstatus >> 4) & 0xf;
  1510. if (spd <= 1)
  1511. return -EINVAL;
  1512. spd--;
  1513. mask &= (1 << spd) - 1;
  1514. if (!mask)
  1515. return -EINVAL;
  1516. ap->sata_spd_limit = mask;
  1517. ata_port_printk(ap, KERN_WARNING, "limiting SATA link speed to %s\n",
  1518. sata_spd_string(fls(mask)));
  1519. return 0;
  1520. }
  1521. static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
  1522. {
  1523. u32 spd, limit;
  1524. if (ap->sata_spd_limit == UINT_MAX)
  1525. limit = 0;
  1526. else
  1527. limit = fls(ap->sata_spd_limit);
  1528. spd = (*scontrol >> 4) & 0xf;
  1529. *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
  1530. return spd != limit;
  1531. }
  1532. /**
  1533. * sata_set_spd_needed - is SATA spd configuration needed
  1534. * @ap: Port in question
  1535. *
  1536. * Test whether the spd limit in SControl matches
  1537. * @ap->sata_spd_limit. This function is used to determine
  1538. * whether hardreset is necessary to apply SATA spd
  1539. * configuration.
  1540. *
  1541. * LOCKING:
  1542. * Inherited from caller.
  1543. *
  1544. * RETURNS:
  1545. * 1 if SATA spd configuration is needed, 0 otherwise.
  1546. */
  1547. int sata_set_spd_needed(struct ata_port *ap)
  1548. {
  1549. u32 scontrol;
  1550. if (sata_scr_read(ap, SCR_CONTROL, &scontrol))
  1551. return 0;
  1552. return __sata_set_spd_needed(ap, &scontrol);
  1553. }
  1554. /**
  1555. * sata_set_spd - set SATA spd according to spd limit
  1556. * @ap: Port to set SATA spd for
  1557. *
  1558. * Set SATA spd of @ap according to sata_spd_limit.
  1559. *
  1560. * LOCKING:
  1561. * Inherited from caller.
  1562. *
  1563. * RETURNS:
  1564. * 0 if spd doesn't need to be changed, 1 if spd has been
  1565. * changed. Negative errno if SCR registers are inaccessible.
  1566. */
  1567. int sata_set_spd(struct ata_port *ap)
  1568. {
  1569. u32 scontrol;
  1570. int rc;
  1571. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  1572. return rc;
  1573. if (!__sata_set_spd_needed(ap, &scontrol))
  1574. return 0;
  1575. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  1576. return rc;
  1577. return 1;
  1578. }
  1579. /*
  1580. * This mode timing computation functionality is ported over from
  1581. * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
  1582. */
  1583. /*
  1584. * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
  1585. * These were taken from ATA/ATAPI-6 standard, rev 0a, except
  1586. * for PIO 5, which is a nonstandard extension and UDMA6, which
  1587. * is currently supported only by Maxtor drives.
  1588. */
  1589. static const struct ata_timing ata_timing[] = {
  1590. { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
  1591. { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
  1592. { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
  1593. { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
  1594. { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
  1595. { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
  1596. { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
  1597. /* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
  1598. { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
  1599. { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
  1600. { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
  1601. { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
  1602. { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
  1603. { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
  1604. /* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
  1605. { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
  1606. { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
  1607. { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
  1608. { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
  1609. { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
  1610. /* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
  1611. { 0xFF }
  1612. };
  1613. #define ENOUGH(v,unit) (((v)-1)/(unit)+1)
  1614. #define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
  1615. static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
  1616. {
  1617. q->setup = EZ(t->setup * 1000, T);
  1618. q->act8b = EZ(t->act8b * 1000, T);
  1619. q->rec8b = EZ(t->rec8b * 1000, T);
  1620. q->cyc8b = EZ(t->cyc8b * 1000, T);
  1621. q->active = EZ(t->active * 1000, T);
  1622. q->recover = EZ(t->recover * 1000, T);
  1623. q->cycle = EZ(t->cycle * 1000, T);
  1624. q->udma = EZ(t->udma * 1000, UT);
  1625. }
  1626. void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
  1627. struct ata_timing *m, unsigned int what)
  1628. {
  1629. if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
  1630. if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
  1631. if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
  1632. if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
  1633. if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
  1634. if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
  1635. if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
  1636. if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
  1637. }
  1638. static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
  1639. {
  1640. const struct ata_timing *t;
  1641. for (t = ata_timing; t->mode != speed; t++)
  1642. if (t->mode == 0xFF)
  1643. return NULL;
  1644. return t;
  1645. }
  1646. int ata_timing_compute(struct ata_device *adev, unsigned short speed,
  1647. struct ata_timing *t, int T, int UT)
  1648. {
  1649. const struct ata_timing *s;
  1650. struct ata_timing p;
  1651. /*
  1652. * Find the mode.
  1653. */
  1654. if (!(s = ata_timing_find_mode(speed)))
  1655. return -EINVAL;
  1656. memcpy(t, s, sizeof(*s));
  1657. /*
  1658. * If the drive is an EIDE drive, it can tell us it needs extended
  1659. * PIO/MW_DMA cycle timing.
  1660. */
  1661. if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
  1662. memset(&p, 0, sizeof(p));
  1663. if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
  1664. if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
  1665. else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
  1666. } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
  1667. p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
  1668. }
  1669. ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
  1670. }
  1671. /*
  1672. * Convert the timing to bus clock counts.
  1673. */
  1674. ata_timing_quantize(t, t, T, UT);
  1675. /*
  1676. * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
  1677. * S.M.A.R.T * and some other commands. We have to ensure that the
  1678. * DMA cycle timing is slower/equal than the fastest PIO timing.
  1679. */
  1680. if (speed > XFER_PIO_4) {
  1681. ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
  1682. ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
  1683. }
  1684. /*
  1685. * Lengthen active & recovery time so that cycle time is correct.
  1686. */
  1687. if (t->act8b + t->rec8b < t->cyc8b) {
  1688. t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
  1689. t->rec8b = t->cyc8b - t->act8b;
  1690. }
  1691. if (t->active + t->recover < t->cycle) {
  1692. t->active += (t->cycle - (t->active + t->recover)) / 2;
  1693. t->recover = t->cycle - t->active;
  1694. }
  1695. return 0;
  1696. }
  1697. /**
  1698. * ata_down_xfermask_limit - adjust dev xfer masks downward
  1699. * @dev: Device to adjust xfer masks
  1700. * @force_pio0: Force PIO0
  1701. *
  1702. * Adjust xfer masks of @dev downward. Note that this function
  1703. * does not apply the change. Invoking ata_set_mode() afterwards
  1704. * will apply the limit.
  1705. *
  1706. * LOCKING:
  1707. * Inherited from caller.
  1708. *
  1709. * RETURNS:
  1710. * 0 on success, negative errno on failure
  1711. */
  1712. int ata_down_xfermask_limit(struct ata_device *dev, int force_pio0)
  1713. {
  1714. unsigned long xfer_mask;
  1715. int highbit;
  1716. xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
  1717. dev->udma_mask);
  1718. if (!xfer_mask)
  1719. goto fail;
  1720. /* don't gear down to MWDMA from UDMA, go directly to PIO */
  1721. if (xfer_mask & ATA_MASK_UDMA)
  1722. xfer_mask &= ~ATA_MASK_MWDMA;
  1723. highbit = fls(xfer_mask) - 1;
  1724. xfer_mask &= ~(1 << highbit);
  1725. if (force_pio0)
  1726. xfer_mask &= 1 << ATA_SHIFT_PIO;
  1727. if (!xfer_mask)
  1728. goto fail;
  1729. ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
  1730. &dev->udma_mask);
  1731. ata_dev_printk(dev, KERN_WARNING, "limiting speed to %s\n",
  1732. ata_mode_string(xfer_mask));
  1733. return 0;
  1734. fail:
  1735. return -EINVAL;
  1736. }
  1737. static int ata_dev_set_mode(struct ata_device *dev)
  1738. {
  1739. unsigned int err_mask;
  1740. int rc;
  1741. dev->flags &= ~ATA_DFLAG_PIO;
  1742. if (dev->xfer_shift == ATA_SHIFT_PIO)
  1743. dev->flags |= ATA_DFLAG_PIO;
  1744. err_mask = ata_dev_set_xfermode(dev);
  1745. if (err_mask) {
  1746. ata_dev_printk(dev, KERN_ERR, "failed to set xfermode "
  1747. "(err_mask=0x%x)\n", err_mask);
  1748. return -EIO;
  1749. }
  1750. rc = ata_dev_revalidate(dev, 0);
  1751. if (rc)
  1752. return rc;
  1753. DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
  1754. dev->xfer_shift, (int)dev->xfer_mode);
  1755. ata_dev_printk(dev, KERN_INFO, "configured for %s\n",
  1756. ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
  1757. return 0;
  1758. }
  1759. /**
  1760. * ata_set_mode - Program timings and issue SET FEATURES - XFER
  1761. * @ap: port on which timings will be programmed
  1762. * @r_failed_dev: out paramter for failed device
  1763. *
  1764. * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
  1765. * ata_set_mode() fails, pointer to the failing device is
  1766. * returned in @r_failed_dev.
  1767. *
  1768. * LOCKING:
  1769. * PCI/etc. bus probe sem.
  1770. *
  1771. * RETURNS:
  1772. * 0 on success, negative errno otherwise
  1773. */
  1774. int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
  1775. {
  1776. struct ata_device *dev;
  1777. int i, rc = 0, used_dma = 0, found = 0;
  1778. /* has private set_mode? */
  1779. if (ap->ops->set_mode) {
  1780. /* FIXME: make ->set_mode handle no device case and
  1781. * return error code and failing device on failure.
  1782. */
  1783. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1784. if (ata_dev_enabled(&ap->device[i])) {
  1785. ap->ops->set_mode(ap);
  1786. break;
  1787. }
  1788. }
  1789. return 0;
  1790. }
  1791. /* step 1: calculate xfer_mask */
  1792. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1793. unsigned int pio_mask, dma_mask;
  1794. dev = &ap->device[i];
  1795. if (!ata_dev_enabled(dev))
  1796. continue;
  1797. ata_dev_xfermask(dev);
  1798. pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
  1799. dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
  1800. dev->pio_mode = ata_xfer_mask2mode(pio_mask);
  1801. dev->dma_mode = ata_xfer_mask2mode(dma_mask);
  1802. found = 1;
  1803. if (dev->dma_mode)
  1804. used_dma = 1;
  1805. }
  1806. if (!found)
  1807. goto out;
  1808. /* step 2: always set host PIO timings */
  1809. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1810. dev = &ap->device[i];
  1811. if (!ata_dev_enabled(dev))
  1812. continue;
  1813. if (!dev->pio_mode) {
  1814. ata_dev_printk(dev, KERN_WARNING, "no PIO support\n");
  1815. rc = -EINVAL;
  1816. goto out;
  1817. }
  1818. dev->xfer_mode = dev->pio_mode;
  1819. dev->xfer_shift = ATA_SHIFT_PIO;
  1820. if (ap->ops->set_piomode)
  1821. ap->ops->set_piomode(ap, dev);
  1822. }
  1823. /* step 3: set host DMA timings */
  1824. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1825. dev = &ap->device[i];
  1826. if (!ata_dev_enabled(dev) || !dev->dma_mode)
  1827. continue;
  1828. dev->xfer_mode = dev->dma_mode;
  1829. dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
  1830. if (ap->ops->set_dmamode)
  1831. ap->ops->set_dmamode(ap, dev);
  1832. }
  1833. /* step 4: update devices' xfer mode */
  1834. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  1835. dev = &ap->device[i];
  1836. if (!ata_dev_enabled(dev))
  1837. continue;
  1838. rc = ata_dev_set_mode(dev);
  1839. if (rc)
  1840. goto out;
  1841. }
  1842. /* Record simplex status. If we selected DMA then the other
  1843. * host channels are not permitted to do so.
  1844. */
  1845. if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
  1846. ap->host_set->simplex_claimed = 1;
  1847. /* step5: chip specific finalisation */
  1848. if (ap->ops->post_set_mode)
  1849. ap->ops->post_set_mode(ap);
  1850. out:
  1851. if (rc)
  1852. *r_failed_dev = dev;
  1853. return rc;
  1854. }
  1855. /**
  1856. * ata_tf_to_host - issue ATA taskfile to host controller
  1857. * @ap: port to which command is being issued
  1858. * @tf: ATA taskfile register set
  1859. *
  1860. * Issues ATA taskfile register set to ATA host controller,
  1861. * with proper synchronization with interrupt handler and
  1862. * other threads.
  1863. *
  1864. * LOCKING:
  1865. * spin_lock_irqsave(host_set lock)
  1866. */
  1867. static inline void ata_tf_to_host(struct ata_port *ap,
  1868. const struct ata_taskfile *tf)
  1869. {
  1870. ap->ops->tf_load(ap, tf);
  1871. ap->ops->exec_command(ap, tf);
  1872. }
  1873. /**
  1874. * ata_busy_sleep - sleep until BSY clears, or timeout
  1875. * @ap: port containing status register to be polled
  1876. * @tmout_pat: impatience timeout
  1877. * @tmout: overall timeout
  1878. *
  1879. * Sleep until ATA Status register bit BSY clears,
  1880. * or a timeout occurs.
  1881. *
  1882. * LOCKING: None.
  1883. */
  1884. unsigned int ata_busy_sleep (struct ata_port *ap,
  1885. unsigned long tmout_pat, unsigned long tmout)
  1886. {
  1887. unsigned long timer_start, timeout;
  1888. u8 status;
  1889. status = ata_busy_wait(ap, ATA_BUSY, 300);
  1890. timer_start = jiffies;
  1891. timeout = timer_start + tmout_pat;
  1892. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1893. msleep(50);
  1894. status = ata_busy_wait(ap, ATA_BUSY, 3);
  1895. }
  1896. if (status & ATA_BUSY)
  1897. ata_port_printk(ap, KERN_WARNING,
  1898. "port is slow to respond, please be patient\n");
  1899. timeout = timer_start + tmout;
  1900. while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
  1901. msleep(50);
  1902. status = ata_chk_status(ap);
  1903. }
  1904. if (status & ATA_BUSY) {
  1905. ata_port_printk(ap, KERN_ERR, "port failed to respond "
  1906. "(%lu secs)\n", tmout / HZ);
  1907. return 1;
  1908. }
  1909. return 0;
  1910. }
  1911. static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
  1912. {
  1913. struct ata_ioports *ioaddr = &ap->ioaddr;
  1914. unsigned int dev0 = devmask & (1 << 0);
  1915. unsigned int dev1 = devmask & (1 << 1);
  1916. unsigned long timeout;
  1917. /* if device 0 was found in ata_devchk, wait for its
  1918. * BSY bit to clear
  1919. */
  1920. if (dev0)
  1921. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1922. /* if device 1 was found in ata_devchk, wait for
  1923. * register access, then wait for BSY to clear
  1924. */
  1925. timeout = jiffies + ATA_TMOUT_BOOT;
  1926. while (dev1) {
  1927. u8 nsect, lbal;
  1928. ap->ops->dev_select(ap, 1);
  1929. if (ap->flags & ATA_FLAG_MMIO) {
  1930. nsect = readb((void __iomem *) ioaddr->nsect_addr);
  1931. lbal = readb((void __iomem *) ioaddr->lbal_addr);
  1932. } else {
  1933. nsect = inb(ioaddr->nsect_addr);
  1934. lbal = inb(ioaddr->lbal_addr);
  1935. }
  1936. if ((nsect == 1) && (lbal == 1))
  1937. break;
  1938. if (time_after(jiffies, timeout)) {
  1939. dev1 = 0;
  1940. break;
  1941. }
  1942. msleep(50); /* give drive a breather */
  1943. }
  1944. if (dev1)
  1945. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  1946. /* is all this really necessary? */
  1947. ap->ops->dev_select(ap, 0);
  1948. if (dev1)
  1949. ap->ops->dev_select(ap, 1);
  1950. if (dev0)
  1951. ap->ops->dev_select(ap, 0);
  1952. }
  1953. static unsigned int ata_bus_softreset(struct ata_port *ap,
  1954. unsigned int devmask)
  1955. {
  1956. struct ata_ioports *ioaddr = &ap->ioaddr;
  1957. DPRINTK("ata%u: bus reset via SRST\n", ap->id);
  1958. /* software reset. causes dev0 to be selected */
  1959. if (ap->flags & ATA_FLAG_MMIO) {
  1960. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1961. udelay(20); /* FIXME: flush */
  1962. writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
  1963. udelay(20); /* FIXME: flush */
  1964. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  1965. } else {
  1966. outb(ap->ctl, ioaddr->ctl_addr);
  1967. udelay(10);
  1968. outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
  1969. udelay(10);
  1970. outb(ap->ctl, ioaddr->ctl_addr);
  1971. }
  1972. /* spec mandates ">= 2ms" before checking status.
  1973. * We wait 150ms, because that was the magic delay used for
  1974. * ATAPI devices in Hale Landis's ATADRVR, for the period of time
  1975. * between when the ATA command register is written, and then
  1976. * status is checked. Because waiting for "a while" before
  1977. * checking status is fine, post SRST, we perform this magic
  1978. * delay here as well.
  1979. *
  1980. * Old drivers/ide uses the 2mS rule and then waits for ready
  1981. */
  1982. msleep(150);
  1983. /* Before we perform post reset processing we want to see if
  1984. * the bus shows 0xFF because the odd clown forgets the D7
  1985. * pulldown resistor.
  1986. */
  1987. if (ata_check_status(ap) == 0xFF) {
  1988. ata_port_printk(ap, KERN_ERR, "SRST failed (status 0xFF)\n");
  1989. return AC_ERR_OTHER;
  1990. }
  1991. ata_bus_post_reset(ap, devmask);
  1992. return 0;
  1993. }
  1994. /**
  1995. * ata_bus_reset - reset host port and associated ATA channel
  1996. * @ap: port to reset
  1997. *
  1998. * This is typically the first time we actually start issuing
  1999. * commands to the ATA channel. We wait for BSY to clear, then
  2000. * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
  2001. * result. Determine what devices, if any, are on the channel
  2002. * by looking at the device 0/1 error register. Look at the signature
  2003. * stored in each device's taskfile registers, to determine if
  2004. * the device is ATA or ATAPI.
  2005. *
  2006. * LOCKING:
  2007. * PCI/etc. bus probe sem.
  2008. * Obtains host_set lock.
  2009. *
  2010. * SIDE EFFECTS:
  2011. * Sets ATA_FLAG_DISABLED if bus reset fails.
  2012. */
  2013. void ata_bus_reset(struct ata_port *ap)
  2014. {
  2015. struct ata_ioports *ioaddr = &ap->ioaddr;
  2016. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2017. u8 err;
  2018. unsigned int dev0, dev1 = 0, devmask = 0;
  2019. DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
  2020. /* determine if device 0/1 are present */
  2021. if (ap->flags & ATA_FLAG_SATA_RESET)
  2022. dev0 = 1;
  2023. else {
  2024. dev0 = ata_devchk(ap, 0);
  2025. if (slave_possible)
  2026. dev1 = ata_devchk(ap, 1);
  2027. }
  2028. if (dev0)
  2029. devmask |= (1 << 0);
  2030. if (dev1)
  2031. devmask |= (1 << 1);
  2032. /* select device 0 again */
  2033. ap->ops->dev_select(ap, 0);
  2034. /* issue bus reset */
  2035. if (ap->flags & ATA_FLAG_SRST)
  2036. if (ata_bus_softreset(ap, devmask))
  2037. goto err_out;
  2038. /*
  2039. * determine by signature whether we have ATA or ATAPI devices
  2040. */
  2041. ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
  2042. if ((slave_possible) && (err != 0x81))
  2043. ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
  2044. /* re-enable interrupts */
  2045. if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
  2046. ata_irq_on(ap);
  2047. /* is double-select really necessary? */
  2048. if (ap->device[1].class != ATA_DEV_NONE)
  2049. ap->ops->dev_select(ap, 1);
  2050. if (ap->device[0].class != ATA_DEV_NONE)
  2051. ap->ops->dev_select(ap, 0);
  2052. /* if no devices were detected, disable this port */
  2053. if ((ap->device[0].class == ATA_DEV_NONE) &&
  2054. (ap->device[1].class == ATA_DEV_NONE))
  2055. goto err_out;
  2056. if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
  2057. /* set up device control for ATA_FLAG_SATA_RESET */
  2058. if (ap->flags & ATA_FLAG_MMIO)
  2059. writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
  2060. else
  2061. outb(ap->ctl, ioaddr->ctl_addr);
  2062. }
  2063. DPRINTK("EXIT\n");
  2064. return;
  2065. err_out:
  2066. ata_port_printk(ap, KERN_ERR, "disabling port\n");
  2067. ap->ops->port_disable(ap);
  2068. DPRINTK("EXIT\n");
  2069. }
  2070. /**
  2071. * sata_phy_debounce - debounce SATA phy status
  2072. * @ap: ATA port to debounce SATA phy status for
  2073. * @params: timing parameters { interval, duratinon, timeout } in msec
  2074. *
  2075. * Make sure SStatus of @ap reaches stable state, determined by
  2076. * holding the same value where DET is not 1 for @duration polled
  2077. * every @interval, before @timeout. Timeout constraints the
  2078. * beginning of the stable state. Because, after hot unplugging,
  2079. * DET gets stuck at 1 on some controllers, this functions waits
  2080. * until timeout then returns 0 if DET is stable at 1.
  2081. *
  2082. * LOCKING:
  2083. * Kernel thread context (may sleep)
  2084. *
  2085. * RETURNS:
  2086. * 0 on success, -errno on failure.
  2087. */
  2088. int sata_phy_debounce(struct ata_port *ap, const unsigned long *params)
  2089. {
  2090. unsigned long interval_msec = params[0];
  2091. unsigned long duration = params[1] * HZ / 1000;
  2092. unsigned long timeout = jiffies + params[2] * HZ / 1000;
  2093. unsigned long last_jiffies;
  2094. u32 last, cur;
  2095. int rc;
  2096. if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
  2097. return rc;
  2098. cur &= 0xf;
  2099. last = cur;
  2100. last_jiffies = jiffies;
  2101. while (1) {
  2102. msleep(interval_msec);
  2103. if ((rc = sata_scr_read(ap, SCR_STATUS, &cur)))
  2104. return rc;
  2105. cur &= 0xf;
  2106. /* DET stable? */
  2107. if (cur == last) {
  2108. if (cur == 1 && time_before(jiffies, timeout))
  2109. continue;
  2110. if (time_after(jiffies, last_jiffies + duration))
  2111. return 0;
  2112. continue;
  2113. }
  2114. /* unstable, start over */
  2115. last = cur;
  2116. last_jiffies = jiffies;
  2117. /* check timeout */
  2118. if (time_after(jiffies, timeout))
  2119. return -EBUSY;
  2120. }
  2121. }
  2122. /**
  2123. * sata_phy_resume - resume SATA phy
  2124. * @ap: ATA port to resume SATA phy for
  2125. * @params: timing parameters { interval, duratinon, timeout } in msec
  2126. *
  2127. * Resume SATA phy of @ap and debounce it.
  2128. *
  2129. * LOCKING:
  2130. * Kernel thread context (may sleep)
  2131. *
  2132. * RETURNS:
  2133. * 0 on success, -errno on failure.
  2134. */
  2135. int sata_phy_resume(struct ata_port *ap, const unsigned long *params)
  2136. {
  2137. u32 scontrol;
  2138. int rc;
  2139. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2140. return rc;
  2141. scontrol = (scontrol & 0x0f0) | 0x300;
  2142. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2143. return rc;
  2144. /* Some PHYs react badly if SStatus is pounded immediately
  2145. * after resuming. Delay 200ms before debouncing.
  2146. */
  2147. msleep(200);
  2148. return sata_phy_debounce(ap, params);
  2149. }
  2150. static void ata_wait_spinup(struct ata_port *ap)
  2151. {
  2152. struct ata_eh_context *ehc = &ap->eh_context;
  2153. unsigned long end, secs;
  2154. int rc;
  2155. /* first, debounce phy if SATA */
  2156. if (ap->cbl == ATA_CBL_SATA) {
  2157. rc = sata_phy_debounce(ap, sata_deb_timing_eh);
  2158. /* if debounced successfully and offline, no need to wait */
  2159. if ((rc == 0 || rc == -EOPNOTSUPP) && ata_port_offline(ap))
  2160. return;
  2161. }
  2162. /* okay, let's give the drive time to spin up */
  2163. end = ehc->i.hotplug_timestamp + ATA_SPINUP_WAIT * HZ / 1000;
  2164. secs = ((end - jiffies) + HZ - 1) / HZ;
  2165. if (time_after(jiffies, end))
  2166. return;
  2167. if (secs > 5)
  2168. ata_port_printk(ap, KERN_INFO, "waiting for device to spin up "
  2169. "(%lu secs)\n", secs);
  2170. schedule_timeout_uninterruptible(end - jiffies);
  2171. }
  2172. /**
  2173. * ata_std_prereset - prepare for reset
  2174. * @ap: ATA port to be reset
  2175. *
  2176. * @ap is about to be reset. Initialize it.
  2177. *
  2178. * LOCKING:
  2179. * Kernel thread context (may sleep)
  2180. *
  2181. * RETURNS:
  2182. * 0 on success, -errno otherwise.
  2183. */
  2184. int ata_std_prereset(struct ata_port *ap)
  2185. {
  2186. struct ata_eh_context *ehc = &ap->eh_context;
  2187. const unsigned long *timing;
  2188. int rc;
  2189. /* hotplug? */
  2190. if (ehc->i.flags & ATA_EHI_HOTPLUGGED) {
  2191. if (ap->flags & ATA_FLAG_HRST_TO_RESUME)
  2192. ehc->i.action |= ATA_EH_HARDRESET;
  2193. if (ap->flags & ATA_FLAG_SKIP_D2H_BSY)
  2194. ata_wait_spinup(ap);
  2195. }
  2196. /* if we're about to do hardreset, nothing more to do */
  2197. if (ehc->i.action & ATA_EH_HARDRESET)
  2198. return 0;
  2199. /* if SATA, resume phy */
  2200. if (ap->cbl == ATA_CBL_SATA) {
  2201. if (ap->flags & ATA_FLAG_LOADING)
  2202. timing = sata_deb_timing_boot;
  2203. else
  2204. timing = sata_deb_timing_eh;
  2205. rc = sata_phy_resume(ap, timing);
  2206. if (rc && rc != -EOPNOTSUPP) {
  2207. /* phy resume failed */
  2208. ata_port_printk(ap, KERN_WARNING, "failed to resume "
  2209. "link for reset (errno=%d)\n", rc);
  2210. return rc;
  2211. }
  2212. }
  2213. /* Wait for !BSY if the controller can wait for the first D2H
  2214. * Reg FIS and we don't know that no device is attached.
  2215. */
  2216. if (!(ap->flags & ATA_FLAG_SKIP_D2H_BSY) && !ata_port_offline(ap))
  2217. ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
  2218. return 0;
  2219. }
  2220. /**
  2221. * ata_std_softreset - reset host port via ATA SRST
  2222. * @ap: port to reset
  2223. * @classes: resulting classes of attached devices
  2224. *
  2225. * Reset host port using ATA SRST.
  2226. *
  2227. * LOCKING:
  2228. * Kernel thread context (may sleep)
  2229. *
  2230. * RETURNS:
  2231. * 0 on success, -errno otherwise.
  2232. */
  2233. int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
  2234. {
  2235. unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
  2236. unsigned int devmask = 0, err_mask;
  2237. u8 err;
  2238. DPRINTK("ENTER\n");
  2239. if (ata_port_offline(ap)) {
  2240. classes[0] = ATA_DEV_NONE;
  2241. goto out;
  2242. }
  2243. /* determine if device 0/1 are present */
  2244. if (ata_devchk(ap, 0))
  2245. devmask |= (1 << 0);
  2246. if (slave_possible && ata_devchk(ap, 1))
  2247. devmask |= (1 << 1);
  2248. /* select device 0 again */
  2249. ap->ops->dev_select(ap, 0);
  2250. /* issue bus reset */
  2251. DPRINTK("about to softreset, devmask=%x\n", devmask);
  2252. err_mask = ata_bus_softreset(ap, devmask);
  2253. if (err_mask) {
  2254. ata_port_printk(ap, KERN_ERR, "SRST failed (err_mask=0x%x)\n",
  2255. err_mask);
  2256. return -EIO;
  2257. }
  2258. /* determine by signature whether we have ATA or ATAPI devices */
  2259. classes[0] = ata_dev_try_classify(ap, 0, &err);
  2260. if (slave_possible && err != 0x81)
  2261. classes[1] = ata_dev_try_classify(ap, 1, &err);
  2262. out:
  2263. DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
  2264. return 0;
  2265. }
  2266. /**
  2267. * sata_std_hardreset - reset host port via SATA phy reset
  2268. * @ap: port to reset
  2269. * @class: resulting class of attached device
  2270. *
  2271. * SATA phy-reset host port using DET bits of SControl register.
  2272. *
  2273. * LOCKING:
  2274. * Kernel thread context (may sleep)
  2275. *
  2276. * RETURNS:
  2277. * 0 on success, -errno otherwise.
  2278. */
  2279. int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
  2280. {
  2281. u32 scontrol;
  2282. int rc;
  2283. DPRINTK("ENTER\n");
  2284. if (sata_set_spd_needed(ap)) {
  2285. /* SATA spec says nothing about how to reconfigure
  2286. * spd. To be on the safe side, turn off phy during
  2287. * reconfiguration. This works for at least ICH7 AHCI
  2288. * and Sil3124.
  2289. */
  2290. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2291. return rc;
  2292. scontrol = (scontrol & 0x0f0) | 0x302;
  2293. if ((rc = sata_scr_write(ap, SCR_CONTROL, scontrol)))
  2294. return rc;
  2295. sata_set_spd(ap);
  2296. }
  2297. /* issue phy wake/reset */
  2298. if ((rc = sata_scr_read(ap, SCR_CONTROL, &scontrol)))
  2299. return rc;
  2300. scontrol = (scontrol & 0x0f0) | 0x301;
  2301. if ((rc = sata_scr_write_flush(ap, SCR_CONTROL, scontrol)))
  2302. return rc;
  2303. /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
  2304. * 10.4.2 says at least 1 ms.
  2305. */
  2306. msleep(1);
  2307. /* bring phy back */
  2308. sata_phy_resume(ap, sata_deb_timing_eh);
  2309. /* TODO: phy layer with polling, timeouts, etc. */
  2310. if (ata_port_offline(ap)) {
  2311. *class = ATA_DEV_NONE;
  2312. DPRINTK("EXIT, link offline\n");
  2313. return 0;
  2314. }
  2315. if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
  2316. ata_port_printk(ap, KERN_ERR,
  2317. "COMRESET failed (device not ready)\n");
  2318. return -EIO;
  2319. }
  2320. ap->ops->dev_select(ap, 0); /* probably unnecessary */
  2321. *class = ata_dev_try_classify(ap, 0, NULL);
  2322. DPRINTK("EXIT, class=%u\n", *class);
  2323. return 0;
  2324. }
  2325. /**
  2326. * ata_std_postreset - standard postreset callback
  2327. * @ap: the target ata_port
  2328. * @classes: classes of attached devices
  2329. *
  2330. * This function is invoked after a successful reset. Note that
  2331. * the device might have been reset more than once using
  2332. * different reset methods before postreset is invoked.
  2333. *
  2334. * LOCKING:
  2335. * Kernel thread context (may sleep)
  2336. */
  2337. void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
  2338. {
  2339. u32 serror;
  2340. DPRINTK("ENTER\n");
  2341. /* print link status */
  2342. sata_print_link_status(ap);
  2343. /* clear SError */
  2344. if (sata_scr_read(ap, SCR_ERROR, &serror) == 0)
  2345. sata_scr_write(ap, SCR_ERROR, serror);
  2346. /* re-enable interrupts */
  2347. if (!ap->ops->error_handler) {
  2348. /* FIXME: hack. create a hook instead */
  2349. if (ap->ioaddr.ctl_addr)
  2350. ata_irq_on(ap);
  2351. }
  2352. /* is double-select really necessary? */
  2353. if (classes[0] != ATA_DEV_NONE)
  2354. ap->ops->dev_select(ap, 1);
  2355. if (classes[1] != ATA_DEV_NONE)
  2356. ap->ops->dev_select(ap, 0);
  2357. /* bail out if no device is present */
  2358. if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
  2359. DPRINTK("EXIT, no device\n");
  2360. return;
  2361. }
  2362. /* set up device control */
  2363. if (ap->ioaddr.ctl_addr) {
  2364. if (ap->flags & ATA_FLAG_MMIO)
  2365. writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
  2366. else
  2367. outb(ap->ctl, ap->ioaddr.ctl_addr);
  2368. }
  2369. DPRINTK("EXIT\n");
  2370. }
  2371. /**
  2372. * ata_dev_same_device - Determine whether new ID matches configured device
  2373. * @dev: device to compare against
  2374. * @new_class: class of the new device
  2375. * @new_id: IDENTIFY page of the new device
  2376. *
  2377. * Compare @new_class and @new_id against @dev and determine
  2378. * whether @dev is the device indicated by @new_class and
  2379. * @new_id.
  2380. *
  2381. * LOCKING:
  2382. * None.
  2383. *
  2384. * RETURNS:
  2385. * 1 if @dev matches @new_class and @new_id, 0 otherwise.
  2386. */
  2387. static int ata_dev_same_device(struct ata_device *dev, unsigned int new_class,
  2388. const u16 *new_id)
  2389. {
  2390. const u16 *old_id = dev->id;
  2391. unsigned char model[2][41], serial[2][21];
  2392. u64 new_n_sectors;
  2393. if (dev->class != new_class) {
  2394. ata_dev_printk(dev, KERN_INFO, "class mismatch %d != %d\n",
  2395. dev->class, new_class);
  2396. return 0;
  2397. }
  2398. ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
  2399. ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
  2400. ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
  2401. ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
  2402. new_n_sectors = ata_id_n_sectors(new_id);
  2403. if (strcmp(model[0], model[1])) {
  2404. ata_dev_printk(dev, KERN_INFO, "model number mismatch "
  2405. "'%s' != '%s'\n", model[0], model[1]);
  2406. return 0;
  2407. }
  2408. if (strcmp(serial[0], serial[1])) {
  2409. ata_dev_printk(dev, KERN_INFO, "serial number mismatch "
  2410. "'%s' != '%s'\n", serial[0], serial[1]);
  2411. return 0;
  2412. }
  2413. if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
  2414. ata_dev_printk(dev, KERN_INFO, "n_sectors mismatch "
  2415. "%llu != %llu\n",
  2416. (unsigned long long)dev->n_sectors,
  2417. (unsigned long long)new_n_sectors);
  2418. return 0;
  2419. }
  2420. return 1;
  2421. }
  2422. /**
  2423. * ata_dev_revalidate - Revalidate ATA device
  2424. * @dev: device to revalidate
  2425. * @post_reset: is this revalidation after reset?
  2426. *
  2427. * Re-read IDENTIFY page and make sure @dev is still attached to
  2428. * the port.
  2429. *
  2430. * LOCKING:
  2431. * Kernel thread context (may sleep)
  2432. *
  2433. * RETURNS:
  2434. * 0 on success, negative errno otherwise
  2435. */
  2436. int ata_dev_revalidate(struct ata_device *dev, int post_reset)
  2437. {
  2438. unsigned int class = dev->class;
  2439. u16 *id = (void *)dev->ap->sector_buf;
  2440. int rc;
  2441. if (!ata_dev_enabled(dev)) {
  2442. rc = -ENODEV;
  2443. goto fail;
  2444. }
  2445. /* read ID data */
  2446. rc = ata_dev_read_id(dev, &class, post_reset, id);
  2447. if (rc)
  2448. goto fail;
  2449. /* is the device still there? */
  2450. if (!ata_dev_same_device(dev, class, id)) {
  2451. rc = -ENODEV;
  2452. goto fail;
  2453. }
  2454. memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
  2455. /* configure device according to the new ID */
  2456. rc = ata_dev_configure(dev, 0);
  2457. if (rc == 0)
  2458. return 0;
  2459. fail:
  2460. ata_dev_printk(dev, KERN_ERR, "revalidation failed (errno=%d)\n", rc);
  2461. return rc;
  2462. }
  2463. static const char * const ata_dma_blacklist [] = {
  2464. "WDC AC11000H", NULL,
  2465. "WDC AC22100H", NULL,
  2466. "WDC AC32500H", NULL,
  2467. "WDC AC33100H", NULL,
  2468. "WDC AC31600H", NULL,
  2469. "WDC AC32100H", "24.09P07",
  2470. "WDC AC23200L", "21.10N21",
  2471. "Compaq CRD-8241B", NULL,
  2472. "CRD-8400B", NULL,
  2473. "CRD-8480B", NULL,
  2474. "CRD-8482B", NULL,
  2475. "CRD-84", NULL,
  2476. "SanDisk SDP3B", NULL,
  2477. "SanDisk SDP3B-64", NULL,
  2478. "SANYO CD-ROM CRD", NULL,
  2479. "HITACHI CDR-8", NULL,
  2480. "HITACHI CDR-8335", NULL,
  2481. "HITACHI CDR-8435", NULL,
  2482. "Toshiba CD-ROM XM-6202B", NULL,
  2483. "TOSHIBA CD-ROM XM-1702BC", NULL,
  2484. "CD-532E-A", NULL,
  2485. "E-IDE CD-ROM CR-840", NULL,
  2486. "CD-ROM Drive/F5A", NULL,
  2487. "WPI CDD-820", NULL,
  2488. "SAMSUNG CD-ROM SC-148C", NULL,
  2489. "SAMSUNG CD-ROM SC", NULL,
  2490. "SanDisk SDP3B-64", NULL,
  2491. "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
  2492. "_NEC DV5800A", NULL,
  2493. "SAMSUNG CD-ROM SN-124", "N001"
  2494. };
  2495. static int ata_strim(char *s, size_t len)
  2496. {
  2497. len = strnlen(s, len);
  2498. /* ATAPI specifies that empty space is blank-filled; remove blanks */
  2499. while ((len > 0) && (s[len - 1] == ' ')) {
  2500. len--;
  2501. s[len] = 0;
  2502. }
  2503. return len;
  2504. }
  2505. static int ata_dma_blacklisted(const struct ata_device *dev)
  2506. {
  2507. unsigned char model_num[40];
  2508. unsigned char model_rev[16];
  2509. unsigned int nlen, rlen;
  2510. int i;
  2511. ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
  2512. sizeof(model_num));
  2513. ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
  2514. sizeof(model_rev));
  2515. nlen = ata_strim(model_num, sizeof(model_num));
  2516. rlen = ata_strim(model_rev, sizeof(model_rev));
  2517. for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
  2518. if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
  2519. if (ata_dma_blacklist[i+1] == NULL)
  2520. return 1;
  2521. if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
  2522. return 1;
  2523. }
  2524. }
  2525. return 0;
  2526. }
  2527. /**
  2528. * ata_dev_xfermask - Compute supported xfermask of the given device
  2529. * @dev: Device to compute xfermask for
  2530. *
  2531. * Compute supported xfermask of @dev and store it in
  2532. * dev->*_mask. This function is responsible for applying all
  2533. * known limits including host controller limits, device
  2534. * blacklist, etc...
  2535. *
  2536. * FIXME: The current implementation limits all transfer modes to
  2537. * the fastest of the lowested device on the port. This is not
  2538. * required on most controllers.
  2539. *
  2540. * LOCKING:
  2541. * None.
  2542. */
  2543. static void ata_dev_xfermask(struct ata_device *dev)
  2544. {
  2545. struct ata_port *ap = dev->ap;
  2546. struct ata_host_set *hs = ap->host_set;
  2547. unsigned long xfer_mask;
  2548. int i;
  2549. xfer_mask = ata_pack_xfermask(ap->pio_mask,
  2550. ap->mwdma_mask, ap->udma_mask);
  2551. /* Apply cable rule here. Don't apply it early because when
  2552. * we handle hot plug the cable type can itself change.
  2553. */
  2554. if (ap->cbl == ATA_CBL_PATA40)
  2555. xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
  2556. /* FIXME: Use port-wide xfermask for now */
  2557. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  2558. struct ata_device *d = &ap->device[i];
  2559. if (ata_dev_absent(d))
  2560. continue;
  2561. if (ata_dev_disabled(d)) {
  2562. /* to avoid violating device selection timing */
  2563. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2564. UINT_MAX, UINT_MAX);
  2565. continue;
  2566. }
  2567. xfer_mask &= ata_pack_xfermask(d->pio_mask,
  2568. d->mwdma_mask, d->udma_mask);
  2569. xfer_mask &= ata_id_xfermask(d->id);
  2570. if (ata_dma_blacklisted(d))
  2571. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2572. }
  2573. if (ata_dma_blacklisted(dev))
  2574. ata_dev_printk(dev, KERN_WARNING,
  2575. "device is on DMA blacklist, disabling DMA\n");
  2576. if (hs->flags & ATA_HOST_SIMPLEX) {
  2577. if (hs->simplex_claimed)
  2578. xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
  2579. }
  2580. if (ap->ops->mode_filter)
  2581. xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
  2582. ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
  2583. &dev->mwdma_mask, &dev->udma_mask);
  2584. }
  2585. /**
  2586. * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
  2587. * @dev: Device to which command will be sent
  2588. *
  2589. * Issue SET FEATURES - XFER MODE command to device @dev
  2590. * on port @ap.
  2591. *
  2592. * LOCKING:
  2593. * PCI/etc. bus probe sem.
  2594. *
  2595. * RETURNS:
  2596. * 0 on success, AC_ERR_* mask otherwise.
  2597. */
  2598. static unsigned int ata_dev_set_xfermode(struct ata_device *dev)
  2599. {
  2600. struct ata_taskfile tf;
  2601. unsigned int err_mask;
  2602. /* set up set-features taskfile */
  2603. DPRINTK("set features - xfer mode\n");
  2604. ata_tf_init(dev, &tf);
  2605. tf.command = ATA_CMD_SET_FEATURES;
  2606. tf.feature = SETFEATURES_XFER;
  2607. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2608. tf.protocol = ATA_PROT_NODATA;
  2609. tf.nsect = dev->xfer_mode;
  2610. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2611. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2612. return err_mask;
  2613. }
  2614. /**
  2615. * ata_dev_init_params - Issue INIT DEV PARAMS command
  2616. * @dev: Device to which command will be sent
  2617. * @heads: Number of heads (taskfile parameter)
  2618. * @sectors: Number of sectors (taskfile parameter)
  2619. *
  2620. * LOCKING:
  2621. * Kernel thread context (may sleep)
  2622. *
  2623. * RETURNS:
  2624. * 0 on success, AC_ERR_* mask otherwise.
  2625. */
  2626. static unsigned int ata_dev_init_params(struct ata_device *dev,
  2627. u16 heads, u16 sectors)
  2628. {
  2629. struct ata_taskfile tf;
  2630. unsigned int err_mask;
  2631. /* Number of sectors per track 1-255. Number of heads 1-16 */
  2632. if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
  2633. return AC_ERR_INVALID;
  2634. /* set up init dev params taskfile */
  2635. DPRINTK("init dev params \n");
  2636. ata_tf_init(dev, &tf);
  2637. tf.command = ATA_CMD_INIT_DEV_PARAMS;
  2638. tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
  2639. tf.protocol = ATA_PROT_NODATA;
  2640. tf.nsect = sectors;
  2641. tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
  2642. err_mask = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  2643. DPRINTK("EXIT, err_mask=%x\n", err_mask);
  2644. return err_mask;
  2645. }
  2646. /**
  2647. * ata_sg_clean - Unmap DMA memory associated with command
  2648. * @qc: Command containing DMA memory to be released
  2649. *
  2650. * Unmap all mapped DMA memory associated with this command.
  2651. *
  2652. * LOCKING:
  2653. * spin_lock_irqsave(host_set lock)
  2654. */
  2655. static void ata_sg_clean(struct ata_queued_cmd *qc)
  2656. {
  2657. struct ata_port *ap = qc->ap;
  2658. struct scatterlist *sg = qc->__sg;
  2659. int dir = qc->dma_dir;
  2660. void *pad_buf = NULL;
  2661. WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
  2662. WARN_ON(sg == NULL);
  2663. if (qc->flags & ATA_QCFLAG_SINGLE)
  2664. WARN_ON(qc->n_elem > 1);
  2665. VPRINTK("unmapping %u sg elements\n", qc->n_elem);
  2666. /* if we padded the buffer out to 32-bit bound, and data
  2667. * xfer direction is from-device, we must copy from the
  2668. * pad buffer back into the supplied buffer
  2669. */
  2670. if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
  2671. pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2672. if (qc->flags & ATA_QCFLAG_SG) {
  2673. if (qc->n_elem)
  2674. dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
  2675. /* restore last sg */
  2676. sg[qc->orig_n_elem - 1].length += qc->pad_len;
  2677. if (pad_buf) {
  2678. struct scatterlist *psg = &qc->pad_sgent;
  2679. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2680. memcpy(addr + psg->offset, pad_buf, qc->pad_len);
  2681. kunmap_atomic(addr, KM_IRQ0);
  2682. }
  2683. } else {
  2684. if (qc->n_elem)
  2685. dma_unmap_single(ap->dev,
  2686. sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
  2687. dir);
  2688. /* restore sg */
  2689. sg->length += qc->pad_len;
  2690. if (pad_buf)
  2691. memcpy(qc->buf_virt + sg->length - qc->pad_len,
  2692. pad_buf, qc->pad_len);
  2693. }
  2694. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  2695. qc->__sg = NULL;
  2696. }
  2697. /**
  2698. * ata_fill_sg - Fill PCI IDE PRD table
  2699. * @qc: Metadata associated with taskfile to be transferred
  2700. *
  2701. * Fill PCI IDE PRD (scatter-gather) table with segments
  2702. * associated with the current disk command.
  2703. *
  2704. * LOCKING:
  2705. * spin_lock_irqsave(host_set lock)
  2706. *
  2707. */
  2708. static void ata_fill_sg(struct ata_queued_cmd *qc)
  2709. {
  2710. struct ata_port *ap = qc->ap;
  2711. struct scatterlist *sg;
  2712. unsigned int idx;
  2713. WARN_ON(qc->__sg == NULL);
  2714. WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
  2715. idx = 0;
  2716. ata_for_each_sg(sg, qc) {
  2717. u32 addr, offset;
  2718. u32 sg_len, len;
  2719. /* determine if physical DMA addr spans 64K boundary.
  2720. * Note h/w doesn't support 64-bit, so we unconditionally
  2721. * truncate dma_addr_t to u32.
  2722. */
  2723. addr = (u32) sg_dma_address(sg);
  2724. sg_len = sg_dma_len(sg);
  2725. while (sg_len) {
  2726. offset = addr & 0xffff;
  2727. len = sg_len;
  2728. if ((offset + sg_len) > 0x10000)
  2729. len = 0x10000 - offset;
  2730. ap->prd[idx].addr = cpu_to_le32(addr);
  2731. ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
  2732. VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
  2733. idx++;
  2734. sg_len -= len;
  2735. addr += len;
  2736. }
  2737. }
  2738. if (idx)
  2739. ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
  2740. }
  2741. /**
  2742. * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
  2743. * @qc: Metadata associated with taskfile to check
  2744. *
  2745. * Allow low-level driver to filter ATA PACKET commands, returning
  2746. * a status indicating whether or not it is OK to use DMA for the
  2747. * supplied PACKET command.
  2748. *
  2749. * LOCKING:
  2750. * spin_lock_irqsave(host_set lock)
  2751. *
  2752. * RETURNS: 0 when ATAPI DMA can be used
  2753. * nonzero otherwise
  2754. */
  2755. int ata_check_atapi_dma(struct ata_queued_cmd *qc)
  2756. {
  2757. struct ata_port *ap = qc->ap;
  2758. int rc = 0; /* Assume ATAPI DMA is OK by default */
  2759. if (ap->ops->check_atapi_dma)
  2760. rc = ap->ops->check_atapi_dma(qc);
  2761. /* We don't support polling DMA.
  2762. * Use PIO if the LLDD handles only interrupts in
  2763. * the HSM_ST_LAST state and the ATAPI device
  2764. * generates CDB interrupts.
  2765. */
  2766. if ((ap->flags & ATA_FLAG_PIO_POLLING) &&
  2767. (qc->dev->flags & ATA_DFLAG_CDB_INTR))
  2768. rc = 1;
  2769. return rc;
  2770. }
  2771. /**
  2772. * ata_qc_prep - Prepare taskfile for submission
  2773. * @qc: Metadata associated with taskfile to be prepared
  2774. *
  2775. * Prepare ATA taskfile for submission.
  2776. *
  2777. * LOCKING:
  2778. * spin_lock_irqsave(host_set lock)
  2779. */
  2780. void ata_qc_prep(struct ata_queued_cmd *qc)
  2781. {
  2782. if (!(qc->flags & ATA_QCFLAG_DMAMAP))
  2783. return;
  2784. ata_fill_sg(qc);
  2785. }
  2786. void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
  2787. /**
  2788. * ata_sg_init_one - Associate command with memory buffer
  2789. * @qc: Command to be associated
  2790. * @buf: Memory buffer
  2791. * @buflen: Length of memory buffer, in bytes.
  2792. *
  2793. * Initialize the data-related elements of queued_cmd @qc
  2794. * to point to a single memory buffer, @buf of byte length @buflen.
  2795. *
  2796. * LOCKING:
  2797. * spin_lock_irqsave(host_set lock)
  2798. */
  2799. void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
  2800. {
  2801. struct scatterlist *sg;
  2802. qc->flags |= ATA_QCFLAG_SINGLE;
  2803. memset(&qc->sgent, 0, sizeof(qc->sgent));
  2804. qc->__sg = &qc->sgent;
  2805. qc->n_elem = 1;
  2806. qc->orig_n_elem = 1;
  2807. qc->buf_virt = buf;
  2808. qc->nbytes = buflen;
  2809. sg = qc->__sg;
  2810. sg_init_one(sg, buf, buflen);
  2811. }
  2812. /**
  2813. * ata_sg_init - Associate command with scatter-gather table.
  2814. * @qc: Command to be associated
  2815. * @sg: Scatter-gather table.
  2816. * @n_elem: Number of elements in s/g table.
  2817. *
  2818. * Initialize the data-related elements of queued_cmd @qc
  2819. * to point to a scatter-gather table @sg, containing @n_elem
  2820. * elements.
  2821. *
  2822. * LOCKING:
  2823. * spin_lock_irqsave(host_set lock)
  2824. */
  2825. void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
  2826. unsigned int n_elem)
  2827. {
  2828. qc->flags |= ATA_QCFLAG_SG;
  2829. qc->__sg = sg;
  2830. qc->n_elem = n_elem;
  2831. qc->orig_n_elem = n_elem;
  2832. }
  2833. /**
  2834. * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
  2835. * @qc: Command with memory buffer to be mapped.
  2836. *
  2837. * DMA-map the memory buffer associated with queued_cmd @qc.
  2838. *
  2839. * LOCKING:
  2840. * spin_lock_irqsave(host_set lock)
  2841. *
  2842. * RETURNS:
  2843. * Zero on success, negative on error.
  2844. */
  2845. static int ata_sg_setup_one(struct ata_queued_cmd *qc)
  2846. {
  2847. struct ata_port *ap = qc->ap;
  2848. int dir = qc->dma_dir;
  2849. struct scatterlist *sg = qc->__sg;
  2850. dma_addr_t dma_address;
  2851. int trim_sg = 0;
  2852. /* we must lengthen transfers to end on a 32-bit boundary */
  2853. qc->pad_len = sg->length & 3;
  2854. if (qc->pad_len) {
  2855. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2856. struct scatterlist *psg = &qc->pad_sgent;
  2857. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2858. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2859. if (qc->tf.flags & ATA_TFLAG_WRITE)
  2860. memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
  2861. qc->pad_len);
  2862. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2863. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2864. /* trim sg */
  2865. sg->length -= qc->pad_len;
  2866. if (sg->length == 0)
  2867. trim_sg = 1;
  2868. DPRINTK("padding done, sg->length=%u pad_len=%u\n",
  2869. sg->length, qc->pad_len);
  2870. }
  2871. if (trim_sg) {
  2872. qc->n_elem--;
  2873. goto skip_map;
  2874. }
  2875. dma_address = dma_map_single(ap->dev, qc->buf_virt,
  2876. sg->length, dir);
  2877. if (dma_mapping_error(dma_address)) {
  2878. /* restore sg */
  2879. sg->length += qc->pad_len;
  2880. return -1;
  2881. }
  2882. sg_dma_address(sg) = dma_address;
  2883. sg_dma_len(sg) = sg->length;
  2884. skip_map:
  2885. DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
  2886. qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  2887. return 0;
  2888. }
  2889. /**
  2890. * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
  2891. * @qc: Command with scatter-gather table to be mapped.
  2892. *
  2893. * DMA-map the scatter-gather table associated with queued_cmd @qc.
  2894. *
  2895. * LOCKING:
  2896. * spin_lock_irqsave(host_set lock)
  2897. *
  2898. * RETURNS:
  2899. * Zero on success, negative on error.
  2900. *
  2901. */
  2902. static int ata_sg_setup(struct ata_queued_cmd *qc)
  2903. {
  2904. struct ata_port *ap = qc->ap;
  2905. struct scatterlist *sg = qc->__sg;
  2906. struct scatterlist *lsg = &sg[qc->n_elem - 1];
  2907. int n_elem, pre_n_elem, dir, trim_sg = 0;
  2908. VPRINTK("ENTER, ata%u\n", ap->id);
  2909. WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
  2910. /* we must lengthen transfers to end on a 32-bit boundary */
  2911. qc->pad_len = lsg->length & 3;
  2912. if (qc->pad_len) {
  2913. void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
  2914. struct scatterlist *psg = &qc->pad_sgent;
  2915. unsigned int offset;
  2916. WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
  2917. memset(pad_buf, 0, ATA_DMA_PAD_SZ);
  2918. /*
  2919. * psg->page/offset are used to copy to-be-written
  2920. * data in this function or read data in ata_sg_clean.
  2921. */
  2922. offset = lsg->offset + lsg->length - qc->pad_len;
  2923. psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
  2924. psg->offset = offset_in_page(offset);
  2925. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  2926. void *addr = kmap_atomic(psg->page, KM_IRQ0);
  2927. memcpy(pad_buf, addr + psg->offset, qc->pad_len);
  2928. kunmap_atomic(addr, KM_IRQ0);
  2929. }
  2930. sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
  2931. sg_dma_len(psg) = ATA_DMA_PAD_SZ;
  2932. /* trim last sg */
  2933. lsg->length -= qc->pad_len;
  2934. if (lsg->length == 0)
  2935. trim_sg = 1;
  2936. DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
  2937. qc->n_elem - 1, lsg->length, qc->pad_len);
  2938. }
  2939. pre_n_elem = qc->n_elem;
  2940. if (trim_sg && pre_n_elem)
  2941. pre_n_elem--;
  2942. if (!pre_n_elem) {
  2943. n_elem = 0;
  2944. goto skip_map;
  2945. }
  2946. dir = qc->dma_dir;
  2947. n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
  2948. if (n_elem < 1) {
  2949. /* restore last sg */
  2950. lsg->length += qc->pad_len;
  2951. return -1;
  2952. }
  2953. DPRINTK("%d sg elements mapped\n", n_elem);
  2954. skip_map:
  2955. qc->n_elem = n_elem;
  2956. return 0;
  2957. }
  2958. /**
  2959. * swap_buf_le16 - swap halves of 16-bit words in place
  2960. * @buf: Buffer to swap
  2961. * @buf_words: Number of 16-bit words in buffer.
  2962. *
  2963. * Swap halves of 16-bit words if needed to convert from
  2964. * little-endian byte order to native cpu byte order, or
  2965. * vice-versa.
  2966. *
  2967. * LOCKING:
  2968. * Inherited from caller.
  2969. */
  2970. void swap_buf_le16(u16 *buf, unsigned int buf_words)
  2971. {
  2972. #ifdef __BIG_ENDIAN
  2973. unsigned int i;
  2974. for (i = 0; i < buf_words; i++)
  2975. buf[i] = le16_to_cpu(buf[i]);
  2976. #endif /* __BIG_ENDIAN */
  2977. }
  2978. /**
  2979. * ata_mmio_data_xfer - Transfer data by MMIO
  2980. * @dev: device for this I/O
  2981. * @buf: data buffer
  2982. * @buflen: buffer length
  2983. * @write_data: read/write
  2984. *
  2985. * Transfer data from/to the device data register by MMIO.
  2986. *
  2987. * LOCKING:
  2988. * Inherited from caller.
  2989. */
  2990. void ata_mmio_data_xfer(struct ata_device *adev, unsigned char *buf,
  2991. unsigned int buflen, int write_data)
  2992. {
  2993. struct ata_port *ap = adev->ap;
  2994. unsigned int i;
  2995. unsigned int words = buflen >> 1;
  2996. u16 *buf16 = (u16 *) buf;
  2997. void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
  2998. /* Transfer multiple of 2 bytes */
  2999. if (write_data) {
  3000. for (i = 0; i < words; i++)
  3001. writew(le16_to_cpu(buf16[i]), mmio);
  3002. } else {
  3003. for (i = 0; i < words; i++)
  3004. buf16[i] = cpu_to_le16(readw(mmio));
  3005. }
  3006. /* Transfer trailing 1 byte, if any. */
  3007. if (unlikely(buflen & 0x01)) {
  3008. u16 align_buf[1] = { 0 };
  3009. unsigned char *trailing_buf = buf + buflen - 1;
  3010. if (write_data) {
  3011. memcpy(align_buf, trailing_buf, 1);
  3012. writew(le16_to_cpu(align_buf[0]), mmio);
  3013. } else {
  3014. align_buf[0] = cpu_to_le16(readw(mmio));
  3015. memcpy(trailing_buf, align_buf, 1);
  3016. }
  3017. }
  3018. }
  3019. /**
  3020. * ata_pio_data_xfer - Transfer data by PIO
  3021. * @adev: device to target
  3022. * @buf: data buffer
  3023. * @buflen: buffer length
  3024. * @write_data: read/write
  3025. *
  3026. * Transfer data from/to the device data register by PIO.
  3027. *
  3028. * LOCKING:
  3029. * Inherited from caller.
  3030. */
  3031. void ata_pio_data_xfer(struct ata_device *adev, unsigned char *buf,
  3032. unsigned int buflen, int write_data)
  3033. {
  3034. struct ata_port *ap = adev->ap;
  3035. unsigned int words = buflen >> 1;
  3036. /* Transfer multiple of 2 bytes */
  3037. if (write_data)
  3038. outsw(ap->ioaddr.data_addr, buf, words);
  3039. else
  3040. insw(ap->ioaddr.data_addr, buf, words);
  3041. /* Transfer trailing 1 byte, if any. */
  3042. if (unlikely(buflen & 0x01)) {
  3043. u16 align_buf[1] = { 0 };
  3044. unsigned char *trailing_buf = buf + buflen - 1;
  3045. if (write_data) {
  3046. memcpy(align_buf, trailing_buf, 1);
  3047. outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
  3048. } else {
  3049. align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
  3050. memcpy(trailing_buf, align_buf, 1);
  3051. }
  3052. }
  3053. }
  3054. /**
  3055. * ata_pio_data_xfer_noirq - Transfer data by PIO
  3056. * @adev: device to target
  3057. * @buf: data buffer
  3058. * @buflen: buffer length
  3059. * @write_data: read/write
  3060. *
  3061. * Transfer data from/to the device data register by PIO. Do the
  3062. * transfer with interrupts disabled.
  3063. *
  3064. * LOCKING:
  3065. * Inherited from caller.
  3066. */
  3067. void ata_pio_data_xfer_noirq(struct ata_device *adev, unsigned char *buf,
  3068. unsigned int buflen, int write_data)
  3069. {
  3070. unsigned long flags;
  3071. local_irq_save(flags);
  3072. ata_pio_data_xfer(adev, buf, buflen, write_data);
  3073. local_irq_restore(flags);
  3074. }
  3075. /**
  3076. * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
  3077. * @qc: Command on going
  3078. *
  3079. * Transfer ATA_SECT_SIZE of data from/to the ATA device.
  3080. *
  3081. * LOCKING:
  3082. * Inherited from caller.
  3083. */
  3084. static void ata_pio_sector(struct ata_queued_cmd *qc)
  3085. {
  3086. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3087. struct scatterlist *sg = qc->__sg;
  3088. struct ata_port *ap = qc->ap;
  3089. struct page *page;
  3090. unsigned int offset;
  3091. unsigned char *buf;
  3092. if (qc->cursect == (qc->nsect - 1))
  3093. ap->hsm_task_state = HSM_ST_LAST;
  3094. page = sg[qc->cursg].page;
  3095. offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
  3096. /* get the current page and offset */
  3097. page = nth_page(page, (offset >> PAGE_SHIFT));
  3098. offset %= PAGE_SIZE;
  3099. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3100. if (PageHighMem(page)) {
  3101. unsigned long flags;
  3102. /* FIXME: use a bounce buffer */
  3103. local_irq_save(flags);
  3104. buf = kmap_atomic(page, KM_IRQ0);
  3105. /* do the actual data transfer */
  3106. ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
  3107. kunmap_atomic(buf, KM_IRQ0);
  3108. local_irq_restore(flags);
  3109. } else {
  3110. buf = page_address(page);
  3111. ap->ops->data_xfer(qc->dev, buf + offset, ATA_SECT_SIZE, do_write);
  3112. }
  3113. qc->cursect++;
  3114. qc->cursg_ofs++;
  3115. if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
  3116. qc->cursg++;
  3117. qc->cursg_ofs = 0;
  3118. }
  3119. }
  3120. /**
  3121. * ata_pio_sectors - Transfer one or many 512-byte sectors.
  3122. * @qc: Command on going
  3123. *
  3124. * Transfer one or many ATA_SECT_SIZE of data from/to the
  3125. * ATA device for the DRQ request.
  3126. *
  3127. * LOCKING:
  3128. * Inherited from caller.
  3129. */
  3130. static void ata_pio_sectors(struct ata_queued_cmd *qc)
  3131. {
  3132. if (is_multi_taskfile(&qc->tf)) {
  3133. /* READ/WRITE MULTIPLE */
  3134. unsigned int nsect;
  3135. WARN_ON(qc->dev->multi_count == 0);
  3136. nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
  3137. while (nsect--)
  3138. ata_pio_sector(qc);
  3139. } else
  3140. ata_pio_sector(qc);
  3141. }
  3142. /**
  3143. * atapi_send_cdb - Write CDB bytes to hardware
  3144. * @ap: Port to which ATAPI device is attached.
  3145. * @qc: Taskfile currently active
  3146. *
  3147. * When device has indicated its readiness to accept
  3148. * a CDB, this function is called. Send the CDB.
  3149. *
  3150. * LOCKING:
  3151. * caller.
  3152. */
  3153. static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
  3154. {
  3155. /* send SCSI cdb */
  3156. DPRINTK("send cdb\n");
  3157. WARN_ON(qc->dev->cdb_len < 12);
  3158. ap->ops->data_xfer(qc->dev, qc->cdb, qc->dev->cdb_len, 1);
  3159. ata_altstatus(ap); /* flush */
  3160. switch (qc->tf.protocol) {
  3161. case ATA_PROT_ATAPI:
  3162. ap->hsm_task_state = HSM_ST;
  3163. break;
  3164. case ATA_PROT_ATAPI_NODATA:
  3165. ap->hsm_task_state = HSM_ST_LAST;
  3166. break;
  3167. case ATA_PROT_ATAPI_DMA:
  3168. ap->hsm_task_state = HSM_ST_LAST;
  3169. /* initiate bmdma */
  3170. ap->ops->bmdma_start(qc);
  3171. break;
  3172. }
  3173. }
  3174. /**
  3175. * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3176. * @qc: Command on going
  3177. * @bytes: number of bytes
  3178. *
  3179. * Transfer Transfer data from/to the ATAPI device.
  3180. *
  3181. * LOCKING:
  3182. * Inherited from caller.
  3183. *
  3184. */
  3185. static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
  3186. {
  3187. int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
  3188. struct scatterlist *sg = qc->__sg;
  3189. struct ata_port *ap = qc->ap;
  3190. struct page *page;
  3191. unsigned char *buf;
  3192. unsigned int offset, count;
  3193. if (qc->curbytes + bytes >= qc->nbytes)
  3194. ap->hsm_task_state = HSM_ST_LAST;
  3195. next_sg:
  3196. if (unlikely(qc->cursg >= qc->n_elem)) {
  3197. /*
  3198. * The end of qc->sg is reached and the device expects
  3199. * more data to transfer. In order not to overrun qc->sg
  3200. * and fulfill length specified in the byte count register,
  3201. * - for read case, discard trailing data from the device
  3202. * - for write case, padding zero data to the device
  3203. */
  3204. u16 pad_buf[1] = { 0 };
  3205. unsigned int words = bytes >> 1;
  3206. unsigned int i;
  3207. if (words) /* warning if bytes > 1 */
  3208. ata_dev_printk(qc->dev, KERN_WARNING,
  3209. "%u bytes trailing data\n", bytes);
  3210. for (i = 0; i < words; i++)
  3211. ap->ops->data_xfer(qc->dev, (unsigned char*)pad_buf, 2, do_write);
  3212. ap->hsm_task_state = HSM_ST_LAST;
  3213. return;
  3214. }
  3215. sg = &qc->__sg[qc->cursg];
  3216. page = sg->page;
  3217. offset = sg->offset + qc->cursg_ofs;
  3218. /* get the current page and offset */
  3219. page = nth_page(page, (offset >> PAGE_SHIFT));
  3220. offset %= PAGE_SIZE;
  3221. /* don't overrun current sg */
  3222. count = min(sg->length - qc->cursg_ofs, bytes);
  3223. /* don't cross page boundaries */
  3224. count = min(count, (unsigned int)PAGE_SIZE - offset);
  3225. DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
  3226. if (PageHighMem(page)) {
  3227. unsigned long flags;
  3228. /* FIXME: use bounce buffer */
  3229. local_irq_save(flags);
  3230. buf = kmap_atomic(page, KM_IRQ0);
  3231. /* do the actual data transfer */
  3232. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  3233. kunmap_atomic(buf, KM_IRQ0);
  3234. local_irq_restore(flags);
  3235. } else {
  3236. buf = page_address(page);
  3237. ap->ops->data_xfer(qc->dev, buf + offset, count, do_write);
  3238. }
  3239. bytes -= count;
  3240. qc->curbytes += count;
  3241. qc->cursg_ofs += count;
  3242. if (qc->cursg_ofs == sg->length) {
  3243. qc->cursg++;
  3244. qc->cursg_ofs = 0;
  3245. }
  3246. if (bytes)
  3247. goto next_sg;
  3248. }
  3249. /**
  3250. * atapi_pio_bytes - Transfer data from/to the ATAPI device.
  3251. * @qc: Command on going
  3252. *
  3253. * Transfer Transfer data from/to the ATAPI device.
  3254. *
  3255. * LOCKING:
  3256. * Inherited from caller.
  3257. */
  3258. static void atapi_pio_bytes(struct ata_queued_cmd *qc)
  3259. {
  3260. struct ata_port *ap = qc->ap;
  3261. struct ata_device *dev = qc->dev;
  3262. unsigned int ireason, bc_lo, bc_hi, bytes;
  3263. int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
  3264. /* Abuse qc->result_tf for temp storage of intermediate TF
  3265. * here to save some kernel stack usage.
  3266. * For normal completion, qc->result_tf is not relevant. For
  3267. * error, qc->result_tf is later overwritten by ata_qc_complete().
  3268. * So, the correctness of qc->result_tf is not affected.
  3269. */
  3270. ap->ops->tf_read(ap, &qc->result_tf);
  3271. ireason = qc->result_tf.nsect;
  3272. bc_lo = qc->result_tf.lbam;
  3273. bc_hi = qc->result_tf.lbah;
  3274. bytes = (bc_hi << 8) | bc_lo;
  3275. /* shall be cleared to zero, indicating xfer of data */
  3276. if (ireason & (1 << 0))
  3277. goto err_out;
  3278. /* make sure transfer direction matches expected */
  3279. i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
  3280. if (do_write != i_write)
  3281. goto err_out;
  3282. VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
  3283. __atapi_pio_bytes(qc, bytes);
  3284. return;
  3285. err_out:
  3286. ata_dev_printk(dev, KERN_INFO, "ATAPI check failed\n");
  3287. qc->err_mask |= AC_ERR_HSM;
  3288. ap->hsm_task_state = HSM_ST_ERR;
  3289. }
  3290. /**
  3291. * ata_hsm_ok_in_wq - Check if the qc can be handled in the workqueue.
  3292. * @ap: the target ata_port
  3293. * @qc: qc on going
  3294. *
  3295. * RETURNS:
  3296. * 1 if ok in workqueue, 0 otherwise.
  3297. */
  3298. static inline int ata_hsm_ok_in_wq(struct ata_port *ap, struct ata_queued_cmd *qc)
  3299. {
  3300. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3301. return 1;
  3302. if (ap->hsm_task_state == HSM_ST_FIRST) {
  3303. if (qc->tf.protocol == ATA_PROT_PIO &&
  3304. (qc->tf.flags & ATA_TFLAG_WRITE))
  3305. return 1;
  3306. if (is_atapi_taskfile(&qc->tf) &&
  3307. !(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3308. return 1;
  3309. }
  3310. return 0;
  3311. }
  3312. /**
  3313. * ata_hsm_qc_complete - finish a qc running on standard HSM
  3314. * @qc: Command to complete
  3315. * @in_wq: 1 if called from workqueue, 0 otherwise
  3316. *
  3317. * Finish @qc which is running on standard HSM.
  3318. *
  3319. * LOCKING:
  3320. * If @in_wq is zero, spin_lock_irqsave(host_set lock).
  3321. * Otherwise, none on entry and grabs host lock.
  3322. */
  3323. static void ata_hsm_qc_complete(struct ata_queued_cmd *qc, int in_wq)
  3324. {
  3325. struct ata_port *ap = qc->ap;
  3326. unsigned long flags;
  3327. if (ap->ops->error_handler) {
  3328. if (in_wq) {
  3329. spin_lock_irqsave(&ap->host_set->lock, flags);
  3330. /* EH might have kicked in while host_set lock
  3331. * is released.
  3332. */
  3333. qc = ata_qc_from_tag(ap, qc->tag);
  3334. if (qc) {
  3335. if (likely(!(qc->err_mask & AC_ERR_HSM))) {
  3336. ata_irq_on(ap);
  3337. ata_qc_complete(qc);
  3338. } else
  3339. ata_port_freeze(ap);
  3340. }
  3341. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3342. } else {
  3343. if (likely(!(qc->err_mask & AC_ERR_HSM)))
  3344. ata_qc_complete(qc);
  3345. else
  3346. ata_port_freeze(ap);
  3347. }
  3348. } else {
  3349. if (in_wq) {
  3350. spin_lock_irqsave(&ap->host_set->lock, flags);
  3351. ata_irq_on(ap);
  3352. ata_qc_complete(qc);
  3353. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3354. } else
  3355. ata_qc_complete(qc);
  3356. }
  3357. ata_altstatus(ap); /* flush */
  3358. }
  3359. /**
  3360. * ata_hsm_move - move the HSM to the next state.
  3361. * @ap: the target ata_port
  3362. * @qc: qc on going
  3363. * @status: current device status
  3364. * @in_wq: 1 if called from workqueue, 0 otherwise
  3365. *
  3366. * RETURNS:
  3367. * 1 when poll next status needed, 0 otherwise.
  3368. */
  3369. int ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
  3370. u8 status, int in_wq)
  3371. {
  3372. unsigned long flags = 0;
  3373. int poll_next;
  3374. WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
  3375. /* Make sure ata_qc_issue_prot() does not throw things
  3376. * like DMA polling into the workqueue. Notice that
  3377. * in_wq is not equivalent to (qc->tf.flags & ATA_TFLAG_POLLING).
  3378. */
  3379. WARN_ON(in_wq != ata_hsm_ok_in_wq(ap, qc));
  3380. fsm_start:
  3381. DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
  3382. ap->id, qc->tf.protocol, ap->hsm_task_state, status);
  3383. switch (ap->hsm_task_state) {
  3384. case HSM_ST_FIRST:
  3385. /* Send first data block or PACKET CDB */
  3386. /* If polling, we will stay in the work queue after
  3387. * sending the data. Otherwise, interrupt handler
  3388. * takes over after sending the data.
  3389. */
  3390. poll_next = (qc->tf.flags & ATA_TFLAG_POLLING);
  3391. /* check device status */
  3392. if (unlikely((status & ATA_DRQ) == 0)) {
  3393. /* handle BSY=0, DRQ=0 as error */
  3394. if (likely(status & (ATA_ERR | ATA_DF)))
  3395. /* device stops HSM for abort/error */
  3396. qc->err_mask |= AC_ERR_DEV;
  3397. else
  3398. /* HSM violation. Let EH handle this */
  3399. qc->err_mask |= AC_ERR_HSM;
  3400. ap->hsm_task_state = HSM_ST_ERR;
  3401. goto fsm_start;
  3402. }
  3403. /* Device should not ask for data transfer (DRQ=1)
  3404. * when it finds something wrong.
  3405. * We ignore DRQ here and stop the HSM by
  3406. * changing hsm_task_state to HSM_ST_ERR and
  3407. * let the EH abort the command or reset the device.
  3408. */
  3409. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3410. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3411. ap->id, status);
  3412. qc->err_mask |= AC_ERR_HSM;
  3413. ap->hsm_task_state = HSM_ST_ERR;
  3414. goto fsm_start;
  3415. }
  3416. /* Send the CDB (atapi) or the first data block (ata pio out).
  3417. * During the state transition, interrupt handler shouldn't
  3418. * be invoked before the data transfer is complete and
  3419. * hsm_task_state is changed. Hence, the following locking.
  3420. */
  3421. if (in_wq)
  3422. spin_lock_irqsave(&ap->host_set->lock, flags);
  3423. if (qc->tf.protocol == ATA_PROT_PIO) {
  3424. /* PIO data out protocol.
  3425. * send first data block.
  3426. */
  3427. /* ata_pio_sectors() might change the state
  3428. * to HSM_ST_LAST. so, the state is changed here
  3429. * before ata_pio_sectors().
  3430. */
  3431. ap->hsm_task_state = HSM_ST;
  3432. ata_pio_sectors(qc);
  3433. ata_altstatus(ap); /* flush */
  3434. } else
  3435. /* send CDB */
  3436. atapi_send_cdb(ap, qc);
  3437. if (in_wq)
  3438. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  3439. /* if polling, ata_pio_task() handles the rest.
  3440. * otherwise, interrupt handler takes over from here.
  3441. */
  3442. break;
  3443. case HSM_ST:
  3444. /* complete command or read/write the data register */
  3445. if (qc->tf.protocol == ATA_PROT_ATAPI) {
  3446. /* ATAPI PIO protocol */
  3447. if ((status & ATA_DRQ) == 0) {
  3448. /* No more data to transfer or device error.
  3449. * Device error will be tagged in HSM_ST_LAST.
  3450. */
  3451. ap->hsm_task_state = HSM_ST_LAST;
  3452. goto fsm_start;
  3453. }
  3454. /* Device should not ask for data transfer (DRQ=1)
  3455. * when it finds something wrong.
  3456. * We ignore DRQ here and stop the HSM by
  3457. * changing hsm_task_state to HSM_ST_ERR and
  3458. * let the EH abort the command or reset the device.
  3459. */
  3460. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3461. printk(KERN_WARNING "ata%d: DRQ=1 with device error, dev_stat 0x%X\n",
  3462. ap->id, status);
  3463. qc->err_mask |= AC_ERR_HSM;
  3464. ap->hsm_task_state = HSM_ST_ERR;
  3465. goto fsm_start;
  3466. }
  3467. atapi_pio_bytes(qc);
  3468. if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
  3469. /* bad ireason reported by device */
  3470. goto fsm_start;
  3471. } else {
  3472. /* ATA PIO protocol */
  3473. if (unlikely((status & ATA_DRQ) == 0)) {
  3474. /* handle BSY=0, DRQ=0 as error */
  3475. if (likely(status & (ATA_ERR | ATA_DF)))
  3476. /* device stops HSM for abort/error */
  3477. qc->err_mask |= AC_ERR_DEV;
  3478. else
  3479. /* HSM violation. Let EH handle this */
  3480. qc->err_mask |= AC_ERR_HSM;
  3481. ap->hsm_task_state = HSM_ST_ERR;
  3482. goto fsm_start;
  3483. }
  3484. /* For PIO reads, some devices may ask for
  3485. * data transfer (DRQ=1) alone with ERR=1.
  3486. * We respect DRQ here and transfer one
  3487. * block of junk data before changing the
  3488. * hsm_task_state to HSM_ST_ERR.
  3489. *
  3490. * For PIO writes, ERR=1 DRQ=1 doesn't make
  3491. * sense since the data block has been
  3492. * transferred to the device.
  3493. */
  3494. if (unlikely(status & (ATA_ERR | ATA_DF))) {
  3495. /* data might be corrputed */
  3496. qc->err_mask |= AC_ERR_DEV;
  3497. if (!(qc->tf.flags & ATA_TFLAG_WRITE)) {
  3498. ata_pio_sectors(qc);
  3499. ata_altstatus(ap);
  3500. status = ata_wait_idle(ap);
  3501. }
  3502. if (status & (ATA_BUSY | ATA_DRQ))
  3503. qc->err_mask |= AC_ERR_HSM;
  3504. /* ata_pio_sectors() might change the
  3505. * state to HSM_ST_LAST. so, the state
  3506. * is changed after ata_pio_sectors().
  3507. */
  3508. ap->hsm_task_state = HSM_ST_ERR;
  3509. goto fsm_start;
  3510. }
  3511. ata_pio_sectors(qc);
  3512. if (ap->hsm_task_state == HSM_ST_LAST &&
  3513. (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
  3514. /* all data read */
  3515. ata_altstatus(ap);
  3516. status = ata_wait_idle(ap);
  3517. goto fsm_start;
  3518. }
  3519. }
  3520. ata_altstatus(ap); /* flush */
  3521. poll_next = 1;
  3522. break;
  3523. case HSM_ST_LAST:
  3524. if (unlikely(!ata_ok(status))) {
  3525. qc->err_mask |= __ac_err_mask(status);
  3526. ap->hsm_task_state = HSM_ST_ERR;
  3527. goto fsm_start;
  3528. }
  3529. /* no more data to transfer */
  3530. DPRINTK("ata%u: dev %u command complete, drv_stat 0x%x\n",
  3531. ap->id, qc->dev->devno, status);
  3532. WARN_ON(qc->err_mask);
  3533. ap->hsm_task_state = HSM_ST_IDLE;
  3534. /* complete taskfile transaction */
  3535. ata_hsm_qc_complete(qc, in_wq);
  3536. poll_next = 0;
  3537. break;
  3538. case HSM_ST_ERR:
  3539. /* make sure qc->err_mask is available to
  3540. * know what's wrong and recover
  3541. */
  3542. WARN_ON(qc->err_mask == 0);
  3543. ap->hsm_task_state = HSM_ST_IDLE;
  3544. /* complete taskfile transaction */
  3545. ata_hsm_qc_complete(qc, in_wq);
  3546. poll_next = 0;
  3547. break;
  3548. default:
  3549. poll_next = 0;
  3550. BUG();
  3551. }
  3552. return poll_next;
  3553. }
  3554. static void ata_pio_task(void *_data)
  3555. {
  3556. struct ata_queued_cmd *qc = _data;
  3557. struct ata_port *ap = qc->ap;
  3558. u8 status;
  3559. int poll_next;
  3560. fsm_start:
  3561. WARN_ON(ap->hsm_task_state == HSM_ST_IDLE);
  3562. /*
  3563. * This is purely heuristic. This is a fast path.
  3564. * Sometimes when we enter, BSY will be cleared in
  3565. * a chk-status or two. If not, the drive is probably seeking
  3566. * or something. Snooze for a couple msecs, then
  3567. * chk-status again. If still busy, queue delayed work.
  3568. */
  3569. status = ata_busy_wait(ap, ATA_BUSY, 5);
  3570. if (status & ATA_BUSY) {
  3571. msleep(2);
  3572. status = ata_busy_wait(ap, ATA_BUSY, 10);
  3573. if (status & ATA_BUSY) {
  3574. ata_port_queue_task(ap, ata_pio_task, qc, ATA_SHORT_PAUSE);
  3575. return;
  3576. }
  3577. }
  3578. /* move the HSM */
  3579. poll_next = ata_hsm_move(ap, qc, status, 1);
  3580. /* another command or interrupt handler
  3581. * may be running at this point.
  3582. */
  3583. if (poll_next)
  3584. goto fsm_start;
  3585. }
  3586. /**
  3587. * ata_qc_new - Request an available ATA command, for queueing
  3588. * @ap: Port associated with device @dev
  3589. * @dev: Device from whom we request an available command structure
  3590. *
  3591. * LOCKING:
  3592. * None.
  3593. */
  3594. static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
  3595. {
  3596. struct ata_queued_cmd *qc = NULL;
  3597. unsigned int i;
  3598. /* no command while frozen */
  3599. if (unlikely(ap->flags & ATA_FLAG_FROZEN))
  3600. return NULL;
  3601. /* the last tag is reserved for internal command. */
  3602. for (i = 0; i < ATA_MAX_QUEUE - 1; i++)
  3603. if (!test_and_set_bit(i, &ap->qc_allocated)) {
  3604. qc = __ata_qc_from_tag(ap, i);
  3605. break;
  3606. }
  3607. if (qc)
  3608. qc->tag = i;
  3609. return qc;
  3610. }
  3611. /**
  3612. * ata_qc_new_init - Request an available ATA command, and initialize it
  3613. * @dev: Device from whom we request an available command structure
  3614. *
  3615. * LOCKING:
  3616. * None.
  3617. */
  3618. struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
  3619. {
  3620. struct ata_port *ap = dev->ap;
  3621. struct ata_queued_cmd *qc;
  3622. qc = ata_qc_new(ap);
  3623. if (qc) {
  3624. qc->scsicmd = NULL;
  3625. qc->ap = ap;
  3626. qc->dev = dev;
  3627. ata_qc_reinit(qc);
  3628. }
  3629. return qc;
  3630. }
  3631. /**
  3632. * ata_qc_free - free unused ata_queued_cmd
  3633. * @qc: Command to complete
  3634. *
  3635. * Designed to free unused ata_queued_cmd object
  3636. * in case something prevents using it.
  3637. *
  3638. * LOCKING:
  3639. * spin_lock_irqsave(host_set lock)
  3640. */
  3641. void ata_qc_free(struct ata_queued_cmd *qc)
  3642. {
  3643. struct ata_port *ap = qc->ap;
  3644. unsigned int tag;
  3645. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3646. qc->flags = 0;
  3647. tag = qc->tag;
  3648. if (likely(ata_tag_valid(tag))) {
  3649. qc->tag = ATA_TAG_POISON;
  3650. clear_bit(tag, &ap->qc_allocated);
  3651. }
  3652. }
  3653. void __ata_qc_complete(struct ata_queued_cmd *qc)
  3654. {
  3655. struct ata_port *ap = qc->ap;
  3656. WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
  3657. WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
  3658. if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
  3659. ata_sg_clean(qc);
  3660. /* command should be marked inactive atomically with qc completion */
  3661. if (qc->tf.protocol == ATA_PROT_NCQ)
  3662. ap->sactive &= ~(1 << qc->tag);
  3663. else
  3664. ap->active_tag = ATA_TAG_POISON;
  3665. /* atapi: mark qc as inactive to prevent the interrupt handler
  3666. * from completing the command twice later, before the error handler
  3667. * is called. (when rc != 0 and atapi request sense is needed)
  3668. */
  3669. qc->flags &= ~ATA_QCFLAG_ACTIVE;
  3670. ap->qc_active &= ~(1 << qc->tag);
  3671. /* call completion callback */
  3672. qc->complete_fn(qc);
  3673. }
  3674. /**
  3675. * ata_qc_complete - Complete an active ATA command
  3676. * @qc: Command to complete
  3677. * @err_mask: ATA Status register contents
  3678. *
  3679. * Indicate to the mid and upper layers that an ATA
  3680. * command has completed, with either an ok or not-ok status.
  3681. *
  3682. * LOCKING:
  3683. * spin_lock_irqsave(host_set lock)
  3684. */
  3685. void ata_qc_complete(struct ata_queued_cmd *qc)
  3686. {
  3687. struct ata_port *ap = qc->ap;
  3688. /* XXX: New EH and old EH use different mechanisms to
  3689. * synchronize EH with regular execution path.
  3690. *
  3691. * In new EH, a failed qc is marked with ATA_QCFLAG_FAILED.
  3692. * Normal execution path is responsible for not accessing a
  3693. * failed qc. libata core enforces the rule by returning NULL
  3694. * from ata_qc_from_tag() for failed qcs.
  3695. *
  3696. * Old EH depends on ata_qc_complete() nullifying completion
  3697. * requests if ATA_QCFLAG_EH_SCHEDULED is set. Old EH does
  3698. * not synchronize with interrupt handler. Only PIO task is
  3699. * taken care of.
  3700. */
  3701. if (ap->ops->error_handler) {
  3702. WARN_ON(ap->flags & ATA_FLAG_FROZEN);
  3703. if (unlikely(qc->err_mask))
  3704. qc->flags |= ATA_QCFLAG_FAILED;
  3705. if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
  3706. if (!ata_tag_internal(qc->tag)) {
  3707. /* always fill result TF for failed qc */
  3708. ap->ops->tf_read(ap, &qc->result_tf);
  3709. ata_qc_schedule_eh(qc);
  3710. return;
  3711. }
  3712. }
  3713. /* read result TF if requested */
  3714. if (qc->flags & ATA_QCFLAG_RESULT_TF)
  3715. ap->ops->tf_read(ap, &qc->result_tf);
  3716. __ata_qc_complete(qc);
  3717. } else {
  3718. if (qc->flags & ATA_QCFLAG_EH_SCHEDULED)
  3719. return;
  3720. /* read result TF if failed or requested */
  3721. if (qc->err_mask || qc->flags & ATA_QCFLAG_RESULT_TF)
  3722. ap->ops->tf_read(ap, &qc->result_tf);
  3723. __ata_qc_complete(qc);
  3724. }
  3725. }
  3726. /**
  3727. * ata_qc_complete_multiple - Complete multiple qcs successfully
  3728. * @ap: port in question
  3729. * @qc_active: new qc_active mask
  3730. * @finish_qc: LLDD callback invoked before completing a qc
  3731. *
  3732. * Complete in-flight commands. This functions is meant to be
  3733. * called from low-level driver's interrupt routine to complete
  3734. * requests normally. ap->qc_active and @qc_active is compared
  3735. * and commands are completed accordingly.
  3736. *
  3737. * LOCKING:
  3738. * spin_lock_irqsave(host_set lock)
  3739. *
  3740. * RETURNS:
  3741. * Number of completed commands on success, -errno otherwise.
  3742. */
  3743. int ata_qc_complete_multiple(struct ata_port *ap, u32 qc_active,
  3744. void (*finish_qc)(struct ata_queued_cmd *))
  3745. {
  3746. int nr_done = 0;
  3747. u32 done_mask;
  3748. int i;
  3749. done_mask = ap->qc_active ^ qc_active;
  3750. if (unlikely(done_mask & qc_active)) {
  3751. ata_port_printk(ap, KERN_ERR, "illegal qc_active transition "
  3752. "(%08x->%08x)\n", ap->qc_active, qc_active);
  3753. return -EINVAL;
  3754. }
  3755. for (i = 0; i < ATA_MAX_QUEUE; i++) {
  3756. struct ata_queued_cmd *qc;
  3757. if (!(done_mask & (1 << i)))
  3758. continue;
  3759. if ((qc = ata_qc_from_tag(ap, i))) {
  3760. if (finish_qc)
  3761. finish_qc(qc);
  3762. ata_qc_complete(qc);
  3763. nr_done++;
  3764. }
  3765. }
  3766. return nr_done;
  3767. }
  3768. static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
  3769. {
  3770. struct ata_port *ap = qc->ap;
  3771. switch (qc->tf.protocol) {
  3772. case ATA_PROT_NCQ:
  3773. case ATA_PROT_DMA:
  3774. case ATA_PROT_ATAPI_DMA:
  3775. return 1;
  3776. case ATA_PROT_ATAPI:
  3777. case ATA_PROT_PIO:
  3778. if (ap->flags & ATA_FLAG_PIO_DMA)
  3779. return 1;
  3780. /* fall through */
  3781. default:
  3782. return 0;
  3783. }
  3784. /* never reached */
  3785. }
  3786. /**
  3787. * ata_qc_issue - issue taskfile to device
  3788. * @qc: command to issue to device
  3789. *
  3790. * Prepare an ATA command to submission to device.
  3791. * This includes mapping the data into a DMA-able
  3792. * area, filling in the S/G table, and finally
  3793. * writing the taskfile to hardware, starting the command.
  3794. *
  3795. * LOCKING:
  3796. * spin_lock_irqsave(host_set lock)
  3797. */
  3798. void ata_qc_issue(struct ata_queued_cmd *qc)
  3799. {
  3800. struct ata_port *ap = qc->ap;
  3801. /* Make sure only one non-NCQ command is outstanding. The
  3802. * check is skipped for old EH because it reuses active qc to
  3803. * request ATAPI sense.
  3804. */
  3805. WARN_ON(ap->ops->error_handler && ata_tag_valid(ap->active_tag));
  3806. if (qc->tf.protocol == ATA_PROT_NCQ) {
  3807. WARN_ON(ap->sactive & (1 << qc->tag));
  3808. ap->sactive |= 1 << qc->tag;
  3809. } else {
  3810. WARN_ON(ap->sactive);
  3811. ap->active_tag = qc->tag;
  3812. }
  3813. qc->flags |= ATA_QCFLAG_ACTIVE;
  3814. ap->qc_active |= 1 << qc->tag;
  3815. if (ata_should_dma_map(qc)) {
  3816. if (qc->flags & ATA_QCFLAG_SG) {
  3817. if (ata_sg_setup(qc))
  3818. goto sg_err;
  3819. } else if (qc->flags & ATA_QCFLAG_SINGLE) {
  3820. if (ata_sg_setup_one(qc))
  3821. goto sg_err;
  3822. }
  3823. } else {
  3824. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3825. }
  3826. ap->ops->qc_prep(qc);
  3827. qc->err_mask |= ap->ops->qc_issue(qc);
  3828. if (unlikely(qc->err_mask))
  3829. goto err;
  3830. return;
  3831. sg_err:
  3832. qc->flags &= ~ATA_QCFLAG_DMAMAP;
  3833. qc->err_mask |= AC_ERR_SYSTEM;
  3834. err:
  3835. ata_qc_complete(qc);
  3836. }
  3837. /**
  3838. * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
  3839. * @qc: command to issue to device
  3840. *
  3841. * Using various libata functions and hooks, this function
  3842. * starts an ATA command. ATA commands are grouped into
  3843. * classes called "protocols", and issuing each type of protocol
  3844. * is slightly different.
  3845. *
  3846. * May be used as the qc_issue() entry in ata_port_operations.
  3847. *
  3848. * LOCKING:
  3849. * spin_lock_irqsave(host_set lock)
  3850. *
  3851. * RETURNS:
  3852. * Zero on success, AC_ERR_* mask on failure
  3853. */
  3854. unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
  3855. {
  3856. struct ata_port *ap = qc->ap;
  3857. /* Use polling pio if the LLD doesn't handle
  3858. * interrupt driven pio and atapi CDB interrupt.
  3859. */
  3860. if (ap->flags & ATA_FLAG_PIO_POLLING) {
  3861. switch (qc->tf.protocol) {
  3862. case ATA_PROT_PIO:
  3863. case ATA_PROT_ATAPI:
  3864. case ATA_PROT_ATAPI_NODATA:
  3865. qc->tf.flags |= ATA_TFLAG_POLLING;
  3866. break;
  3867. case ATA_PROT_ATAPI_DMA:
  3868. if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
  3869. /* see ata_check_atapi_dma() */
  3870. BUG();
  3871. break;
  3872. default:
  3873. break;
  3874. }
  3875. }
  3876. /* select the device */
  3877. ata_dev_select(ap, qc->dev->devno, 1, 0);
  3878. /* start the command */
  3879. switch (qc->tf.protocol) {
  3880. case ATA_PROT_NODATA:
  3881. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3882. ata_qc_set_polling(qc);
  3883. ata_tf_to_host(ap, &qc->tf);
  3884. ap->hsm_task_state = HSM_ST_LAST;
  3885. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3886. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3887. break;
  3888. case ATA_PROT_DMA:
  3889. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3890. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3891. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3892. ap->ops->bmdma_start(qc); /* initiate bmdma */
  3893. ap->hsm_task_state = HSM_ST_LAST;
  3894. break;
  3895. case ATA_PROT_PIO:
  3896. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3897. ata_qc_set_polling(qc);
  3898. ata_tf_to_host(ap, &qc->tf);
  3899. if (qc->tf.flags & ATA_TFLAG_WRITE) {
  3900. /* PIO data out protocol */
  3901. ap->hsm_task_state = HSM_ST_FIRST;
  3902. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3903. /* always send first data block using
  3904. * the ata_pio_task() codepath.
  3905. */
  3906. } else {
  3907. /* PIO data in protocol */
  3908. ap->hsm_task_state = HSM_ST;
  3909. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3910. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3911. /* if polling, ata_pio_task() handles the rest.
  3912. * otherwise, interrupt handler takes over from here.
  3913. */
  3914. }
  3915. break;
  3916. case ATA_PROT_ATAPI:
  3917. case ATA_PROT_ATAPI_NODATA:
  3918. if (qc->tf.flags & ATA_TFLAG_POLLING)
  3919. ata_qc_set_polling(qc);
  3920. ata_tf_to_host(ap, &qc->tf);
  3921. ap->hsm_task_state = HSM_ST_FIRST;
  3922. /* send cdb by polling if no cdb interrupt */
  3923. if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
  3924. (qc->tf.flags & ATA_TFLAG_POLLING))
  3925. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3926. break;
  3927. case ATA_PROT_ATAPI_DMA:
  3928. WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
  3929. ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
  3930. ap->ops->bmdma_setup(qc); /* set up bmdma */
  3931. ap->hsm_task_state = HSM_ST_FIRST;
  3932. /* send cdb by polling if no cdb interrupt */
  3933. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3934. ata_port_queue_task(ap, ata_pio_task, qc, 0);
  3935. break;
  3936. default:
  3937. WARN_ON(1);
  3938. return AC_ERR_SYSTEM;
  3939. }
  3940. return 0;
  3941. }
  3942. /**
  3943. * ata_host_intr - Handle host interrupt for given (port, task)
  3944. * @ap: Port on which interrupt arrived (possibly...)
  3945. * @qc: Taskfile currently active in engine
  3946. *
  3947. * Handle host interrupt for given queued command. Currently,
  3948. * only DMA interrupts are handled. All other commands are
  3949. * handled via polling with interrupts disabled (nIEN bit).
  3950. *
  3951. * LOCKING:
  3952. * spin_lock_irqsave(host_set lock)
  3953. *
  3954. * RETURNS:
  3955. * One if interrupt was handled, zero if not (shared irq).
  3956. */
  3957. inline unsigned int ata_host_intr (struct ata_port *ap,
  3958. struct ata_queued_cmd *qc)
  3959. {
  3960. u8 status, host_stat = 0;
  3961. VPRINTK("ata%u: protocol %d task_state %d\n",
  3962. ap->id, qc->tf.protocol, ap->hsm_task_state);
  3963. /* Check whether we are expecting interrupt in this state */
  3964. switch (ap->hsm_task_state) {
  3965. case HSM_ST_FIRST:
  3966. /* Some pre-ATAPI-4 devices assert INTRQ
  3967. * at this state when ready to receive CDB.
  3968. */
  3969. /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
  3970. * The flag was turned on only for atapi devices.
  3971. * No need to check is_atapi_taskfile(&qc->tf) again.
  3972. */
  3973. if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
  3974. goto idle_irq;
  3975. break;
  3976. case HSM_ST_LAST:
  3977. if (qc->tf.protocol == ATA_PROT_DMA ||
  3978. qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
  3979. /* check status of DMA engine */
  3980. host_stat = ap->ops->bmdma_status(ap);
  3981. VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
  3982. /* if it's not our irq... */
  3983. if (!(host_stat & ATA_DMA_INTR))
  3984. goto idle_irq;
  3985. /* before we do anything else, clear DMA-Start bit */
  3986. ap->ops->bmdma_stop(qc);
  3987. if (unlikely(host_stat & ATA_DMA_ERR)) {
  3988. /* error when transfering data to/from memory */
  3989. qc->err_mask |= AC_ERR_HOST_BUS;
  3990. ap->hsm_task_state = HSM_ST_ERR;
  3991. }
  3992. }
  3993. break;
  3994. case HSM_ST:
  3995. break;
  3996. default:
  3997. goto idle_irq;
  3998. }
  3999. /* check altstatus */
  4000. status = ata_altstatus(ap);
  4001. if (status & ATA_BUSY)
  4002. goto idle_irq;
  4003. /* check main status, clearing INTRQ */
  4004. status = ata_chk_status(ap);
  4005. if (unlikely(status & ATA_BUSY))
  4006. goto idle_irq;
  4007. /* ack bmdma irq events */
  4008. ap->ops->irq_clear(ap);
  4009. ata_hsm_move(ap, qc, status, 0);
  4010. return 1; /* irq handled */
  4011. idle_irq:
  4012. ap->stats.idle_irq++;
  4013. #ifdef ATA_IRQ_TRAP
  4014. if ((ap->stats.idle_irq % 1000) == 0) {
  4015. ata_irq_ack(ap, 0); /* debug trap */
  4016. ata_port_printk(ap, KERN_WARNING, "irq trap\n");
  4017. return 1;
  4018. }
  4019. #endif
  4020. return 0; /* irq not handled */
  4021. }
  4022. /**
  4023. * ata_interrupt - Default ATA host interrupt handler
  4024. * @irq: irq line (unused)
  4025. * @dev_instance: pointer to our ata_host_set information structure
  4026. * @regs: unused
  4027. *
  4028. * Default interrupt handler for PCI IDE devices. Calls
  4029. * ata_host_intr() for each port that is not disabled.
  4030. *
  4031. * LOCKING:
  4032. * Obtains host_set lock during operation.
  4033. *
  4034. * RETURNS:
  4035. * IRQ_NONE or IRQ_HANDLED.
  4036. */
  4037. irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
  4038. {
  4039. struct ata_host_set *host_set = dev_instance;
  4040. unsigned int i;
  4041. unsigned int handled = 0;
  4042. unsigned long flags;
  4043. /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
  4044. spin_lock_irqsave(&host_set->lock, flags);
  4045. for (i = 0; i < host_set->n_ports; i++) {
  4046. struct ata_port *ap;
  4047. ap = host_set->ports[i];
  4048. if (ap &&
  4049. !(ap->flags & ATA_FLAG_DISABLED)) {
  4050. struct ata_queued_cmd *qc;
  4051. qc = ata_qc_from_tag(ap, ap->active_tag);
  4052. if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
  4053. (qc->flags & ATA_QCFLAG_ACTIVE))
  4054. handled |= ata_host_intr(ap, qc);
  4055. }
  4056. }
  4057. spin_unlock_irqrestore(&host_set->lock, flags);
  4058. return IRQ_RETVAL(handled);
  4059. }
  4060. /**
  4061. * sata_scr_valid - test whether SCRs are accessible
  4062. * @ap: ATA port to test SCR accessibility for
  4063. *
  4064. * Test whether SCRs are accessible for @ap.
  4065. *
  4066. * LOCKING:
  4067. * None.
  4068. *
  4069. * RETURNS:
  4070. * 1 if SCRs are accessible, 0 otherwise.
  4071. */
  4072. int sata_scr_valid(struct ata_port *ap)
  4073. {
  4074. return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;
  4075. }
  4076. /**
  4077. * sata_scr_read - read SCR register of the specified port
  4078. * @ap: ATA port to read SCR for
  4079. * @reg: SCR to read
  4080. * @val: Place to store read value
  4081. *
  4082. * Read SCR register @reg of @ap into *@val. This function is
  4083. * guaranteed to succeed if the cable type of the port is SATA
  4084. * and the port implements ->scr_read.
  4085. *
  4086. * LOCKING:
  4087. * None.
  4088. *
  4089. * RETURNS:
  4090. * 0 on success, negative errno on failure.
  4091. */
  4092. int sata_scr_read(struct ata_port *ap, int reg, u32 *val)
  4093. {
  4094. if (sata_scr_valid(ap)) {
  4095. *val = ap->ops->scr_read(ap, reg);
  4096. return 0;
  4097. }
  4098. return -EOPNOTSUPP;
  4099. }
  4100. /**
  4101. * sata_scr_write - write SCR register of the specified port
  4102. * @ap: ATA port to write SCR for
  4103. * @reg: SCR to write
  4104. * @val: value to write
  4105. *
  4106. * Write @val to SCR register @reg of @ap. This function is
  4107. * guaranteed to succeed if the cable type of the port is SATA
  4108. * and the port implements ->scr_read.
  4109. *
  4110. * LOCKING:
  4111. * None.
  4112. *
  4113. * RETURNS:
  4114. * 0 on success, negative errno on failure.
  4115. */
  4116. int sata_scr_write(struct ata_port *ap, int reg, u32 val)
  4117. {
  4118. if (sata_scr_valid(ap)) {
  4119. ap->ops->scr_write(ap, reg, val);
  4120. return 0;
  4121. }
  4122. return -EOPNOTSUPP;
  4123. }
  4124. /**
  4125. * sata_scr_write_flush - write SCR register of the specified port and flush
  4126. * @ap: ATA port to write SCR for
  4127. * @reg: SCR to write
  4128. * @val: value to write
  4129. *
  4130. * This function is identical to sata_scr_write() except that this
  4131. * function performs flush after writing to the register.
  4132. *
  4133. * LOCKING:
  4134. * None.
  4135. *
  4136. * RETURNS:
  4137. * 0 on success, negative errno on failure.
  4138. */
  4139. int sata_scr_write_flush(struct ata_port *ap, int reg, u32 val)
  4140. {
  4141. if (sata_scr_valid(ap)) {
  4142. ap->ops->scr_write(ap, reg, val);
  4143. ap->ops->scr_read(ap, reg);
  4144. return 0;
  4145. }
  4146. return -EOPNOTSUPP;
  4147. }
  4148. /**
  4149. * ata_port_online - test whether the given port is online
  4150. * @ap: ATA port to test
  4151. *
  4152. * Test whether @ap is online. Note that this function returns 0
  4153. * if online status of @ap cannot be obtained, so
  4154. * ata_port_online(ap) != !ata_port_offline(ap).
  4155. *
  4156. * LOCKING:
  4157. * None.
  4158. *
  4159. * RETURNS:
  4160. * 1 if the port online status is available and online.
  4161. */
  4162. int ata_port_online(struct ata_port *ap)
  4163. {
  4164. u32 sstatus;
  4165. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) == 0x3)
  4166. return 1;
  4167. return 0;
  4168. }
  4169. /**
  4170. * ata_port_offline - test whether the given port is offline
  4171. * @ap: ATA port to test
  4172. *
  4173. * Test whether @ap is offline. Note that this function returns
  4174. * 0 if offline status of @ap cannot be obtained, so
  4175. * ata_port_online(ap) != !ata_port_offline(ap).
  4176. *
  4177. * LOCKING:
  4178. * None.
  4179. *
  4180. * RETURNS:
  4181. * 1 if the port offline status is available and offline.
  4182. */
  4183. int ata_port_offline(struct ata_port *ap)
  4184. {
  4185. u32 sstatus;
  4186. if (!sata_scr_read(ap, SCR_STATUS, &sstatus) && (sstatus & 0xf) != 0x3)
  4187. return 1;
  4188. return 0;
  4189. }
  4190. /*
  4191. * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
  4192. * without filling any other registers
  4193. */
  4194. static int ata_do_simple_cmd(struct ata_device *dev, u8 cmd)
  4195. {
  4196. struct ata_taskfile tf;
  4197. int err;
  4198. ata_tf_init(dev, &tf);
  4199. tf.command = cmd;
  4200. tf.flags |= ATA_TFLAG_DEVICE;
  4201. tf.protocol = ATA_PROT_NODATA;
  4202. err = ata_exec_internal(dev, &tf, NULL, DMA_NONE, NULL, 0);
  4203. if (err)
  4204. ata_dev_printk(dev, KERN_ERR, "%s: ata command failed: %d\n",
  4205. __FUNCTION__, err);
  4206. return err;
  4207. }
  4208. static int ata_flush_cache(struct ata_device *dev)
  4209. {
  4210. u8 cmd;
  4211. if (!ata_try_flush_cache(dev))
  4212. return 0;
  4213. if (ata_id_has_flush_ext(dev->id))
  4214. cmd = ATA_CMD_FLUSH_EXT;
  4215. else
  4216. cmd = ATA_CMD_FLUSH;
  4217. return ata_do_simple_cmd(dev, cmd);
  4218. }
  4219. static int ata_standby_drive(struct ata_device *dev)
  4220. {
  4221. return ata_do_simple_cmd(dev, ATA_CMD_STANDBYNOW1);
  4222. }
  4223. static int ata_start_drive(struct ata_device *dev)
  4224. {
  4225. return ata_do_simple_cmd(dev, ATA_CMD_IDLEIMMEDIATE);
  4226. }
  4227. /**
  4228. * ata_device_resume - wakeup a previously suspended devices
  4229. * @dev: the device to resume
  4230. *
  4231. * Kick the drive back into action, by sending it an idle immediate
  4232. * command and making sure its transfer mode matches between drive
  4233. * and host.
  4234. *
  4235. */
  4236. int ata_device_resume(struct ata_device *dev)
  4237. {
  4238. struct ata_port *ap = dev->ap;
  4239. if (ap->flags & ATA_FLAG_SUSPENDED) {
  4240. struct ata_device *failed_dev;
  4241. ata_busy_wait(ap, ATA_BUSY | ATA_DRQ, 200000);
  4242. ap->flags &= ~ATA_FLAG_SUSPENDED;
  4243. while (ata_set_mode(ap, &failed_dev))
  4244. ata_dev_disable(failed_dev);
  4245. }
  4246. if (!ata_dev_enabled(dev))
  4247. return 0;
  4248. if (dev->class == ATA_DEV_ATA)
  4249. ata_start_drive(dev);
  4250. return 0;
  4251. }
  4252. /**
  4253. * ata_device_suspend - prepare a device for suspend
  4254. * @dev: the device to suspend
  4255. * @state: target power management state
  4256. *
  4257. * Flush the cache on the drive, if appropriate, then issue a
  4258. * standbynow command.
  4259. */
  4260. int ata_device_suspend(struct ata_device *dev, pm_message_t state)
  4261. {
  4262. struct ata_port *ap = dev->ap;
  4263. if (!ata_dev_enabled(dev))
  4264. return 0;
  4265. if (dev->class == ATA_DEV_ATA)
  4266. ata_flush_cache(dev);
  4267. if (state.event != PM_EVENT_FREEZE)
  4268. ata_standby_drive(dev);
  4269. ap->flags |= ATA_FLAG_SUSPENDED;
  4270. return 0;
  4271. }
  4272. /**
  4273. * ata_port_start - Set port up for dma.
  4274. * @ap: Port to initialize
  4275. *
  4276. * Called just after data structures for each port are
  4277. * initialized. Allocates space for PRD table.
  4278. *
  4279. * May be used as the port_start() entry in ata_port_operations.
  4280. *
  4281. * LOCKING:
  4282. * Inherited from caller.
  4283. */
  4284. int ata_port_start (struct ata_port *ap)
  4285. {
  4286. struct device *dev = ap->dev;
  4287. int rc;
  4288. ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
  4289. if (!ap->prd)
  4290. return -ENOMEM;
  4291. rc = ata_pad_alloc(ap, dev);
  4292. if (rc) {
  4293. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4294. return rc;
  4295. }
  4296. DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
  4297. return 0;
  4298. }
  4299. /**
  4300. * ata_port_stop - Undo ata_port_start()
  4301. * @ap: Port to shut down
  4302. *
  4303. * Frees the PRD table.
  4304. *
  4305. * May be used as the port_stop() entry in ata_port_operations.
  4306. *
  4307. * LOCKING:
  4308. * Inherited from caller.
  4309. */
  4310. void ata_port_stop (struct ata_port *ap)
  4311. {
  4312. struct device *dev = ap->dev;
  4313. dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
  4314. ata_pad_free(ap, dev);
  4315. }
  4316. void ata_host_stop (struct ata_host_set *host_set)
  4317. {
  4318. if (host_set->mmio_base)
  4319. iounmap(host_set->mmio_base);
  4320. }
  4321. /**
  4322. * ata_host_remove - Unregister SCSI host structure with upper layers
  4323. * @ap: Port to unregister
  4324. * @do_unregister: 1 if we fully unregister, 0 to just stop the port
  4325. *
  4326. * LOCKING:
  4327. * Inherited from caller.
  4328. */
  4329. static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
  4330. {
  4331. struct Scsi_Host *sh = ap->host;
  4332. DPRINTK("ENTER\n");
  4333. if (do_unregister)
  4334. scsi_remove_host(sh);
  4335. ap->ops->port_stop(ap);
  4336. }
  4337. /**
  4338. * ata_dev_init - Initialize an ata_device structure
  4339. * @dev: Device structure to initialize
  4340. *
  4341. * Initialize @dev in preparation for probing.
  4342. *
  4343. * LOCKING:
  4344. * Inherited from caller.
  4345. */
  4346. void ata_dev_init(struct ata_device *dev)
  4347. {
  4348. struct ata_port *ap = dev->ap;
  4349. unsigned long flags;
  4350. /* SATA spd limit is bound to the first device */
  4351. ap->sata_spd_limit = ap->hw_sata_spd_limit;
  4352. /* High bits of dev->flags are used to record warm plug
  4353. * requests which occur asynchronously. Synchronize using
  4354. * host_set lock.
  4355. */
  4356. spin_lock_irqsave(&ap->host_set->lock, flags);
  4357. dev->flags &= ~ATA_DFLAG_INIT_MASK;
  4358. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4359. memset((void *)dev + ATA_DEVICE_CLEAR_OFFSET, 0,
  4360. sizeof(*dev) - ATA_DEVICE_CLEAR_OFFSET);
  4361. dev->pio_mask = UINT_MAX;
  4362. dev->mwdma_mask = UINT_MAX;
  4363. dev->udma_mask = UINT_MAX;
  4364. }
  4365. /**
  4366. * ata_host_init - Initialize an ata_port structure
  4367. * @ap: Structure to initialize
  4368. * @host: associated SCSI mid-layer structure
  4369. * @host_set: Collection of hosts to which @ap belongs
  4370. * @ent: Probe information provided by low-level driver
  4371. * @port_no: Port number associated with this ata_port
  4372. *
  4373. * Initialize a new ata_port structure, and its associated
  4374. * scsi_host.
  4375. *
  4376. * LOCKING:
  4377. * Inherited from caller.
  4378. */
  4379. static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
  4380. struct ata_host_set *host_set,
  4381. const struct ata_probe_ent *ent, unsigned int port_no)
  4382. {
  4383. unsigned int i;
  4384. host->max_id = 16;
  4385. host->max_lun = 1;
  4386. host->max_channel = 1;
  4387. host->unique_id = ata_unique_id++;
  4388. host->max_cmd_len = 12;
  4389. ap->flags = ATA_FLAG_DISABLED;
  4390. ap->id = host->unique_id;
  4391. ap->host = host;
  4392. ap->ctl = ATA_DEVCTL_OBS;
  4393. ap->host_set = host_set;
  4394. ap->dev = ent->dev;
  4395. ap->port_no = port_no;
  4396. ap->hard_port_no =
  4397. ent->legacy_mode ? ent->hard_port_no : port_no;
  4398. ap->pio_mask = ent->pio_mask;
  4399. ap->mwdma_mask = ent->mwdma_mask;
  4400. ap->udma_mask = ent->udma_mask;
  4401. ap->flags |= ent->host_flags;
  4402. ap->ops = ent->port_ops;
  4403. ap->hw_sata_spd_limit = UINT_MAX;
  4404. ap->active_tag = ATA_TAG_POISON;
  4405. ap->last_ctl = 0xFF;
  4406. #if defined(ATA_VERBOSE_DEBUG)
  4407. /* turn on all debugging levels */
  4408. ap->msg_enable = 0x00FF;
  4409. #elif defined(ATA_DEBUG)
  4410. ap->msg_enable = ATA_MSG_DRV | ATA_MSG_INFO | ATA_MSG_CTL | ATA_MSG_WARN | ATA_MSG_ERR;
  4411. #else
  4412. ap->msg_enable = ATA_MSG_DRV | ATA_MSG_ERR;
  4413. #endif
  4414. INIT_WORK(&ap->port_task, NULL, NULL);
  4415. INIT_WORK(&ap->hotplug_task, ata_scsi_hotplug, ap);
  4416. INIT_WORK(&ap->scsi_rescan_task, ata_scsi_dev_rescan, ap);
  4417. INIT_LIST_HEAD(&ap->eh_done_q);
  4418. init_waitqueue_head(&ap->eh_wait_q);
  4419. /* set cable type */
  4420. ap->cbl = ATA_CBL_NONE;
  4421. if (ap->flags & ATA_FLAG_SATA)
  4422. ap->cbl = ATA_CBL_SATA;
  4423. for (i = 0; i < ATA_MAX_DEVICES; i++) {
  4424. struct ata_device *dev = &ap->device[i];
  4425. dev->ap = ap;
  4426. dev->devno = i;
  4427. ata_dev_init(dev);
  4428. }
  4429. #ifdef ATA_IRQ_TRAP
  4430. ap->stats.unhandled_irq = 1;
  4431. ap->stats.idle_irq = 1;
  4432. #endif
  4433. memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
  4434. }
  4435. /**
  4436. * ata_host_add - Attach low-level ATA driver to system
  4437. * @ent: Information provided by low-level driver
  4438. * @host_set: Collections of ports to which we add
  4439. * @port_no: Port number associated with this host
  4440. *
  4441. * Attach low-level ATA driver to system.
  4442. *
  4443. * LOCKING:
  4444. * PCI/etc. bus probe sem.
  4445. *
  4446. * RETURNS:
  4447. * New ata_port on success, for NULL on error.
  4448. */
  4449. static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
  4450. struct ata_host_set *host_set,
  4451. unsigned int port_no)
  4452. {
  4453. struct Scsi_Host *host;
  4454. struct ata_port *ap;
  4455. int rc;
  4456. DPRINTK("ENTER\n");
  4457. if (!ent->port_ops->error_handler &&
  4458. !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
  4459. printk(KERN_ERR "ata%u: no reset mechanism available\n",
  4460. port_no);
  4461. return NULL;
  4462. }
  4463. host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
  4464. if (!host)
  4465. return NULL;
  4466. host->transportt = &ata_scsi_transport_template;
  4467. ap = ata_shost_to_port(host);
  4468. ata_host_init(ap, host, host_set, ent, port_no);
  4469. rc = ap->ops->port_start(ap);
  4470. if (rc)
  4471. goto err_out;
  4472. return ap;
  4473. err_out:
  4474. scsi_host_put(host);
  4475. return NULL;
  4476. }
  4477. /**
  4478. * ata_device_add - Register hardware device with ATA and SCSI layers
  4479. * @ent: Probe information describing hardware device to be registered
  4480. *
  4481. * This function processes the information provided in the probe
  4482. * information struct @ent, allocates the necessary ATA and SCSI
  4483. * host information structures, initializes them, and registers
  4484. * everything with requisite kernel subsystems.
  4485. *
  4486. * This function requests irqs, probes the ATA bus, and probes
  4487. * the SCSI bus.
  4488. *
  4489. * LOCKING:
  4490. * PCI/etc. bus probe sem.
  4491. *
  4492. * RETURNS:
  4493. * Number of ports registered. Zero on error (no ports registered).
  4494. */
  4495. int ata_device_add(const struct ata_probe_ent *ent)
  4496. {
  4497. unsigned int count = 0, i;
  4498. struct device *dev = ent->dev;
  4499. struct ata_host_set *host_set;
  4500. int rc;
  4501. DPRINTK("ENTER\n");
  4502. /* alloc a container for our list of ATA ports (buses) */
  4503. host_set = kzalloc(sizeof(struct ata_host_set) +
  4504. (ent->n_ports * sizeof(void *)), GFP_KERNEL);
  4505. if (!host_set)
  4506. return 0;
  4507. spin_lock_init(&host_set->lock);
  4508. host_set->dev = dev;
  4509. host_set->n_ports = ent->n_ports;
  4510. host_set->irq = ent->irq;
  4511. host_set->mmio_base = ent->mmio_base;
  4512. host_set->private_data = ent->private_data;
  4513. host_set->ops = ent->port_ops;
  4514. host_set->flags = ent->host_set_flags;
  4515. /* register each port bound to this device */
  4516. for (i = 0; i < ent->n_ports; i++) {
  4517. struct ata_port *ap;
  4518. unsigned long xfer_mode_mask;
  4519. ap = ata_host_add(ent, host_set, i);
  4520. if (!ap)
  4521. goto err_out;
  4522. host_set->ports[i] = ap;
  4523. xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
  4524. (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
  4525. (ap->pio_mask << ATA_SHIFT_PIO);
  4526. /* print per-port info to dmesg */
  4527. ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%lX "
  4528. "ctl 0x%lX bmdma 0x%lX irq %lu\n",
  4529. ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
  4530. ata_mode_string(xfer_mode_mask),
  4531. ap->ioaddr.cmd_addr,
  4532. ap->ioaddr.ctl_addr,
  4533. ap->ioaddr.bmdma_addr,
  4534. ent->irq);
  4535. ata_chk_status(ap);
  4536. host_set->ops->irq_clear(ap);
  4537. ata_eh_freeze_port(ap); /* freeze port before requesting IRQ */
  4538. count++;
  4539. }
  4540. if (!count)
  4541. goto err_free_ret;
  4542. /* obtain irq, that is shared between channels */
  4543. rc = request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
  4544. DRV_NAME, host_set);
  4545. if (rc) {
  4546. dev_printk(KERN_ERR, dev, "irq %lu request failed: %d\n",
  4547. ent->irq, rc);
  4548. goto err_out;
  4549. }
  4550. /* perform each probe synchronously */
  4551. DPRINTK("probe begin\n");
  4552. for (i = 0; i < count; i++) {
  4553. struct ata_port *ap;
  4554. u32 scontrol;
  4555. int rc;
  4556. ap = host_set->ports[i];
  4557. /* init sata_spd_limit to the current value */
  4558. if (sata_scr_read(ap, SCR_CONTROL, &scontrol) == 0) {
  4559. int spd = (scontrol >> 4) & 0xf;
  4560. ap->hw_sata_spd_limit &= (1 << spd) - 1;
  4561. }
  4562. ap->sata_spd_limit = ap->hw_sata_spd_limit;
  4563. rc = scsi_add_host(ap->host, dev);
  4564. if (rc) {
  4565. ata_port_printk(ap, KERN_ERR, "scsi_add_host failed\n");
  4566. /* FIXME: do something useful here */
  4567. /* FIXME: handle unconditional calls to
  4568. * scsi_scan_host and ata_host_remove, below,
  4569. * at the very least
  4570. */
  4571. }
  4572. if (ap->ops->error_handler) {
  4573. unsigned long flags;
  4574. ata_port_probe(ap);
  4575. /* kick EH for boot probing */
  4576. spin_lock_irqsave(&ap->host_set->lock, flags);
  4577. ap->eh_info.probe_mask = (1 << ATA_MAX_DEVICES) - 1;
  4578. ap->eh_info.action |= ATA_EH_SOFTRESET;
  4579. ap->flags |= ATA_FLAG_LOADING;
  4580. ata_port_schedule_eh(ap);
  4581. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4582. /* wait for EH to finish */
  4583. ata_port_wait_eh(ap);
  4584. } else {
  4585. DPRINTK("ata%u: bus probe begin\n", ap->id);
  4586. rc = ata_bus_probe(ap);
  4587. DPRINTK("ata%u: bus probe end\n", ap->id);
  4588. if (rc) {
  4589. /* FIXME: do something useful here?
  4590. * Current libata behavior will
  4591. * tear down everything when
  4592. * the module is removed
  4593. * or the h/w is unplugged.
  4594. */
  4595. }
  4596. }
  4597. }
  4598. /* probes are done, now scan each port's disk(s) */
  4599. DPRINTK("host probe begin\n");
  4600. for (i = 0; i < count; i++) {
  4601. struct ata_port *ap = host_set->ports[i];
  4602. ata_scsi_scan_host(ap);
  4603. }
  4604. dev_set_drvdata(dev, host_set);
  4605. VPRINTK("EXIT, returning %u\n", ent->n_ports);
  4606. return ent->n_ports; /* success */
  4607. err_out:
  4608. for (i = 0; i < count; i++) {
  4609. ata_host_remove(host_set->ports[i], 1);
  4610. scsi_host_put(host_set->ports[i]->host);
  4611. }
  4612. err_free_ret:
  4613. kfree(host_set);
  4614. VPRINTK("EXIT, returning 0\n");
  4615. return 0;
  4616. }
  4617. /**
  4618. * ata_port_detach - Detach ATA port in prepration of device removal
  4619. * @ap: ATA port to be detached
  4620. *
  4621. * Detach all ATA devices and the associated SCSI devices of @ap;
  4622. * then, remove the associated SCSI host. @ap is guaranteed to
  4623. * be quiescent on return from this function.
  4624. *
  4625. * LOCKING:
  4626. * Kernel thread context (may sleep).
  4627. */
  4628. void ata_port_detach(struct ata_port *ap)
  4629. {
  4630. unsigned long flags;
  4631. int i;
  4632. if (!ap->ops->error_handler)
  4633. return;
  4634. /* tell EH we're leaving & flush EH */
  4635. spin_lock_irqsave(&ap->host_set->lock, flags);
  4636. ap->flags |= ATA_FLAG_UNLOADING;
  4637. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4638. ata_port_wait_eh(ap);
  4639. /* EH is now guaranteed to see UNLOADING, so no new device
  4640. * will be attached. Disable all existing devices.
  4641. */
  4642. spin_lock_irqsave(&ap->host_set->lock, flags);
  4643. for (i = 0; i < ATA_MAX_DEVICES; i++)
  4644. ata_dev_disable(&ap->device[i]);
  4645. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4646. /* Final freeze & EH. All in-flight commands are aborted. EH
  4647. * will be skipped and retrials will be terminated with bad
  4648. * target.
  4649. */
  4650. spin_lock_irqsave(&ap->host_set->lock, flags);
  4651. ata_port_freeze(ap); /* won't be thawed */
  4652. spin_unlock_irqrestore(&ap->host_set->lock, flags);
  4653. ata_port_wait_eh(ap);
  4654. /* Flush hotplug task. The sequence is similar to
  4655. * ata_port_flush_task().
  4656. */
  4657. flush_workqueue(ata_aux_wq);
  4658. cancel_delayed_work(&ap->hotplug_task);
  4659. flush_workqueue(ata_aux_wq);
  4660. /* remove the associated SCSI host */
  4661. scsi_remove_host(ap->host);
  4662. }
  4663. /**
  4664. * ata_host_set_remove - PCI layer callback for device removal
  4665. * @host_set: ATA host set that was removed
  4666. *
  4667. * Unregister all objects associated with this host set. Free those
  4668. * objects.
  4669. *
  4670. * LOCKING:
  4671. * Inherited from calling layer (may sleep).
  4672. */
  4673. void ata_host_set_remove(struct ata_host_set *host_set)
  4674. {
  4675. unsigned int i;
  4676. for (i = 0; i < host_set->n_ports; i++)
  4677. ata_port_detach(host_set->ports[i]);
  4678. free_irq(host_set->irq, host_set);
  4679. for (i = 0; i < host_set->n_ports; i++) {
  4680. struct ata_port *ap = host_set->ports[i];
  4681. ata_scsi_release(ap->host);
  4682. if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
  4683. struct ata_ioports *ioaddr = &ap->ioaddr;
  4684. if (ioaddr->cmd_addr == 0x1f0)
  4685. release_region(0x1f0, 8);
  4686. else if (ioaddr->cmd_addr == 0x170)
  4687. release_region(0x170, 8);
  4688. }
  4689. scsi_host_put(ap->host);
  4690. }
  4691. if (host_set->ops->host_stop)
  4692. host_set->ops->host_stop(host_set);
  4693. kfree(host_set);
  4694. }
  4695. /**
  4696. * ata_scsi_release - SCSI layer callback hook for host unload
  4697. * @host: libata host to be unloaded
  4698. *
  4699. * Performs all duties necessary to shut down a libata port...
  4700. * Kill port kthread, disable port, and release resources.
  4701. *
  4702. * LOCKING:
  4703. * Inherited from SCSI layer.
  4704. *
  4705. * RETURNS:
  4706. * One.
  4707. */
  4708. int ata_scsi_release(struct Scsi_Host *host)
  4709. {
  4710. struct ata_port *ap = ata_shost_to_port(host);
  4711. DPRINTK("ENTER\n");
  4712. ap->ops->port_disable(ap);
  4713. ata_host_remove(ap, 0);
  4714. DPRINTK("EXIT\n");
  4715. return 1;
  4716. }
  4717. /**
  4718. * ata_std_ports - initialize ioaddr with standard port offsets.
  4719. * @ioaddr: IO address structure to be initialized
  4720. *
  4721. * Utility function which initializes data_addr, error_addr,
  4722. * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
  4723. * device_addr, status_addr, and command_addr to standard offsets
  4724. * relative to cmd_addr.
  4725. *
  4726. * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
  4727. */
  4728. void ata_std_ports(struct ata_ioports *ioaddr)
  4729. {
  4730. ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
  4731. ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
  4732. ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
  4733. ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
  4734. ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
  4735. ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
  4736. ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
  4737. ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
  4738. ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
  4739. ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
  4740. }
  4741. #ifdef CONFIG_PCI
  4742. void ata_pci_host_stop (struct ata_host_set *host_set)
  4743. {
  4744. struct pci_dev *pdev = to_pci_dev(host_set->dev);
  4745. pci_iounmap(pdev, host_set->mmio_base);
  4746. }
  4747. /**
  4748. * ata_pci_remove_one - PCI layer callback for device removal
  4749. * @pdev: PCI device that was removed
  4750. *
  4751. * PCI layer indicates to libata via this hook that
  4752. * hot-unplug or module unload event has occurred.
  4753. * Handle this by unregistering all objects associated
  4754. * with this PCI device. Free those objects. Then finally
  4755. * release PCI resources and disable device.
  4756. *
  4757. * LOCKING:
  4758. * Inherited from PCI layer (may sleep).
  4759. */
  4760. void ata_pci_remove_one (struct pci_dev *pdev)
  4761. {
  4762. struct device *dev = pci_dev_to_dev(pdev);
  4763. struct ata_host_set *host_set = dev_get_drvdata(dev);
  4764. ata_host_set_remove(host_set);
  4765. pci_release_regions(pdev);
  4766. pci_disable_device(pdev);
  4767. dev_set_drvdata(dev, NULL);
  4768. }
  4769. /* move to PCI subsystem */
  4770. int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
  4771. {
  4772. unsigned long tmp = 0;
  4773. switch (bits->width) {
  4774. case 1: {
  4775. u8 tmp8 = 0;
  4776. pci_read_config_byte(pdev, bits->reg, &tmp8);
  4777. tmp = tmp8;
  4778. break;
  4779. }
  4780. case 2: {
  4781. u16 tmp16 = 0;
  4782. pci_read_config_word(pdev, bits->reg, &tmp16);
  4783. tmp = tmp16;
  4784. break;
  4785. }
  4786. case 4: {
  4787. u32 tmp32 = 0;
  4788. pci_read_config_dword(pdev, bits->reg, &tmp32);
  4789. tmp = tmp32;
  4790. break;
  4791. }
  4792. default:
  4793. return -EINVAL;
  4794. }
  4795. tmp &= bits->mask;
  4796. return (tmp == bits->val) ? 1 : 0;
  4797. }
  4798. int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
  4799. {
  4800. pci_save_state(pdev);
  4801. pci_disable_device(pdev);
  4802. pci_set_power_state(pdev, PCI_D3hot);
  4803. return 0;
  4804. }
  4805. int ata_pci_device_resume(struct pci_dev *pdev)
  4806. {
  4807. pci_set_power_state(pdev, PCI_D0);
  4808. pci_restore_state(pdev);
  4809. pci_enable_device(pdev);
  4810. pci_set_master(pdev);
  4811. return 0;
  4812. }
  4813. #endif /* CONFIG_PCI */
  4814. static int __init ata_init(void)
  4815. {
  4816. ata_wq = create_workqueue("ata");
  4817. if (!ata_wq)
  4818. return -ENOMEM;
  4819. ata_aux_wq = create_singlethread_workqueue("ata_aux");
  4820. if (!ata_aux_wq) {
  4821. destroy_workqueue(ata_wq);
  4822. return -ENOMEM;
  4823. }
  4824. printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
  4825. return 0;
  4826. }
  4827. static void __exit ata_exit(void)
  4828. {
  4829. destroy_workqueue(ata_wq);
  4830. destroy_workqueue(ata_aux_wq);
  4831. }
  4832. module_init(ata_init);
  4833. module_exit(ata_exit);
  4834. static unsigned long ratelimit_time;
  4835. static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
  4836. int ata_ratelimit(void)
  4837. {
  4838. int rc;
  4839. unsigned long flags;
  4840. spin_lock_irqsave(&ata_ratelimit_lock, flags);
  4841. if (time_after(jiffies, ratelimit_time)) {
  4842. rc = 1;
  4843. ratelimit_time = jiffies + (HZ/5);
  4844. } else
  4845. rc = 0;
  4846. spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
  4847. return rc;
  4848. }
  4849. /**
  4850. * ata_wait_register - wait until register value changes
  4851. * @reg: IO-mapped register
  4852. * @mask: Mask to apply to read register value
  4853. * @val: Wait condition
  4854. * @interval_msec: polling interval in milliseconds
  4855. * @timeout_msec: timeout in milliseconds
  4856. *
  4857. * Waiting for some bits of register to change is a common
  4858. * operation for ATA controllers. This function reads 32bit LE
  4859. * IO-mapped register @reg and tests for the following condition.
  4860. *
  4861. * (*@reg & mask) != val
  4862. *
  4863. * If the condition is met, it returns; otherwise, the process is
  4864. * repeated after @interval_msec until timeout.
  4865. *
  4866. * LOCKING:
  4867. * Kernel thread context (may sleep)
  4868. *
  4869. * RETURNS:
  4870. * The final register value.
  4871. */
  4872. u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
  4873. unsigned long interval_msec,
  4874. unsigned long timeout_msec)
  4875. {
  4876. unsigned long timeout;
  4877. u32 tmp;
  4878. tmp = ioread32(reg);
  4879. /* Calculate timeout _after_ the first read to make sure
  4880. * preceding writes reach the controller before starting to
  4881. * eat away the timeout.
  4882. */
  4883. timeout = jiffies + (timeout_msec * HZ) / 1000;
  4884. while ((tmp & mask) == val && time_before(jiffies, timeout)) {
  4885. msleep(interval_msec);
  4886. tmp = ioread32(reg);
  4887. }
  4888. return tmp;
  4889. }
  4890. /*
  4891. * libata is essentially a library of internal helper functions for
  4892. * low-level ATA host controller drivers. As such, the API/ABI is
  4893. * likely to change as new drivers are added and updated.
  4894. * Do not depend on ABI/API stability.
  4895. */
  4896. EXPORT_SYMBOL_GPL(sata_deb_timing_boot);
  4897. EXPORT_SYMBOL_GPL(sata_deb_timing_eh);
  4898. EXPORT_SYMBOL_GPL(sata_deb_timing_before_fsrst);
  4899. EXPORT_SYMBOL_GPL(ata_std_bios_param);
  4900. EXPORT_SYMBOL_GPL(ata_std_ports);
  4901. EXPORT_SYMBOL_GPL(ata_device_add);
  4902. EXPORT_SYMBOL_GPL(ata_port_detach);
  4903. EXPORT_SYMBOL_GPL(ata_host_set_remove);
  4904. EXPORT_SYMBOL_GPL(ata_sg_init);
  4905. EXPORT_SYMBOL_GPL(ata_sg_init_one);
  4906. EXPORT_SYMBOL_GPL(ata_hsm_move);
  4907. EXPORT_SYMBOL_GPL(ata_qc_complete);
  4908. EXPORT_SYMBOL_GPL(ata_qc_complete_multiple);
  4909. EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
  4910. EXPORT_SYMBOL_GPL(ata_tf_load);
  4911. EXPORT_SYMBOL_GPL(ata_tf_read);
  4912. EXPORT_SYMBOL_GPL(ata_noop_dev_select);
  4913. EXPORT_SYMBOL_GPL(ata_std_dev_select);
  4914. EXPORT_SYMBOL_GPL(ata_tf_to_fis);
  4915. EXPORT_SYMBOL_GPL(ata_tf_from_fis);
  4916. EXPORT_SYMBOL_GPL(ata_check_status);
  4917. EXPORT_SYMBOL_GPL(ata_altstatus);
  4918. EXPORT_SYMBOL_GPL(ata_exec_command);
  4919. EXPORT_SYMBOL_GPL(ata_port_start);
  4920. EXPORT_SYMBOL_GPL(ata_port_stop);
  4921. EXPORT_SYMBOL_GPL(ata_host_stop);
  4922. EXPORT_SYMBOL_GPL(ata_interrupt);
  4923. EXPORT_SYMBOL_GPL(ata_mmio_data_xfer);
  4924. EXPORT_SYMBOL_GPL(ata_pio_data_xfer);
  4925. EXPORT_SYMBOL_GPL(ata_pio_data_xfer_noirq);
  4926. EXPORT_SYMBOL_GPL(ata_qc_prep);
  4927. EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
  4928. EXPORT_SYMBOL_GPL(ata_bmdma_setup);
  4929. EXPORT_SYMBOL_GPL(ata_bmdma_start);
  4930. EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
  4931. EXPORT_SYMBOL_GPL(ata_bmdma_status);
  4932. EXPORT_SYMBOL_GPL(ata_bmdma_stop);
  4933. EXPORT_SYMBOL_GPL(ata_bmdma_freeze);
  4934. EXPORT_SYMBOL_GPL(ata_bmdma_thaw);
  4935. EXPORT_SYMBOL_GPL(ata_bmdma_drive_eh);
  4936. EXPORT_SYMBOL_GPL(ata_bmdma_error_handler);
  4937. EXPORT_SYMBOL_GPL(ata_bmdma_post_internal_cmd);
  4938. EXPORT_SYMBOL_GPL(ata_port_probe);
  4939. EXPORT_SYMBOL_GPL(sata_set_spd);
  4940. EXPORT_SYMBOL_GPL(sata_phy_debounce);
  4941. EXPORT_SYMBOL_GPL(sata_phy_resume);
  4942. EXPORT_SYMBOL_GPL(sata_phy_reset);
  4943. EXPORT_SYMBOL_GPL(__sata_phy_reset);
  4944. EXPORT_SYMBOL_GPL(ata_bus_reset);
  4945. EXPORT_SYMBOL_GPL(ata_std_prereset);
  4946. EXPORT_SYMBOL_GPL(ata_std_softreset);
  4947. EXPORT_SYMBOL_GPL(sata_std_hardreset);
  4948. EXPORT_SYMBOL_GPL(ata_std_postreset);
  4949. EXPORT_SYMBOL_GPL(ata_dev_revalidate);
  4950. EXPORT_SYMBOL_GPL(ata_dev_classify);
  4951. EXPORT_SYMBOL_GPL(ata_dev_pair);
  4952. EXPORT_SYMBOL_GPL(ata_port_disable);
  4953. EXPORT_SYMBOL_GPL(ata_ratelimit);
  4954. EXPORT_SYMBOL_GPL(ata_wait_register);
  4955. EXPORT_SYMBOL_GPL(ata_busy_sleep);
  4956. EXPORT_SYMBOL_GPL(ata_port_queue_task);
  4957. EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
  4958. EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
  4959. EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
  4960. EXPORT_SYMBOL_GPL(ata_scsi_slave_destroy);
  4961. EXPORT_SYMBOL_GPL(ata_scsi_change_queue_depth);
  4962. EXPORT_SYMBOL_GPL(ata_scsi_release);
  4963. EXPORT_SYMBOL_GPL(ata_host_intr);
  4964. EXPORT_SYMBOL_GPL(sata_scr_valid);
  4965. EXPORT_SYMBOL_GPL(sata_scr_read);
  4966. EXPORT_SYMBOL_GPL(sata_scr_write);
  4967. EXPORT_SYMBOL_GPL(sata_scr_write_flush);
  4968. EXPORT_SYMBOL_GPL(ata_port_online);
  4969. EXPORT_SYMBOL_GPL(ata_port_offline);
  4970. EXPORT_SYMBOL_GPL(ata_id_string);
  4971. EXPORT_SYMBOL_GPL(ata_id_c_string);
  4972. EXPORT_SYMBOL_GPL(ata_scsi_simulate);
  4973. EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
  4974. EXPORT_SYMBOL_GPL(ata_timing_compute);
  4975. EXPORT_SYMBOL_GPL(ata_timing_merge);
  4976. #ifdef CONFIG_PCI
  4977. EXPORT_SYMBOL_GPL(pci_test_config_bits);
  4978. EXPORT_SYMBOL_GPL(ata_pci_host_stop);
  4979. EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
  4980. EXPORT_SYMBOL_GPL(ata_pci_init_one);
  4981. EXPORT_SYMBOL_GPL(ata_pci_remove_one);
  4982. EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
  4983. EXPORT_SYMBOL_GPL(ata_pci_device_resume);
  4984. EXPORT_SYMBOL_GPL(ata_pci_default_filter);
  4985. EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
  4986. #endif /* CONFIG_PCI */
  4987. EXPORT_SYMBOL_GPL(ata_device_suspend);
  4988. EXPORT_SYMBOL_GPL(ata_device_resume);
  4989. EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
  4990. EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
  4991. EXPORT_SYMBOL_GPL(ata_eng_timeout);
  4992. EXPORT_SYMBOL_GPL(ata_port_schedule_eh);
  4993. EXPORT_SYMBOL_GPL(ata_port_abort);
  4994. EXPORT_SYMBOL_GPL(ata_port_freeze);
  4995. EXPORT_SYMBOL_GPL(ata_eh_freeze_port);
  4996. EXPORT_SYMBOL_GPL(ata_eh_thaw_port);
  4997. EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
  4998. EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
  4999. EXPORT_SYMBOL_GPL(ata_do_eh);