config.c 1.9 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/5206/config.c
  4. *
  5. * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com)
  6. * Copyright (C) 2000-2001, Lineo Inc. (www.lineo.com)
  7. */
  8. /***************************************************************************/
  9. #include <linux/kernel.h>
  10. #include <linux/param.h>
  11. #include <linux/init.h>
  12. #include <linux/io.h>
  13. #include <asm/machdep.h>
  14. #include <asm/coldfire.h>
  15. #include <asm/mcfsim.h>
  16. /***************************************************************************/
  17. static void __init m5206_timers_init(void)
  18. {
  19. /* Timer1 is always used as system timer */
  20. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI3,
  21. MCF_MBAR + MCFSIM_TIMER1ICR);
  22. mcf_mapirq2imr(MCF_IRQ_TIMER, MCFINTC_TIMER1);
  23. #ifdef CONFIG_HIGHPROFILE
  24. /* Timer2 is to be used as a high speed profile timer */
  25. writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3,
  26. MCF_MBAR + MCFSIM_TIMER2ICR);
  27. mcf_mapirq2imr(MCF_IRQ_PROFILER, MCFINTC_TIMER2);
  28. #endif
  29. }
  30. /***************************************************************************/
  31. void m5206_cpu_reset(void)
  32. {
  33. local_irq_disable();
  34. /* Set watchdog to soft reset, and enabled */
  35. __raw_writeb(0xc0, MCF_MBAR + MCFSIM_SYPCR);
  36. for (;;)
  37. /* wait for watchdog to timeout */;
  38. }
  39. /***************************************************************************/
  40. void __init config_BSP(char *commandp, int size)
  41. {
  42. #if defined(CONFIG_NETtel)
  43. /* Copy command line from FLASH to local buffer... */
  44. memcpy(commandp, (char *) 0xf0004000, size);
  45. commandp[size-1] = 0;
  46. #endif /* CONFIG_NETtel */
  47. mach_reset = m5206_cpu_reset;
  48. mach_sched_init = hw_timer_init;
  49. m5206_timers_init();
  50. /* Only support the external interrupts on their primary level */
  51. mcf_mapirq2imr(25, MCFINTC_EINT1);
  52. mcf_mapirq2imr(28, MCFINTC_EINT4);
  53. mcf_mapirq2imr(31, MCFINTC_EINT7);
  54. }
  55. /***************************************************************************/