omap2.dtsi 3.4 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176
  1. /*
  2. * Device Tree Source for OMAP2 SoC
  3. *
  4. * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
  5. *
  6. * This file is licensed under the terms of the GNU General Public License
  7. * version 2. This program is licensed "as is" without any warranty of any
  8. * kind, whether express or implied.
  9. */
  10. /include/ "skeleton.dtsi"
  11. / {
  12. compatible = "ti,omap2430", "ti,omap2420", "ti,omap2";
  13. interrupt-parent = <&intc>;
  14. aliases {
  15. serial0 = &uart1;
  16. serial1 = &uart2;
  17. serial2 = &uart3;
  18. };
  19. cpus {
  20. #address-cells = <0>;
  21. #size-cells = <0>;
  22. cpu {
  23. compatible = "arm,arm1136jf-s";
  24. device_type = "cpu";
  25. };
  26. };
  27. pmu {
  28. compatible = "arm,arm1136-pmu";
  29. interrupts = <3>;
  30. };
  31. soc {
  32. compatible = "ti,omap-infra";
  33. mpu {
  34. compatible = "ti,omap2-mpu";
  35. ti,hwmods = "mpu";
  36. };
  37. };
  38. ocp {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. ti,hwmods = "l3_main";
  44. intc: interrupt-controller@1 {
  45. compatible = "ti,omap2-intc";
  46. interrupt-controller;
  47. #interrupt-cells = <1>;
  48. ti,intc-size = <96>;
  49. reg = <0x480FE000 0x1000>;
  50. };
  51. sdma: dma-controller@48056000 {
  52. compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
  53. reg = <0x48056000 0x1000>;
  54. interrupts = <12>,
  55. <13>,
  56. <14>,
  57. <15>;
  58. #dma-cells = <1>;
  59. #dma-channels = <32>;
  60. #dma-requests = <64>;
  61. };
  62. uart1: serial@4806a000 {
  63. compatible = "ti,omap2-uart";
  64. ti,hwmods = "uart1";
  65. clock-frequency = <48000000>;
  66. };
  67. uart2: serial@4806c000 {
  68. compatible = "ti,omap2-uart";
  69. ti,hwmods = "uart2";
  70. clock-frequency = <48000000>;
  71. };
  72. uart3: serial@4806e000 {
  73. compatible = "ti,omap2-uart";
  74. ti,hwmods = "uart3";
  75. clock-frequency = <48000000>;
  76. };
  77. timer2: timer@4802a000 {
  78. compatible = "ti,omap2420-timer";
  79. reg = <0x4802a000 0x400>;
  80. interrupts = <38>;
  81. ti,hwmods = "timer2";
  82. };
  83. timer3: timer@48078000 {
  84. compatible = "ti,omap2420-timer";
  85. reg = <0x48078000 0x400>;
  86. interrupts = <39>;
  87. ti,hwmods = "timer3";
  88. };
  89. timer4: timer@4807a000 {
  90. compatible = "ti,omap2420-timer";
  91. reg = <0x4807a000 0x400>;
  92. interrupts = <40>;
  93. ti,hwmods = "timer4";
  94. };
  95. timer5: timer@4807c000 {
  96. compatible = "ti,omap2420-timer";
  97. reg = <0x4807c000 0x400>;
  98. interrupts = <41>;
  99. ti,hwmods = "timer5";
  100. ti,timer-dsp;
  101. };
  102. timer6: timer@4807e000 {
  103. compatible = "ti,omap2420-timer";
  104. reg = <0x4807e000 0x400>;
  105. interrupts = <42>;
  106. ti,hwmods = "timer6";
  107. ti,timer-dsp;
  108. };
  109. timer7: timer@48080000 {
  110. compatible = "ti,omap2420-timer";
  111. reg = <0x48080000 0x400>;
  112. interrupts = <43>;
  113. ti,hwmods = "timer7";
  114. ti,timer-dsp;
  115. };
  116. timer8: timer@48082000 {
  117. compatible = "ti,omap2420-timer";
  118. reg = <0x48082000 0x400>;
  119. interrupts = <44>;
  120. ti,hwmods = "timer8";
  121. ti,timer-dsp;
  122. };
  123. timer9: timer@48084000 {
  124. compatible = "ti,omap2420-timer";
  125. reg = <0x48084000 0x400>;
  126. interrupts = <45>;
  127. ti,hwmods = "timer9";
  128. ti,timer-pwm;
  129. };
  130. timer10: timer@48086000 {
  131. compatible = "ti,omap2420-timer";
  132. reg = <0x48086000 0x400>;
  133. interrupts = <46>;
  134. ti,hwmods = "timer10";
  135. ti,timer-pwm;
  136. };
  137. timer11: timer@48088000 {
  138. compatible = "ti,omap2420-timer";
  139. reg = <0x48088000 0x400>;
  140. interrupts = <47>;
  141. ti,hwmods = "timer11";
  142. ti,timer-pwm;
  143. };
  144. timer12: timer@4808a000 {
  145. compatible = "ti,omap2420-timer";
  146. reg = <0x4808a000 0x400>;
  147. interrupts = <48>;
  148. ti,hwmods = "timer12";
  149. ti,timer-pwm;
  150. };
  151. };
  152. };