armada-370-xp.dtsi 5.2 KB

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  1. /*
  2. * Device Tree Include file for Marvell Armada 370 and Armada XP SoC
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Lior Amsalem <alior@marvell.com>
  7. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  8. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  9. * Ben Dooks <ben.dooks@codethink.co.uk>
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without any
  13. * warranty of any kind, whether express or implied.
  14. *
  15. * This file contains the definitions that are common to the Armada
  16. * 370 and Armada XP SoC.
  17. */
  18. /include/ "skeleton64.dtsi"
  19. / {
  20. model = "Marvell Armada 370 and XP SoC";
  21. compatible = "marvell,armada-370-xp";
  22. cpus {
  23. #address-cells = <1>;
  24. #size-cells = <0>;
  25. cpu@0 {
  26. compatible = "marvell,sheeva-v7";
  27. device_type = "cpu";
  28. reg = <0>;
  29. };
  30. };
  31. soc {
  32. #address-cells = <1>;
  33. #size-cells = <1>;
  34. compatible = "simple-bus";
  35. interrupt-parent = <&mpic>;
  36. ranges = <0 0 0xd0000000 0x0100000 /* internal registers */
  37. 0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;
  38. internal-regs {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. mpic: interrupt-controller@20000 {
  44. compatible = "marvell,mpic";
  45. #interrupt-cells = <1>;
  46. #size-cells = <1>;
  47. interrupt-controller;
  48. };
  49. coherency-fabric@20200 {
  50. compatible = "marvell,coherency-fabric";
  51. reg = <0x20200 0xb0>, <0x21810 0x1c>;
  52. };
  53. serial@12000 {
  54. compatible = "snps,dw-apb-uart";
  55. reg = <0x12000 0x100>;
  56. reg-shift = <2>;
  57. interrupts = <41>;
  58. reg-io-width = <1>;
  59. status = "disabled";
  60. };
  61. serial@12100 {
  62. compatible = "snps,dw-apb-uart";
  63. reg = <0x12100 0x100>;
  64. reg-shift = <2>;
  65. interrupts = <42>;
  66. reg-io-width = <1>;
  67. status = "disabled";
  68. };
  69. timer@20300 {
  70. compatible = "marvell,armada-370-xp-timer";
  71. reg = <0x20300 0x30>, <0x21040 0x30>;
  72. interrupts = <37>, <38>, <39>, <40>, <5>, <6>;
  73. clocks = <&coreclk 2>;
  74. };
  75. sata@a0000 {
  76. compatible = "marvell,orion-sata";
  77. reg = <0xa0000 0x2400>;
  78. interrupts = <55>;
  79. clocks = <&gateclk 15>, <&gateclk 30>;
  80. clock-names = "0", "1";
  81. status = "disabled";
  82. };
  83. mdio {
  84. #address-cells = <1>;
  85. #size-cells = <0>;
  86. compatible = "marvell,orion-mdio";
  87. reg = <0x72004 0x4>;
  88. };
  89. ethernet@70000 {
  90. compatible = "marvell,armada-370-neta";
  91. reg = <0x70000 0x2500>;
  92. interrupts = <8>;
  93. clocks = <&gateclk 4>;
  94. status = "disabled";
  95. };
  96. ethernet@74000 {
  97. compatible = "marvell,armada-370-neta";
  98. reg = <0x74000 0x2500>;
  99. interrupts = <10>;
  100. clocks = <&gateclk 3>;
  101. status = "disabled";
  102. };
  103. i2c0: i2c@11000 {
  104. compatible = "marvell,mv64xxx-i2c";
  105. reg = <0x11000 0x20>;
  106. #address-cells = <1>;
  107. #size-cells = <0>;
  108. interrupts = <31>;
  109. timeout-ms = <1000>;
  110. clocks = <&coreclk 0>;
  111. status = "disabled";
  112. };
  113. i2c1: i2c@11100 {
  114. compatible = "marvell,mv64xxx-i2c";
  115. reg = <0x11100 0x20>;
  116. #address-cells = <1>;
  117. #size-cells = <0>;
  118. interrupts = <32>;
  119. timeout-ms = <1000>;
  120. clocks = <&coreclk 0>;
  121. status = "disabled";
  122. };
  123. rtc@10300 {
  124. compatible = "marvell,orion-rtc";
  125. reg = <0x10300 0x20>;
  126. interrupts = <50>;
  127. };
  128. mvsdio@d4000 {
  129. compatible = "marvell,orion-sdio";
  130. reg = <0xd4000 0x200>;
  131. interrupts = <54>;
  132. clocks = <&gateclk 17>;
  133. bus-width = <4>;
  134. cap-sdio-irq;
  135. cap-sd-highspeed;
  136. cap-mmc-highspeed;
  137. status = "disabled";
  138. };
  139. usb@50000 {
  140. compatible = "marvell,orion-ehci";
  141. reg = <0x50000 0x500>;
  142. interrupts = <45>;
  143. status = "disabled";
  144. };
  145. usb@51000 {
  146. compatible = "marvell,orion-ehci";
  147. reg = <0x51000 0x500>;
  148. interrupts = <46>;
  149. status = "disabled";
  150. };
  151. spi0: spi@10600 {
  152. compatible = "marvell,orion-spi";
  153. reg = <0x10600 0x28>;
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. cell-index = <0>;
  157. interrupts = <30>;
  158. clocks = <&coreclk 0>;
  159. status = "disabled";
  160. };
  161. spi1: spi@10680 {
  162. compatible = "marvell,orion-spi";
  163. reg = <0x10680 0x28>;
  164. #address-cells = <1>;
  165. #size-cells = <0>;
  166. cell-index = <1>;
  167. interrupts = <92>;
  168. clocks = <&coreclk 0>;
  169. status = "disabled";
  170. };
  171. devbus-bootcs@10400 {
  172. compatible = "marvell,mvebu-devbus";
  173. reg = <0x10400 0x8>;
  174. #address-cells = <1>;
  175. #size-cells = <1>;
  176. clocks = <&coreclk 0>;
  177. status = "disabled";
  178. };
  179. devbus-cs0@10408 {
  180. compatible = "marvell,mvebu-devbus";
  181. reg = <0x10408 0x8>;
  182. #address-cells = <1>;
  183. #size-cells = <1>;
  184. clocks = <&coreclk 0>;
  185. status = "disabled";
  186. };
  187. devbus-cs1@10410 {
  188. compatible = "marvell,mvebu-devbus";
  189. reg = <0x10410 0x8>;
  190. #address-cells = <1>;
  191. #size-cells = <1>;
  192. clocks = <&coreclk 0>;
  193. status = "disabled";
  194. };
  195. devbus-cs2@10418 {
  196. compatible = "marvell,mvebu-devbus";
  197. reg = <0x10418 0x8>;
  198. #address-cells = <1>;
  199. #size-cells = <1>;
  200. clocks = <&coreclk 0>;
  201. status = "disabled";
  202. };
  203. devbus-cs3@10420 {
  204. compatible = "marvell,mvebu-devbus";
  205. reg = <0x10420 0x8>;
  206. #address-cells = <1>;
  207. #size-cells = <1>;
  208. clocks = <&coreclk 0>;
  209. status = "disabled";
  210. };
  211. };
  212. };
  213. };