common.c 10 KB

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  1. /*
  2. * arch/arm/mach-orion5x/common.c
  3. *
  4. * Core functions for Marvell Orion 5x SoCs
  5. *
  6. * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/init.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/serial_8250.h>
  16. #include <linux/mbus.h>
  17. #include <linux/mv643xx_eth.h>
  18. #include <linux/mv643xx_i2c.h>
  19. #include <linux/ata_platform.h>
  20. #include <asm/page.h>
  21. #include <asm/setup.h>
  22. #include <asm/timex.h>
  23. #include <asm/mach/arch.h>
  24. #include <asm/mach/map.h>
  25. #include <asm/mach/time.h>
  26. #include <asm/arch/hardware.h>
  27. #include <asm/arch/orion5x.h>
  28. #include <asm/plat-orion/ehci-orion.h>
  29. #include <asm/plat-orion/orion_nand.h>
  30. #include <asm/plat-orion/time.h>
  31. #include "common.h"
  32. /*****************************************************************************
  33. * I/O Address Mapping
  34. ****************************************************************************/
  35. static struct map_desc orion5x_io_desc[] __initdata = {
  36. {
  37. .virtual = ORION5X_REGS_VIRT_BASE,
  38. .pfn = __phys_to_pfn(ORION5X_REGS_PHYS_BASE),
  39. .length = ORION5X_REGS_SIZE,
  40. .type = MT_DEVICE
  41. },
  42. {
  43. .virtual = ORION5X_PCIE_IO_VIRT_BASE,
  44. .pfn = __phys_to_pfn(ORION5X_PCIE_IO_PHYS_BASE),
  45. .length = ORION5X_PCIE_IO_SIZE,
  46. .type = MT_DEVICE
  47. },
  48. {
  49. .virtual = ORION5X_PCI_IO_VIRT_BASE,
  50. .pfn = __phys_to_pfn(ORION5X_PCI_IO_PHYS_BASE),
  51. .length = ORION5X_PCI_IO_SIZE,
  52. .type = MT_DEVICE
  53. },
  54. {
  55. .virtual = ORION5X_PCIE_WA_VIRT_BASE,
  56. .pfn = __phys_to_pfn(ORION5X_PCIE_WA_PHYS_BASE),
  57. .length = ORION5X_PCIE_WA_SIZE,
  58. .type = MT_DEVICE
  59. },
  60. };
  61. void __init orion5x_map_io(void)
  62. {
  63. iotable_init(orion5x_io_desc, ARRAY_SIZE(orion5x_io_desc));
  64. }
  65. /*****************************************************************************
  66. * UART
  67. ****************************************************************************/
  68. static struct resource orion5x_uart_resources[] = {
  69. {
  70. .start = UART0_PHYS_BASE,
  71. .end = UART0_PHYS_BASE + 0xff,
  72. .flags = IORESOURCE_MEM,
  73. },
  74. {
  75. .start = IRQ_ORION5X_UART0,
  76. .end = IRQ_ORION5X_UART0,
  77. .flags = IORESOURCE_IRQ,
  78. },
  79. {
  80. .start = UART1_PHYS_BASE,
  81. .end = UART1_PHYS_BASE + 0xff,
  82. .flags = IORESOURCE_MEM,
  83. },
  84. {
  85. .start = IRQ_ORION5X_UART1,
  86. .end = IRQ_ORION5X_UART1,
  87. .flags = IORESOURCE_IRQ,
  88. },
  89. };
  90. static struct plat_serial8250_port orion5x_uart_data[] = {
  91. {
  92. .mapbase = UART0_PHYS_BASE,
  93. .membase = (char *)UART0_VIRT_BASE,
  94. .irq = IRQ_ORION5X_UART0,
  95. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  96. .iotype = UPIO_MEM,
  97. .regshift = 2,
  98. .uartclk = ORION5X_TCLK,
  99. },
  100. {
  101. .mapbase = UART1_PHYS_BASE,
  102. .membase = (char *)UART1_VIRT_BASE,
  103. .irq = IRQ_ORION5X_UART1,
  104. .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
  105. .iotype = UPIO_MEM,
  106. .regshift = 2,
  107. .uartclk = ORION5X_TCLK,
  108. },
  109. { },
  110. };
  111. static struct platform_device orion5x_uart = {
  112. .name = "serial8250",
  113. .id = PLAT8250_DEV_PLATFORM,
  114. .dev = {
  115. .platform_data = orion5x_uart_data,
  116. },
  117. .resource = orion5x_uart_resources,
  118. .num_resources = ARRAY_SIZE(orion5x_uart_resources),
  119. };
  120. /*******************************************************************************
  121. * USB Controller - 2 interfaces
  122. ******************************************************************************/
  123. static struct resource orion5x_ehci0_resources[] = {
  124. {
  125. .start = ORION5X_USB0_PHYS_BASE,
  126. .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1,
  127. .flags = IORESOURCE_MEM,
  128. },
  129. {
  130. .start = IRQ_ORION5X_USB0_CTRL,
  131. .end = IRQ_ORION5X_USB0_CTRL,
  132. .flags = IORESOURCE_IRQ,
  133. },
  134. };
  135. static struct resource orion5x_ehci1_resources[] = {
  136. {
  137. .start = ORION5X_USB1_PHYS_BASE,
  138. .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1,
  139. .flags = IORESOURCE_MEM,
  140. },
  141. {
  142. .start = IRQ_ORION5X_USB1_CTRL,
  143. .end = IRQ_ORION5X_USB1_CTRL,
  144. .flags = IORESOURCE_IRQ,
  145. },
  146. };
  147. static struct orion_ehci_data orion5x_ehci_data = {
  148. .dram = &orion5x_mbus_dram_info,
  149. };
  150. static u64 ehci_dmamask = 0xffffffffUL;
  151. static struct platform_device orion5x_ehci0 = {
  152. .name = "orion-ehci",
  153. .id = 0,
  154. .dev = {
  155. .dma_mask = &ehci_dmamask,
  156. .coherent_dma_mask = 0xffffffff,
  157. .platform_data = &orion5x_ehci_data,
  158. },
  159. .resource = orion5x_ehci0_resources,
  160. .num_resources = ARRAY_SIZE(orion5x_ehci0_resources),
  161. };
  162. static struct platform_device orion5x_ehci1 = {
  163. .name = "orion-ehci",
  164. .id = 1,
  165. .dev = {
  166. .dma_mask = &ehci_dmamask,
  167. .coherent_dma_mask = 0xffffffff,
  168. .platform_data = &orion5x_ehci_data,
  169. },
  170. .resource = orion5x_ehci1_resources,
  171. .num_resources = ARRAY_SIZE(orion5x_ehci1_resources),
  172. };
  173. /*****************************************************************************
  174. * Gigabit Ethernet port
  175. * (The Orion and Discovery (MV643xx) families use the same Ethernet driver)
  176. ****************************************************************************/
  177. static struct resource orion5x_eth_shared_resources[] = {
  178. {
  179. .start = ORION5X_ETH_PHYS_BASE + 0x2000,
  180. .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
  181. .flags = IORESOURCE_MEM,
  182. },
  183. };
  184. static struct platform_device orion5x_eth_shared = {
  185. .name = MV643XX_ETH_SHARED_NAME,
  186. .id = 0,
  187. .num_resources = 1,
  188. .resource = orion5x_eth_shared_resources,
  189. };
  190. static struct resource orion5x_eth_resources[] = {
  191. {
  192. .name = "eth irq",
  193. .start = IRQ_ORION5X_ETH_SUM,
  194. .end = IRQ_ORION5X_ETH_SUM,
  195. .flags = IORESOURCE_IRQ,
  196. }
  197. };
  198. static struct platform_device orion5x_eth = {
  199. .name = MV643XX_ETH_NAME,
  200. .id = 0,
  201. .num_resources = 1,
  202. .resource = orion5x_eth_resources,
  203. };
  204. void __init orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data)
  205. {
  206. eth_data->shared = &orion5x_eth_shared;
  207. orion5x_eth.dev.platform_data = eth_data;
  208. platform_device_register(&orion5x_eth_shared);
  209. platform_device_register(&orion5x_eth);
  210. }
  211. /*****************************************************************************
  212. * I2C controller
  213. * (The Orion and Discovery (MV643xx) families share the same I2C controller)
  214. ****************************************************************************/
  215. static struct mv64xxx_i2c_pdata orion5x_i2c_pdata = {
  216. .freq_m = 8, /* assumes 166 MHz TCLK */
  217. .freq_n = 3,
  218. .timeout = 1000, /* Default timeout of 1 second */
  219. };
  220. static struct resource orion5x_i2c_resources[] = {
  221. {
  222. .name = "i2c base",
  223. .start = I2C_PHYS_BASE,
  224. .end = I2C_PHYS_BASE + 0x20 -1,
  225. .flags = IORESOURCE_MEM,
  226. },
  227. {
  228. .name = "i2c irq",
  229. .start = IRQ_ORION5X_I2C,
  230. .end = IRQ_ORION5X_I2C,
  231. .flags = IORESOURCE_IRQ,
  232. },
  233. };
  234. static struct platform_device orion5x_i2c = {
  235. .name = MV64XXX_I2C_CTLR_NAME,
  236. .id = 0,
  237. .num_resources = ARRAY_SIZE(orion5x_i2c_resources),
  238. .resource = orion5x_i2c_resources,
  239. .dev = {
  240. .platform_data = &orion5x_i2c_pdata,
  241. },
  242. };
  243. /*****************************************************************************
  244. * Sata port
  245. ****************************************************************************/
  246. static struct resource orion5x_sata_resources[] = {
  247. {
  248. .name = "sata base",
  249. .start = ORION5X_SATA_PHYS_BASE,
  250. .end = ORION5X_SATA_PHYS_BASE + 0x5000 - 1,
  251. .flags = IORESOURCE_MEM,
  252. },
  253. {
  254. .name = "sata irq",
  255. .start = IRQ_ORION5X_SATA,
  256. .end = IRQ_ORION5X_SATA,
  257. .flags = IORESOURCE_IRQ,
  258. },
  259. };
  260. static struct platform_device orion5x_sata = {
  261. .name = "sata_mv",
  262. .id = 0,
  263. .dev = {
  264. .coherent_dma_mask = 0xffffffff,
  265. },
  266. .num_resources = ARRAY_SIZE(orion5x_sata_resources),
  267. .resource = orion5x_sata_resources,
  268. };
  269. void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
  270. {
  271. sata_data->dram = &orion5x_mbus_dram_info;
  272. orion5x_sata.dev.platform_data = sata_data;
  273. platform_device_register(&orion5x_sata);
  274. }
  275. /*****************************************************************************
  276. * Time handling
  277. ****************************************************************************/
  278. static void orion5x_timer_init(void)
  279. {
  280. orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK);
  281. }
  282. struct sys_timer orion5x_timer = {
  283. .init = orion5x_timer_init,
  284. };
  285. /*****************************************************************************
  286. * General
  287. ****************************************************************************/
  288. /*
  289. * Identify device ID and rev from PCIe configuration header space '0'.
  290. */
  291. static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
  292. {
  293. orion5x_pcie_id(dev, rev);
  294. if (*dev == MV88F5281_DEV_ID) {
  295. if (*rev == MV88F5281_REV_D2) {
  296. *dev_name = "MV88F5281-D2";
  297. } else if (*rev == MV88F5281_REV_D1) {
  298. *dev_name = "MV88F5281-D1";
  299. } else {
  300. *dev_name = "MV88F5281-Rev-Unsupported";
  301. }
  302. } else if (*dev == MV88F5182_DEV_ID) {
  303. if (*rev == MV88F5182_REV_A2) {
  304. *dev_name = "MV88F5182-A2";
  305. } else {
  306. *dev_name = "MV88F5182-Rev-Unsupported";
  307. }
  308. } else if (*dev == MV88F5181_DEV_ID) {
  309. if (*rev == MV88F5181_REV_B1) {
  310. *dev_name = "MV88F5181-Rev-B1";
  311. } else {
  312. *dev_name = "MV88F5181-Rev-Unsupported";
  313. }
  314. } else {
  315. *dev_name = "Device-Unknown";
  316. }
  317. }
  318. void __init orion5x_init(void)
  319. {
  320. char *dev_name;
  321. u32 dev, rev;
  322. orion5x_id(&dev, &rev, &dev_name);
  323. printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK);
  324. /*
  325. * Setup Orion address map
  326. */
  327. orion5x_setup_cpu_mbus_bridge();
  328. orion5x_setup_eth_wins();
  329. /*
  330. * Register devices.
  331. */
  332. platform_device_register(&orion5x_uart);
  333. platform_device_register(&orion5x_ehci0);
  334. if (dev == MV88F5182_DEV_ID)
  335. platform_device_register(&orion5x_ehci1);
  336. platform_device_register(&orion5x_i2c);
  337. }
  338. /*
  339. * Many orion-based systems have buggy bootloader implementations.
  340. * This is a common fixup for bogus memory tags.
  341. */
  342. void __init tag_fixup_mem32(struct machine_desc *mdesc, struct tag *t,
  343. char **from, struct meminfo *meminfo)
  344. {
  345. for (; t->hdr.size; t = tag_next(t))
  346. if (t->hdr.tag == ATAG_MEM &&
  347. (!t->u.mem.size || t->u.mem.size & ~PAGE_MASK ||
  348. t->u.mem.start & ~PAGE_MASK)) {
  349. printk(KERN_WARNING
  350. "Clearing invalid memory bank %dKB@0x%08x\n",
  351. t->u.mem.size / 1024, t->u.mem.start);
  352. t->hdr.tag = 0;
  353. }
  354. }