dz.c 20 KB

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  1. /*
  2. * dz.c: Serial port driver for DECstations equipped
  3. * with the DZ chipset.
  4. *
  5. * Copyright (C) 1998 Olivier A. D. Lebaillif
  6. *
  7. * Email: olivier.lebaillif@ifrsys.com
  8. *
  9. * Copyright (C) 2004, 2006, 2007 Maciej W. Rozycki
  10. *
  11. * [31-AUG-98] triemer
  12. * Changed IRQ to use Harald's dec internals interrupts.h
  13. * removed base_addr code - moving address assignment to setup.c
  14. * Changed name of dz_init to rs_init to be consistent with tc code
  15. * [13-NOV-98] triemer fixed code to receive characters
  16. * after patches by harald to irq code.
  17. * [09-JAN-99] triemer minor fix for schedule - due to removal of timeout
  18. * field from "current" - somewhere between 2.1.121 and 2.1.131
  19. Qua Jun 27 15:02:26 BRT 2001
  20. * [27-JUN-2001] Arnaldo Carvalho de Melo <acme@conectiva.com.br> - cleanups
  21. *
  22. * Parts (C) 1999 David Airlie, airlied@linux.ie
  23. * [07-SEP-99] Bugfixes
  24. *
  25. * [06-Jan-2002] Russell King <rmk@arm.linux.org.uk>
  26. * Converted to new serial core
  27. */
  28. #undef DEBUG_DZ
  29. #if defined(CONFIG_SERIAL_DZ_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/bitops.h>
  33. #include <linux/compiler.h>
  34. #include <linux/console.h>
  35. #include <linux/delay.h>
  36. #include <linux/errno.h>
  37. #include <linux/init.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/kernel.h>
  40. #include <linux/major.h>
  41. #include <linux/module.h>
  42. #include <linux/serial.h>
  43. #include <linux/serial_core.h>
  44. #include <linux/sysrq.h>
  45. #include <linux/tty.h>
  46. #include <asm/bootinfo.h>
  47. #include <asm/system.h>
  48. #include <asm/dec/interrupts.h>
  49. #include <asm/dec/kn01.h>
  50. #include <asm/dec/kn02.h>
  51. #include <asm/dec/machtype.h>
  52. #include <asm/dec/prom.h>
  53. #include "dz.h"
  54. static char *dz_name = "DECstation DZ serial driver version ";
  55. static char *dz_version = "1.03";
  56. struct dz_port {
  57. struct uart_port port;
  58. unsigned int cflag;
  59. };
  60. static struct dz_port dz_ports[DZ_NB_PORT];
  61. /*
  62. * ------------------------------------------------------------
  63. * dz_in () and dz_out ()
  64. *
  65. * These routines are used to access the registers of the DZ
  66. * chip, hiding relocation differences between implementation.
  67. * ------------------------------------------------------------
  68. */
  69. static inline unsigned short dz_in(struct dz_port *dport, unsigned offset)
  70. {
  71. volatile unsigned short *addr =
  72. (volatile unsigned short *) (dport->port.membase + offset);
  73. return *addr;
  74. }
  75. static inline void dz_out(struct dz_port *dport, unsigned offset,
  76. unsigned short value)
  77. {
  78. volatile unsigned short *addr =
  79. (volatile unsigned short *) (dport->port.membase + offset);
  80. *addr = value;
  81. }
  82. /*
  83. * ------------------------------------------------------------
  84. * rs_stop () and rs_start ()
  85. *
  86. * These routines are called before setting or resetting
  87. * tty->stopped. They enable or disable transmitter interrupts,
  88. * as necessary.
  89. * ------------------------------------------------------------
  90. */
  91. static void dz_stop_tx(struct uart_port *uport)
  92. {
  93. struct dz_port *dport = (struct dz_port *)uport;
  94. unsigned short tmp, mask = 1 << dport->port.line;
  95. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  96. tmp &= ~mask; /* clear the TX flag */
  97. dz_out(dport, DZ_TCR, tmp);
  98. }
  99. static void dz_start_tx(struct uart_port *uport)
  100. {
  101. struct dz_port *dport = (struct dz_port *)uport;
  102. unsigned short tmp, mask = 1 << dport->port.line;
  103. tmp = dz_in(dport, DZ_TCR); /* read the TX flag */
  104. tmp |= mask; /* set the TX flag */
  105. dz_out(dport, DZ_TCR, tmp);
  106. }
  107. static void dz_stop_rx(struct uart_port *uport)
  108. {
  109. struct dz_port *dport = (struct dz_port *)uport;
  110. dport->cflag &= ~DZ_CREAD;
  111. dz_out(dport, DZ_LPR, dport->cflag | dport->port.line);
  112. }
  113. static void dz_enable_ms(struct uart_port *port)
  114. {
  115. /* nothing to do */
  116. }
  117. /*
  118. * ------------------------------------------------------------
  119. *
  120. * Here start the interrupt handling routines. All of the following
  121. * subroutines are declared as inline and are folded into
  122. * dz_interrupt. They were separated out for readability's sake.
  123. *
  124. * Note: dz_interrupt() is a "fast" interrupt, which means that it
  125. * runs with interrupts turned off. People who may want to modify
  126. * dz_interrupt() should try to keep the interrupt handler as fast as
  127. * possible. After you are done making modifications, it is not a bad
  128. * idea to do:
  129. *
  130. * make drivers/serial/dz.s
  131. *
  132. * and look at the resulting assemble code in dz.s.
  133. *
  134. * ------------------------------------------------------------
  135. */
  136. /*
  137. * ------------------------------------------------------------
  138. * receive_char ()
  139. *
  140. * This routine deals with inputs from any lines.
  141. * ------------------------------------------------------------
  142. */
  143. static inline void dz_receive_chars(struct dz_port *dport_in)
  144. {
  145. struct uart_port *uport;
  146. struct dz_port *dport;
  147. struct tty_struct *tty = NULL;
  148. struct uart_icount *icount;
  149. int lines_rx[DZ_NB_PORT] = { [0 ... DZ_NB_PORT - 1] = 0 };
  150. unsigned short status;
  151. unsigned char ch, flag;
  152. int i;
  153. while ((status = dz_in(dport_in, DZ_RBUF)) & DZ_DVAL) {
  154. dport = &dz_ports[LINE(status)];
  155. uport = &dport->port;
  156. tty = uport->info->tty; /* point to the proper dev */
  157. ch = UCHAR(status); /* grab the char */
  158. flag = TTY_NORMAL;
  159. icount = &uport->icount;
  160. icount->rx++;
  161. if (unlikely(status & (DZ_OERR | DZ_FERR | DZ_PERR))) {
  162. /*
  163. * There is no separate BREAK status bit, so treat
  164. * null characters with framing errors as BREAKs;
  165. * normally, otherwise. For this move the Framing
  166. * Error bit to a simulated BREAK bit.
  167. */
  168. if (!ch) {
  169. status |= (status & DZ_FERR) >>
  170. (ffs(DZ_FERR) - ffs(DZ_BREAK));
  171. status &= ~DZ_FERR;
  172. }
  173. /* Handle SysRq/SAK & keep track of the statistics. */
  174. if (status & DZ_BREAK) {
  175. icount->brk++;
  176. if (uart_handle_break(uport))
  177. continue;
  178. } else if (status & DZ_FERR)
  179. icount->frame++;
  180. else if (status & DZ_PERR)
  181. icount->parity++;
  182. if (status & DZ_OERR)
  183. icount->overrun++;
  184. status &= uport->read_status_mask;
  185. if (status & DZ_BREAK)
  186. flag = TTY_BREAK;
  187. else if (status & DZ_FERR)
  188. flag = TTY_FRAME;
  189. else if (status & DZ_PERR)
  190. flag = TTY_PARITY;
  191. }
  192. if (uart_handle_sysrq_char(uport, ch))
  193. continue;
  194. uart_insert_char(uport, status, DZ_OERR, ch, flag);
  195. lines_rx[LINE(status)] = 1;
  196. }
  197. for (i = 0; i < DZ_NB_PORT; i++)
  198. if (lines_rx[i])
  199. tty_flip_buffer_push(dz_ports[i].port.info->tty);
  200. }
  201. /*
  202. * ------------------------------------------------------------
  203. * transmit_char ()
  204. *
  205. * This routine deals with outputs to any lines.
  206. * ------------------------------------------------------------
  207. */
  208. static inline void dz_transmit_chars(struct dz_port *dport_in)
  209. {
  210. struct dz_port *dport;
  211. struct circ_buf *xmit;
  212. unsigned short status;
  213. unsigned char tmp;
  214. status = dz_in(dport_in, DZ_CSR);
  215. dport = &dz_ports[LINE(status)];
  216. xmit = &dport->port.info->xmit;
  217. if (dport->port.x_char) { /* XON/XOFF chars */
  218. dz_out(dport, DZ_TDR, dport->port.x_char);
  219. dport->port.icount.tx++;
  220. dport->port.x_char = 0;
  221. return;
  222. }
  223. /* If nothing to do or stopped or hardware stopped. */
  224. if (uart_circ_empty(xmit) || uart_tx_stopped(&dport->port)) {
  225. spin_lock(&dport->port.lock);
  226. dz_stop_tx(&dport->port);
  227. spin_unlock(&dport->port.lock);
  228. return;
  229. }
  230. /*
  231. * If something to do... (remember the dz has no output fifo,
  232. * so we go one char at a time) :-<
  233. */
  234. tmp = xmit->buf[xmit->tail];
  235. xmit->tail = (xmit->tail + 1) & (DZ_XMIT_SIZE - 1);
  236. dz_out(dport, DZ_TDR, tmp);
  237. dport->port.icount.tx++;
  238. if (uart_circ_chars_pending(xmit) < DZ_WAKEUP_CHARS)
  239. uart_write_wakeup(&dport->port);
  240. /* Are we are done. */
  241. if (uart_circ_empty(xmit)) {
  242. spin_lock(&dport->port.lock);
  243. dz_stop_tx(&dport->port);
  244. spin_unlock(&dport->port.lock);
  245. }
  246. }
  247. /*
  248. * ------------------------------------------------------------
  249. * check_modem_status()
  250. *
  251. * DS 3100 & 5100: Only valid for the MODEM line, duh!
  252. * DS 5000/200: Valid for the MODEM and PRINTER line.
  253. * ------------------------------------------------------------
  254. */
  255. static inline void check_modem_status(struct dz_port *dport)
  256. {
  257. /*
  258. * FIXME:
  259. * 1. No status change interrupt; use a timer.
  260. * 2. Handle the 3100/5000 as appropriate. --macro
  261. */
  262. unsigned short status;
  263. /* If not the modem line just return. */
  264. if (dport->port.line != DZ_MODEM)
  265. return;
  266. status = dz_in(dport, DZ_MSR);
  267. /* it's easy, since DSR2 is the only bit in the register */
  268. if (status)
  269. dport->port.icount.dsr++;
  270. }
  271. /*
  272. * ------------------------------------------------------------
  273. * dz_interrupt ()
  274. *
  275. * this is the main interrupt routine for the DZ chip.
  276. * It deals with the multiple ports.
  277. * ------------------------------------------------------------
  278. */
  279. static irqreturn_t dz_interrupt(int irq, void *dev)
  280. {
  281. struct dz_port *dport = dev;
  282. unsigned short status;
  283. /* get the reason why we just got an irq */
  284. status = dz_in(dport, DZ_CSR);
  285. if ((status & (DZ_RDONE | DZ_RIE)) == (DZ_RDONE | DZ_RIE))
  286. dz_receive_chars(dport);
  287. if ((status & (DZ_TRDY | DZ_TIE)) == (DZ_TRDY | DZ_TIE))
  288. dz_transmit_chars(dport);
  289. return IRQ_HANDLED;
  290. }
  291. /*
  292. * -------------------------------------------------------------------
  293. * Here ends the DZ interrupt routines.
  294. * -------------------------------------------------------------------
  295. */
  296. static unsigned int dz_get_mctrl(struct uart_port *uport)
  297. {
  298. /*
  299. * FIXME: Handle the 3100/5000 as appropriate. --macro
  300. */
  301. struct dz_port *dport = (struct dz_port *)uport;
  302. unsigned int mctrl = TIOCM_CAR | TIOCM_DSR | TIOCM_CTS;
  303. if (dport->port.line == DZ_MODEM) {
  304. if (dz_in(dport, DZ_MSR) & DZ_MODEM_DSR)
  305. mctrl &= ~TIOCM_DSR;
  306. }
  307. return mctrl;
  308. }
  309. static void dz_set_mctrl(struct uart_port *uport, unsigned int mctrl)
  310. {
  311. /*
  312. * FIXME: Handle the 3100/5000 as appropriate. --macro
  313. */
  314. struct dz_port *dport = (struct dz_port *)uport;
  315. unsigned short tmp;
  316. if (dport->port.line == DZ_MODEM) {
  317. tmp = dz_in(dport, DZ_TCR);
  318. if (mctrl & TIOCM_DTR)
  319. tmp &= ~DZ_MODEM_DTR;
  320. else
  321. tmp |= DZ_MODEM_DTR;
  322. dz_out(dport, DZ_TCR, tmp);
  323. }
  324. }
  325. /*
  326. * -------------------------------------------------------------------
  327. * startup ()
  328. *
  329. * various initialization tasks
  330. * -------------------------------------------------------------------
  331. */
  332. static int dz_startup(struct uart_port *uport)
  333. {
  334. struct dz_port *dport = (struct dz_port *)uport;
  335. unsigned long flags;
  336. unsigned short tmp;
  337. spin_lock_irqsave(&dport->port.lock, flags);
  338. /* enable the interrupt and the scanning */
  339. tmp = dz_in(dport, DZ_CSR);
  340. tmp |= DZ_RIE | DZ_TIE | DZ_MSE;
  341. dz_out(dport, DZ_CSR, tmp);
  342. spin_unlock_irqrestore(&dport->port.lock, flags);
  343. return 0;
  344. }
  345. /*
  346. * -------------------------------------------------------------------
  347. * shutdown ()
  348. *
  349. * This routine will shutdown a serial port; interrupts are disabled, and
  350. * DTR is dropped if the hangup on close termio flag is on.
  351. * -------------------------------------------------------------------
  352. */
  353. static void dz_shutdown(struct uart_port *uport)
  354. {
  355. struct dz_port *dport = (struct dz_port *)uport;
  356. unsigned long flags;
  357. spin_lock_irqsave(&dport->port.lock, flags);
  358. dz_stop_tx(&dport->port);
  359. spin_unlock_irqrestore(&dport->port.lock, flags);
  360. }
  361. /*
  362. * -------------------------------------------------------------------
  363. * dz_tx_empty() -- get the transmitter empty status
  364. *
  365. * Purpose: Let user call ioctl() to get info when the UART physically
  366. * is emptied. On bus types like RS485, the transmitter must
  367. * release the bus after transmitting. This must be done when
  368. * the transmit shift register is empty, not be done when the
  369. * transmit holding register is empty. This functionality
  370. * allows an RS485 driver to be written in user space.
  371. * -------------------------------------------------------------------
  372. */
  373. static unsigned int dz_tx_empty(struct uart_port *uport)
  374. {
  375. struct dz_port *dport = (struct dz_port *)uport;
  376. unsigned short tmp, mask = 1 << dport->port.line;
  377. tmp = dz_in(dport, DZ_TCR);
  378. tmp &= mask;
  379. return tmp ? 0 : TIOCSER_TEMT;
  380. }
  381. static void dz_break_ctl(struct uart_port *uport, int break_state)
  382. {
  383. /*
  384. * FIXME: Can't access BREAK bits in TDR easily;
  385. * reuse the code for polled TX. --macro
  386. */
  387. struct dz_port *dport = (struct dz_port *)uport;
  388. unsigned long flags;
  389. unsigned short tmp, mask = 1 << dport->port.line;
  390. spin_lock_irqsave(&uport->lock, flags);
  391. tmp = dz_in(dport, DZ_TCR);
  392. if (break_state)
  393. tmp |= mask;
  394. else
  395. tmp &= ~mask;
  396. dz_out(dport, DZ_TCR, tmp);
  397. spin_unlock_irqrestore(&uport->lock, flags);
  398. }
  399. static void dz_set_termios(struct uart_port *uport, struct ktermios *termios,
  400. struct ktermios *old_termios)
  401. {
  402. struct dz_port *dport = (struct dz_port *)uport;
  403. unsigned long flags;
  404. unsigned int cflag, baud;
  405. cflag = dport->port.line;
  406. switch (termios->c_cflag & CSIZE) {
  407. case CS5:
  408. cflag |= DZ_CS5;
  409. break;
  410. case CS6:
  411. cflag |= DZ_CS6;
  412. break;
  413. case CS7:
  414. cflag |= DZ_CS7;
  415. break;
  416. case CS8:
  417. default:
  418. cflag |= DZ_CS8;
  419. }
  420. if (termios->c_cflag & CSTOPB)
  421. cflag |= DZ_CSTOPB;
  422. if (termios->c_cflag & PARENB)
  423. cflag |= DZ_PARENB;
  424. if (termios->c_cflag & PARODD)
  425. cflag |= DZ_PARODD;
  426. baud = uart_get_baud_rate(uport, termios, old_termios, 50, 9600);
  427. switch (baud) {
  428. case 50:
  429. cflag |= DZ_B50;
  430. break;
  431. case 75:
  432. cflag |= DZ_B75;
  433. break;
  434. case 110:
  435. cflag |= DZ_B110;
  436. break;
  437. case 134:
  438. cflag |= DZ_B134;
  439. break;
  440. case 150:
  441. cflag |= DZ_B150;
  442. break;
  443. case 300:
  444. cflag |= DZ_B300;
  445. break;
  446. case 600:
  447. cflag |= DZ_B600;
  448. break;
  449. case 1200:
  450. cflag |= DZ_B1200;
  451. break;
  452. case 1800:
  453. cflag |= DZ_B1800;
  454. break;
  455. case 2000:
  456. cflag |= DZ_B2000;
  457. break;
  458. case 2400:
  459. cflag |= DZ_B2400;
  460. break;
  461. case 3600:
  462. cflag |= DZ_B3600;
  463. break;
  464. case 4800:
  465. cflag |= DZ_B4800;
  466. break;
  467. case 7200:
  468. cflag |= DZ_B7200;
  469. break;
  470. case 9600:
  471. default:
  472. cflag |= DZ_B9600;
  473. }
  474. if (termios->c_cflag & CREAD)
  475. cflag |= DZ_RXENAB;
  476. spin_lock_irqsave(&dport->port.lock, flags);
  477. dz_out(dport, DZ_LPR, cflag | dport->port.line);
  478. dport->cflag = cflag;
  479. /* setup accept flag */
  480. dport->port.read_status_mask = DZ_OERR;
  481. if (termios->c_iflag & INPCK)
  482. dport->port.read_status_mask |= DZ_FERR | DZ_PERR;
  483. if (termios->c_iflag & (BRKINT | PARMRK))
  484. dport->port.read_status_mask |= DZ_BREAK;
  485. /* characters to ignore */
  486. uport->ignore_status_mask = 0;
  487. if ((termios->c_iflag & (IGNPAR | IGNBRK)) == (IGNPAR | IGNBRK))
  488. dport->port.ignore_status_mask |= DZ_OERR;
  489. if (termios->c_iflag & IGNPAR)
  490. dport->port.ignore_status_mask |= DZ_FERR | DZ_PERR;
  491. if (termios->c_iflag & IGNBRK)
  492. dport->port.ignore_status_mask |= DZ_BREAK;
  493. spin_unlock_irqrestore(&dport->port.lock, flags);
  494. }
  495. static const char *dz_type(struct uart_port *port)
  496. {
  497. return "DZ";
  498. }
  499. static void dz_release_port(struct uart_port *port)
  500. {
  501. /* nothing to do */
  502. }
  503. static int dz_request_port(struct uart_port *port)
  504. {
  505. return 0;
  506. }
  507. static void dz_config_port(struct uart_port *port, int flags)
  508. {
  509. if (flags & UART_CONFIG_TYPE)
  510. port->type = PORT_DZ;
  511. }
  512. /*
  513. * verify the new serial_struct (for TIOCSSERIAL).
  514. */
  515. static int dz_verify_port(struct uart_port *port, struct serial_struct *ser)
  516. {
  517. int ret = 0;
  518. if (ser->type != PORT_UNKNOWN && ser->type != PORT_DZ)
  519. ret = -EINVAL;
  520. if (ser->irq != port->irq)
  521. ret = -EINVAL;
  522. return ret;
  523. }
  524. static struct uart_ops dz_ops = {
  525. .tx_empty = dz_tx_empty,
  526. .get_mctrl = dz_get_mctrl,
  527. .set_mctrl = dz_set_mctrl,
  528. .stop_tx = dz_stop_tx,
  529. .start_tx = dz_start_tx,
  530. .stop_rx = dz_stop_rx,
  531. .enable_ms = dz_enable_ms,
  532. .break_ctl = dz_break_ctl,
  533. .startup = dz_startup,
  534. .shutdown = dz_shutdown,
  535. .set_termios = dz_set_termios,
  536. .type = dz_type,
  537. .release_port = dz_release_port,
  538. .request_port = dz_request_port,
  539. .config_port = dz_config_port,
  540. .verify_port = dz_verify_port,
  541. };
  542. static void __init dz_init_ports(void)
  543. {
  544. static int first = 1;
  545. struct dz_port *dport;
  546. unsigned long base;
  547. int i;
  548. if (!first)
  549. return;
  550. first = 0;
  551. if (mips_machtype == MACH_DS23100 ||
  552. mips_machtype == MACH_DS5100)
  553. base = CKSEG1ADDR(KN01_SLOT_BASE + KN01_DZ11);
  554. else
  555. base = CKSEG1ADDR(KN02_SLOT_BASE + KN02_DZ11);
  556. for (i = 0, dport = dz_ports; i < DZ_NB_PORT; i++, dport++) {
  557. spin_lock_init(&dport->port.lock);
  558. dport->port.membase = (char *) base;
  559. dport->port.iotype = UPIO_MEM;
  560. dport->port.irq = dec_interrupt[DEC_IRQ_DZ11];
  561. dport->port.line = i;
  562. dport->port.fifosize = 1;
  563. dport->port.ops = &dz_ops;
  564. dport->port.flags = UPF_BOOT_AUTOCONF;
  565. }
  566. }
  567. static void dz_reset(struct dz_port *dport)
  568. {
  569. dz_out(dport, DZ_CSR, DZ_CLR);
  570. while (dz_in(dport, DZ_CSR) & DZ_CLR);
  571. iob();
  572. /* enable scanning */
  573. dz_out(dport, DZ_CSR, DZ_MSE);
  574. }
  575. #ifdef CONFIG_SERIAL_DZ_CONSOLE
  576. /*
  577. * -------------------------------------------------------------------
  578. * dz_console_putchar() -- transmit a character
  579. *
  580. * Polled transmission. This is tricky. We need to mask transmit
  581. * interrupts so that they do not interfere, enable the transmitter
  582. * for the line requested and then wait till the transmit scanner
  583. * requests data for this line. But it may request data for another
  584. * line first, in which case we have to disable its transmitter and
  585. * repeat waiting till our line pops up. Only then the character may
  586. * be transmitted. Finally, the state of the transmitter mask is
  587. * restored. Welcome to the world of PDP-11!
  588. * -------------------------------------------------------------------
  589. */
  590. static void dz_console_putchar(struct uart_port *uport, int ch)
  591. {
  592. struct dz_port *dport = (struct dz_port *)uport;
  593. unsigned long flags;
  594. unsigned short csr, tcr, trdy, mask;
  595. int loops = 10000;
  596. spin_lock_irqsave(&dport->port.lock, flags);
  597. csr = dz_in(dport, DZ_CSR);
  598. dz_out(dport, DZ_CSR, csr & ~DZ_TIE);
  599. tcr = dz_in(dport, DZ_TCR);
  600. tcr |= 1 << dport->port.line;
  601. mask = tcr;
  602. dz_out(dport, DZ_TCR, mask);
  603. iob();
  604. spin_unlock_irqrestore(&dport->port.lock, flags);
  605. do {
  606. trdy = dz_in(dport, DZ_CSR);
  607. if (!(trdy & DZ_TRDY))
  608. continue;
  609. trdy = (trdy & DZ_TLINE) >> 8;
  610. if (trdy == dport->port.line)
  611. break;
  612. mask &= ~(1 << trdy);
  613. dz_out(dport, DZ_TCR, mask);
  614. iob();
  615. udelay(2);
  616. } while (loops--);
  617. if (loops) /* Cannot send otherwise. */
  618. dz_out(dport, DZ_TDR, ch);
  619. dz_out(dport, DZ_TCR, tcr);
  620. dz_out(dport, DZ_CSR, csr);
  621. }
  622. /*
  623. * -------------------------------------------------------------------
  624. * dz_console_print ()
  625. *
  626. * dz_console_print is registered for printk.
  627. * The console must be locked when we get here.
  628. * -------------------------------------------------------------------
  629. */
  630. static void dz_console_print(struct console *co,
  631. const char *str,
  632. unsigned int count)
  633. {
  634. struct dz_port *dport = &dz_ports[co->index];
  635. #ifdef DEBUG_DZ
  636. prom_printf((char *) str);
  637. #endif
  638. uart_console_write(&dport->port, str, count, dz_console_putchar);
  639. }
  640. static int __init dz_console_setup(struct console *co, char *options)
  641. {
  642. struct dz_port *dport = &dz_ports[co->index];
  643. int baud = 9600;
  644. int bits = 8;
  645. int parity = 'n';
  646. int flow = 'n';
  647. if (options)
  648. uart_parse_options(options, &baud, &parity, &bits, &flow);
  649. dz_reset(dport);
  650. return uart_set_options(&dport->port, co, baud, parity, bits, flow);
  651. }
  652. static struct uart_driver dz_reg;
  653. static struct console dz_console = {
  654. .name = "ttyS",
  655. .write = dz_console_print,
  656. .device = uart_console_device,
  657. .setup = dz_console_setup,
  658. .flags = CON_PRINTBUFFER,
  659. .index = -1,
  660. .data = &dz_reg,
  661. };
  662. static int __init dz_serial_console_init(void)
  663. {
  664. if (!IOASIC) {
  665. dz_init_ports();
  666. register_console(&dz_console);
  667. return 0;
  668. } else
  669. return -ENXIO;
  670. }
  671. console_initcall(dz_serial_console_init);
  672. #define SERIAL_DZ_CONSOLE &dz_console
  673. #else
  674. #define SERIAL_DZ_CONSOLE NULL
  675. #endif /* CONFIG_SERIAL_DZ_CONSOLE */
  676. static struct uart_driver dz_reg = {
  677. .owner = THIS_MODULE,
  678. .driver_name = "serial",
  679. .dev_name = "ttyS",
  680. .major = TTY_MAJOR,
  681. .minor = 64,
  682. .nr = DZ_NB_PORT,
  683. .cons = SERIAL_DZ_CONSOLE,
  684. };
  685. static int __init dz_init(void)
  686. {
  687. int ret, i;
  688. if (IOASIC)
  689. return -ENXIO;
  690. printk("%s%s\n", dz_name, dz_version);
  691. dz_init_ports();
  692. #ifndef CONFIG_SERIAL_DZ_CONSOLE
  693. /* reset the chip */
  694. dz_reset(&dz_ports[0]);
  695. #endif
  696. ret = uart_register_driver(&dz_reg);
  697. if (ret != 0)
  698. goto out;
  699. ret = request_irq(dz_ports[0].port.irq, dz_interrupt, IRQF_DISABLED,
  700. "DZ", &dz_ports[0]);
  701. if (ret != 0) {
  702. printk(KERN_ERR "dz: Cannot get IRQ %d!\n",
  703. dz_ports[0].port.irq);
  704. goto out_unregister;
  705. }
  706. for (i = 0; i < DZ_NB_PORT; i++)
  707. uart_add_one_port(&dz_reg, &dz_ports[i].port);
  708. return ret;
  709. out_unregister:
  710. uart_unregister_driver(&dz_reg);
  711. out:
  712. return ret;
  713. }
  714. module_init(dz_init);
  715. MODULE_DESCRIPTION("DECstation DZ serial driver");
  716. MODULE_LICENSE("GPL");