patch_sigmatel.c 133 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include <sound/tlv.h>
  35. #include "hda_codec.h"
  36. #include "hda_local.h"
  37. #include "hda_auto_parser.h"
  38. #include "hda_beep.h"
  39. #include "hda_jack.h"
  40. #include "hda_generic.h"
  41. enum {
  42. STAC_VREF_EVENT = 8,
  43. STAC_PWR_EVENT,
  44. };
  45. enum {
  46. STAC_REF,
  47. STAC_9200_OQO,
  48. STAC_9200_DELL_D21,
  49. STAC_9200_DELL_D22,
  50. STAC_9200_DELL_D23,
  51. STAC_9200_DELL_M21,
  52. STAC_9200_DELL_M22,
  53. STAC_9200_DELL_M23,
  54. STAC_9200_DELL_M24,
  55. STAC_9200_DELL_M25,
  56. STAC_9200_DELL_M26,
  57. STAC_9200_DELL_M27,
  58. STAC_9200_M4,
  59. STAC_9200_M4_2,
  60. STAC_9200_PANASONIC,
  61. STAC_9200_EAPD_INIT,
  62. STAC_9200_MODELS
  63. };
  64. enum {
  65. STAC_9205_REF,
  66. STAC_9205_DELL_M42,
  67. STAC_9205_DELL_M43,
  68. STAC_9205_DELL_M44,
  69. STAC_9205_EAPD,
  70. STAC_9205_MODELS
  71. };
  72. enum {
  73. STAC_92HD73XX_NO_JD, /* no jack-detection */
  74. STAC_92HD73XX_REF,
  75. STAC_92HD73XX_INTEL,
  76. STAC_DELL_M6_AMIC,
  77. STAC_DELL_M6_DMIC,
  78. STAC_DELL_M6_BOTH,
  79. STAC_DELL_EQ,
  80. STAC_ALIENWARE_M17X,
  81. STAC_92HD73XX_MODELS
  82. };
  83. enum {
  84. STAC_92HD83XXX_REF,
  85. STAC_92HD83XXX_PWR_REF,
  86. STAC_DELL_S14,
  87. STAC_DELL_VOSTRO_3500,
  88. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  89. STAC_HP_DV7_4000,
  90. STAC_HP_ZEPHYR,
  91. STAC_92HD83XXX_HP_LED,
  92. STAC_92HD83XXX_HP_INV_LED,
  93. STAC_92HD83XXX_HP_MIC_LED,
  94. STAC_92HD83XXX_HEADSET_JACK,
  95. STAC_92HD83XXX_HP,
  96. STAC_HP_ENVY_BASS,
  97. STAC_HP_BNB13_EQ,
  98. STAC_92HD83XXX_MODELS
  99. };
  100. enum {
  101. STAC_92HD71BXX_REF,
  102. STAC_DELL_M4_1,
  103. STAC_DELL_M4_2,
  104. STAC_DELL_M4_3,
  105. STAC_HP_M4,
  106. STAC_HP_DV4,
  107. STAC_HP_DV5,
  108. STAC_HP_HDX,
  109. STAC_92HD71BXX_HP,
  110. STAC_92HD71BXX_NO_DMIC,
  111. STAC_92HD71BXX_NO_SMUX,
  112. STAC_92HD71BXX_MODELS
  113. };
  114. enum {
  115. STAC_925x_REF,
  116. STAC_M1,
  117. STAC_M1_2,
  118. STAC_M2,
  119. STAC_M2_2,
  120. STAC_M3,
  121. STAC_M5,
  122. STAC_M6,
  123. STAC_925x_MODELS
  124. };
  125. enum {
  126. STAC_D945_REF,
  127. STAC_D945GTP3,
  128. STAC_D945GTP5,
  129. STAC_INTEL_MAC_V1,
  130. STAC_INTEL_MAC_V2,
  131. STAC_INTEL_MAC_V3,
  132. STAC_INTEL_MAC_V4,
  133. STAC_INTEL_MAC_V5,
  134. STAC_INTEL_MAC_AUTO,
  135. STAC_ECS_202,
  136. STAC_922X_DELL_D81,
  137. STAC_922X_DELL_D82,
  138. STAC_922X_DELL_M81,
  139. STAC_922X_DELL_M82,
  140. STAC_922X_INTEL_MAC_GPIO,
  141. STAC_922X_MODELS
  142. };
  143. enum {
  144. STAC_D965_REF_NO_JD, /* no jack-detection */
  145. STAC_D965_REF,
  146. STAC_D965_3ST,
  147. STAC_D965_5ST,
  148. STAC_D965_5ST_NO_FP,
  149. STAC_D965_VERBS,
  150. STAC_DELL_3ST,
  151. STAC_DELL_BIOS,
  152. STAC_DELL_BIOS_AMIC,
  153. STAC_DELL_BIOS_SPDIF,
  154. STAC_927X_DELL_DMIC,
  155. STAC_927X_VOLKNOB,
  156. STAC_927X_MODELS
  157. };
  158. enum {
  159. STAC_9872_VAIO,
  160. STAC_9872_MODELS
  161. };
  162. struct sigmatel_spec {
  163. struct hda_gen_spec gen;
  164. unsigned int eapd_switch: 1;
  165. unsigned int linear_tone_beep:1;
  166. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  167. unsigned int volknob_init:1; /* special volume-knob initialization */
  168. unsigned int powerdown_adcs:1;
  169. unsigned int have_spdif_mux:1;
  170. /* gpio lines */
  171. unsigned int eapd_mask;
  172. unsigned int gpio_mask;
  173. unsigned int gpio_dir;
  174. unsigned int gpio_data;
  175. unsigned int gpio_mute;
  176. unsigned int gpio_led;
  177. unsigned int gpio_led_polarity;
  178. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  179. unsigned int vref_led;
  180. int default_polarity;
  181. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  182. bool mic_mute_led_on; /* current mic mute state */
  183. /* stream */
  184. unsigned int stream_delay;
  185. /* analog loopback */
  186. const struct snd_kcontrol_new *aloopback_ctl;
  187. unsigned int aloopback;
  188. unsigned char aloopback_mask;
  189. unsigned char aloopback_shift;
  190. /* power management */
  191. unsigned int power_map_bits;
  192. unsigned int num_pwrs;
  193. const hda_nid_t *pwr_nids;
  194. unsigned int active_adcs;
  195. /* beep widgets */
  196. hda_nid_t anabeep_nid;
  197. /* SPDIF-out mux */
  198. const char * const *spdif_labels;
  199. struct hda_input_mux spdif_mux;
  200. unsigned int cur_smux[2];
  201. };
  202. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  203. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  204. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  205. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  206. 0x0f, 0x10, 0x11
  207. };
  208. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  209. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  210. 0x0f, 0x10
  211. };
  212. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  213. 0x0a, 0x0d, 0x0f
  214. };
  215. /*
  216. * PCM hooks
  217. */
  218. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  219. struct hda_codec *codec,
  220. struct snd_pcm_substream *substream,
  221. int action)
  222. {
  223. struct sigmatel_spec *spec = codec->spec;
  224. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  225. msleep(spec->stream_delay);
  226. }
  227. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  228. struct hda_codec *codec,
  229. struct snd_pcm_substream *substream,
  230. int action)
  231. {
  232. struct sigmatel_spec *spec = codec->spec;
  233. int i, idx = 0;
  234. if (!spec->powerdown_adcs)
  235. return;
  236. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  237. if (spec->gen.all_adcs[i] == hinfo->nid) {
  238. idx = i;
  239. break;
  240. }
  241. }
  242. switch (action) {
  243. case HDA_GEN_PCM_ACT_OPEN:
  244. msleep(40);
  245. snd_hda_codec_write(codec, hinfo->nid, 0,
  246. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  247. spec->active_adcs |= (1 << idx);
  248. break;
  249. case HDA_GEN_PCM_ACT_CLOSE:
  250. snd_hda_codec_write(codec, hinfo->nid, 0,
  251. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  252. spec->active_adcs &= ~(1 << idx);
  253. break;
  254. }
  255. }
  256. /*
  257. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  258. * funky external mute control using GPIO pins.
  259. */
  260. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  261. unsigned int dir_mask, unsigned int data)
  262. {
  263. unsigned int gpiostate, gpiomask, gpiodir;
  264. snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  265. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  266. AC_VERB_GET_GPIO_DATA, 0);
  267. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  268. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  269. AC_VERB_GET_GPIO_MASK, 0);
  270. gpiomask |= mask;
  271. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  272. AC_VERB_GET_GPIO_DIRECTION, 0);
  273. gpiodir |= dir_mask;
  274. /* Configure GPIOx as CMOS */
  275. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  276. snd_hda_codec_write(codec, codec->afg, 0,
  277. AC_VERB_SET_GPIO_MASK, gpiomask);
  278. snd_hda_codec_read(codec, codec->afg, 0,
  279. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  280. msleep(1);
  281. snd_hda_codec_read(codec, codec->afg, 0,
  282. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  283. }
  284. /* hook for controlling mic-mute LED GPIO */
  285. static void stac_capture_led_hook(struct hda_codec *codec,
  286. struct snd_ctl_elem_value *ucontrol)
  287. {
  288. struct sigmatel_spec *spec = codec->spec;
  289. bool mute;
  290. if (!ucontrol)
  291. return;
  292. mute = !(ucontrol->value.integer.value[0] ||
  293. ucontrol->value.integer.value[1]);
  294. if (spec->mic_mute_led_on != mute) {
  295. spec->mic_mute_led_on = mute;
  296. if (mute)
  297. spec->gpio_data |= spec->mic_mute_led_gpio;
  298. else
  299. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  300. stac_gpio_set(codec, spec->gpio_mask,
  301. spec->gpio_dir, spec->gpio_data);
  302. }
  303. }
  304. static int stac_vrefout_set(struct hda_codec *codec,
  305. hda_nid_t nid, unsigned int new_vref)
  306. {
  307. int error, pinctl;
  308. snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
  309. pinctl = snd_hda_codec_read(codec, nid, 0,
  310. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  311. if (pinctl < 0)
  312. return pinctl;
  313. pinctl &= 0xff;
  314. pinctl &= ~AC_PINCTL_VREFEN;
  315. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  316. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  317. if (error < 0)
  318. return error;
  319. return 1;
  320. }
  321. /* update mute-LED accoring to the master switch */
  322. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  323. {
  324. struct sigmatel_spec *spec = codec->spec;
  325. int muted = !enabled;
  326. if (!spec->gpio_led)
  327. return;
  328. /* LED state is inverted on these systems */
  329. if (spec->gpio_led_polarity)
  330. muted = !muted;
  331. if (!spec->vref_mute_led_nid) {
  332. if (muted)
  333. spec->gpio_data |= spec->gpio_led;
  334. else
  335. spec->gpio_data &= ~spec->gpio_led;
  336. stac_gpio_set(codec, spec->gpio_mask,
  337. spec->gpio_dir, spec->gpio_data);
  338. } else {
  339. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  340. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  341. spec->vref_led);
  342. }
  343. }
  344. /* vmaster hook to update mute LED */
  345. static void stac_vmaster_hook(void *private_data, int val)
  346. {
  347. stac_update_led_status(private_data, val);
  348. }
  349. /* automute hook to handle GPIO mute and EAPD updates */
  350. static void stac_update_outputs(struct hda_codec *codec)
  351. {
  352. struct sigmatel_spec *spec = codec->spec;
  353. if (spec->gpio_mute)
  354. spec->gen.master_mute =
  355. !(snd_hda_codec_read(codec, codec->afg, 0,
  356. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  357. snd_hda_gen_update_outputs(codec);
  358. if (spec->eapd_mask && spec->eapd_switch) {
  359. unsigned int val = spec->gpio_data;
  360. if (spec->gen.speaker_muted)
  361. val &= ~spec->eapd_mask;
  362. else
  363. val |= spec->eapd_mask;
  364. if (spec->gpio_data != val) {
  365. spec->gpio_data = val;
  366. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  367. val);
  368. }
  369. }
  370. }
  371. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  372. bool enable, bool do_write)
  373. {
  374. struct sigmatel_spec *spec = codec->spec;
  375. unsigned int idx, val;
  376. for (idx = 0; idx < spec->num_pwrs; idx++) {
  377. if (spec->pwr_nids[idx] == nid)
  378. break;
  379. }
  380. if (idx >= spec->num_pwrs)
  381. return;
  382. idx = 1 << idx;
  383. val = spec->power_map_bits;
  384. if (enable)
  385. val &= ~idx;
  386. else
  387. val |= idx;
  388. /* power down unused output ports */
  389. if (val != spec->power_map_bits) {
  390. spec->power_map_bits = val;
  391. if (do_write)
  392. snd_hda_codec_write(codec, codec->afg, 0,
  393. AC_VERB_IDT_SET_POWER_MAP, val);
  394. }
  395. }
  396. /* update power bit per jack plug/unplug */
  397. static void jack_update_power(struct hda_codec *codec,
  398. struct hda_jack_tbl *jack)
  399. {
  400. struct sigmatel_spec *spec = codec->spec;
  401. int i;
  402. if (!spec->num_pwrs)
  403. return;
  404. if (jack && jack->nid) {
  405. stac_toggle_power_map(codec, jack->nid,
  406. snd_hda_jack_detect(codec, jack->nid),
  407. true);
  408. return;
  409. }
  410. /* update all jacks */
  411. for (i = 0; i < spec->num_pwrs; i++) {
  412. hda_nid_t nid = spec->pwr_nids[i];
  413. jack = snd_hda_jack_tbl_get(codec, nid);
  414. if (!jack || !jack->action)
  415. continue;
  416. if (jack->action == STAC_PWR_EVENT ||
  417. jack->action <= HDA_GEN_LAST_EVENT)
  418. stac_toggle_power_map(codec, nid,
  419. snd_hda_jack_detect(codec, nid),
  420. false);
  421. }
  422. snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
  423. spec->power_map_bits);
  424. }
  425. static void stac_hp_automute(struct hda_codec *codec,
  426. struct hda_jack_tbl *jack)
  427. {
  428. snd_hda_gen_hp_automute(codec, jack);
  429. jack_update_power(codec, jack);
  430. }
  431. static void stac_line_automute(struct hda_codec *codec,
  432. struct hda_jack_tbl *jack)
  433. {
  434. snd_hda_gen_line_automute(codec, jack);
  435. jack_update_power(codec, jack);
  436. }
  437. static void stac_mic_autoswitch(struct hda_codec *codec,
  438. struct hda_jack_tbl *jack)
  439. {
  440. snd_hda_gen_mic_autoswitch(codec, jack);
  441. jack_update_power(codec, jack);
  442. }
  443. static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
  444. {
  445. unsigned int data;
  446. data = snd_hda_codec_read(codec, codec->afg, 0,
  447. AC_VERB_GET_GPIO_DATA, 0);
  448. /* toggle VREF state based on GPIOx status */
  449. snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
  450. !!(data & (1 << event->private_data)));
  451. }
  452. /* initialize the power map and enable the power event to jacks that
  453. * haven't been assigned to automute
  454. */
  455. static void stac_init_power_map(struct hda_codec *codec)
  456. {
  457. struct sigmatel_spec *spec = codec->spec;
  458. int i;
  459. for (i = 0; i < spec->num_pwrs; i++) {
  460. hda_nid_t nid = spec->pwr_nids[i];
  461. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  462. def_conf = get_defcfg_connect(def_conf);
  463. if (snd_hda_jack_tbl_get(codec, nid))
  464. continue;
  465. if (def_conf == AC_JACK_PORT_COMPLEX &&
  466. !(spec->vref_mute_led_nid == nid ||
  467. is_jack_detectable(codec, nid))) {
  468. snd_hda_jack_detect_enable_callback(codec, nid,
  469. STAC_PWR_EVENT,
  470. jack_update_power);
  471. } else {
  472. if (def_conf == AC_JACK_PORT_NONE)
  473. stac_toggle_power_map(codec, nid, false, false);
  474. else
  475. stac_toggle_power_map(codec, nid, true, false);
  476. }
  477. }
  478. }
  479. /*
  480. */
  481. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  482. int *valp)
  483. {
  484. return !snd_hda_get_int_hint(codec, key, valp);
  485. }
  486. /* override some hints from the hwdep entry */
  487. static void stac_store_hints(struct hda_codec *codec)
  488. {
  489. struct sigmatel_spec *spec = codec->spec;
  490. int val;
  491. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  492. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  493. spec->gpio_mask;
  494. }
  495. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  496. spec->gpio_mask &= spec->gpio_mask;
  497. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  498. spec->gpio_dir &= spec->gpio_mask;
  499. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  500. spec->eapd_mask &= spec->gpio_mask;
  501. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  502. spec->gpio_mute &= spec->gpio_mask;
  503. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  504. if (val >= 0)
  505. spec->eapd_switch = val;
  506. }
  507. /*
  508. * loopback controls
  509. */
  510. #define stac_aloopback_info snd_ctl_boolean_mono_info
  511. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  512. struct snd_ctl_elem_value *ucontrol)
  513. {
  514. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  515. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  516. struct sigmatel_spec *spec = codec->spec;
  517. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  518. (spec->aloopback_mask << idx));
  519. return 0;
  520. }
  521. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  522. struct snd_ctl_elem_value *ucontrol)
  523. {
  524. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  525. struct sigmatel_spec *spec = codec->spec;
  526. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  527. unsigned int dac_mode;
  528. unsigned int val, idx_val;
  529. idx_val = spec->aloopback_mask << idx;
  530. if (ucontrol->value.integer.value[0])
  531. val = spec->aloopback | idx_val;
  532. else
  533. val = spec->aloopback & ~idx_val;
  534. if (spec->aloopback == val)
  535. return 0;
  536. spec->aloopback = val;
  537. /* Only return the bits defined by the shift value of the
  538. * first two bytes of the mask
  539. */
  540. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  541. kcontrol->private_value & 0xFFFF, 0x0);
  542. dac_mode >>= spec->aloopback_shift;
  543. if (spec->aloopback & idx_val) {
  544. snd_hda_power_up(codec);
  545. dac_mode |= idx_val;
  546. } else {
  547. snd_hda_power_down(codec);
  548. dac_mode &= ~idx_val;
  549. }
  550. snd_hda_codec_write_cache(codec, codec->afg, 0,
  551. kcontrol->private_value >> 16, dac_mode);
  552. return 1;
  553. }
  554. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  555. { \
  556. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  557. .name = "Analog Loopback", \
  558. .count = cnt, \
  559. .info = stac_aloopback_info, \
  560. .get = stac_aloopback_get, \
  561. .put = stac_aloopback_put, \
  562. .private_value = verb_read | (verb_write << 16), \
  563. }
  564. /*
  565. * Mute LED handling on HP laptops
  566. */
  567. /* check whether it's a HP laptop with a docking port */
  568. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  569. {
  570. if (codec->vendor_id != 0x111d7605 &&
  571. codec->vendor_id != 0x111d76d1)
  572. return false;
  573. switch (codec->subsystem_id) {
  574. case 0x103c1618:
  575. case 0x103c1619:
  576. case 0x103c161a:
  577. case 0x103c161b:
  578. case 0x103c161c:
  579. case 0x103c161d:
  580. case 0x103c161e:
  581. case 0x103c161f:
  582. case 0x103c162a:
  583. case 0x103c162b:
  584. case 0x103c1630:
  585. case 0x103c1631:
  586. case 0x103c1633:
  587. case 0x103c1634:
  588. case 0x103c1635:
  589. case 0x103c3587:
  590. case 0x103c3588:
  591. case 0x103c3589:
  592. case 0x103c358a:
  593. case 0x103c3667:
  594. case 0x103c3668:
  595. case 0x103c3669:
  596. return true;
  597. }
  598. return false;
  599. }
  600. static bool hp_blike_system(u32 subsystem_id)
  601. {
  602. switch (subsystem_id) {
  603. case 0x103c1520:
  604. case 0x103c1521:
  605. case 0x103c1523:
  606. case 0x103c1524:
  607. case 0x103c1525:
  608. case 0x103c1722:
  609. case 0x103c1723:
  610. case 0x103c1724:
  611. case 0x103c1725:
  612. case 0x103c1726:
  613. case 0x103c1727:
  614. case 0x103c1728:
  615. case 0x103c1729:
  616. case 0x103c172a:
  617. case 0x103c172b:
  618. case 0x103c307e:
  619. case 0x103c307f:
  620. case 0x103c3080:
  621. case 0x103c3081:
  622. case 0x103c7007:
  623. case 0x103c7008:
  624. return true;
  625. }
  626. return false;
  627. }
  628. static void set_hp_led_gpio(struct hda_codec *codec)
  629. {
  630. struct sigmatel_spec *spec = codec->spec;
  631. unsigned int gpio;
  632. if (spec->gpio_led)
  633. return;
  634. gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
  635. gpio &= AC_GPIO_IO_COUNT;
  636. if (gpio > 3)
  637. spec->gpio_led = 0x08; /* GPIO 3 */
  638. else
  639. spec->gpio_led = 0x01; /* GPIO 0 */
  640. }
  641. /*
  642. * This method searches for the mute LED GPIO configuration
  643. * provided as OEM string in SMBIOS. The format of that string
  644. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  645. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  646. * that corresponds to the NOT muted state of the master volume
  647. * and G is the index of the GPIO to use as the mute LED control (0..9)
  648. * If _G portion is missing it is assigned based on the codec ID
  649. *
  650. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  651. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  652. *
  653. *
  654. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  655. * SMBIOS - at least the ones I have seen do not have them - which include
  656. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  657. * HP Pavilion dv9500t CTO.
  658. * Need more information on whether it is true across the entire series.
  659. * -- kunal
  660. */
  661. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  662. {
  663. struct sigmatel_spec *spec = codec->spec;
  664. const struct dmi_device *dev = NULL;
  665. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  666. get_int_hint(codec, "gpio_led_polarity",
  667. &spec->gpio_led_polarity);
  668. return 1;
  669. }
  670. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  671. if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
  672. &spec->gpio_led_polarity,
  673. &spec->gpio_led) == 2) {
  674. unsigned int max_gpio;
  675. max_gpio = snd_hda_param_read(codec, codec->afg,
  676. AC_PAR_GPIO_CAP);
  677. max_gpio &= AC_GPIO_IO_COUNT;
  678. if (spec->gpio_led < max_gpio)
  679. spec->gpio_led = 1 << spec->gpio_led;
  680. else
  681. spec->vref_mute_led_nid = spec->gpio_led;
  682. return 1;
  683. }
  684. if (sscanf(dev->name, "HP_Mute_LED_%d",
  685. &spec->gpio_led_polarity) == 1) {
  686. set_hp_led_gpio(codec);
  687. return 1;
  688. }
  689. /* BIOS bug: unfilled OEM string */
  690. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  691. set_hp_led_gpio(codec);
  692. if (default_polarity >= 0)
  693. spec->gpio_led_polarity = default_polarity;
  694. else
  695. spec->gpio_led_polarity = 1;
  696. return 1;
  697. }
  698. }
  699. /*
  700. * Fallback case - if we don't find the DMI strings,
  701. * we statically set the GPIO - if not a B-series system
  702. * and default polarity is provided
  703. */
  704. if (!hp_blike_system(codec->subsystem_id) &&
  705. (default_polarity == 0 || default_polarity == 1)) {
  706. set_hp_led_gpio(codec);
  707. spec->gpio_led_polarity = default_polarity;
  708. return 1;
  709. }
  710. return 0;
  711. }
  712. /* check whether a built-in speaker is included in parsed pins */
  713. static bool has_builtin_speaker(struct hda_codec *codec)
  714. {
  715. struct sigmatel_spec *spec = codec->spec;
  716. hda_nid_t *nid_pin;
  717. int nids, i;
  718. if (spec->gen.autocfg.line_out_type == AUTO_PIN_SPEAKER_OUT) {
  719. nid_pin = spec->gen.autocfg.line_out_pins;
  720. nids = spec->gen.autocfg.line_outs;
  721. } else {
  722. nid_pin = spec->gen.autocfg.speaker_pins;
  723. nids = spec->gen.autocfg.speaker_outs;
  724. }
  725. for (i = 0; i < nids; i++) {
  726. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid_pin[i]);
  727. if (snd_hda_get_input_pin_attr(def_conf) == INPUT_PIN_ATTR_INT)
  728. return true;
  729. }
  730. return false;
  731. }
  732. /*
  733. * PC beep controls
  734. */
  735. /* create PC beep volume controls */
  736. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  737. hda_nid_t nid)
  738. {
  739. struct sigmatel_spec *spec = codec->spec;
  740. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  741. struct snd_kcontrol_new *knew;
  742. static struct snd_kcontrol_new abeep_mute_ctl =
  743. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  744. static struct snd_kcontrol_new dbeep_mute_ctl =
  745. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  746. static struct snd_kcontrol_new beep_vol_ctl =
  747. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  748. /* check for mute support for the the amp */
  749. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  750. const struct snd_kcontrol_new *temp;
  751. if (spec->anabeep_nid == nid)
  752. temp = &abeep_mute_ctl;
  753. else
  754. temp = &dbeep_mute_ctl;
  755. knew = snd_hda_gen_add_kctl(&spec->gen,
  756. "Beep Playback Switch", temp);
  757. if (!knew)
  758. return -ENOMEM;
  759. knew->private_value =
  760. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  761. }
  762. /* check to see if there is volume support for the amp */
  763. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  764. knew = snd_hda_gen_add_kctl(&spec->gen,
  765. "Beep Playback Volume",
  766. &beep_vol_ctl);
  767. if (!knew)
  768. return -ENOMEM;
  769. knew->private_value =
  770. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  771. }
  772. return 0;
  773. }
  774. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  775. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  776. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  777. struct snd_ctl_elem_value *ucontrol)
  778. {
  779. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  780. ucontrol->value.integer.value[0] = codec->beep->enabled;
  781. return 0;
  782. }
  783. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  784. struct snd_ctl_elem_value *ucontrol)
  785. {
  786. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  787. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  788. }
  789. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  790. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  791. .name = "Beep Playback Switch",
  792. .info = stac_dig_beep_switch_info,
  793. .get = stac_dig_beep_switch_get,
  794. .put = stac_dig_beep_switch_put,
  795. };
  796. static int stac_beep_switch_ctl(struct hda_codec *codec)
  797. {
  798. struct sigmatel_spec *spec = codec->spec;
  799. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  800. return -ENOMEM;
  801. return 0;
  802. }
  803. #endif
  804. /*
  805. * SPDIF-out mux controls
  806. */
  807. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  808. struct snd_ctl_elem_info *uinfo)
  809. {
  810. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  811. struct sigmatel_spec *spec = codec->spec;
  812. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  813. }
  814. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  815. struct snd_ctl_elem_value *ucontrol)
  816. {
  817. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  818. struct sigmatel_spec *spec = codec->spec;
  819. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  820. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  821. return 0;
  822. }
  823. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  824. struct snd_ctl_elem_value *ucontrol)
  825. {
  826. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  827. struct sigmatel_spec *spec = codec->spec;
  828. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  829. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  830. spec->gen.autocfg.dig_out_pins[smux_idx],
  831. &spec->cur_smux[smux_idx]);
  832. }
  833. static struct snd_kcontrol_new stac_smux_mixer = {
  834. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  835. .name = "IEC958 Playback Source",
  836. /* count set later */
  837. .info = stac_smux_enum_info,
  838. .get = stac_smux_enum_get,
  839. .put = stac_smux_enum_put,
  840. };
  841. static const char * const stac_spdif_labels[] = {
  842. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  843. };
  844. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  845. {
  846. struct sigmatel_spec *spec = codec->spec;
  847. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  848. const char * const *labels = spec->spdif_labels;
  849. struct snd_kcontrol_new *kctl;
  850. int i, num_cons;
  851. if (cfg->dig_outs < 1)
  852. return 0;
  853. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  854. if (num_cons <= 1)
  855. return 0;
  856. if (!labels)
  857. labels = stac_spdif_labels;
  858. for (i = 0; i < num_cons; i++) {
  859. if (snd_BUG_ON(!labels[i]))
  860. return -EINVAL;
  861. snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
  862. }
  863. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  864. if (!kctl)
  865. return -ENOMEM;
  866. kctl->count = cfg->dig_outs;
  867. return 0;
  868. }
  869. /*
  870. */
  871. static const struct hda_verb stac9200_core_init[] = {
  872. /* set dac0mux for dac converter */
  873. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  874. {}
  875. };
  876. static const struct hda_verb stac9200_eapd_init[] = {
  877. /* set dac0mux for dac converter */
  878. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  879. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  880. {}
  881. };
  882. static const struct hda_verb dell_eq_core_init[] = {
  883. /* set master volume to max value without distortion
  884. * and direct control */
  885. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  886. {}
  887. };
  888. static const struct hda_verb stac92hd73xx_core_init[] = {
  889. /* set master volume and direct control */
  890. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  891. {}
  892. };
  893. static const struct hda_verb stac92hd83xxx_core_init[] = {
  894. /* power state controls amps */
  895. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  896. {}
  897. };
  898. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  899. { 0x22, 0x785, 0x43 },
  900. { 0x22, 0x782, 0xe0 },
  901. { 0x22, 0x795, 0x00 },
  902. {}
  903. };
  904. static const struct hda_verb stac92hd71bxx_core_init[] = {
  905. /* set master volume and direct control */
  906. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  907. {}
  908. };
  909. static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
  910. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  911. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  912. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  913. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  914. {}
  915. };
  916. static const struct hda_verb stac925x_core_init[] = {
  917. /* set dac0mux for dac converter */
  918. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  919. /* mute the master volume */
  920. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  921. {}
  922. };
  923. static const struct hda_verb stac922x_core_init[] = {
  924. /* set master volume and direct control */
  925. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  926. {}
  927. };
  928. static const struct hda_verb d965_core_init[] = {
  929. /* unmute node 0x1b */
  930. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  931. /* select node 0x03 as DAC */
  932. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  933. {}
  934. };
  935. static const struct hda_verb dell_3st_core_init[] = {
  936. /* don't set delta bit */
  937. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  938. /* unmute node 0x1b */
  939. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  940. /* select node 0x03 as DAC */
  941. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  942. {}
  943. };
  944. static const struct hda_verb stac927x_core_init[] = {
  945. /* set master volume and direct control */
  946. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  947. /* enable analog pc beep path */
  948. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  949. {}
  950. };
  951. static const struct hda_verb stac927x_volknob_core_init[] = {
  952. /* don't set delta bit */
  953. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  954. /* enable analog pc beep path */
  955. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  956. {}
  957. };
  958. static const struct hda_verb stac9205_core_init[] = {
  959. /* set master volume and direct control */
  960. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  961. /* enable analog pc beep path */
  962. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  963. {}
  964. };
  965. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  966. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  967. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  968. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  969. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  970. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  971. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  972. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  973. static const struct snd_kcontrol_new stac9205_loopback =
  974. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  975. static const struct snd_kcontrol_new stac927x_loopback =
  976. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  977. static const struct hda_pintbl ref9200_pin_configs[] = {
  978. { 0x08, 0x01c47010 },
  979. { 0x09, 0x01447010 },
  980. { 0x0d, 0x0221401f },
  981. { 0x0e, 0x01114010 },
  982. { 0x0f, 0x02a19020 },
  983. { 0x10, 0x01a19021 },
  984. { 0x11, 0x90100140 },
  985. { 0x12, 0x01813122 },
  986. {}
  987. };
  988. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  989. { 0x08, 0x400000fe },
  990. { 0x09, 0x404500f4 },
  991. { 0x0d, 0x400100f0 },
  992. { 0x0e, 0x90110010 },
  993. { 0x0f, 0x400100f1 },
  994. { 0x10, 0x02a1902e },
  995. { 0x11, 0x500000f2 },
  996. { 0x12, 0x500000f3 },
  997. {}
  998. };
  999. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  1000. { 0x08, 0x400000fe },
  1001. { 0x09, 0x404500f4 },
  1002. { 0x0d, 0x400100f0 },
  1003. { 0x0e, 0x90110010 },
  1004. { 0x0f, 0x400100f1 },
  1005. { 0x10, 0x02a1902e },
  1006. { 0x11, 0x500000f2 },
  1007. { 0x12, 0x500000f3 },
  1008. {}
  1009. };
  1010. /*
  1011. STAC 9200 pin configs for
  1012. 102801A8
  1013. 102801DE
  1014. 102801E8
  1015. */
  1016. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  1017. { 0x08, 0x400001f0 },
  1018. { 0x09, 0x400001f1 },
  1019. { 0x0d, 0x02214030 },
  1020. { 0x0e, 0x01014010 },
  1021. { 0x0f, 0x02a19020 },
  1022. { 0x10, 0x01a19021 },
  1023. { 0x11, 0x90100140 },
  1024. { 0x12, 0x01813122 },
  1025. {}
  1026. };
  1027. /*
  1028. STAC 9200 pin configs for
  1029. 102801C0
  1030. 102801C1
  1031. */
  1032. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1033. { 0x08, 0x400001f0 },
  1034. { 0x09, 0x400001f1 },
  1035. { 0x0d, 0x0221401f },
  1036. { 0x0e, 0x01014010 },
  1037. { 0x0f, 0x01813020 },
  1038. { 0x10, 0x02a19021 },
  1039. { 0x11, 0x90100140 },
  1040. { 0x12, 0x400001f2 },
  1041. {}
  1042. };
  1043. /*
  1044. STAC 9200 pin configs for
  1045. 102801C4 (Dell Dimension E310)
  1046. 102801C5
  1047. 102801C7
  1048. 102801D9
  1049. 102801DA
  1050. 102801E3
  1051. */
  1052. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1053. { 0x08, 0x400001f0 },
  1054. { 0x09, 0x400001f1 },
  1055. { 0x0d, 0x0221401f },
  1056. { 0x0e, 0x01014010 },
  1057. { 0x0f, 0x01813020 },
  1058. { 0x10, 0x01a19021 },
  1059. { 0x11, 0x90100140 },
  1060. { 0x12, 0x400001f2 },
  1061. {}
  1062. };
  1063. /*
  1064. STAC 9200-32 pin configs for
  1065. 102801B5 (Dell Inspiron 630m)
  1066. 102801D8 (Dell Inspiron 640m)
  1067. */
  1068. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1069. { 0x08, 0x40c003fa },
  1070. { 0x09, 0x03441340 },
  1071. { 0x0d, 0x0321121f },
  1072. { 0x0e, 0x90170310 },
  1073. { 0x0f, 0x408003fb },
  1074. { 0x10, 0x03a11020 },
  1075. { 0x11, 0x401003fc },
  1076. { 0x12, 0x403003fd },
  1077. {}
  1078. };
  1079. /*
  1080. STAC 9200-32 pin configs for
  1081. 102801C2 (Dell Latitude D620)
  1082. 102801C8
  1083. 102801CC (Dell Latitude D820)
  1084. 102801D4
  1085. 102801D6
  1086. */
  1087. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1088. { 0x08, 0x40c003fa },
  1089. { 0x09, 0x0144131f },
  1090. { 0x0d, 0x0321121f },
  1091. { 0x0e, 0x90170310 },
  1092. { 0x0f, 0x90a70321 },
  1093. { 0x10, 0x03a11020 },
  1094. { 0x11, 0x401003fb },
  1095. { 0x12, 0x40f000fc },
  1096. {}
  1097. };
  1098. /*
  1099. STAC 9200-32 pin configs for
  1100. 102801CE (Dell XPS M1710)
  1101. 102801CF (Dell Precision M90)
  1102. */
  1103. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1104. { 0x08, 0x40c003fa },
  1105. { 0x09, 0x01441340 },
  1106. { 0x0d, 0x0421421f },
  1107. { 0x0e, 0x90170310 },
  1108. { 0x0f, 0x408003fb },
  1109. { 0x10, 0x04a1102e },
  1110. { 0x11, 0x90170311 },
  1111. { 0x12, 0x403003fc },
  1112. {}
  1113. };
  1114. /*
  1115. STAC 9200-32 pin configs for
  1116. 102801C9
  1117. 102801CA
  1118. 102801CB (Dell Latitude 120L)
  1119. 102801D3
  1120. */
  1121. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1122. { 0x08, 0x40c003fa },
  1123. { 0x09, 0x404003fb },
  1124. { 0x0d, 0x0321121f },
  1125. { 0x0e, 0x90170310 },
  1126. { 0x0f, 0x408003fc },
  1127. { 0x10, 0x03a11020 },
  1128. { 0x11, 0x401003fd },
  1129. { 0x12, 0x403003fe },
  1130. {}
  1131. };
  1132. /*
  1133. STAC 9200-32 pin configs for
  1134. 102801BD (Dell Inspiron E1505n)
  1135. 102801EE
  1136. 102801EF
  1137. */
  1138. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1139. { 0x08, 0x40c003fa },
  1140. { 0x09, 0x01441340 },
  1141. { 0x0d, 0x0421121f },
  1142. { 0x0e, 0x90170310 },
  1143. { 0x0f, 0x408003fb },
  1144. { 0x10, 0x04a11020 },
  1145. { 0x11, 0x401003fc },
  1146. { 0x12, 0x403003fd },
  1147. {}
  1148. };
  1149. /*
  1150. STAC 9200-32 pin configs for
  1151. 102801F5 (Dell Inspiron 1501)
  1152. 102801F6
  1153. */
  1154. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1155. { 0x08, 0x40c003fa },
  1156. { 0x09, 0x404003fb },
  1157. { 0x0d, 0x0421121f },
  1158. { 0x0e, 0x90170310 },
  1159. { 0x0f, 0x408003fc },
  1160. { 0x10, 0x04a11020 },
  1161. { 0x11, 0x401003fd },
  1162. { 0x12, 0x403003fe },
  1163. {}
  1164. };
  1165. /*
  1166. STAC 9200-32
  1167. 102801CD (Dell Inspiron E1705/9400)
  1168. */
  1169. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1170. { 0x08, 0x40c003fa },
  1171. { 0x09, 0x01441340 },
  1172. { 0x0d, 0x0421121f },
  1173. { 0x0e, 0x90170310 },
  1174. { 0x0f, 0x90170310 },
  1175. { 0x10, 0x04a11020 },
  1176. { 0x11, 0x90170310 },
  1177. { 0x12, 0x40f003fc },
  1178. {}
  1179. };
  1180. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1181. { 0x08, 0x40c000f0 },
  1182. { 0x09, 0x404000f1 },
  1183. { 0x0d, 0x0221121f },
  1184. { 0x0e, 0x02211210 },
  1185. { 0x0f, 0x90170111 },
  1186. { 0x10, 0x90a70120 },
  1187. { 0x11, 0x400000f2 },
  1188. { 0x12, 0x400000f3 },
  1189. {}
  1190. };
  1191. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1192. const struct hda_fixup *fix, int action)
  1193. {
  1194. struct sigmatel_spec *spec = codec->spec;
  1195. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1196. spec->gpio_mask = spec->gpio_dir = 0x09;
  1197. spec->gpio_data = 0x00;
  1198. /* CF-74 has no headphone detection, and the driver should *NOT*
  1199. * do detection and HP/speaker toggle because the hardware does it.
  1200. */
  1201. spec->gen.suppress_auto_mute = 1;
  1202. }
  1203. }
  1204. static const struct hda_fixup stac9200_fixups[] = {
  1205. [STAC_REF] = {
  1206. .type = HDA_FIXUP_PINS,
  1207. .v.pins = ref9200_pin_configs,
  1208. },
  1209. [STAC_9200_OQO] = {
  1210. .type = HDA_FIXUP_PINS,
  1211. .v.pins = oqo9200_pin_configs,
  1212. .chained = true,
  1213. .chain_id = STAC_9200_EAPD_INIT,
  1214. },
  1215. [STAC_9200_DELL_D21] = {
  1216. .type = HDA_FIXUP_PINS,
  1217. .v.pins = dell9200_d21_pin_configs,
  1218. },
  1219. [STAC_9200_DELL_D22] = {
  1220. .type = HDA_FIXUP_PINS,
  1221. .v.pins = dell9200_d22_pin_configs,
  1222. },
  1223. [STAC_9200_DELL_D23] = {
  1224. .type = HDA_FIXUP_PINS,
  1225. .v.pins = dell9200_d23_pin_configs,
  1226. },
  1227. [STAC_9200_DELL_M21] = {
  1228. .type = HDA_FIXUP_PINS,
  1229. .v.pins = dell9200_m21_pin_configs,
  1230. },
  1231. [STAC_9200_DELL_M22] = {
  1232. .type = HDA_FIXUP_PINS,
  1233. .v.pins = dell9200_m22_pin_configs,
  1234. },
  1235. [STAC_9200_DELL_M23] = {
  1236. .type = HDA_FIXUP_PINS,
  1237. .v.pins = dell9200_m23_pin_configs,
  1238. },
  1239. [STAC_9200_DELL_M24] = {
  1240. .type = HDA_FIXUP_PINS,
  1241. .v.pins = dell9200_m24_pin_configs,
  1242. },
  1243. [STAC_9200_DELL_M25] = {
  1244. .type = HDA_FIXUP_PINS,
  1245. .v.pins = dell9200_m25_pin_configs,
  1246. },
  1247. [STAC_9200_DELL_M26] = {
  1248. .type = HDA_FIXUP_PINS,
  1249. .v.pins = dell9200_m26_pin_configs,
  1250. },
  1251. [STAC_9200_DELL_M27] = {
  1252. .type = HDA_FIXUP_PINS,
  1253. .v.pins = dell9200_m27_pin_configs,
  1254. },
  1255. [STAC_9200_M4] = {
  1256. .type = HDA_FIXUP_PINS,
  1257. .v.pins = gateway9200_m4_pin_configs,
  1258. .chained = true,
  1259. .chain_id = STAC_9200_EAPD_INIT,
  1260. },
  1261. [STAC_9200_M4_2] = {
  1262. .type = HDA_FIXUP_PINS,
  1263. .v.pins = gateway9200_m4_2_pin_configs,
  1264. .chained = true,
  1265. .chain_id = STAC_9200_EAPD_INIT,
  1266. },
  1267. [STAC_9200_PANASONIC] = {
  1268. .type = HDA_FIXUP_FUNC,
  1269. .v.func = stac9200_fixup_panasonic,
  1270. },
  1271. [STAC_9200_EAPD_INIT] = {
  1272. .type = HDA_FIXUP_VERBS,
  1273. .v.verbs = (const struct hda_verb[]) {
  1274. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1275. {}
  1276. },
  1277. },
  1278. };
  1279. static const struct hda_model_fixup stac9200_models[] = {
  1280. { .id = STAC_REF, .name = "ref" },
  1281. { .id = STAC_9200_OQO, .name = "oqo" },
  1282. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1283. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1284. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1285. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1286. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1287. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1288. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1289. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1290. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1291. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1292. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1293. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1294. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1295. {}
  1296. };
  1297. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1298. /* SigmaTel reference board */
  1299. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1300. "DFI LanParty", STAC_REF),
  1301. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1302. "DFI LanParty", STAC_REF),
  1303. /* Dell laptops have BIOS problem */
  1304. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1305. "unknown Dell", STAC_9200_DELL_D21),
  1306. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1307. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1308. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1309. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1310. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1311. "unknown Dell", STAC_9200_DELL_D22),
  1312. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1313. "unknown Dell", STAC_9200_DELL_D22),
  1314. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1315. "Dell Latitude D620", STAC_9200_DELL_M22),
  1316. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1317. "unknown Dell", STAC_9200_DELL_D23),
  1318. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1319. "unknown Dell", STAC_9200_DELL_D23),
  1320. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1321. "unknown Dell", STAC_9200_DELL_M22),
  1322. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1323. "unknown Dell", STAC_9200_DELL_M24),
  1324. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1325. "unknown Dell", STAC_9200_DELL_M24),
  1326. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1327. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1328. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1329. "Dell Latitude D820", STAC_9200_DELL_M22),
  1330. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1331. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1332. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1333. "Dell XPS M1710", STAC_9200_DELL_M23),
  1334. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1335. "Dell Precision M90", STAC_9200_DELL_M23),
  1336. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1337. "unknown Dell", STAC_9200_DELL_M22),
  1338. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1339. "unknown Dell", STAC_9200_DELL_M22),
  1340. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1341. "unknown Dell", STAC_9200_DELL_M22),
  1342. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1343. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1344. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1345. "unknown Dell", STAC_9200_DELL_D23),
  1346. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1347. "unknown Dell", STAC_9200_DELL_D23),
  1348. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1349. "unknown Dell", STAC_9200_DELL_D21),
  1350. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1351. "unknown Dell", STAC_9200_DELL_D23),
  1352. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1353. "unknown Dell", STAC_9200_DELL_D21),
  1354. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1355. "unknown Dell", STAC_9200_DELL_M25),
  1356. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1357. "unknown Dell", STAC_9200_DELL_M25),
  1358. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1359. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1360. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1361. "unknown Dell", STAC_9200_DELL_M26),
  1362. /* Panasonic */
  1363. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1364. /* Gateway machines needs EAPD to be set on resume */
  1365. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1366. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1367. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1368. /* OQO Mobile */
  1369. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1370. {} /* terminator */
  1371. };
  1372. static const struct hda_pintbl ref925x_pin_configs[] = {
  1373. { 0x07, 0x40c003f0 },
  1374. { 0x08, 0x424503f2 },
  1375. { 0x0a, 0x01813022 },
  1376. { 0x0b, 0x02a19021 },
  1377. { 0x0c, 0x90a70320 },
  1378. { 0x0d, 0x02214210 },
  1379. { 0x10, 0x01019020 },
  1380. { 0x11, 0x9033032e },
  1381. {}
  1382. };
  1383. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1384. { 0x07, 0x40c003f4 },
  1385. { 0x08, 0x424503f2 },
  1386. { 0x0a, 0x400000f3 },
  1387. { 0x0b, 0x02a19020 },
  1388. { 0x0c, 0x40a000f0 },
  1389. { 0x0d, 0x90100210 },
  1390. { 0x10, 0x400003f1 },
  1391. { 0x11, 0x9033032e },
  1392. {}
  1393. };
  1394. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1395. { 0x07, 0x40c003f4 },
  1396. { 0x08, 0x424503f2 },
  1397. { 0x0a, 0x400000f3 },
  1398. { 0x0b, 0x02a19020 },
  1399. { 0x0c, 0x40a000f0 },
  1400. { 0x0d, 0x90100210 },
  1401. { 0x10, 0x400003f1 },
  1402. { 0x11, 0x9033032e },
  1403. {}
  1404. };
  1405. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1406. { 0x07, 0x40c003f4 },
  1407. { 0x08, 0x424503f2 },
  1408. { 0x0a, 0x400000f3 },
  1409. { 0x0b, 0x02a19020 },
  1410. { 0x0c, 0x40a000f0 },
  1411. { 0x0d, 0x90100210 },
  1412. { 0x10, 0x400003f1 },
  1413. { 0x11, 0x9033032e },
  1414. {}
  1415. };
  1416. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1417. { 0x07, 0x40c003f4 },
  1418. { 0x08, 0x424503f2 },
  1419. { 0x0a, 0x400000f3 },
  1420. { 0x0b, 0x02a19020 },
  1421. { 0x0c, 0x40a000f0 },
  1422. { 0x0d, 0x90100210 },
  1423. { 0x10, 0x400003f1 },
  1424. { 0x11, 0x9033032e },
  1425. {}
  1426. };
  1427. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1428. { 0x07, 0x40c003f4 },
  1429. { 0x08, 0x424503f2 },
  1430. { 0x0a, 0x400000f3 },
  1431. { 0x0b, 0x02a19020 },
  1432. { 0x0c, 0x40a000f0 },
  1433. { 0x0d, 0x90100210 },
  1434. { 0x10, 0x400003f1 },
  1435. { 0x11, 0x503303f3 },
  1436. {}
  1437. };
  1438. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1439. { 0x07, 0x40c003f4 },
  1440. { 0x08, 0x424503f2 },
  1441. { 0x0a, 0x400000f3 },
  1442. { 0x0b, 0x02a19020 },
  1443. { 0x0c, 0x40a000f0 },
  1444. { 0x0d, 0x90100210 },
  1445. { 0x10, 0x400003f1 },
  1446. { 0x11, 0x9033032e },
  1447. {}
  1448. };
  1449. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1450. { 0x07, 0x40c003f4 },
  1451. { 0x08, 0x424503f2 },
  1452. { 0x0a, 0x400000f3 },
  1453. { 0x0b, 0x02a19020 },
  1454. { 0x0c, 0x40a000f0 },
  1455. { 0x0d, 0x90100210 },
  1456. { 0x10, 0x400003f1 },
  1457. { 0x11, 0x90330320 },
  1458. {}
  1459. };
  1460. static const struct hda_fixup stac925x_fixups[] = {
  1461. [STAC_REF] = {
  1462. .type = HDA_FIXUP_PINS,
  1463. .v.pins = ref925x_pin_configs,
  1464. },
  1465. [STAC_M1] = {
  1466. .type = HDA_FIXUP_PINS,
  1467. .v.pins = stac925xM1_pin_configs,
  1468. },
  1469. [STAC_M1_2] = {
  1470. .type = HDA_FIXUP_PINS,
  1471. .v.pins = stac925xM1_2_pin_configs,
  1472. },
  1473. [STAC_M2] = {
  1474. .type = HDA_FIXUP_PINS,
  1475. .v.pins = stac925xM2_pin_configs,
  1476. },
  1477. [STAC_M2_2] = {
  1478. .type = HDA_FIXUP_PINS,
  1479. .v.pins = stac925xM2_2_pin_configs,
  1480. },
  1481. [STAC_M3] = {
  1482. .type = HDA_FIXUP_PINS,
  1483. .v.pins = stac925xM3_pin_configs,
  1484. },
  1485. [STAC_M5] = {
  1486. .type = HDA_FIXUP_PINS,
  1487. .v.pins = stac925xM5_pin_configs,
  1488. },
  1489. [STAC_M6] = {
  1490. .type = HDA_FIXUP_PINS,
  1491. .v.pins = stac925xM6_pin_configs,
  1492. },
  1493. };
  1494. static const struct hda_model_fixup stac925x_models[] = {
  1495. { .id = STAC_REF, .name = "ref" },
  1496. { .id = STAC_M1, .name = "m1" },
  1497. { .id = STAC_M1_2, .name = "m1-2" },
  1498. { .id = STAC_M2, .name = "m2" },
  1499. { .id = STAC_M2_2, .name = "m2-2" },
  1500. { .id = STAC_M3, .name = "m3" },
  1501. { .id = STAC_M5, .name = "m5" },
  1502. { .id = STAC_M6, .name = "m6" },
  1503. {}
  1504. };
  1505. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1506. /* SigmaTel reference board */
  1507. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1508. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1509. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1510. /* Default table for unknown ID */
  1511. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1512. /* gateway machines are checked via codec ssid */
  1513. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1514. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1515. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1516. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1517. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1518. /* Not sure about the brand name for those */
  1519. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1520. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1521. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1522. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1523. {} /* terminator */
  1524. };
  1525. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1526. { 0x0a, 0x02214030 },
  1527. { 0x0b, 0x02a19040 },
  1528. { 0x0c, 0x01a19020 },
  1529. { 0x0d, 0x02214030 },
  1530. { 0x0e, 0x0181302e },
  1531. { 0x0f, 0x01014010 },
  1532. { 0x10, 0x01014020 },
  1533. { 0x11, 0x01014030 },
  1534. { 0x12, 0x02319040 },
  1535. { 0x13, 0x90a000f0 },
  1536. { 0x14, 0x90a000f0 },
  1537. { 0x22, 0x01452050 },
  1538. { 0x23, 0x01452050 },
  1539. {}
  1540. };
  1541. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1542. { 0x0a, 0x0321101f },
  1543. { 0x0b, 0x4f00000f },
  1544. { 0x0c, 0x4f0000f0 },
  1545. { 0x0d, 0x90170110 },
  1546. { 0x0e, 0x03a11020 },
  1547. { 0x0f, 0x0321101f },
  1548. { 0x10, 0x4f0000f0 },
  1549. { 0x11, 0x4f0000f0 },
  1550. { 0x12, 0x4f0000f0 },
  1551. { 0x13, 0x90a60160 },
  1552. { 0x14, 0x4f0000f0 },
  1553. { 0x22, 0x4f0000f0 },
  1554. { 0x23, 0x4f0000f0 },
  1555. {}
  1556. };
  1557. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1558. { 0x0a, 0x0321101f },
  1559. { 0x0b, 0x0321101f },
  1560. { 0x0c, 0x03a11020 },
  1561. { 0x0d, 0x03014020 },
  1562. { 0x0e, 0x90170110 },
  1563. { 0x0f, 0x4f0000f0 },
  1564. { 0x10, 0x4f0000f0 },
  1565. { 0x11, 0x4f0000f0 },
  1566. { 0x12, 0x4f0000f0 },
  1567. { 0x13, 0x90a60160 },
  1568. { 0x14, 0x4f0000f0 },
  1569. { 0x22, 0x4f0000f0 },
  1570. { 0x23, 0x904601b0 },
  1571. {}
  1572. };
  1573. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1574. { 0x0a, 0x02214230 },
  1575. { 0x0b, 0x02A19240 },
  1576. { 0x0c, 0x01013214 },
  1577. { 0x0d, 0x01014210 },
  1578. { 0x0e, 0x01A19250 },
  1579. { 0x0f, 0x01011212 },
  1580. { 0x10, 0x01016211 },
  1581. {}
  1582. };
  1583. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1584. const struct hda_fixup *fix, int action)
  1585. {
  1586. struct sigmatel_spec *spec = codec->spec;
  1587. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1588. return;
  1589. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1590. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1591. }
  1592. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1593. {
  1594. struct sigmatel_spec *spec = codec->spec;
  1595. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1596. spec->eapd_switch = 0;
  1597. }
  1598. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1599. const struct hda_fixup *fix, int action)
  1600. {
  1601. struct sigmatel_spec *spec = codec->spec;
  1602. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1603. return;
  1604. stac92hd73xx_fixup_dell(codec);
  1605. snd_hda_add_verbs(codec, dell_eq_core_init);
  1606. spec->volknob_init = 1;
  1607. }
  1608. /* Analog Mics */
  1609. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1610. const struct hda_fixup *fix, int action)
  1611. {
  1612. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1613. return;
  1614. stac92hd73xx_fixup_dell(codec);
  1615. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1616. }
  1617. /* Digital Mics */
  1618. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1619. const struct hda_fixup *fix, int action)
  1620. {
  1621. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1622. return;
  1623. stac92hd73xx_fixup_dell(codec);
  1624. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1625. }
  1626. /* Both */
  1627. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1628. const struct hda_fixup *fix, int action)
  1629. {
  1630. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1631. return;
  1632. stac92hd73xx_fixup_dell(codec);
  1633. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1634. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1635. }
  1636. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1637. const struct hda_fixup *fix, int action)
  1638. {
  1639. struct sigmatel_spec *spec = codec->spec;
  1640. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1641. return;
  1642. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1643. spec->eapd_switch = 0;
  1644. }
  1645. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1646. const struct hda_fixup *fix, int action)
  1647. {
  1648. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1649. codec->no_jack_detect = 1;
  1650. }
  1651. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1652. [STAC_92HD73XX_REF] = {
  1653. .type = HDA_FIXUP_FUNC,
  1654. .v.func = stac92hd73xx_fixup_ref,
  1655. },
  1656. [STAC_DELL_M6_AMIC] = {
  1657. .type = HDA_FIXUP_FUNC,
  1658. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1659. },
  1660. [STAC_DELL_M6_DMIC] = {
  1661. .type = HDA_FIXUP_FUNC,
  1662. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1663. },
  1664. [STAC_DELL_M6_BOTH] = {
  1665. .type = HDA_FIXUP_FUNC,
  1666. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1667. },
  1668. [STAC_DELL_EQ] = {
  1669. .type = HDA_FIXUP_FUNC,
  1670. .v.func = stac92hd73xx_fixup_dell_eq,
  1671. },
  1672. [STAC_ALIENWARE_M17X] = {
  1673. .type = HDA_FIXUP_FUNC,
  1674. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1675. },
  1676. [STAC_92HD73XX_INTEL] = {
  1677. .type = HDA_FIXUP_PINS,
  1678. .v.pins = intel_dg45id_pin_configs,
  1679. },
  1680. [STAC_92HD73XX_NO_JD] = {
  1681. .type = HDA_FIXUP_FUNC,
  1682. .v.func = stac92hd73xx_fixup_no_jd,
  1683. }
  1684. };
  1685. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1686. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1687. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1688. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1689. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1690. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1691. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1692. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1693. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1694. {}
  1695. };
  1696. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1697. /* SigmaTel reference board */
  1698. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1699. "DFI LanParty", STAC_92HD73XX_REF),
  1700. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1701. "DFI LanParty", STAC_92HD73XX_REF),
  1702. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1703. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1704. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1705. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1706. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1707. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1708. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1709. "unknown Dell", STAC_DELL_M6_DMIC),
  1710. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1711. "unknown Dell", STAC_DELL_M6_BOTH),
  1712. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1713. "unknown Dell", STAC_DELL_M6_BOTH),
  1714. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1715. "unknown Dell", STAC_DELL_M6_AMIC),
  1716. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1717. "unknown Dell", STAC_DELL_M6_AMIC),
  1718. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1719. "unknown Dell", STAC_DELL_M6_DMIC),
  1720. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1721. "unknown Dell", STAC_DELL_M6_DMIC),
  1722. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1723. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1724. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1725. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1726. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1727. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1728. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1729. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1730. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1731. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1732. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1733. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1734. /* codec SSID matching */
  1735. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1736. "Alienware M17x", STAC_ALIENWARE_M17X),
  1737. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1738. "Alienware M17x", STAC_ALIENWARE_M17X),
  1739. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1740. "Alienware M17x R3", STAC_DELL_EQ),
  1741. {} /* terminator */
  1742. };
  1743. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1744. { 0x0a, 0x02214030 },
  1745. { 0x0b, 0x02211010 },
  1746. { 0x0c, 0x02a19020 },
  1747. { 0x0d, 0x02170130 },
  1748. { 0x0e, 0x01014050 },
  1749. { 0x0f, 0x01819040 },
  1750. { 0x10, 0x01014020 },
  1751. { 0x11, 0x90a3014e },
  1752. { 0x1f, 0x01451160 },
  1753. { 0x20, 0x98560170 },
  1754. {}
  1755. };
  1756. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1757. { 0x0a, 0x0221403f },
  1758. { 0x0b, 0x0221101f },
  1759. { 0x0c, 0x02a19020 },
  1760. { 0x0d, 0x90170110 },
  1761. { 0x0e, 0x40f000f0 },
  1762. { 0x0f, 0x40f000f0 },
  1763. { 0x10, 0x40f000f0 },
  1764. { 0x11, 0x90a60160 },
  1765. { 0x1f, 0x40f000f0 },
  1766. { 0x20, 0x40f000f0 },
  1767. {}
  1768. };
  1769. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1770. { 0x0a, 0x02a11020 },
  1771. { 0x0b, 0x0221101f },
  1772. { 0x0c, 0x400000f0 },
  1773. { 0x0d, 0x90170110 },
  1774. { 0x0e, 0x400000f1 },
  1775. { 0x0f, 0x400000f2 },
  1776. { 0x10, 0x400000f3 },
  1777. { 0x11, 0x90a60160 },
  1778. { 0x1f, 0x400000f4 },
  1779. { 0x20, 0x400000f5 },
  1780. {}
  1781. };
  1782. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1783. { 0x0a, 0x03a12050 },
  1784. { 0x0b, 0x0321201f },
  1785. { 0x0c, 0x40f000f0 },
  1786. { 0x0d, 0x90170110 },
  1787. { 0x0e, 0x40f000f0 },
  1788. { 0x0f, 0x40f000f0 },
  1789. { 0x10, 0x90170110 },
  1790. { 0x11, 0xd5a30140 },
  1791. { 0x1f, 0x40f000f0 },
  1792. { 0x20, 0x40f000f0 },
  1793. {}
  1794. };
  1795. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1796. { 0x0a, 0x01813050 },
  1797. { 0x0b, 0x0421201f },
  1798. { 0x0c, 0x04a1205e },
  1799. { 0x0d, 0x96130310 },
  1800. { 0x0e, 0x96130310 },
  1801. { 0x0f, 0x0101401f },
  1802. { 0x10, 0x1111611f },
  1803. { 0x11, 0xd5a30130 },
  1804. {}
  1805. };
  1806. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1807. { 0x0a, 0x40f000f0 },
  1808. { 0x0b, 0x0221101f },
  1809. { 0x0c, 0x02a11020 },
  1810. { 0x0d, 0x92170110 },
  1811. { 0x0e, 0x40f000f0 },
  1812. { 0x0f, 0x92170110 },
  1813. { 0x10, 0x40f000f0 },
  1814. { 0x11, 0xd5a30130 },
  1815. { 0x1f, 0x40f000f0 },
  1816. { 0x20, 0x40f000f0 },
  1817. {}
  1818. };
  1819. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1820. const struct hda_fixup *fix, int action)
  1821. {
  1822. struct sigmatel_spec *spec = codec->spec;
  1823. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1824. return;
  1825. if (hp_bnb2011_with_dock(codec)) {
  1826. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1827. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1828. }
  1829. if (find_mute_led_cfg(codec, spec->default_polarity))
  1830. snd_printd("mute LED gpio %d polarity %d\n",
  1831. spec->gpio_led,
  1832. spec->gpio_led_polarity);
  1833. }
  1834. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1835. const struct hda_fixup *fix, int action)
  1836. {
  1837. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1838. return;
  1839. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1840. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1841. }
  1842. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1843. const struct hda_fixup *fix, int action)
  1844. {
  1845. struct sigmatel_spec *spec = codec->spec;
  1846. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1847. spec->default_polarity = 0;
  1848. }
  1849. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1850. const struct hda_fixup *fix, int action)
  1851. {
  1852. struct sigmatel_spec *spec = codec->spec;
  1853. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1854. spec->default_polarity = 1;
  1855. }
  1856. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1857. const struct hda_fixup *fix, int action)
  1858. {
  1859. struct sigmatel_spec *spec = codec->spec;
  1860. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1861. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1862. codec->bus->avoid_link_reset = 1;
  1863. }
  1864. }
  1865. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1866. const struct hda_fixup *fix, int action)
  1867. {
  1868. struct sigmatel_spec *spec = codec->spec;
  1869. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1870. spec->headset_jack = 1;
  1871. }
  1872. static const struct hda_verb hp_bnb13_eq_verbs[] = {
  1873. /* 44.1KHz base */
  1874. { 0x22, 0x7A6, 0x3E },
  1875. { 0x22, 0x7A7, 0x68 },
  1876. { 0x22, 0x7A8, 0x17 },
  1877. { 0x22, 0x7A9, 0x3E },
  1878. { 0x22, 0x7AA, 0x68 },
  1879. { 0x22, 0x7AB, 0x17 },
  1880. { 0x22, 0x7AC, 0x00 },
  1881. { 0x22, 0x7AD, 0x80 },
  1882. { 0x22, 0x7A6, 0x83 },
  1883. { 0x22, 0x7A7, 0x2F },
  1884. { 0x22, 0x7A8, 0xD1 },
  1885. { 0x22, 0x7A9, 0x83 },
  1886. { 0x22, 0x7AA, 0x2F },
  1887. { 0x22, 0x7AB, 0xD1 },
  1888. { 0x22, 0x7AC, 0x01 },
  1889. { 0x22, 0x7AD, 0x80 },
  1890. { 0x22, 0x7A6, 0x3E },
  1891. { 0x22, 0x7A7, 0x68 },
  1892. { 0x22, 0x7A8, 0x17 },
  1893. { 0x22, 0x7A9, 0x3E },
  1894. { 0x22, 0x7AA, 0x68 },
  1895. { 0x22, 0x7AB, 0x17 },
  1896. { 0x22, 0x7AC, 0x02 },
  1897. { 0x22, 0x7AD, 0x80 },
  1898. { 0x22, 0x7A6, 0x7C },
  1899. { 0x22, 0x7A7, 0xC6 },
  1900. { 0x22, 0x7A8, 0x0C },
  1901. { 0x22, 0x7A9, 0x7C },
  1902. { 0x22, 0x7AA, 0xC6 },
  1903. { 0x22, 0x7AB, 0x0C },
  1904. { 0x22, 0x7AC, 0x03 },
  1905. { 0x22, 0x7AD, 0x80 },
  1906. { 0x22, 0x7A6, 0xC3 },
  1907. { 0x22, 0x7A7, 0x25 },
  1908. { 0x22, 0x7A8, 0xAF },
  1909. { 0x22, 0x7A9, 0xC3 },
  1910. { 0x22, 0x7AA, 0x25 },
  1911. { 0x22, 0x7AB, 0xAF },
  1912. { 0x22, 0x7AC, 0x04 },
  1913. { 0x22, 0x7AD, 0x80 },
  1914. { 0x22, 0x7A6, 0x3E },
  1915. { 0x22, 0x7A7, 0x85 },
  1916. { 0x22, 0x7A8, 0x73 },
  1917. { 0x22, 0x7A9, 0x3E },
  1918. { 0x22, 0x7AA, 0x85 },
  1919. { 0x22, 0x7AB, 0x73 },
  1920. { 0x22, 0x7AC, 0x05 },
  1921. { 0x22, 0x7AD, 0x80 },
  1922. { 0x22, 0x7A6, 0x85 },
  1923. { 0x22, 0x7A7, 0x39 },
  1924. { 0x22, 0x7A8, 0xC7 },
  1925. { 0x22, 0x7A9, 0x85 },
  1926. { 0x22, 0x7AA, 0x39 },
  1927. { 0x22, 0x7AB, 0xC7 },
  1928. { 0x22, 0x7AC, 0x06 },
  1929. { 0x22, 0x7AD, 0x80 },
  1930. { 0x22, 0x7A6, 0x3C },
  1931. { 0x22, 0x7A7, 0x90 },
  1932. { 0x22, 0x7A8, 0xB0 },
  1933. { 0x22, 0x7A9, 0x3C },
  1934. { 0x22, 0x7AA, 0x90 },
  1935. { 0x22, 0x7AB, 0xB0 },
  1936. { 0x22, 0x7AC, 0x07 },
  1937. { 0x22, 0x7AD, 0x80 },
  1938. { 0x22, 0x7A6, 0x7A },
  1939. { 0x22, 0x7A7, 0xC6 },
  1940. { 0x22, 0x7A8, 0x39 },
  1941. { 0x22, 0x7A9, 0x7A },
  1942. { 0x22, 0x7AA, 0xC6 },
  1943. { 0x22, 0x7AB, 0x39 },
  1944. { 0x22, 0x7AC, 0x08 },
  1945. { 0x22, 0x7AD, 0x80 },
  1946. { 0x22, 0x7A6, 0xC4 },
  1947. { 0x22, 0x7A7, 0xE9 },
  1948. { 0x22, 0x7A8, 0xDC },
  1949. { 0x22, 0x7A9, 0xC4 },
  1950. { 0x22, 0x7AA, 0xE9 },
  1951. { 0x22, 0x7AB, 0xDC },
  1952. { 0x22, 0x7AC, 0x09 },
  1953. { 0x22, 0x7AD, 0x80 },
  1954. { 0x22, 0x7A6, 0x3D },
  1955. { 0x22, 0x7A7, 0xE1 },
  1956. { 0x22, 0x7A8, 0x0D },
  1957. { 0x22, 0x7A9, 0x3D },
  1958. { 0x22, 0x7AA, 0xE1 },
  1959. { 0x22, 0x7AB, 0x0D },
  1960. { 0x22, 0x7AC, 0x0A },
  1961. { 0x22, 0x7AD, 0x80 },
  1962. { 0x22, 0x7A6, 0x89 },
  1963. { 0x22, 0x7A7, 0xB6 },
  1964. { 0x22, 0x7A8, 0xEB },
  1965. { 0x22, 0x7A9, 0x89 },
  1966. { 0x22, 0x7AA, 0xB6 },
  1967. { 0x22, 0x7AB, 0xEB },
  1968. { 0x22, 0x7AC, 0x0B },
  1969. { 0x22, 0x7AD, 0x80 },
  1970. { 0x22, 0x7A6, 0x39 },
  1971. { 0x22, 0x7A7, 0x9D },
  1972. { 0x22, 0x7A8, 0xFE },
  1973. { 0x22, 0x7A9, 0x39 },
  1974. { 0x22, 0x7AA, 0x9D },
  1975. { 0x22, 0x7AB, 0xFE },
  1976. { 0x22, 0x7AC, 0x0C },
  1977. { 0x22, 0x7AD, 0x80 },
  1978. { 0x22, 0x7A6, 0x76 },
  1979. { 0x22, 0x7A7, 0x49 },
  1980. { 0x22, 0x7A8, 0x15 },
  1981. { 0x22, 0x7A9, 0x76 },
  1982. { 0x22, 0x7AA, 0x49 },
  1983. { 0x22, 0x7AB, 0x15 },
  1984. { 0x22, 0x7AC, 0x0D },
  1985. { 0x22, 0x7AD, 0x80 },
  1986. { 0x22, 0x7A6, 0xC8 },
  1987. { 0x22, 0x7A7, 0x80 },
  1988. { 0x22, 0x7A8, 0xF5 },
  1989. { 0x22, 0x7A9, 0xC8 },
  1990. { 0x22, 0x7AA, 0x80 },
  1991. { 0x22, 0x7AB, 0xF5 },
  1992. { 0x22, 0x7AC, 0x0E },
  1993. { 0x22, 0x7AD, 0x80 },
  1994. { 0x22, 0x7A6, 0x40 },
  1995. { 0x22, 0x7A7, 0x00 },
  1996. { 0x22, 0x7A8, 0x00 },
  1997. { 0x22, 0x7A9, 0x40 },
  1998. { 0x22, 0x7AA, 0x00 },
  1999. { 0x22, 0x7AB, 0x00 },
  2000. { 0x22, 0x7AC, 0x0F },
  2001. { 0x22, 0x7AD, 0x80 },
  2002. { 0x22, 0x7A6, 0x90 },
  2003. { 0x22, 0x7A7, 0x68 },
  2004. { 0x22, 0x7A8, 0xF1 },
  2005. { 0x22, 0x7A9, 0x90 },
  2006. { 0x22, 0x7AA, 0x68 },
  2007. { 0x22, 0x7AB, 0xF1 },
  2008. { 0x22, 0x7AC, 0x10 },
  2009. { 0x22, 0x7AD, 0x80 },
  2010. { 0x22, 0x7A6, 0x34 },
  2011. { 0x22, 0x7A7, 0x47 },
  2012. { 0x22, 0x7A8, 0x6C },
  2013. { 0x22, 0x7A9, 0x34 },
  2014. { 0x22, 0x7AA, 0x47 },
  2015. { 0x22, 0x7AB, 0x6C },
  2016. { 0x22, 0x7AC, 0x11 },
  2017. { 0x22, 0x7AD, 0x80 },
  2018. { 0x22, 0x7A6, 0x6F },
  2019. { 0x22, 0x7A7, 0x97 },
  2020. { 0x22, 0x7A8, 0x0F },
  2021. { 0x22, 0x7A9, 0x6F },
  2022. { 0x22, 0x7AA, 0x97 },
  2023. { 0x22, 0x7AB, 0x0F },
  2024. { 0x22, 0x7AC, 0x12 },
  2025. { 0x22, 0x7AD, 0x80 },
  2026. { 0x22, 0x7A6, 0xCB },
  2027. { 0x22, 0x7A7, 0xB8 },
  2028. { 0x22, 0x7A8, 0x94 },
  2029. { 0x22, 0x7A9, 0xCB },
  2030. { 0x22, 0x7AA, 0xB8 },
  2031. { 0x22, 0x7AB, 0x94 },
  2032. { 0x22, 0x7AC, 0x13 },
  2033. { 0x22, 0x7AD, 0x80 },
  2034. { 0x22, 0x7A6, 0x40 },
  2035. { 0x22, 0x7A7, 0x00 },
  2036. { 0x22, 0x7A8, 0x00 },
  2037. { 0x22, 0x7A9, 0x40 },
  2038. { 0x22, 0x7AA, 0x00 },
  2039. { 0x22, 0x7AB, 0x00 },
  2040. { 0x22, 0x7AC, 0x14 },
  2041. { 0x22, 0x7AD, 0x80 },
  2042. { 0x22, 0x7A6, 0x95 },
  2043. { 0x22, 0x7A7, 0x76 },
  2044. { 0x22, 0x7A8, 0x5B },
  2045. { 0x22, 0x7A9, 0x95 },
  2046. { 0x22, 0x7AA, 0x76 },
  2047. { 0x22, 0x7AB, 0x5B },
  2048. { 0x22, 0x7AC, 0x15 },
  2049. { 0x22, 0x7AD, 0x80 },
  2050. { 0x22, 0x7A6, 0x31 },
  2051. { 0x22, 0x7A7, 0xAC },
  2052. { 0x22, 0x7A8, 0x31 },
  2053. { 0x22, 0x7A9, 0x31 },
  2054. { 0x22, 0x7AA, 0xAC },
  2055. { 0x22, 0x7AB, 0x31 },
  2056. { 0x22, 0x7AC, 0x16 },
  2057. { 0x22, 0x7AD, 0x80 },
  2058. { 0x22, 0x7A6, 0x6A },
  2059. { 0x22, 0x7A7, 0x89 },
  2060. { 0x22, 0x7A8, 0xA5 },
  2061. { 0x22, 0x7A9, 0x6A },
  2062. { 0x22, 0x7AA, 0x89 },
  2063. { 0x22, 0x7AB, 0xA5 },
  2064. { 0x22, 0x7AC, 0x17 },
  2065. { 0x22, 0x7AD, 0x80 },
  2066. { 0x22, 0x7A6, 0xCE },
  2067. { 0x22, 0x7A7, 0x53 },
  2068. { 0x22, 0x7A8, 0xCF },
  2069. { 0x22, 0x7A9, 0xCE },
  2070. { 0x22, 0x7AA, 0x53 },
  2071. { 0x22, 0x7AB, 0xCF },
  2072. { 0x22, 0x7AC, 0x18 },
  2073. { 0x22, 0x7AD, 0x80 },
  2074. { 0x22, 0x7A6, 0x40 },
  2075. { 0x22, 0x7A7, 0x00 },
  2076. { 0x22, 0x7A8, 0x00 },
  2077. { 0x22, 0x7A9, 0x40 },
  2078. { 0x22, 0x7AA, 0x00 },
  2079. { 0x22, 0x7AB, 0x00 },
  2080. { 0x22, 0x7AC, 0x19 },
  2081. { 0x22, 0x7AD, 0x80 },
  2082. /* 48KHz base */
  2083. { 0x22, 0x7A6, 0x3E },
  2084. { 0x22, 0x7A7, 0x88 },
  2085. { 0x22, 0x7A8, 0xDC },
  2086. { 0x22, 0x7A9, 0x3E },
  2087. { 0x22, 0x7AA, 0x88 },
  2088. { 0x22, 0x7AB, 0xDC },
  2089. { 0x22, 0x7AC, 0x1A },
  2090. { 0x22, 0x7AD, 0x80 },
  2091. { 0x22, 0x7A6, 0x82 },
  2092. { 0x22, 0x7A7, 0xEE },
  2093. { 0x22, 0x7A8, 0x46 },
  2094. { 0x22, 0x7A9, 0x82 },
  2095. { 0x22, 0x7AA, 0xEE },
  2096. { 0x22, 0x7AB, 0x46 },
  2097. { 0x22, 0x7AC, 0x1B },
  2098. { 0x22, 0x7AD, 0x80 },
  2099. { 0x22, 0x7A6, 0x3E },
  2100. { 0x22, 0x7A7, 0x88 },
  2101. { 0x22, 0x7A8, 0xDC },
  2102. { 0x22, 0x7A9, 0x3E },
  2103. { 0x22, 0x7AA, 0x88 },
  2104. { 0x22, 0x7AB, 0xDC },
  2105. { 0x22, 0x7AC, 0x1C },
  2106. { 0x22, 0x7AD, 0x80 },
  2107. { 0x22, 0x7A6, 0x7D },
  2108. { 0x22, 0x7A7, 0x09 },
  2109. { 0x22, 0x7A8, 0x28 },
  2110. { 0x22, 0x7A9, 0x7D },
  2111. { 0x22, 0x7AA, 0x09 },
  2112. { 0x22, 0x7AB, 0x28 },
  2113. { 0x22, 0x7AC, 0x1D },
  2114. { 0x22, 0x7AD, 0x80 },
  2115. { 0x22, 0x7A6, 0xC2 },
  2116. { 0x22, 0x7A7, 0xE5 },
  2117. { 0x22, 0x7A8, 0xB4 },
  2118. { 0x22, 0x7A9, 0xC2 },
  2119. { 0x22, 0x7AA, 0xE5 },
  2120. { 0x22, 0x7AB, 0xB4 },
  2121. { 0x22, 0x7AC, 0x1E },
  2122. { 0x22, 0x7AD, 0x80 },
  2123. { 0x22, 0x7A6, 0x3E },
  2124. { 0x22, 0x7A7, 0xA3 },
  2125. { 0x22, 0x7A8, 0x1F },
  2126. { 0x22, 0x7A9, 0x3E },
  2127. { 0x22, 0x7AA, 0xA3 },
  2128. { 0x22, 0x7AB, 0x1F },
  2129. { 0x22, 0x7AC, 0x1F },
  2130. { 0x22, 0x7AD, 0x80 },
  2131. { 0x22, 0x7A6, 0x84 },
  2132. { 0x22, 0x7A7, 0xCA },
  2133. { 0x22, 0x7A8, 0xF1 },
  2134. { 0x22, 0x7A9, 0x84 },
  2135. { 0x22, 0x7AA, 0xCA },
  2136. { 0x22, 0x7AB, 0xF1 },
  2137. { 0x22, 0x7AC, 0x20 },
  2138. { 0x22, 0x7AD, 0x80 },
  2139. { 0x22, 0x7A6, 0x3C },
  2140. { 0x22, 0x7A7, 0xD5 },
  2141. { 0x22, 0x7A8, 0x9C },
  2142. { 0x22, 0x7A9, 0x3C },
  2143. { 0x22, 0x7AA, 0xD5 },
  2144. { 0x22, 0x7AB, 0x9C },
  2145. { 0x22, 0x7AC, 0x21 },
  2146. { 0x22, 0x7AD, 0x80 },
  2147. { 0x22, 0x7A6, 0x7B },
  2148. { 0x22, 0x7A7, 0x35 },
  2149. { 0x22, 0x7A8, 0x0F },
  2150. { 0x22, 0x7A9, 0x7B },
  2151. { 0x22, 0x7AA, 0x35 },
  2152. { 0x22, 0x7AB, 0x0F },
  2153. { 0x22, 0x7AC, 0x22 },
  2154. { 0x22, 0x7AD, 0x80 },
  2155. { 0x22, 0x7A6, 0xC4 },
  2156. { 0x22, 0x7A7, 0x87 },
  2157. { 0x22, 0x7A8, 0x45 },
  2158. { 0x22, 0x7A9, 0xC4 },
  2159. { 0x22, 0x7AA, 0x87 },
  2160. { 0x22, 0x7AB, 0x45 },
  2161. { 0x22, 0x7AC, 0x23 },
  2162. { 0x22, 0x7AD, 0x80 },
  2163. { 0x22, 0x7A6, 0x3E },
  2164. { 0x22, 0x7A7, 0x0A },
  2165. { 0x22, 0x7A8, 0x78 },
  2166. { 0x22, 0x7A9, 0x3E },
  2167. { 0x22, 0x7AA, 0x0A },
  2168. { 0x22, 0x7AB, 0x78 },
  2169. { 0x22, 0x7AC, 0x24 },
  2170. { 0x22, 0x7AD, 0x80 },
  2171. { 0x22, 0x7A6, 0x88 },
  2172. { 0x22, 0x7A7, 0xE2 },
  2173. { 0x22, 0x7A8, 0x05 },
  2174. { 0x22, 0x7A9, 0x88 },
  2175. { 0x22, 0x7AA, 0xE2 },
  2176. { 0x22, 0x7AB, 0x05 },
  2177. { 0x22, 0x7AC, 0x25 },
  2178. { 0x22, 0x7AD, 0x80 },
  2179. { 0x22, 0x7A6, 0x3A },
  2180. { 0x22, 0x7A7, 0x1A },
  2181. { 0x22, 0x7A8, 0xA3 },
  2182. { 0x22, 0x7A9, 0x3A },
  2183. { 0x22, 0x7AA, 0x1A },
  2184. { 0x22, 0x7AB, 0xA3 },
  2185. { 0x22, 0x7AC, 0x26 },
  2186. { 0x22, 0x7AD, 0x80 },
  2187. { 0x22, 0x7A6, 0x77 },
  2188. { 0x22, 0x7A7, 0x1D },
  2189. { 0x22, 0x7A8, 0xFB },
  2190. { 0x22, 0x7A9, 0x77 },
  2191. { 0x22, 0x7AA, 0x1D },
  2192. { 0x22, 0x7AB, 0xFB },
  2193. { 0x22, 0x7AC, 0x27 },
  2194. { 0x22, 0x7AD, 0x80 },
  2195. { 0x22, 0x7A6, 0xC7 },
  2196. { 0x22, 0x7A7, 0xDA },
  2197. { 0x22, 0x7A8, 0xE5 },
  2198. { 0x22, 0x7A9, 0xC7 },
  2199. { 0x22, 0x7AA, 0xDA },
  2200. { 0x22, 0x7AB, 0xE5 },
  2201. { 0x22, 0x7AC, 0x28 },
  2202. { 0x22, 0x7AD, 0x80 },
  2203. { 0x22, 0x7A6, 0x40 },
  2204. { 0x22, 0x7A7, 0x00 },
  2205. { 0x22, 0x7A8, 0x00 },
  2206. { 0x22, 0x7A9, 0x40 },
  2207. { 0x22, 0x7AA, 0x00 },
  2208. { 0x22, 0x7AB, 0x00 },
  2209. { 0x22, 0x7AC, 0x29 },
  2210. { 0x22, 0x7AD, 0x80 },
  2211. { 0x22, 0x7A6, 0x8E },
  2212. { 0x22, 0x7A7, 0xD7 },
  2213. { 0x22, 0x7A8, 0x22 },
  2214. { 0x22, 0x7A9, 0x8E },
  2215. { 0x22, 0x7AA, 0xD7 },
  2216. { 0x22, 0x7AB, 0x22 },
  2217. { 0x22, 0x7AC, 0x2A },
  2218. { 0x22, 0x7AD, 0x80 },
  2219. { 0x22, 0x7A6, 0x35 },
  2220. { 0x22, 0x7A7, 0x26 },
  2221. { 0x22, 0x7A8, 0xC6 },
  2222. { 0x22, 0x7A9, 0x35 },
  2223. { 0x22, 0x7AA, 0x26 },
  2224. { 0x22, 0x7AB, 0xC6 },
  2225. { 0x22, 0x7AC, 0x2B },
  2226. { 0x22, 0x7AD, 0x80 },
  2227. { 0x22, 0x7A6, 0x71 },
  2228. { 0x22, 0x7A7, 0x28 },
  2229. { 0x22, 0x7A8, 0xDE },
  2230. { 0x22, 0x7A9, 0x71 },
  2231. { 0x22, 0x7AA, 0x28 },
  2232. { 0x22, 0x7AB, 0xDE },
  2233. { 0x22, 0x7AC, 0x2C },
  2234. { 0x22, 0x7AD, 0x80 },
  2235. { 0x22, 0x7A6, 0xCA },
  2236. { 0x22, 0x7A7, 0xD9 },
  2237. { 0x22, 0x7A8, 0x3A },
  2238. { 0x22, 0x7A9, 0xCA },
  2239. { 0x22, 0x7AA, 0xD9 },
  2240. { 0x22, 0x7AB, 0x3A },
  2241. { 0x22, 0x7AC, 0x2D },
  2242. { 0x22, 0x7AD, 0x80 },
  2243. { 0x22, 0x7A6, 0x40 },
  2244. { 0x22, 0x7A7, 0x00 },
  2245. { 0x22, 0x7A8, 0x00 },
  2246. { 0x22, 0x7A9, 0x40 },
  2247. { 0x22, 0x7AA, 0x00 },
  2248. { 0x22, 0x7AB, 0x00 },
  2249. { 0x22, 0x7AC, 0x2E },
  2250. { 0x22, 0x7AD, 0x80 },
  2251. { 0x22, 0x7A6, 0x93 },
  2252. { 0x22, 0x7A7, 0x5E },
  2253. { 0x22, 0x7A8, 0xD8 },
  2254. { 0x22, 0x7A9, 0x93 },
  2255. { 0x22, 0x7AA, 0x5E },
  2256. { 0x22, 0x7AB, 0xD8 },
  2257. { 0x22, 0x7AC, 0x2F },
  2258. { 0x22, 0x7AD, 0x80 },
  2259. { 0x22, 0x7A6, 0x32 },
  2260. { 0x22, 0x7A7, 0xB7 },
  2261. { 0x22, 0x7A8, 0xB1 },
  2262. { 0x22, 0x7A9, 0x32 },
  2263. { 0x22, 0x7AA, 0xB7 },
  2264. { 0x22, 0x7AB, 0xB1 },
  2265. { 0x22, 0x7AC, 0x30 },
  2266. { 0x22, 0x7AD, 0x80 },
  2267. { 0x22, 0x7A6, 0x6C },
  2268. { 0x22, 0x7A7, 0xA1 },
  2269. { 0x22, 0x7A8, 0x28 },
  2270. { 0x22, 0x7A9, 0x6C },
  2271. { 0x22, 0x7AA, 0xA1 },
  2272. { 0x22, 0x7AB, 0x28 },
  2273. { 0x22, 0x7AC, 0x31 },
  2274. { 0x22, 0x7AD, 0x80 },
  2275. { 0x22, 0x7A6, 0xCD },
  2276. { 0x22, 0x7A7, 0x48 },
  2277. { 0x22, 0x7A8, 0x4F },
  2278. { 0x22, 0x7A9, 0xCD },
  2279. { 0x22, 0x7AA, 0x48 },
  2280. { 0x22, 0x7AB, 0x4F },
  2281. { 0x22, 0x7AC, 0x32 },
  2282. { 0x22, 0x7AD, 0x80 },
  2283. { 0x22, 0x7A6, 0x40 },
  2284. { 0x22, 0x7A7, 0x00 },
  2285. { 0x22, 0x7A8, 0x00 },
  2286. { 0x22, 0x7A9, 0x40 },
  2287. { 0x22, 0x7AA, 0x00 },
  2288. { 0x22, 0x7AB, 0x00 },
  2289. { 0x22, 0x7AC, 0x33 },
  2290. { 0x22, 0x7AD, 0x80 },
  2291. /* common */
  2292. { 0x22, 0x782, 0xC1 },
  2293. { 0x22, 0x771, 0x2C },
  2294. { 0x22, 0x772, 0x2C },
  2295. { 0x22, 0x788, 0x04 },
  2296. { 0x01, 0x7B0, 0x08 },
  2297. {}
  2298. };
  2299. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  2300. [STAC_92HD83XXX_REF] = {
  2301. .type = HDA_FIXUP_PINS,
  2302. .v.pins = ref92hd83xxx_pin_configs,
  2303. },
  2304. [STAC_92HD83XXX_PWR_REF] = {
  2305. .type = HDA_FIXUP_PINS,
  2306. .v.pins = ref92hd83xxx_pin_configs,
  2307. },
  2308. [STAC_DELL_S14] = {
  2309. .type = HDA_FIXUP_PINS,
  2310. .v.pins = dell_s14_pin_configs,
  2311. },
  2312. [STAC_DELL_VOSTRO_3500] = {
  2313. .type = HDA_FIXUP_PINS,
  2314. .v.pins = dell_vostro_3500_pin_configs,
  2315. },
  2316. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  2317. .type = HDA_FIXUP_PINS,
  2318. .v.pins = hp_cNB11_intquad_pin_configs,
  2319. .chained = true,
  2320. .chain_id = STAC_92HD83XXX_HP,
  2321. },
  2322. [STAC_92HD83XXX_HP] = {
  2323. .type = HDA_FIXUP_FUNC,
  2324. .v.func = stac92hd83xxx_fixup_hp,
  2325. },
  2326. [STAC_HP_DV7_4000] = {
  2327. .type = HDA_FIXUP_PINS,
  2328. .v.pins = hp_dv7_4000_pin_configs,
  2329. .chained = true,
  2330. .chain_id = STAC_92HD83XXX_HP,
  2331. },
  2332. [STAC_HP_ZEPHYR] = {
  2333. .type = HDA_FIXUP_FUNC,
  2334. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  2335. .chained = true,
  2336. .chain_id = STAC_92HD83XXX_HP,
  2337. },
  2338. [STAC_92HD83XXX_HP_LED] = {
  2339. .type = HDA_FIXUP_FUNC,
  2340. .v.func = stac92hd83xxx_fixup_hp_led,
  2341. .chained = true,
  2342. .chain_id = STAC_92HD83XXX_HP,
  2343. },
  2344. [STAC_92HD83XXX_HP_INV_LED] = {
  2345. .type = HDA_FIXUP_FUNC,
  2346. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  2347. .chained = true,
  2348. .chain_id = STAC_92HD83XXX_HP,
  2349. },
  2350. [STAC_92HD83XXX_HP_MIC_LED] = {
  2351. .type = HDA_FIXUP_FUNC,
  2352. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  2353. .chained = true,
  2354. .chain_id = STAC_92HD83XXX_HP,
  2355. },
  2356. [STAC_92HD83XXX_HEADSET_JACK] = {
  2357. .type = HDA_FIXUP_FUNC,
  2358. .v.func = stac92hd83xxx_fixup_headset_jack,
  2359. },
  2360. [STAC_HP_ENVY_BASS] = {
  2361. .type = HDA_FIXUP_PINS,
  2362. .v.pins = (const struct hda_pintbl[]) {
  2363. { 0x0f, 0x90170111 },
  2364. {}
  2365. },
  2366. },
  2367. [STAC_HP_BNB13_EQ] = {
  2368. .type = HDA_FIXUP_VERBS,
  2369. .v.verbs = hp_bnb13_eq_verbs,
  2370. .chained = true,
  2371. .chain_id = STAC_92HD83XXX_HP_MIC_LED,
  2372. },
  2373. };
  2374. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  2375. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  2376. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  2377. { .id = STAC_DELL_S14, .name = "dell-s14" },
  2378. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  2379. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  2380. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  2381. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  2382. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  2383. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  2384. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  2385. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  2386. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  2387. { .id = STAC_HP_BNB13_EQ, .name = "hp-bnb13-eq" },
  2388. {}
  2389. };
  2390. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  2391. /* SigmaTel reference board */
  2392. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2393. "DFI LanParty", STAC_92HD83XXX_REF),
  2394. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2395. "DFI LanParty", STAC_92HD83XXX_REF),
  2396. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  2397. "unknown Dell", STAC_DELL_S14),
  2398. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  2399. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  2400. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  2401. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  2402. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  2403. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  2404. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  2405. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  2406. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  2407. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2408. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  2409. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  2410. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  2411. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  2412. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  2413. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  2414. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  2415. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  2416. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  2417. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  2418. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  2419. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2420. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  2421. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2422. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  2423. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2424. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  2425. "HP Pavilion dv7", STAC_HP_DV7_4000),
  2426. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  2427. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2428. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  2429. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2430. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  2431. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  2432. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  2433. "HP Folio", STAC_HP_BNB13_EQ),
  2434. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18F8,
  2435. "HP bNB13", STAC_HP_BNB13_EQ),
  2436. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1909,
  2437. "HP bNB13", STAC_HP_BNB13_EQ),
  2438. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x190A,
  2439. "HP bNB13", STAC_HP_BNB13_EQ),
  2440. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1940,
  2441. "HP bNB13", STAC_HP_BNB13_EQ),
  2442. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1941,
  2443. "HP bNB13", STAC_HP_BNB13_EQ),
  2444. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1942,
  2445. "HP bNB13", STAC_HP_BNB13_EQ),
  2446. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1943,
  2447. "HP bNB13", STAC_HP_BNB13_EQ),
  2448. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1944,
  2449. "HP bNB13", STAC_HP_BNB13_EQ),
  2450. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1945,
  2451. "HP bNB13", STAC_HP_BNB13_EQ),
  2452. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1946,
  2453. "HP bNB13", STAC_HP_BNB13_EQ),
  2454. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1948,
  2455. "HP bNB13", STAC_HP_BNB13_EQ),
  2456. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1949,
  2457. "HP bNB13", STAC_HP_BNB13_EQ),
  2458. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194A,
  2459. "HP bNB13", STAC_HP_BNB13_EQ),
  2460. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194B,
  2461. "HP bNB13", STAC_HP_BNB13_EQ),
  2462. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194C,
  2463. "HP bNB13", STAC_HP_BNB13_EQ),
  2464. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194E,
  2465. "HP bNB13", STAC_HP_BNB13_EQ),
  2466. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x194F,
  2467. "HP bNB13", STAC_HP_BNB13_EQ),
  2468. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1950,
  2469. "HP bNB13", STAC_HP_BNB13_EQ),
  2470. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1951,
  2471. "HP bNB13", STAC_HP_BNB13_EQ),
  2472. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195A,
  2473. "HP bNB13", STAC_HP_BNB13_EQ),
  2474. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195B,
  2475. "HP bNB13", STAC_HP_BNB13_EQ),
  2476. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x195C,
  2477. "HP bNB13", STAC_HP_BNB13_EQ),
  2478. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1991,
  2479. "HP bNB13", STAC_HP_BNB13_EQ),
  2480. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2103,
  2481. "HP bNB13", STAC_HP_BNB13_EQ),
  2482. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2104,
  2483. "HP bNB13", STAC_HP_BNB13_EQ),
  2484. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2105,
  2485. "HP bNB13", STAC_HP_BNB13_EQ),
  2486. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2106,
  2487. "HP bNB13", STAC_HP_BNB13_EQ),
  2488. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2107,
  2489. "HP bNB13", STAC_HP_BNB13_EQ),
  2490. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2108,
  2491. "HP bNB13", STAC_HP_BNB13_EQ),
  2492. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2109,
  2493. "HP bNB13", STAC_HP_BNB13_EQ),
  2494. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210A,
  2495. "HP bNB13", STAC_HP_BNB13_EQ),
  2496. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x210B,
  2497. "HP bNB13", STAC_HP_BNB13_EQ),
  2498. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211C,
  2499. "HP bNB13", STAC_HP_BNB13_EQ),
  2500. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211D,
  2501. "HP bNB13", STAC_HP_BNB13_EQ),
  2502. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211E,
  2503. "HP bNB13", STAC_HP_BNB13_EQ),
  2504. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x211F,
  2505. "HP bNB13", STAC_HP_BNB13_EQ),
  2506. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2120,
  2507. "HP bNB13", STAC_HP_BNB13_EQ),
  2508. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2121,
  2509. "HP bNB13", STAC_HP_BNB13_EQ),
  2510. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2122,
  2511. "HP bNB13", STAC_HP_BNB13_EQ),
  2512. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2123,
  2513. "HP bNB13", STAC_HP_BNB13_EQ),
  2514. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213E,
  2515. "HP bNB13", STAC_HP_BNB13_EQ),
  2516. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x213F,
  2517. "HP bNB13", STAC_HP_BNB13_EQ),
  2518. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2140,
  2519. "HP bNB13", STAC_HP_BNB13_EQ),
  2520. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B2,
  2521. "HP bNB13", STAC_HP_BNB13_EQ),
  2522. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B3,
  2523. "HP bNB13", STAC_HP_BNB13_EQ),
  2524. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B5,
  2525. "HP bNB13", STAC_HP_BNB13_EQ),
  2526. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x21B6,
  2527. "HP bNB13", STAC_HP_BNB13_EQ),
  2528. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
  2529. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2530. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2000,
  2531. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2532. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x2100,
  2533. "HP", STAC_92HD83XXX_HP_MIC_LED),
  2534. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  2535. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2536. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  2537. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2538. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  2539. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2540. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  2541. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2542. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  2543. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2544. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  2545. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2546. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  2547. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2548. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  2549. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2550. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  2551. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2552. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  2553. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2554. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  2555. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2556. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  2557. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2558. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  2559. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2560. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  2561. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2562. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  2563. "HP", STAC_HP_ZEPHYR),
  2564. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2565. "HP Mini", STAC_92HD83XXX_HP_LED),
  2566. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2567. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2568. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2569. "HP Mini", STAC_92HD83XXX_HP_LED),
  2570. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2571. {} /* terminator */
  2572. };
  2573. /* HP dv7 bass switch - GPIO5 */
  2574. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2575. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2576. struct snd_ctl_elem_value *ucontrol)
  2577. {
  2578. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2579. struct sigmatel_spec *spec = codec->spec;
  2580. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2581. return 0;
  2582. }
  2583. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2584. struct snd_ctl_elem_value *ucontrol)
  2585. {
  2586. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2587. struct sigmatel_spec *spec = codec->spec;
  2588. unsigned int gpio_data;
  2589. gpio_data = (spec->gpio_data & ~0x20) |
  2590. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2591. if (gpio_data == spec->gpio_data)
  2592. return 0;
  2593. spec->gpio_data = gpio_data;
  2594. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2595. return 1;
  2596. }
  2597. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2598. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2599. .info = stac_hp_bass_gpio_info,
  2600. .get = stac_hp_bass_gpio_get,
  2601. .put = stac_hp_bass_gpio_put,
  2602. };
  2603. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2604. {
  2605. struct sigmatel_spec *spec = codec->spec;
  2606. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2607. &stac_hp_bass_sw_ctrl))
  2608. return -ENOMEM;
  2609. spec->gpio_mask |= 0x20;
  2610. spec->gpio_dir |= 0x20;
  2611. spec->gpio_data |= 0x20;
  2612. return 0;
  2613. }
  2614. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2615. { 0x0a, 0x02214030 },
  2616. { 0x0b, 0x02a19040 },
  2617. { 0x0c, 0x01a19020 },
  2618. { 0x0d, 0x01014010 },
  2619. { 0x0e, 0x0181302e },
  2620. { 0x0f, 0x01014010 },
  2621. { 0x14, 0x01019020 },
  2622. { 0x18, 0x90a000f0 },
  2623. { 0x19, 0x90a000f0 },
  2624. { 0x1e, 0x01452050 },
  2625. { 0x1f, 0x01452050 },
  2626. {}
  2627. };
  2628. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2629. { 0x0a, 0x0421101f },
  2630. { 0x0b, 0x04a11221 },
  2631. { 0x0c, 0x40f000f0 },
  2632. { 0x0d, 0x90170110 },
  2633. { 0x0e, 0x23a1902e },
  2634. { 0x0f, 0x23014250 },
  2635. { 0x14, 0x40f000f0 },
  2636. { 0x18, 0x90a000f0 },
  2637. { 0x19, 0x40f000f0 },
  2638. { 0x1e, 0x4f0000f0 },
  2639. { 0x1f, 0x4f0000f0 },
  2640. {}
  2641. };
  2642. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2643. { 0x0a, 0x0421101f },
  2644. { 0x0b, 0x04a11221 },
  2645. { 0x0c, 0x90a70330 },
  2646. { 0x0d, 0x90170110 },
  2647. { 0x0e, 0x23a1902e },
  2648. { 0x0f, 0x23014250 },
  2649. { 0x14, 0x40f000f0 },
  2650. { 0x18, 0x40f000f0 },
  2651. { 0x19, 0x40f000f0 },
  2652. { 0x1e, 0x044413b0 },
  2653. { 0x1f, 0x044413b0 },
  2654. {}
  2655. };
  2656. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2657. { 0x0a, 0x0421101f },
  2658. { 0x0b, 0x04a11221 },
  2659. { 0x0c, 0x90a70330 },
  2660. { 0x0d, 0x90170110 },
  2661. { 0x0e, 0x40f000f0 },
  2662. { 0x0f, 0x40f000f0 },
  2663. { 0x14, 0x40f000f0 },
  2664. { 0x18, 0x90a000f0 },
  2665. { 0x19, 0x40f000f0 },
  2666. { 0x1e, 0x044413b0 },
  2667. { 0x1f, 0x044413b0 },
  2668. {}
  2669. };
  2670. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2671. const struct hda_fixup *fix, int action)
  2672. {
  2673. struct sigmatel_spec *spec = codec->spec;
  2674. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2675. return;
  2676. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2677. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2678. }
  2679. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2680. const struct hda_fixup *fix, int action)
  2681. {
  2682. struct sigmatel_spec *spec = codec->spec;
  2683. struct hda_jack_tbl *jack;
  2684. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2685. return;
  2686. /* Enable VREF power saving on GPIO1 detect */
  2687. snd_hda_codec_write_cache(codec, codec->afg, 0,
  2688. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2689. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  2690. STAC_VREF_EVENT,
  2691. stac_vref_event);
  2692. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  2693. if (jack)
  2694. jack->private_data = 0x02;
  2695. spec->gpio_mask |= 0x02;
  2696. /* enable internal microphone */
  2697. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2698. }
  2699. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2700. const struct hda_fixup *fix, int action)
  2701. {
  2702. struct sigmatel_spec *spec = codec->spec;
  2703. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2704. return;
  2705. spec->gpio_led = 0x01;
  2706. }
  2707. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2708. const struct hda_fixup *fix, int action)
  2709. {
  2710. unsigned int cap;
  2711. switch (action) {
  2712. case HDA_FIXUP_ACT_PRE_PROBE:
  2713. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2714. break;
  2715. case HDA_FIXUP_ACT_PROBE:
  2716. /* enable bass on HP dv7 */
  2717. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2718. cap &= AC_GPIO_IO_COUNT;
  2719. if (cap >= 6)
  2720. stac_add_hp_bass_switch(codec);
  2721. break;
  2722. }
  2723. }
  2724. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2725. const struct hda_fixup *fix, int action)
  2726. {
  2727. struct sigmatel_spec *spec = codec->spec;
  2728. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2729. return;
  2730. spec->gpio_led = 0x08;
  2731. }
  2732. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2733. const struct hda_fixup *fix, int action)
  2734. {
  2735. struct sigmatel_spec *spec = codec->spec;
  2736. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2737. return;
  2738. if (hp_blike_system(codec->subsystem_id)) {
  2739. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
  2740. if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2741. get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
  2742. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
  2743. /* It was changed in the BIOS to just satisfy MS DTM.
  2744. * Lets turn it back into slaved HP
  2745. */
  2746. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
  2747. | (AC_JACK_HP_OUT <<
  2748. AC_DEFCFG_DEVICE_SHIFT);
  2749. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
  2750. | AC_DEFCFG_SEQUENCE)))
  2751. | 0x1f;
  2752. snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
  2753. }
  2754. }
  2755. if (find_mute_led_cfg(codec, 1))
  2756. snd_printd("mute LED gpio %d polarity %d\n",
  2757. spec->gpio_led,
  2758. spec->gpio_led_polarity);
  2759. }
  2760. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2761. [STAC_92HD71BXX_REF] = {
  2762. .type = HDA_FIXUP_FUNC,
  2763. .v.func = stac92hd71bxx_fixup_ref,
  2764. },
  2765. [STAC_DELL_M4_1] = {
  2766. .type = HDA_FIXUP_PINS,
  2767. .v.pins = dell_m4_1_pin_configs,
  2768. },
  2769. [STAC_DELL_M4_2] = {
  2770. .type = HDA_FIXUP_PINS,
  2771. .v.pins = dell_m4_2_pin_configs,
  2772. },
  2773. [STAC_DELL_M4_3] = {
  2774. .type = HDA_FIXUP_PINS,
  2775. .v.pins = dell_m4_3_pin_configs,
  2776. },
  2777. [STAC_HP_M4] = {
  2778. .type = HDA_FIXUP_FUNC,
  2779. .v.func = stac92hd71bxx_fixup_hp_m4,
  2780. .chained = true,
  2781. .chain_id = STAC_92HD71BXX_HP,
  2782. },
  2783. [STAC_HP_DV4] = {
  2784. .type = HDA_FIXUP_FUNC,
  2785. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2786. .chained = true,
  2787. .chain_id = STAC_HP_DV5,
  2788. },
  2789. [STAC_HP_DV5] = {
  2790. .type = HDA_FIXUP_FUNC,
  2791. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2792. .chained = true,
  2793. .chain_id = STAC_92HD71BXX_HP,
  2794. },
  2795. [STAC_HP_HDX] = {
  2796. .type = HDA_FIXUP_FUNC,
  2797. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2798. .chained = true,
  2799. .chain_id = STAC_92HD71BXX_HP,
  2800. },
  2801. [STAC_92HD71BXX_HP] = {
  2802. .type = HDA_FIXUP_FUNC,
  2803. .v.func = stac92hd71bxx_fixup_hp,
  2804. },
  2805. };
  2806. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2807. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2808. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2809. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2810. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2811. { .id = STAC_HP_M4, .name = "hp-m4" },
  2812. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2813. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2814. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2815. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2816. {}
  2817. };
  2818. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2819. /* SigmaTel reference board */
  2820. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2821. "DFI LanParty", STAC_92HD71BXX_REF),
  2822. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2823. "DFI LanParty", STAC_92HD71BXX_REF),
  2824. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2825. "HP", STAC_HP_DV5),
  2826. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2827. "HP", STAC_HP_DV5),
  2828. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2829. "HP dv4-7", STAC_HP_DV4),
  2830. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2831. "HP dv4-7", STAC_HP_DV5),
  2832. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2833. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2834. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2835. "HP mini 1000", STAC_HP_M4),
  2836. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2837. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2838. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2839. "HP dv6", STAC_HP_DV5),
  2840. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2841. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2842. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2843. "HP DV6", STAC_HP_DV5),
  2844. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2845. "HP", STAC_HP_DV5),
  2846. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2847. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2848. "unknown Dell", STAC_DELL_M4_1),
  2849. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2850. "unknown Dell", STAC_DELL_M4_1),
  2851. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2852. "unknown Dell", STAC_DELL_M4_1),
  2853. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2854. "unknown Dell", STAC_DELL_M4_1),
  2855. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2856. "unknown Dell", STAC_DELL_M4_1),
  2857. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2858. "unknown Dell", STAC_DELL_M4_1),
  2859. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2860. "unknown Dell", STAC_DELL_M4_1),
  2861. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2862. "unknown Dell", STAC_DELL_M4_2),
  2863. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2864. "unknown Dell", STAC_DELL_M4_2),
  2865. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2866. "unknown Dell", STAC_DELL_M4_2),
  2867. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2868. "unknown Dell", STAC_DELL_M4_2),
  2869. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2870. "unknown Dell", STAC_DELL_M4_3),
  2871. {} /* terminator */
  2872. };
  2873. static const struct hda_pintbl ref922x_pin_configs[] = {
  2874. { 0x0a, 0x01014010 },
  2875. { 0x0b, 0x01016011 },
  2876. { 0x0c, 0x01012012 },
  2877. { 0x0d, 0x0221401f },
  2878. { 0x0e, 0x01813122 },
  2879. { 0x0f, 0x01011014 },
  2880. { 0x10, 0x01441030 },
  2881. { 0x11, 0x01c41030 },
  2882. { 0x15, 0x40000100 },
  2883. { 0x1b, 0x40000100 },
  2884. {}
  2885. };
  2886. /*
  2887. STAC 922X pin configs for
  2888. 102801A7
  2889. 102801AB
  2890. 102801A9
  2891. 102801D1
  2892. 102801D2
  2893. */
  2894. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  2895. { 0x0a, 0x02214030 },
  2896. { 0x0b, 0x01a19021 },
  2897. { 0x0c, 0x01111012 },
  2898. { 0x0d, 0x01114010 },
  2899. { 0x0e, 0x02a19020 },
  2900. { 0x0f, 0x01117011 },
  2901. { 0x10, 0x400001f0 },
  2902. { 0x11, 0x400001f1 },
  2903. { 0x15, 0x01813122 },
  2904. { 0x1b, 0x400001f2 },
  2905. {}
  2906. };
  2907. /*
  2908. STAC 922X pin configs for
  2909. 102801AC
  2910. 102801D0
  2911. */
  2912. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  2913. { 0x0a, 0x02214030 },
  2914. { 0x0b, 0x01a19021 },
  2915. { 0x0c, 0x01111012 },
  2916. { 0x0d, 0x01114010 },
  2917. { 0x0e, 0x02a19020 },
  2918. { 0x0f, 0x01117011 },
  2919. { 0x10, 0x01451140 },
  2920. { 0x11, 0x400001f0 },
  2921. { 0x15, 0x01813122 },
  2922. { 0x1b, 0x400001f1 },
  2923. {}
  2924. };
  2925. /*
  2926. STAC 922X pin configs for
  2927. 102801BF
  2928. */
  2929. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  2930. { 0x0a, 0x0321101f },
  2931. { 0x0b, 0x01112024 },
  2932. { 0x0c, 0x01111222 },
  2933. { 0x0d, 0x91174220 },
  2934. { 0x0e, 0x03a11050 },
  2935. { 0x0f, 0x01116221 },
  2936. { 0x10, 0x90a70330 },
  2937. { 0x11, 0x01452340 },
  2938. { 0x15, 0x40C003f1 },
  2939. { 0x1b, 0x405003f0 },
  2940. {}
  2941. };
  2942. /*
  2943. STAC 9221 A1 pin configs for
  2944. 102801D7 (Dell XPS M1210)
  2945. */
  2946. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  2947. { 0x0a, 0x02211211 },
  2948. { 0x0b, 0x408103ff },
  2949. { 0x0c, 0x02a1123e },
  2950. { 0x0d, 0x90100310 },
  2951. { 0x0e, 0x408003f1 },
  2952. { 0x0f, 0x0221121f },
  2953. { 0x10, 0x03451340 },
  2954. { 0x11, 0x40c003f2 },
  2955. { 0x15, 0x508003f3 },
  2956. { 0x1b, 0x405003f4 },
  2957. {}
  2958. };
  2959. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  2960. { 0x0a, 0x0221401f },
  2961. { 0x0b, 0x01a19022 },
  2962. { 0x0c, 0x01813021 },
  2963. { 0x0d, 0x01014010 },
  2964. { 0x0e, 0x40000100 },
  2965. { 0x0f, 0x40000100 },
  2966. { 0x10, 0x40000100 },
  2967. { 0x11, 0x40000100 },
  2968. { 0x15, 0x02a19120 },
  2969. { 0x1b, 0x40000100 },
  2970. {}
  2971. };
  2972. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  2973. { 0x0a, 0x0221401f },
  2974. { 0x0b, 0x01011012 },
  2975. { 0x0c, 0x01813024 },
  2976. { 0x0d, 0x01014010 },
  2977. { 0x0e, 0x01a19021 },
  2978. { 0x0f, 0x01016011 },
  2979. { 0x10, 0x01452130 },
  2980. { 0x11, 0x40000100 },
  2981. { 0x15, 0x02a19320 },
  2982. { 0x1b, 0x40000100 },
  2983. {}
  2984. };
  2985. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  2986. { 0x0a, 0x0121e21f },
  2987. { 0x0b, 0x400000ff },
  2988. { 0x0c, 0x9017e110 },
  2989. { 0x0d, 0x400000fd },
  2990. { 0x0e, 0x400000fe },
  2991. { 0x0f, 0x0181e020 },
  2992. { 0x10, 0x1145e030 },
  2993. { 0x11, 0x11c5e240 },
  2994. { 0x15, 0x400000fc },
  2995. { 0x1b, 0x400000fb },
  2996. {}
  2997. };
  2998. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  2999. { 0x0a, 0x0121e21f },
  3000. { 0x0b, 0x90a7012e },
  3001. { 0x0c, 0x9017e110 },
  3002. { 0x0d, 0x400000fd },
  3003. { 0x0e, 0x400000fe },
  3004. { 0x0f, 0x0181e020 },
  3005. { 0x10, 0x1145e230 },
  3006. { 0x11, 0x500000fa },
  3007. { 0x15, 0x400000fc },
  3008. { 0x1b, 0x400000fb },
  3009. {}
  3010. };
  3011. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  3012. { 0x0a, 0x0121e21f },
  3013. { 0x0b, 0x90a7012e },
  3014. { 0x0c, 0x9017e110 },
  3015. { 0x0d, 0x400000fd },
  3016. { 0x0e, 0x400000fe },
  3017. { 0x0f, 0x0181e020 },
  3018. { 0x10, 0x1145e230 },
  3019. { 0x11, 0x11c5e240 },
  3020. { 0x15, 0x400000fc },
  3021. { 0x1b, 0x400000fb },
  3022. {}
  3023. };
  3024. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  3025. { 0x0a, 0x0321e21f },
  3026. { 0x0b, 0x03a1e02e },
  3027. { 0x0c, 0x9017e110 },
  3028. { 0x0d, 0x9017e11f },
  3029. { 0x0e, 0x400000fe },
  3030. { 0x0f, 0x0381e020 },
  3031. { 0x10, 0x1345e230 },
  3032. { 0x11, 0x13c5e240 },
  3033. { 0x15, 0x400000fc },
  3034. { 0x1b, 0x400000fb },
  3035. {}
  3036. };
  3037. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  3038. { 0x0a, 0x0321e21f },
  3039. { 0x0b, 0x03a1e02e },
  3040. { 0x0c, 0x9017e110 },
  3041. { 0x0d, 0x9017e11f },
  3042. { 0x0e, 0x400000fe },
  3043. { 0x0f, 0x0381e020 },
  3044. { 0x10, 0x1345e230 },
  3045. { 0x11, 0x13c5e240 },
  3046. { 0x15, 0x400000fc },
  3047. { 0x1b, 0x400000fb },
  3048. {}
  3049. };
  3050. static const struct hda_pintbl ecs202_pin_configs[] = {
  3051. { 0x0a, 0x0221401f },
  3052. { 0x0b, 0x02a19020 },
  3053. { 0x0c, 0x01a19020 },
  3054. { 0x0d, 0x01114010 },
  3055. { 0x0e, 0x408000f0 },
  3056. { 0x0f, 0x01813022 },
  3057. { 0x10, 0x074510a0 },
  3058. { 0x11, 0x40c400f1 },
  3059. { 0x15, 0x9037012e },
  3060. { 0x1b, 0x40e000f2 },
  3061. {}
  3062. };
  3063. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  3064. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  3065. SND_PCI_QUIRK(0x0000, 0x0100, "Mac Mini", STAC_INTEL_MAC_V3),
  3066. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  3067. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  3068. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  3069. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  3070. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  3071. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  3072. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  3073. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  3074. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  3075. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  3076. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  3077. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  3078. {}
  3079. };
  3080. static const struct hda_fixup stac922x_fixups[];
  3081. /* remap the fixup from codec SSID and apply it */
  3082. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  3083. const struct hda_fixup *fix,
  3084. int action)
  3085. {
  3086. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3087. return;
  3088. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  3089. stac922x_fixups);
  3090. if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
  3091. snd_hda_apply_fixup(codec, action);
  3092. }
  3093. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  3094. const struct hda_fixup *fix,
  3095. int action)
  3096. {
  3097. struct sigmatel_spec *spec = codec->spec;
  3098. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3099. spec->gpio_mask = spec->gpio_dir = 0x03;
  3100. spec->gpio_data = 0x03;
  3101. }
  3102. }
  3103. static const struct hda_fixup stac922x_fixups[] = {
  3104. [STAC_D945_REF] = {
  3105. .type = HDA_FIXUP_PINS,
  3106. .v.pins = ref922x_pin_configs,
  3107. },
  3108. [STAC_D945GTP3] = {
  3109. .type = HDA_FIXUP_PINS,
  3110. .v.pins = d945gtp3_pin_configs,
  3111. },
  3112. [STAC_D945GTP5] = {
  3113. .type = HDA_FIXUP_PINS,
  3114. .v.pins = d945gtp5_pin_configs,
  3115. },
  3116. [STAC_INTEL_MAC_AUTO] = {
  3117. .type = HDA_FIXUP_FUNC,
  3118. .v.func = stac922x_fixup_intel_mac_auto,
  3119. },
  3120. [STAC_INTEL_MAC_V1] = {
  3121. .type = HDA_FIXUP_PINS,
  3122. .v.pins = intel_mac_v1_pin_configs,
  3123. .chained = true,
  3124. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3125. },
  3126. [STAC_INTEL_MAC_V2] = {
  3127. .type = HDA_FIXUP_PINS,
  3128. .v.pins = intel_mac_v2_pin_configs,
  3129. .chained = true,
  3130. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3131. },
  3132. [STAC_INTEL_MAC_V3] = {
  3133. .type = HDA_FIXUP_PINS,
  3134. .v.pins = intel_mac_v3_pin_configs,
  3135. .chained = true,
  3136. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3137. },
  3138. [STAC_INTEL_MAC_V4] = {
  3139. .type = HDA_FIXUP_PINS,
  3140. .v.pins = intel_mac_v4_pin_configs,
  3141. .chained = true,
  3142. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3143. },
  3144. [STAC_INTEL_MAC_V5] = {
  3145. .type = HDA_FIXUP_PINS,
  3146. .v.pins = intel_mac_v5_pin_configs,
  3147. .chained = true,
  3148. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  3149. },
  3150. [STAC_922X_INTEL_MAC_GPIO] = {
  3151. .type = HDA_FIXUP_FUNC,
  3152. .v.func = stac922x_fixup_intel_mac_gpio,
  3153. },
  3154. [STAC_ECS_202] = {
  3155. .type = HDA_FIXUP_PINS,
  3156. .v.pins = ecs202_pin_configs,
  3157. },
  3158. [STAC_922X_DELL_D81] = {
  3159. .type = HDA_FIXUP_PINS,
  3160. .v.pins = dell_922x_d81_pin_configs,
  3161. },
  3162. [STAC_922X_DELL_D82] = {
  3163. .type = HDA_FIXUP_PINS,
  3164. .v.pins = dell_922x_d82_pin_configs,
  3165. },
  3166. [STAC_922X_DELL_M81] = {
  3167. .type = HDA_FIXUP_PINS,
  3168. .v.pins = dell_922x_m81_pin_configs,
  3169. },
  3170. [STAC_922X_DELL_M82] = {
  3171. .type = HDA_FIXUP_PINS,
  3172. .v.pins = dell_922x_m82_pin_configs,
  3173. },
  3174. };
  3175. static const struct hda_model_fixup stac922x_models[] = {
  3176. { .id = STAC_D945_REF, .name = "ref" },
  3177. { .id = STAC_D945GTP5, .name = "5stack" },
  3178. { .id = STAC_D945GTP3, .name = "3stack" },
  3179. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  3180. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  3181. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  3182. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  3183. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  3184. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  3185. { .id = STAC_ECS_202, .name = "ecs202" },
  3186. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  3187. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  3188. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  3189. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  3190. /* for backward compatibility */
  3191. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  3192. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  3193. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  3194. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  3195. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  3196. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  3197. {}
  3198. };
  3199. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  3200. /* SigmaTel reference board */
  3201. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3202. "DFI LanParty", STAC_D945_REF),
  3203. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3204. "DFI LanParty", STAC_D945_REF),
  3205. /* Intel 945G based systems */
  3206. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  3207. "Intel D945G", STAC_D945GTP3),
  3208. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  3209. "Intel D945G", STAC_D945GTP3),
  3210. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  3211. "Intel D945G", STAC_D945GTP3),
  3212. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  3213. "Intel D945G", STAC_D945GTP3),
  3214. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  3215. "Intel D945G", STAC_D945GTP3),
  3216. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  3217. "Intel D945G", STAC_D945GTP3),
  3218. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  3219. "Intel D945G", STAC_D945GTP3),
  3220. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  3221. "Intel D945G", STAC_D945GTP3),
  3222. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  3223. "Intel D945G", STAC_D945GTP3),
  3224. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  3225. "Intel D945G", STAC_D945GTP3),
  3226. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  3227. "Intel D945G", STAC_D945GTP3),
  3228. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  3229. "Intel D945G", STAC_D945GTP3),
  3230. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  3231. "Intel D945G", STAC_D945GTP3),
  3232. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  3233. "Intel D945G", STAC_D945GTP3),
  3234. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  3235. "Intel D945G", STAC_D945GTP3),
  3236. /* Intel D945G 5-stack systems */
  3237. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  3238. "Intel D945G", STAC_D945GTP5),
  3239. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  3240. "Intel D945G", STAC_D945GTP5),
  3241. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  3242. "Intel D945G", STAC_D945GTP5),
  3243. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  3244. "Intel D945G", STAC_D945GTP5),
  3245. /* Intel 945P based systems */
  3246. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  3247. "Intel D945P", STAC_D945GTP3),
  3248. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  3249. "Intel D945P", STAC_D945GTP3),
  3250. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  3251. "Intel D945P", STAC_D945GTP3),
  3252. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  3253. "Intel D945P", STAC_D945GTP3),
  3254. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  3255. "Intel D945P", STAC_D945GTP3),
  3256. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  3257. "Intel D945P", STAC_D945GTP5),
  3258. /* other intel */
  3259. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  3260. "Intel D945", STAC_D945_REF),
  3261. /* other systems */
  3262. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  3263. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  3264. /* Dell systems */
  3265. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  3266. "unknown Dell", STAC_922X_DELL_D81),
  3267. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  3268. "unknown Dell", STAC_922X_DELL_D81),
  3269. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  3270. "unknown Dell", STAC_922X_DELL_D81),
  3271. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  3272. "unknown Dell", STAC_922X_DELL_D82),
  3273. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  3274. "unknown Dell", STAC_922X_DELL_M81),
  3275. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  3276. "unknown Dell", STAC_922X_DELL_D82),
  3277. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  3278. "unknown Dell", STAC_922X_DELL_D81),
  3279. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  3280. "unknown Dell", STAC_922X_DELL_D81),
  3281. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  3282. "Dell XPS M1210", STAC_922X_DELL_M82),
  3283. /* ECS/PC Chips boards */
  3284. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  3285. "ECS/PC chips", STAC_ECS_202),
  3286. {} /* terminator */
  3287. };
  3288. static const struct hda_pintbl ref927x_pin_configs[] = {
  3289. { 0x0a, 0x02214020 },
  3290. { 0x0b, 0x02a19080 },
  3291. { 0x0c, 0x0181304e },
  3292. { 0x0d, 0x01014010 },
  3293. { 0x0e, 0x01a19040 },
  3294. { 0x0f, 0x01011012 },
  3295. { 0x10, 0x01016011 },
  3296. { 0x11, 0x0101201f },
  3297. { 0x12, 0x183301f0 },
  3298. { 0x13, 0x18a001f0 },
  3299. { 0x14, 0x18a001f0 },
  3300. { 0x21, 0x01442070 },
  3301. { 0x22, 0x01c42190 },
  3302. { 0x23, 0x40000100 },
  3303. {}
  3304. };
  3305. static const struct hda_pintbl d965_3st_pin_configs[] = {
  3306. { 0x0a, 0x0221401f },
  3307. { 0x0b, 0x02a19120 },
  3308. { 0x0c, 0x40000100 },
  3309. { 0x0d, 0x01014011 },
  3310. { 0x0e, 0x01a19021 },
  3311. { 0x0f, 0x01813024 },
  3312. { 0x10, 0x40000100 },
  3313. { 0x11, 0x40000100 },
  3314. { 0x12, 0x40000100 },
  3315. { 0x13, 0x40000100 },
  3316. { 0x14, 0x40000100 },
  3317. { 0x21, 0x40000100 },
  3318. { 0x22, 0x40000100 },
  3319. { 0x23, 0x40000100 },
  3320. {}
  3321. };
  3322. static const struct hda_pintbl d965_5st_pin_configs[] = {
  3323. { 0x0a, 0x02214020 },
  3324. { 0x0b, 0x02a19080 },
  3325. { 0x0c, 0x0181304e },
  3326. { 0x0d, 0x01014010 },
  3327. { 0x0e, 0x01a19040 },
  3328. { 0x0f, 0x01011012 },
  3329. { 0x10, 0x01016011 },
  3330. { 0x11, 0x40000100 },
  3331. { 0x12, 0x40000100 },
  3332. { 0x13, 0x40000100 },
  3333. { 0x14, 0x40000100 },
  3334. { 0x21, 0x01442070 },
  3335. { 0x22, 0x40000100 },
  3336. { 0x23, 0x40000100 },
  3337. {}
  3338. };
  3339. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  3340. { 0x0a, 0x40000100 },
  3341. { 0x0b, 0x40000100 },
  3342. { 0x0c, 0x0181304e },
  3343. { 0x0d, 0x01014010 },
  3344. { 0x0e, 0x01a19040 },
  3345. { 0x0f, 0x01011012 },
  3346. { 0x10, 0x01016011 },
  3347. { 0x11, 0x40000100 },
  3348. { 0x12, 0x40000100 },
  3349. { 0x13, 0x40000100 },
  3350. { 0x14, 0x40000100 },
  3351. { 0x21, 0x01442070 },
  3352. { 0x22, 0x40000100 },
  3353. { 0x23, 0x40000100 },
  3354. {}
  3355. };
  3356. static const struct hda_pintbl dell_3st_pin_configs[] = {
  3357. { 0x0a, 0x02211230 },
  3358. { 0x0b, 0x02a11220 },
  3359. { 0x0c, 0x01a19040 },
  3360. { 0x0d, 0x01114210 },
  3361. { 0x0e, 0x01111212 },
  3362. { 0x0f, 0x01116211 },
  3363. { 0x10, 0x01813050 },
  3364. { 0x11, 0x01112214 },
  3365. { 0x12, 0x403003fa },
  3366. { 0x13, 0x90a60040 },
  3367. { 0x14, 0x90a60040 },
  3368. { 0x21, 0x404003fb },
  3369. { 0x22, 0x40c003fc },
  3370. { 0x23, 0x40000100 },
  3371. {}
  3372. };
  3373. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  3374. const struct hda_fixup *fix, int action)
  3375. {
  3376. /* no jack detecion for ref-no-jd model */
  3377. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3378. codec->no_jack_detect = 1;
  3379. }
  3380. static void stac927x_fixup_ref(struct hda_codec *codec,
  3381. const struct hda_fixup *fix, int action)
  3382. {
  3383. struct sigmatel_spec *spec = codec->spec;
  3384. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3385. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  3386. spec->eapd_mask = spec->gpio_mask = 0;
  3387. spec->gpio_dir = spec->gpio_data = 0;
  3388. }
  3389. }
  3390. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  3391. const struct hda_fixup *fix, int action)
  3392. {
  3393. struct sigmatel_spec *spec = codec->spec;
  3394. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  3395. return;
  3396. if (codec->subsystem_id != 0x1028022f) {
  3397. /* GPIO2 High = Enable EAPD */
  3398. spec->eapd_mask = spec->gpio_mask = 0x04;
  3399. spec->gpio_dir = spec->gpio_data = 0x04;
  3400. }
  3401. snd_hda_add_verbs(codec, dell_3st_core_init);
  3402. spec->volknob_init = 1;
  3403. }
  3404. static void stac927x_fixup_volknob(struct hda_codec *codec,
  3405. const struct hda_fixup *fix, int action)
  3406. {
  3407. struct sigmatel_spec *spec = codec->spec;
  3408. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3409. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  3410. spec->volknob_init = 1;
  3411. }
  3412. }
  3413. static const struct hda_fixup stac927x_fixups[] = {
  3414. [STAC_D965_REF_NO_JD] = {
  3415. .type = HDA_FIXUP_FUNC,
  3416. .v.func = stac927x_fixup_ref_no_jd,
  3417. .chained = true,
  3418. .chain_id = STAC_D965_REF,
  3419. },
  3420. [STAC_D965_REF] = {
  3421. .type = HDA_FIXUP_FUNC,
  3422. .v.func = stac927x_fixup_ref,
  3423. },
  3424. [STAC_D965_3ST] = {
  3425. .type = HDA_FIXUP_PINS,
  3426. .v.pins = d965_3st_pin_configs,
  3427. .chained = true,
  3428. .chain_id = STAC_D965_VERBS,
  3429. },
  3430. [STAC_D965_5ST] = {
  3431. .type = HDA_FIXUP_PINS,
  3432. .v.pins = d965_5st_pin_configs,
  3433. .chained = true,
  3434. .chain_id = STAC_D965_VERBS,
  3435. },
  3436. [STAC_D965_VERBS] = {
  3437. .type = HDA_FIXUP_VERBS,
  3438. .v.verbs = d965_core_init,
  3439. },
  3440. [STAC_D965_5ST_NO_FP] = {
  3441. .type = HDA_FIXUP_PINS,
  3442. .v.pins = d965_5st_no_fp_pin_configs,
  3443. },
  3444. [STAC_DELL_3ST] = {
  3445. .type = HDA_FIXUP_PINS,
  3446. .v.pins = dell_3st_pin_configs,
  3447. .chained = true,
  3448. .chain_id = STAC_927X_DELL_DMIC,
  3449. },
  3450. [STAC_DELL_BIOS] = {
  3451. .type = HDA_FIXUP_PINS,
  3452. .v.pins = (const struct hda_pintbl[]) {
  3453. /* correct the front output jack as a hp out */
  3454. { 0x0f, 0x0221101f },
  3455. /* correct the front input jack as a mic */
  3456. { 0x0e, 0x02a79130 },
  3457. {}
  3458. },
  3459. .chained = true,
  3460. .chain_id = STAC_927X_DELL_DMIC,
  3461. },
  3462. [STAC_DELL_BIOS_AMIC] = {
  3463. .type = HDA_FIXUP_PINS,
  3464. .v.pins = (const struct hda_pintbl[]) {
  3465. /* configure the analog microphone on some laptops */
  3466. { 0x0c, 0x90a79130 },
  3467. {}
  3468. },
  3469. .chained = true,
  3470. .chain_id = STAC_DELL_BIOS,
  3471. },
  3472. [STAC_DELL_BIOS_SPDIF] = {
  3473. .type = HDA_FIXUP_PINS,
  3474. .v.pins = (const struct hda_pintbl[]) {
  3475. /* correct the device field to SPDIF out */
  3476. { 0x21, 0x01442070 },
  3477. {}
  3478. },
  3479. .chained = true,
  3480. .chain_id = STAC_DELL_BIOS,
  3481. },
  3482. [STAC_927X_DELL_DMIC] = {
  3483. .type = HDA_FIXUP_FUNC,
  3484. .v.func = stac927x_fixup_dell_dmic,
  3485. },
  3486. [STAC_927X_VOLKNOB] = {
  3487. .type = HDA_FIXUP_FUNC,
  3488. .v.func = stac927x_fixup_volknob,
  3489. },
  3490. };
  3491. static const struct hda_model_fixup stac927x_models[] = {
  3492. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  3493. { .id = STAC_D965_REF, .name = "ref" },
  3494. { .id = STAC_D965_3ST, .name = "3stack" },
  3495. { .id = STAC_D965_5ST, .name = "5stack" },
  3496. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  3497. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  3498. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  3499. { .id = STAC_DELL_BIOS_AMIC, .name = "dell-bios-amic" },
  3500. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  3501. {}
  3502. };
  3503. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  3504. /* SigmaTel reference board */
  3505. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3506. "DFI LanParty", STAC_D965_REF),
  3507. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3508. "DFI LanParty", STAC_D965_REF),
  3509. /* Intel 946 based systems */
  3510. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  3511. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  3512. /* 965 based 3 stack systems */
  3513. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  3514. "Intel D965", STAC_D965_3ST),
  3515. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  3516. "Intel D965", STAC_D965_3ST),
  3517. /* Dell 3 stack systems */
  3518. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  3519. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  3520. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  3521. /* Dell 3 stack systems with verb table in BIOS */
  3522. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  3523. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  3524. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  3525. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  3526. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  3527. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  3528. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  3529. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  3530. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  3531. /* 965 based 5 stack systems */
  3532. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  3533. "Intel D965", STAC_D965_5ST),
  3534. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  3535. "Intel D965", STAC_D965_5ST),
  3536. /* volume-knob fixes */
  3537. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  3538. {} /* terminator */
  3539. };
  3540. static const struct hda_pintbl ref9205_pin_configs[] = {
  3541. { 0x0a, 0x40000100 },
  3542. { 0x0b, 0x40000100 },
  3543. { 0x0c, 0x01016011 },
  3544. { 0x0d, 0x01014010 },
  3545. { 0x0e, 0x01813122 },
  3546. { 0x0f, 0x01a19021 },
  3547. { 0x14, 0x01019020 },
  3548. { 0x16, 0x40000100 },
  3549. { 0x17, 0x90a000f0 },
  3550. { 0x18, 0x90a000f0 },
  3551. { 0x21, 0x01441030 },
  3552. { 0x22, 0x01c41030 },
  3553. {}
  3554. };
  3555. /*
  3556. STAC 9205 pin configs for
  3557. 102801F1
  3558. 102801F2
  3559. 102801FC
  3560. 102801FD
  3561. 10280204
  3562. 1028021F
  3563. 10280228 (Dell Vostro 1500)
  3564. 10280229 (Dell Vostro 1700)
  3565. */
  3566. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  3567. { 0x0a, 0x0321101F },
  3568. { 0x0b, 0x03A11020 },
  3569. { 0x0c, 0x400003FA },
  3570. { 0x0d, 0x90170310 },
  3571. { 0x0e, 0x400003FB },
  3572. { 0x0f, 0x400003FC },
  3573. { 0x14, 0x400003FD },
  3574. { 0x16, 0x40F000F9 },
  3575. { 0x17, 0x90A60330 },
  3576. { 0x18, 0x400003FF },
  3577. { 0x21, 0x0144131F },
  3578. { 0x22, 0x40C003FE },
  3579. {}
  3580. };
  3581. /*
  3582. STAC 9205 pin configs for
  3583. 102801F9
  3584. 102801FA
  3585. 102801FE
  3586. 102801FF (Dell Precision M4300)
  3587. 10280206
  3588. 10280200
  3589. 10280201
  3590. */
  3591. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3592. { 0x0a, 0x0321101f },
  3593. { 0x0b, 0x03a11020 },
  3594. { 0x0c, 0x90a70330 },
  3595. { 0x0d, 0x90170310 },
  3596. { 0x0e, 0x400000fe },
  3597. { 0x0f, 0x400000ff },
  3598. { 0x14, 0x400000fd },
  3599. { 0x16, 0x40f000f9 },
  3600. { 0x17, 0x400000fa },
  3601. { 0x18, 0x400000fc },
  3602. { 0x21, 0x0144131f },
  3603. { 0x22, 0x40c003f8 },
  3604. /* Enable SPDIF in/out */
  3605. { 0x1f, 0x01441030 },
  3606. { 0x20, 0x1c410030 },
  3607. {}
  3608. };
  3609. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3610. { 0x0a, 0x0421101f },
  3611. { 0x0b, 0x04a11020 },
  3612. { 0x0c, 0x400003fa },
  3613. { 0x0d, 0x90170310 },
  3614. { 0x0e, 0x400003fb },
  3615. { 0x0f, 0x400003fc },
  3616. { 0x14, 0x400003fd },
  3617. { 0x16, 0x400003f9 },
  3618. { 0x17, 0x90a60330 },
  3619. { 0x18, 0x400003ff },
  3620. { 0x21, 0x01441340 },
  3621. { 0x22, 0x40c003fe },
  3622. {}
  3623. };
  3624. static void stac9205_fixup_ref(struct hda_codec *codec,
  3625. const struct hda_fixup *fix, int action)
  3626. {
  3627. struct sigmatel_spec *spec = codec->spec;
  3628. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3629. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3630. /* SPDIF-In enabled */
  3631. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3632. }
  3633. }
  3634. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3635. const struct hda_fixup *fix, int action)
  3636. {
  3637. struct sigmatel_spec *spec = codec->spec;
  3638. struct hda_jack_tbl *jack;
  3639. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3640. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3641. /* Enable unsol response for GPIO4/Dock HP connection */
  3642. snd_hda_codec_write_cache(codec, codec->afg, 0,
  3643. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3644. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  3645. STAC_VREF_EVENT,
  3646. stac_vref_event);
  3647. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  3648. if (jack)
  3649. jack->private_data = 0x01;
  3650. spec->gpio_dir = 0x0b;
  3651. spec->eapd_mask = 0x01;
  3652. spec->gpio_mask = 0x1b;
  3653. spec->gpio_mute = 0x10;
  3654. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3655. * GPIO3 Low = DRM
  3656. */
  3657. spec->gpio_data = 0x01;
  3658. }
  3659. }
  3660. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3661. const struct hda_fixup *fix, int action)
  3662. {
  3663. struct sigmatel_spec *spec = codec->spec;
  3664. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3665. spec->eapd_switch = 0;
  3666. }
  3667. static const struct hda_fixup stac9205_fixups[] = {
  3668. [STAC_9205_REF] = {
  3669. .type = HDA_FIXUP_FUNC,
  3670. .v.func = stac9205_fixup_ref,
  3671. },
  3672. [STAC_9205_DELL_M42] = {
  3673. .type = HDA_FIXUP_PINS,
  3674. .v.pins = dell_9205_m42_pin_configs,
  3675. },
  3676. [STAC_9205_DELL_M43] = {
  3677. .type = HDA_FIXUP_FUNC,
  3678. .v.func = stac9205_fixup_dell_m43,
  3679. },
  3680. [STAC_9205_DELL_M44] = {
  3681. .type = HDA_FIXUP_PINS,
  3682. .v.pins = dell_9205_m44_pin_configs,
  3683. },
  3684. [STAC_9205_EAPD] = {
  3685. .type = HDA_FIXUP_FUNC,
  3686. .v.func = stac9205_fixup_eapd,
  3687. },
  3688. {}
  3689. };
  3690. static const struct hda_model_fixup stac9205_models[] = {
  3691. { .id = STAC_9205_REF, .name = "ref" },
  3692. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3693. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3694. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3695. { .id = STAC_9205_EAPD, .name = "eapd" },
  3696. {}
  3697. };
  3698. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3699. /* SigmaTel reference board */
  3700. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3701. "DFI LanParty", STAC_9205_REF),
  3702. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3703. "SigmaTel", STAC_9205_REF),
  3704. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3705. "DFI LanParty", STAC_9205_REF),
  3706. /* Dell */
  3707. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3708. "unknown Dell", STAC_9205_DELL_M42),
  3709. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3710. "unknown Dell", STAC_9205_DELL_M42),
  3711. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3712. "Dell Precision", STAC_9205_DELL_M43),
  3713. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3714. "Dell Precision", STAC_9205_DELL_M43),
  3715. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3716. "Dell Precision", STAC_9205_DELL_M43),
  3717. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3718. "unknown Dell", STAC_9205_DELL_M42),
  3719. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3720. "unknown Dell", STAC_9205_DELL_M42),
  3721. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3722. "Dell Precision", STAC_9205_DELL_M43),
  3723. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3724. "Dell Precision M4300", STAC_9205_DELL_M43),
  3725. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3726. "unknown Dell", STAC_9205_DELL_M42),
  3727. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3728. "Dell Precision", STAC_9205_DELL_M43),
  3729. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3730. "Dell Precision", STAC_9205_DELL_M43),
  3731. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3732. "Dell Precision", STAC_9205_DELL_M43),
  3733. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3734. "Dell Inspiron", STAC_9205_DELL_M44),
  3735. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3736. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3737. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3738. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3739. /* Gateway */
  3740. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3741. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3742. {} /* terminator */
  3743. };
  3744. static int stac_parse_auto_config(struct hda_codec *codec)
  3745. {
  3746. struct sigmatel_spec *spec = codec->spec;
  3747. int err;
  3748. int flags = 0;
  3749. if (spec->headset_jack)
  3750. flags |= HDA_PINCFG_HEADSET_MIC;
  3751. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, flags);
  3752. if (err < 0)
  3753. return err;
  3754. /* add hooks */
  3755. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3756. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3757. spec->gen.automute_hook = stac_update_outputs;
  3758. spec->gen.hp_automute_hook = stac_hp_automute;
  3759. spec->gen.line_automute_hook = stac_line_automute;
  3760. spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
  3761. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3762. if (err < 0)
  3763. return err;
  3764. /* minimum value is actually mute */
  3765. spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
  3766. /* setup analog beep controls */
  3767. if (spec->anabeep_nid > 0) {
  3768. err = stac_auto_create_beep_ctls(codec,
  3769. spec->anabeep_nid);
  3770. if (err < 0)
  3771. return err;
  3772. }
  3773. /* setup digital beep controls and input device */
  3774. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3775. if (spec->gen.beep_nid) {
  3776. hda_nid_t nid = spec->gen.beep_nid;
  3777. unsigned int caps;
  3778. err = stac_auto_create_beep_ctls(codec, nid);
  3779. if (err < 0)
  3780. return err;
  3781. if (codec->beep) {
  3782. /* IDT/STAC codecs have linear beep tone parameter */
  3783. codec->beep->linear_tone = spec->linear_tone_beep;
  3784. /* if no beep switch is available, make its own one */
  3785. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3786. if (!(caps & AC_AMPCAP_MUTE)) {
  3787. err = stac_beep_switch_ctl(codec);
  3788. if (err < 0)
  3789. return err;
  3790. }
  3791. }
  3792. }
  3793. #endif
  3794. if (spec->gpio_led)
  3795. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3796. if (spec->aloopback_ctl &&
  3797. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3798. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3799. return -ENOMEM;
  3800. }
  3801. if (spec->have_spdif_mux) {
  3802. err = stac_create_spdif_mux_ctls(codec);
  3803. if (err < 0)
  3804. return err;
  3805. }
  3806. stac_init_power_map(codec);
  3807. return 0;
  3808. }
  3809. static int stac_init(struct hda_codec *codec)
  3810. {
  3811. struct sigmatel_spec *spec = codec->spec;
  3812. int i;
  3813. /* override some hints */
  3814. stac_store_hints(codec);
  3815. /* set up GPIO */
  3816. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3817. * otherwise, unsol event will turn it on/off dynamically
  3818. */
  3819. if (!spec->eapd_switch)
  3820. spec->gpio_data |= spec->eapd_mask;
  3821. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  3822. snd_hda_gen_init(codec);
  3823. /* sync the power-map */
  3824. if (spec->num_pwrs)
  3825. snd_hda_codec_write(codec, codec->afg, 0,
  3826. AC_VERB_IDT_SET_POWER_MAP,
  3827. spec->power_map_bits);
  3828. /* power down inactive ADCs */
  3829. if (spec->powerdown_adcs) {
  3830. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3831. if (spec->active_adcs & (1 << i))
  3832. continue;
  3833. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3834. AC_VERB_SET_POWER_STATE,
  3835. AC_PWRST_D3);
  3836. }
  3837. }
  3838. return 0;
  3839. }
  3840. static void stac_shutup(struct hda_codec *codec)
  3841. {
  3842. struct sigmatel_spec *spec = codec->spec;
  3843. snd_hda_shutup_pins(codec);
  3844. if (spec->eapd_mask)
  3845. stac_gpio_set(codec, spec->gpio_mask,
  3846. spec->gpio_dir, spec->gpio_data &
  3847. ~spec->eapd_mask);
  3848. }
  3849. #define stac_free snd_hda_gen_free
  3850. #ifdef CONFIG_PROC_FS
  3851. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  3852. struct hda_codec *codec, hda_nid_t nid)
  3853. {
  3854. if (nid == codec->afg)
  3855. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  3856. snd_hda_codec_read(codec, nid, 0,
  3857. AC_VERB_IDT_GET_POWER_MAP, 0));
  3858. }
  3859. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  3860. struct hda_codec *codec,
  3861. unsigned int verb)
  3862. {
  3863. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  3864. snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
  3865. }
  3866. /* stac92hd71bxx, stac92hd73xx */
  3867. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  3868. struct hda_codec *codec, hda_nid_t nid)
  3869. {
  3870. stac92hd_proc_hook(buffer, codec, nid);
  3871. if (nid == codec->afg)
  3872. analog_loop_proc_hook(buffer, codec, 0xfa0);
  3873. }
  3874. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  3875. struct hda_codec *codec, hda_nid_t nid)
  3876. {
  3877. if (nid == codec->afg)
  3878. analog_loop_proc_hook(buffer, codec, 0xfe0);
  3879. }
  3880. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  3881. struct hda_codec *codec, hda_nid_t nid)
  3882. {
  3883. if (nid == codec->afg)
  3884. analog_loop_proc_hook(buffer, codec, 0xfeb);
  3885. }
  3886. #else
  3887. #define stac92hd_proc_hook NULL
  3888. #define stac92hd7x_proc_hook NULL
  3889. #define stac9205_proc_hook NULL
  3890. #define stac927x_proc_hook NULL
  3891. #endif
  3892. #ifdef CONFIG_PM
  3893. static int stac_suspend(struct hda_codec *codec)
  3894. {
  3895. stac_shutup(codec);
  3896. return 0;
  3897. }
  3898. static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  3899. unsigned int power_state)
  3900. {
  3901. unsigned int afg_power_state = power_state;
  3902. struct sigmatel_spec *spec = codec->spec;
  3903. if (power_state == AC_PWRST_D3) {
  3904. if (spec->vref_mute_led_nid) {
  3905. /* with vref-out pin used for mute led control
  3906. * codec AFG is prevented from D3 state
  3907. */
  3908. afg_power_state = AC_PWRST_D1;
  3909. }
  3910. /* this delay seems necessary to avoid click noise at power-down */
  3911. msleep(100);
  3912. }
  3913. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
  3914. afg_power_state);
  3915. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  3916. }
  3917. #else
  3918. #define stac_suspend NULL
  3919. #define stac_set_power_state NULL
  3920. #endif /* CONFIG_PM */
  3921. static const struct hda_codec_ops stac_patch_ops = {
  3922. .build_controls = snd_hda_gen_build_controls,
  3923. .build_pcms = snd_hda_gen_build_pcms,
  3924. .init = stac_init,
  3925. .free = stac_free,
  3926. .unsol_event = snd_hda_jack_unsol_event,
  3927. #ifdef CONFIG_PM
  3928. .suspend = stac_suspend,
  3929. #endif
  3930. .reboot_notify = stac_shutup,
  3931. };
  3932. static int alloc_stac_spec(struct hda_codec *codec)
  3933. {
  3934. struct sigmatel_spec *spec;
  3935. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  3936. if (!spec)
  3937. return -ENOMEM;
  3938. snd_hda_gen_spec_init(&spec->gen);
  3939. codec->spec = spec;
  3940. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  3941. return 0;
  3942. }
  3943. static int patch_stac9200(struct hda_codec *codec)
  3944. {
  3945. struct sigmatel_spec *spec;
  3946. int err;
  3947. err = alloc_stac_spec(codec);
  3948. if (err < 0)
  3949. return err;
  3950. spec = codec->spec;
  3951. spec->linear_tone_beep = 1;
  3952. spec->gen.own_eapd_ctl = 1;
  3953. codec->patch_ops = stac_patch_ops;
  3954. codec->power_filter = snd_hda_codec_eapd_power_filter;
  3955. snd_hda_add_verbs(codec, stac9200_eapd_init);
  3956. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  3957. stac9200_fixups);
  3958. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3959. err = stac_parse_auto_config(codec);
  3960. if (err < 0) {
  3961. stac_free(codec);
  3962. return err;
  3963. }
  3964. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3965. return 0;
  3966. }
  3967. static int patch_stac925x(struct hda_codec *codec)
  3968. {
  3969. struct sigmatel_spec *spec;
  3970. int err;
  3971. err = alloc_stac_spec(codec);
  3972. if (err < 0)
  3973. return err;
  3974. spec = codec->spec;
  3975. spec->linear_tone_beep = 1;
  3976. spec->gen.own_eapd_ctl = 1;
  3977. codec->patch_ops = stac_patch_ops;
  3978. snd_hda_add_verbs(codec, stac925x_core_init);
  3979. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  3980. stac925x_fixups);
  3981. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3982. err = stac_parse_auto_config(codec);
  3983. if (err < 0) {
  3984. stac_free(codec);
  3985. return err;
  3986. }
  3987. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3988. return 0;
  3989. }
  3990. static int patch_stac92hd73xx(struct hda_codec *codec)
  3991. {
  3992. struct sigmatel_spec *spec;
  3993. int err;
  3994. int num_dacs;
  3995. err = alloc_stac_spec(codec);
  3996. if (err < 0)
  3997. return err;
  3998. spec = codec->spec;
  3999. spec->linear_tone_beep = 0;
  4000. spec->gen.mixer_nid = 0x1d;
  4001. spec->have_spdif_mux = 1;
  4002. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  4003. if (num_dacs < 3 || num_dacs > 5) {
  4004. printk(KERN_WARNING "hda_codec: Could not determine "
  4005. "number of channels defaulting to DAC count\n");
  4006. num_dacs = 5;
  4007. }
  4008. switch (num_dacs) {
  4009. case 0x3: /* 6 Channel */
  4010. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  4011. break;
  4012. case 0x4: /* 8 Channel */
  4013. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  4014. break;
  4015. case 0x5: /* 10 Channel */
  4016. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  4017. break;
  4018. }
  4019. spec->aloopback_mask = 0x01;
  4020. spec->aloopback_shift = 8;
  4021. spec->gen.beep_nid = 0x1c; /* digital beep */
  4022. /* GPIO0 High = Enable EAPD */
  4023. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4024. spec->gpio_data = 0x01;
  4025. spec->eapd_switch = 1;
  4026. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  4027. spec->pwr_nids = stac92hd73xx_pwr_nids;
  4028. spec->gen.own_eapd_ctl = 1;
  4029. spec->gen.power_down_unused = 1;
  4030. codec->patch_ops = stac_patch_ops;
  4031. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  4032. stac92hd73xx_fixups);
  4033. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4034. if (!spec->volknob_init)
  4035. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  4036. err = stac_parse_auto_config(codec);
  4037. if (err < 0) {
  4038. stac_free(codec);
  4039. return err;
  4040. }
  4041. /* Don't GPIO-mute speakers if there are no internal speakers, because
  4042. * the GPIO might be necessary for Headphone
  4043. */
  4044. if (spec->eapd_switch && !has_builtin_speaker(codec))
  4045. spec->eapd_switch = 0;
  4046. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4047. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4048. return 0;
  4049. }
  4050. static void stac_setup_gpio(struct hda_codec *codec)
  4051. {
  4052. struct sigmatel_spec *spec = codec->spec;
  4053. spec->gpio_mask |= spec->eapd_mask;
  4054. if (spec->gpio_led) {
  4055. if (!spec->vref_mute_led_nid) {
  4056. spec->gpio_mask |= spec->gpio_led;
  4057. spec->gpio_dir |= spec->gpio_led;
  4058. spec->gpio_data |= spec->gpio_led;
  4059. } else {
  4060. codec->patch_ops.set_power_state =
  4061. stac_set_power_state;
  4062. }
  4063. }
  4064. if (spec->mic_mute_led_gpio) {
  4065. spec->gpio_mask |= spec->mic_mute_led_gpio;
  4066. spec->gpio_dir |= spec->mic_mute_led_gpio;
  4067. spec->mic_mute_led_on = true;
  4068. spec->gpio_data |= spec->mic_mute_led_gpio;
  4069. spec->gen.cap_sync_hook = stac_capture_led_hook;
  4070. }
  4071. }
  4072. static int patch_stac92hd83xxx(struct hda_codec *codec)
  4073. {
  4074. struct sigmatel_spec *spec;
  4075. int err;
  4076. err = alloc_stac_spec(codec);
  4077. if (err < 0)
  4078. return err;
  4079. codec->epss = 0; /* longer delay needed for D3 */
  4080. spec = codec->spec;
  4081. spec->linear_tone_beep = 0;
  4082. spec->gen.own_eapd_ctl = 1;
  4083. spec->gen.power_down_unused = 1;
  4084. spec->gen.mixer_nid = 0x1b;
  4085. spec->gen.beep_nid = 0x21; /* digital beep */
  4086. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  4087. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  4088. spec->default_polarity = -1; /* no default cfg */
  4089. codec->patch_ops = stac_patch_ops;
  4090. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  4091. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  4092. stac92hd83xxx_fixups);
  4093. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4094. stac_setup_gpio(codec);
  4095. err = stac_parse_auto_config(codec);
  4096. if (err < 0) {
  4097. stac_free(codec);
  4098. return err;
  4099. }
  4100. codec->proc_widget_hook = stac92hd_proc_hook;
  4101. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4102. return 0;
  4103. }
  4104. static const hda_nid_t stac92hd95_pwr_nids[] = {
  4105. 0x0a, 0x0b, 0x0c, 0x0d
  4106. };
  4107. static int patch_stac92hd95(struct hda_codec *codec)
  4108. {
  4109. struct sigmatel_spec *spec;
  4110. int err;
  4111. err = alloc_stac_spec(codec);
  4112. if (err < 0)
  4113. return err;
  4114. codec->epss = 0; /* longer delay needed for D3 */
  4115. spec = codec->spec;
  4116. spec->linear_tone_beep = 0;
  4117. spec->gen.own_eapd_ctl = 1;
  4118. spec->gen.power_down_unused = 1;
  4119. spec->gen.beep_nid = 0x19; /* digital beep */
  4120. spec->pwr_nids = stac92hd95_pwr_nids;
  4121. spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
  4122. spec->default_polarity = -1; /* no default cfg */
  4123. codec->patch_ops = stac_patch_ops;
  4124. err = stac_parse_auto_config(codec);
  4125. if (err < 0) {
  4126. stac_free(codec);
  4127. return err;
  4128. }
  4129. codec->proc_widget_hook = stac92hd_proc_hook;
  4130. return 0;
  4131. }
  4132. static int patch_stac92hd71bxx(struct hda_codec *codec)
  4133. {
  4134. struct sigmatel_spec *spec;
  4135. const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
  4136. int err;
  4137. err = alloc_stac_spec(codec);
  4138. if (err < 0)
  4139. return err;
  4140. spec = codec->spec;
  4141. spec->linear_tone_beep = 0;
  4142. spec->gen.own_eapd_ctl = 1;
  4143. spec->gen.power_down_unused = 1;
  4144. spec->gen.mixer_nid = 0x17;
  4145. spec->have_spdif_mux = 1;
  4146. codec->patch_ops = stac_patch_ops;
  4147. /* GPIO0 = EAPD */
  4148. spec->gpio_mask = 0x01;
  4149. spec->gpio_dir = 0x01;
  4150. spec->gpio_data = 0x01;
  4151. switch (codec->vendor_id) {
  4152. case 0x111d76b6: /* 4 Port without Analog Mixer */
  4153. case 0x111d76b7:
  4154. unmute_init++;
  4155. break;
  4156. case 0x111d7608: /* 5 Port with Analog Mixer */
  4157. if ((codec->revision_id & 0xf) == 0 ||
  4158. (codec->revision_id & 0xf) == 1)
  4159. spec->stream_delay = 40; /* 40 milliseconds */
  4160. /* disable VSW */
  4161. unmute_init++;
  4162. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  4163. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  4164. break;
  4165. case 0x111d7603: /* 6 Port with Analog Mixer */
  4166. if ((codec->revision_id & 0xf) == 1)
  4167. spec->stream_delay = 40; /* 40 milliseconds */
  4168. break;
  4169. }
  4170. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  4171. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  4172. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
  4173. snd_hda_sequence_write_cache(codec, unmute_init);
  4174. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  4175. spec->aloopback_mask = 0x50;
  4176. spec->aloopback_shift = 0;
  4177. spec->powerdown_adcs = 1;
  4178. spec->gen.beep_nid = 0x26; /* digital beep */
  4179. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  4180. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  4181. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  4182. stac92hd71bxx_fixups);
  4183. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4184. stac_setup_gpio(codec);
  4185. err = stac_parse_auto_config(codec);
  4186. if (err < 0) {
  4187. stac_free(codec);
  4188. return err;
  4189. }
  4190. codec->proc_widget_hook = stac92hd7x_proc_hook;
  4191. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4192. return 0;
  4193. }
  4194. static int patch_stac922x(struct hda_codec *codec)
  4195. {
  4196. struct sigmatel_spec *spec;
  4197. int err;
  4198. err = alloc_stac_spec(codec);
  4199. if (err < 0)
  4200. return err;
  4201. spec = codec->spec;
  4202. spec->linear_tone_beep = 1;
  4203. spec->gen.own_eapd_ctl = 1;
  4204. codec->patch_ops = stac_patch_ops;
  4205. snd_hda_add_verbs(codec, stac922x_core_init);
  4206. /* Fix Mux capture level; max to 2 */
  4207. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  4208. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  4209. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  4210. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  4211. (0 << AC_AMPCAP_MUTE_SHIFT));
  4212. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  4213. stac922x_fixups);
  4214. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4215. err = stac_parse_auto_config(codec);
  4216. if (err < 0) {
  4217. stac_free(codec);
  4218. return err;
  4219. }
  4220. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4221. return 0;
  4222. }
  4223. static const char * const stac927x_spdif_labels[] = {
  4224. "Digital Playback", "ADAT", "Analog Mux 1",
  4225. "Analog Mux 2", "Analog Mux 3", NULL
  4226. };
  4227. static int patch_stac927x(struct hda_codec *codec)
  4228. {
  4229. struct sigmatel_spec *spec;
  4230. int err;
  4231. err = alloc_stac_spec(codec);
  4232. if (err < 0)
  4233. return err;
  4234. spec = codec->spec;
  4235. spec->linear_tone_beep = 1;
  4236. spec->gen.own_eapd_ctl = 1;
  4237. spec->have_spdif_mux = 1;
  4238. spec->spdif_labels = stac927x_spdif_labels;
  4239. spec->gen.beep_nid = 0x23; /* digital beep */
  4240. /* GPIO0 High = Enable EAPD */
  4241. spec->eapd_mask = spec->gpio_mask = 0x01;
  4242. spec->gpio_dir = spec->gpio_data = 0x01;
  4243. spec->aloopback_ctl = &stac927x_loopback;
  4244. spec->aloopback_mask = 0x40;
  4245. spec->aloopback_shift = 0;
  4246. spec->eapd_switch = 1;
  4247. codec->patch_ops = stac_patch_ops;
  4248. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  4249. stac927x_fixups);
  4250. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4251. if (!spec->volknob_init)
  4252. snd_hda_add_verbs(codec, stac927x_core_init);
  4253. err = stac_parse_auto_config(codec);
  4254. if (err < 0) {
  4255. stac_free(codec);
  4256. return err;
  4257. }
  4258. codec->proc_widget_hook = stac927x_proc_hook;
  4259. /*
  4260. * !!FIXME!!
  4261. * The STAC927x seem to require fairly long delays for certain
  4262. * command sequences. With too short delays (even if the answer
  4263. * is set to RIRB properly), it results in the silence output
  4264. * on some hardwares like Dell.
  4265. *
  4266. * The below flag enables the longer delay (see get_response
  4267. * in hda_intel.c).
  4268. */
  4269. codec->bus->needs_damn_long_delay = 1;
  4270. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4271. return 0;
  4272. }
  4273. static int patch_stac9205(struct hda_codec *codec)
  4274. {
  4275. struct sigmatel_spec *spec;
  4276. int err;
  4277. err = alloc_stac_spec(codec);
  4278. if (err < 0)
  4279. return err;
  4280. spec = codec->spec;
  4281. spec->linear_tone_beep = 1;
  4282. spec->gen.own_eapd_ctl = 1;
  4283. spec->have_spdif_mux = 1;
  4284. spec->gen.beep_nid = 0x23; /* digital beep */
  4285. snd_hda_add_verbs(codec, stac9205_core_init);
  4286. spec->aloopback_ctl = &stac9205_loopback;
  4287. spec->aloopback_mask = 0x40;
  4288. spec->aloopback_shift = 0;
  4289. /* GPIO0 High = EAPD */
  4290. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  4291. spec->gpio_data = 0x01;
  4292. /* Turn on/off EAPD per HP plugging */
  4293. spec->eapd_switch = 1;
  4294. codec->patch_ops = stac_patch_ops;
  4295. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  4296. stac9205_fixups);
  4297. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4298. err = stac_parse_auto_config(codec);
  4299. if (err < 0) {
  4300. stac_free(codec);
  4301. return err;
  4302. }
  4303. codec->proc_widget_hook = stac9205_proc_hook;
  4304. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4305. return 0;
  4306. }
  4307. /*
  4308. * STAC9872 hack
  4309. */
  4310. static const struct hda_verb stac9872_core_init[] = {
  4311. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  4312. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  4313. {}
  4314. };
  4315. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  4316. { 0x0a, 0x03211020 },
  4317. { 0x0b, 0x411111f0 },
  4318. { 0x0c, 0x411111f0 },
  4319. { 0x0d, 0x03a15030 },
  4320. { 0x0e, 0x411111f0 },
  4321. { 0x0f, 0x90170110 },
  4322. { 0x11, 0x411111f0 },
  4323. { 0x13, 0x411111f0 },
  4324. { 0x14, 0x90a7013e },
  4325. {}
  4326. };
  4327. static const struct hda_model_fixup stac9872_models[] = {
  4328. { .id = STAC_9872_VAIO, .name = "vaio" },
  4329. {}
  4330. };
  4331. static const struct hda_fixup stac9872_fixups[] = {
  4332. [STAC_9872_VAIO] = {
  4333. .type = HDA_FIXUP_PINS,
  4334. .v.pins = stac9872_vaio_pin_configs,
  4335. },
  4336. };
  4337. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  4338. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  4339. "Sony VAIO F/S", STAC_9872_VAIO),
  4340. {} /* terminator */
  4341. };
  4342. static int patch_stac9872(struct hda_codec *codec)
  4343. {
  4344. struct sigmatel_spec *spec;
  4345. int err;
  4346. err = alloc_stac_spec(codec);
  4347. if (err < 0)
  4348. return err;
  4349. spec = codec->spec;
  4350. spec->linear_tone_beep = 1;
  4351. spec->gen.own_eapd_ctl = 1;
  4352. codec->patch_ops = stac_patch_ops;
  4353. snd_hda_add_verbs(codec, stac9872_core_init);
  4354. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  4355. stac9872_fixups);
  4356. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  4357. err = stac_parse_auto_config(codec);
  4358. if (err < 0) {
  4359. stac_free(codec);
  4360. return -EINVAL;
  4361. }
  4362. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  4363. return 0;
  4364. }
  4365. /*
  4366. * patch entries
  4367. */
  4368. static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  4369. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  4370. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  4371. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  4372. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  4373. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  4374. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  4375. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  4376. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  4377. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  4378. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  4379. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  4380. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  4381. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  4382. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  4383. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  4384. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  4385. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  4386. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  4387. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  4388. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  4389. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  4390. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  4391. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  4392. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  4393. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  4394. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  4395. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  4396. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  4397. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  4398. { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
  4399. { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
  4400. /* The following does not take into account .id=0x83847661 when subsys =
  4401. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  4402. * currently not fully supported.
  4403. */
  4404. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  4405. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  4406. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  4407. { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
  4408. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  4409. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  4410. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  4411. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  4412. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  4413. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  4414. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  4415. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  4416. { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
  4417. { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
  4418. { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
  4419. { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
  4420. { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
  4421. { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
  4422. { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
  4423. { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
  4424. { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
  4425. { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
  4426. { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
  4427. { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
  4428. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  4429. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  4430. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  4431. { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
  4432. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  4433. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  4434. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  4435. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  4436. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  4437. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  4438. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  4439. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  4440. { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
  4441. { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
  4442. { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
  4443. { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
  4444. { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
  4445. { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
  4446. { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
  4447. { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
  4448. { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
  4449. { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
  4450. { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
  4451. { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
  4452. { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
  4453. { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
  4454. { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
  4455. { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
  4456. { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
  4457. { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
  4458. { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
  4459. { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
  4460. { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
  4461. { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
  4462. { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
  4463. { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
  4464. { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
  4465. { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
  4466. { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
  4467. { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
  4468. { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
  4469. { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
  4470. { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
  4471. { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
  4472. {} /* terminator */
  4473. };
  4474. MODULE_ALIAS("snd-hda-codec-id:8384*");
  4475. MODULE_ALIAS("snd-hda-codec-id:111d*");
  4476. MODULE_LICENSE("GPL");
  4477. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  4478. static struct hda_codec_preset_list sigmatel_list = {
  4479. .preset = snd_hda_preset_sigmatel,
  4480. .owner = THIS_MODULE,
  4481. };
  4482. static int __init patch_sigmatel_init(void)
  4483. {
  4484. return snd_hda_add_codec_preset(&sigmatel_list);
  4485. }
  4486. static void __exit patch_sigmatel_exit(void)
  4487. {
  4488. snd_hda_delete_codec_preset(&sigmatel_list);
  4489. }
  4490. module_init(patch_sigmatel_init)
  4491. module_exit(patch_sigmatel_exit)