swiotlb.c 27 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. * 08/12/11 beckyb Add highmem support
  18. */
  19. #include <linux/cache.h>
  20. #include <linux/dma-mapping.h>
  21. #include <linux/mm.h>
  22. #include <linux/export.h>
  23. #include <linux/spinlock.h>
  24. #include <linux/string.h>
  25. #include <linux/swiotlb.h>
  26. #include <linux/pfn.h>
  27. #include <linux/types.h>
  28. #include <linux/ctype.h>
  29. #include <linux/highmem.h>
  30. #include <linux/gfp.h>
  31. #include <asm/io.h>
  32. #include <asm/dma.h>
  33. #include <asm/scatterlist.h>
  34. #include <linux/init.h>
  35. #include <linux/bootmem.h>
  36. #include <linux/iommu-helper.h>
  37. #define CREATE_TRACE_POINTS
  38. #include <trace/events/swiotlb.h>
  39. #define OFFSET(val,align) ((unsigned long) \
  40. ( (val) & ( (align) - 1)))
  41. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  42. /*
  43. * Minimum IO TLB size to bother booting with. Systems with mainly
  44. * 64bit capable cards will only lightly use the swiotlb. If we can't
  45. * allocate a contiguous 1MB, we're probably in trouble anyway.
  46. */
  47. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  48. int swiotlb_force;
  49. /*
  50. * Used to do a quick range check in swiotlb_tbl_unmap_single and
  51. * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
  52. * API.
  53. */
  54. static phys_addr_t io_tlb_start, io_tlb_end;
  55. /*
  56. * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
  57. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  58. */
  59. static unsigned long io_tlb_nslabs;
  60. /*
  61. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  62. */
  63. static unsigned long io_tlb_overflow = 32*1024;
  64. static phys_addr_t io_tlb_overflow_buffer;
  65. /*
  66. * This is a free list describing the number of free entries available from
  67. * each index
  68. */
  69. static unsigned int *io_tlb_list;
  70. static unsigned int io_tlb_index;
  71. /*
  72. * We need to save away the original address corresponding to a mapped entry
  73. * for the sync operations.
  74. */
  75. static phys_addr_t *io_tlb_orig_addr;
  76. /*
  77. * Protect the above data structures in the map and unmap calls
  78. */
  79. static DEFINE_SPINLOCK(io_tlb_lock);
  80. static int late_alloc;
  81. static int __init
  82. setup_io_tlb_npages(char *str)
  83. {
  84. if (isdigit(*str)) {
  85. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  86. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  87. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  88. }
  89. if (*str == ',')
  90. ++str;
  91. if (!strcmp(str, "force"))
  92. swiotlb_force = 1;
  93. return 0;
  94. }
  95. early_param("swiotlb", setup_io_tlb_npages);
  96. /* make io_tlb_overflow tunable too? */
  97. unsigned long swiotlb_nr_tbl(void)
  98. {
  99. return io_tlb_nslabs;
  100. }
  101. EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
  102. /* default to 64MB */
  103. #define IO_TLB_DEFAULT_SIZE (64UL<<20)
  104. unsigned long swiotlb_size_or_default(void)
  105. {
  106. unsigned long size;
  107. size = io_tlb_nslabs << IO_TLB_SHIFT;
  108. return size ? size : (IO_TLB_DEFAULT_SIZE);
  109. }
  110. /* Note that this doesn't work with highmem page */
  111. static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
  112. volatile void *address)
  113. {
  114. return phys_to_dma(hwdev, virt_to_phys(address));
  115. }
  116. static bool no_iotlb_memory;
  117. void swiotlb_print_info(void)
  118. {
  119. unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  120. unsigned char *vstart, *vend;
  121. if (no_iotlb_memory) {
  122. pr_warn("software IO TLB: No low mem\n");
  123. return;
  124. }
  125. vstart = phys_to_virt(io_tlb_start);
  126. vend = phys_to_virt(io_tlb_end);
  127. printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
  128. (unsigned long long)io_tlb_start,
  129. (unsigned long long)io_tlb_end,
  130. bytes >> 20, vstart, vend - 1);
  131. }
  132. int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
  133. {
  134. void *v_overflow_buffer;
  135. unsigned long i, bytes;
  136. bytes = nslabs << IO_TLB_SHIFT;
  137. io_tlb_nslabs = nslabs;
  138. io_tlb_start = __pa(tlb);
  139. io_tlb_end = io_tlb_start + bytes;
  140. /*
  141. * Get the overflow emergency buffer
  142. */
  143. v_overflow_buffer = alloc_bootmem_low_pages_nopanic(
  144. PAGE_ALIGN(io_tlb_overflow));
  145. if (!v_overflow_buffer)
  146. return -ENOMEM;
  147. io_tlb_overflow_buffer = __pa(v_overflow_buffer);
  148. /*
  149. * Allocate and initialize the free list array. This array is used
  150. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  151. * between io_tlb_start and io_tlb_end.
  152. */
  153. io_tlb_list = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
  154. for (i = 0; i < io_tlb_nslabs; i++)
  155. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  156. io_tlb_index = 0;
  157. io_tlb_orig_addr = alloc_bootmem_pages(PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
  158. if (verbose)
  159. swiotlb_print_info();
  160. return 0;
  161. }
  162. /*
  163. * Statically reserve bounce buffer space and initialize bounce buffer data
  164. * structures for the software IO TLB used to implement the DMA API.
  165. */
  166. void __init
  167. swiotlb_init(int verbose)
  168. {
  169. size_t default_size = IO_TLB_DEFAULT_SIZE;
  170. unsigned char *vstart;
  171. unsigned long bytes;
  172. if (!io_tlb_nslabs) {
  173. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  174. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  175. }
  176. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  177. /* Get IO TLB memory from the low pages */
  178. vstart = alloc_bootmem_low_pages_nopanic(PAGE_ALIGN(bytes));
  179. if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
  180. return;
  181. if (io_tlb_start)
  182. free_bootmem(io_tlb_start,
  183. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  184. pr_warn("Cannot allocate SWIOTLB buffer");
  185. no_iotlb_memory = true;
  186. }
  187. /*
  188. * Systems with larger DMA zones (those that don't support ISA) can
  189. * initialize the swiotlb later using the slab allocator if needed.
  190. * This should be just like above, but with some error catching.
  191. */
  192. int
  193. swiotlb_late_init_with_default_size(size_t default_size)
  194. {
  195. unsigned long bytes, req_nslabs = io_tlb_nslabs;
  196. unsigned char *vstart = NULL;
  197. unsigned int order;
  198. int rc = 0;
  199. if (!io_tlb_nslabs) {
  200. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  201. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  202. }
  203. /*
  204. * Get IO TLB memory from the low pages
  205. */
  206. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  207. io_tlb_nslabs = SLABS_PER_PAGE << order;
  208. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  209. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  210. vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
  211. order);
  212. if (vstart)
  213. break;
  214. order--;
  215. }
  216. if (!vstart) {
  217. io_tlb_nslabs = req_nslabs;
  218. return -ENOMEM;
  219. }
  220. if (order != get_order(bytes)) {
  221. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  222. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  223. io_tlb_nslabs = SLABS_PER_PAGE << order;
  224. }
  225. rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
  226. if (rc)
  227. free_pages((unsigned long)vstart, order);
  228. return rc;
  229. }
  230. int
  231. swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
  232. {
  233. unsigned long i, bytes;
  234. unsigned char *v_overflow_buffer;
  235. bytes = nslabs << IO_TLB_SHIFT;
  236. io_tlb_nslabs = nslabs;
  237. io_tlb_start = virt_to_phys(tlb);
  238. io_tlb_end = io_tlb_start + bytes;
  239. memset(tlb, 0, bytes);
  240. /*
  241. * Get the overflow emergency buffer
  242. */
  243. v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  244. get_order(io_tlb_overflow));
  245. if (!v_overflow_buffer)
  246. goto cleanup2;
  247. io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
  248. /*
  249. * Allocate and initialize the free list array. This array is used
  250. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  251. * between io_tlb_start and io_tlb_end.
  252. */
  253. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  254. get_order(io_tlb_nslabs * sizeof(int)));
  255. if (!io_tlb_list)
  256. goto cleanup3;
  257. for (i = 0; i < io_tlb_nslabs; i++)
  258. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  259. io_tlb_index = 0;
  260. io_tlb_orig_addr = (phys_addr_t *)
  261. __get_free_pages(GFP_KERNEL,
  262. get_order(io_tlb_nslabs *
  263. sizeof(phys_addr_t)));
  264. if (!io_tlb_orig_addr)
  265. goto cleanup4;
  266. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
  267. swiotlb_print_info();
  268. late_alloc = 1;
  269. return 0;
  270. cleanup4:
  271. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  272. sizeof(int)));
  273. io_tlb_list = NULL;
  274. cleanup3:
  275. free_pages((unsigned long)v_overflow_buffer,
  276. get_order(io_tlb_overflow));
  277. io_tlb_overflow_buffer = 0;
  278. cleanup2:
  279. io_tlb_end = 0;
  280. io_tlb_start = 0;
  281. io_tlb_nslabs = 0;
  282. return -ENOMEM;
  283. }
  284. void __init swiotlb_free(void)
  285. {
  286. if (!io_tlb_orig_addr)
  287. return;
  288. if (late_alloc) {
  289. free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
  290. get_order(io_tlb_overflow));
  291. free_pages((unsigned long)io_tlb_orig_addr,
  292. get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
  293. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  294. sizeof(int)));
  295. free_pages((unsigned long)phys_to_virt(io_tlb_start),
  296. get_order(io_tlb_nslabs << IO_TLB_SHIFT));
  297. } else {
  298. free_bootmem_late(io_tlb_overflow_buffer,
  299. PAGE_ALIGN(io_tlb_overflow));
  300. free_bootmem_late(__pa(io_tlb_orig_addr),
  301. PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
  302. free_bootmem_late(__pa(io_tlb_list),
  303. PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
  304. free_bootmem_late(io_tlb_start,
  305. PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
  306. }
  307. io_tlb_nslabs = 0;
  308. }
  309. static int is_swiotlb_buffer(phys_addr_t paddr)
  310. {
  311. return paddr >= io_tlb_start && paddr < io_tlb_end;
  312. }
  313. /*
  314. * Bounce: copy the swiotlb buffer back to the original dma location
  315. */
  316. static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
  317. size_t size, enum dma_data_direction dir)
  318. {
  319. unsigned long pfn = PFN_DOWN(orig_addr);
  320. unsigned char *vaddr = phys_to_virt(tlb_addr);
  321. if (PageHighMem(pfn_to_page(pfn))) {
  322. /* The buffer does not have a mapping. Map it in and copy */
  323. unsigned int offset = orig_addr & ~PAGE_MASK;
  324. char *buffer;
  325. unsigned int sz = 0;
  326. unsigned long flags;
  327. while (size) {
  328. sz = min_t(size_t, PAGE_SIZE - offset, size);
  329. local_irq_save(flags);
  330. buffer = kmap_atomic(pfn_to_page(pfn));
  331. if (dir == DMA_TO_DEVICE)
  332. memcpy(vaddr, buffer + offset, sz);
  333. else
  334. memcpy(buffer + offset, vaddr, sz);
  335. kunmap_atomic(buffer);
  336. local_irq_restore(flags);
  337. size -= sz;
  338. pfn++;
  339. vaddr += sz;
  340. offset = 0;
  341. }
  342. } else if (dir == DMA_TO_DEVICE) {
  343. memcpy(vaddr, phys_to_virt(orig_addr), size);
  344. } else {
  345. memcpy(phys_to_virt(orig_addr), vaddr, size);
  346. }
  347. }
  348. phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
  349. dma_addr_t tbl_dma_addr,
  350. phys_addr_t orig_addr, size_t size,
  351. enum dma_data_direction dir)
  352. {
  353. unsigned long flags;
  354. phys_addr_t tlb_addr;
  355. unsigned int nslots, stride, index, wrap;
  356. int i;
  357. unsigned long mask;
  358. unsigned long offset_slots;
  359. unsigned long max_slots;
  360. if (no_iotlb_memory)
  361. panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
  362. mask = dma_get_seg_boundary(hwdev);
  363. tbl_dma_addr &= mask;
  364. offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  365. /*
  366. * Carefully handle integer overflow which can occur when mask == ~0UL.
  367. */
  368. max_slots = mask + 1
  369. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  370. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  371. /*
  372. * For mappings greater than a page, we limit the stride (and
  373. * hence alignment) to a page size.
  374. */
  375. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  376. if (size > PAGE_SIZE)
  377. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  378. else
  379. stride = 1;
  380. BUG_ON(!nslots);
  381. /*
  382. * Find suitable number of IO TLB entries size that will fit this
  383. * request and allocate a buffer from that IO TLB pool.
  384. */
  385. spin_lock_irqsave(&io_tlb_lock, flags);
  386. index = ALIGN(io_tlb_index, stride);
  387. if (index >= io_tlb_nslabs)
  388. index = 0;
  389. wrap = index;
  390. do {
  391. while (iommu_is_span_boundary(index, nslots, offset_slots,
  392. max_slots)) {
  393. index += stride;
  394. if (index >= io_tlb_nslabs)
  395. index = 0;
  396. if (index == wrap)
  397. goto not_found;
  398. }
  399. /*
  400. * If we find a slot that indicates we have 'nslots' number of
  401. * contiguous buffers, we allocate the buffers from that slot
  402. * and mark the entries as '0' indicating unavailable.
  403. */
  404. if (io_tlb_list[index] >= nslots) {
  405. int count = 0;
  406. for (i = index; i < (int) (index + nslots); i++)
  407. io_tlb_list[i] = 0;
  408. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  409. io_tlb_list[i] = ++count;
  410. tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  411. /*
  412. * Update the indices to avoid searching in the next
  413. * round.
  414. */
  415. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  416. ? (index + nslots) : 0);
  417. goto found;
  418. }
  419. index += stride;
  420. if (index >= io_tlb_nslabs)
  421. index = 0;
  422. } while (index != wrap);
  423. not_found:
  424. spin_unlock_irqrestore(&io_tlb_lock, flags);
  425. dev_warn(hwdev, "swiotlb buffer is full\n");
  426. return SWIOTLB_MAP_ERROR;
  427. found:
  428. spin_unlock_irqrestore(&io_tlb_lock, flags);
  429. /*
  430. * Save away the mapping from the original address to the DMA address.
  431. * This is needed when we sync the memory. Then we sync the buffer if
  432. * needed.
  433. */
  434. for (i = 0; i < nslots; i++)
  435. io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
  436. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  437. swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
  438. return tlb_addr;
  439. }
  440. EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
  441. /*
  442. * Allocates bounce buffer and returns its kernel virtual address.
  443. */
  444. phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size,
  445. enum dma_data_direction dir)
  446. {
  447. dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
  448. return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
  449. }
  450. /*
  451. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  452. */
  453. void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
  454. size_t size, enum dma_data_direction dir)
  455. {
  456. unsigned long flags;
  457. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  458. int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
  459. phys_addr_t orig_addr = io_tlb_orig_addr[index];
  460. /*
  461. * First, sync the memory before unmapping the entry
  462. */
  463. if (orig_addr && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
  464. swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
  465. /*
  466. * Return the buffer to the free list by setting the corresponding
  467. * entries to indicate the number of contiguous entries available.
  468. * While returning the entries to the free list, we merge the entries
  469. * with slots below and above the pool being returned.
  470. */
  471. spin_lock_irqsave(&io_tlb_lock, flags);
  472. {
  473. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  474. io_tlb_list[index + nslots] : 0);
  475. /*
  476. * Step 1: return the slots to the free list, merging the
  477. * slots with superceeding slots
  478. */
  479. for (i = index + nslots - 1; i >= index; i--)
  480. io_tlb_list[i] = ++count;
  481. /*
  482. * Step 2: merge the returned slots with the preceding slots,
  483. * if available (non zero)
  484. */
  485. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  486. io_tlb_list[i] = ++count;
  487. }
  488. spin_unlock_irqrestore(&io_tlb_lock, flags);
  489. }
  490. EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
  491. void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
  492. size_t size, enum dma_data_direction dir,
  493. enum dma_sync_target target)
  494. {
  495. int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
  496. phys_addr_t orig_addr = io_tlb_orig_addr[index];
  497. orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
  498. switch (target) {
  499. case SYNC_FOR_CPU:
  500. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  501. swiotlb_bounce(orig_addr, tlb_addr,
  502. size, DMA_FROM_DEVICE);
  503. else
  504. BUG_ON(dir != DMA_TO_DEVICE);
  505. break;
  506. case SYNC_FOR_DEVICE:
  507. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  508. swiotlb_bounce(orig_addr, tlb_addr,
  509. size, DMA_TO_DEVICE);
  510. else
  511. BUG_ON(dir != DMA_FROM_DEVICE);
  512. break;
  513. default:
  514. BUG();
  515. }
  516. }
  517. EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
  518. void *
  519. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  520. dma_addr_t *dma_handle, gfp_t flags)
  521. {
  522. dma_addr_t dev_addr;
  523. void *ret;
  524. int order = get_order(size);
  525. u64 dma_mask = DMA_BIT_MASK(32);
  526. if (hwdev && hwdev->coherent_dma_mask)
  527. dma_mask = hwdev->coherent_dma_mask;
  528. ret = (void *)__get_free_pages(flags, order);
  529. if (ret) {
  530. dev_addr = swiotlb_virt_to_bus(hwdev, ret);
  531. if (dev_addr + size - 1 > dma_mask) {
  532. /*
  533. * The allocated memory isn't reachable by the device.
  534. */
  535. free_pages((unsigned long) ret, order);
  536. ret = NULL;
  537. }
  538. }
  539. if (!ret) {
  540. /*
  541. * We are either out of memory or the device can't DMA to
  542. * GFP_DMA memory; fall back on map_single(), which
  543. * will grab memory from the lowest available address range.
  544. */
  545. phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
  546. if (paddr == SWIOTLB_MAP_ERROR)
  547. return NULL;
  548. ret = phys_to_virt(paddr);
  549. dev_addr = phys_to_dma(hwdev, paddr);
  550. /* Confirm address can be DMA'd by device */
  551. if (dev_addr + size - 1 > dma_mask) {
  552. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  553. (unsigned long long)dma_mask,
  554. (unsigned long long)dev_addr);
  555. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  556. swiotlb_tbl_unmap_single(hwdev, paddr,
  557. size, DMA_TO_DEVICE);
  558. return NULL;
  559. }
  560. }
  561. *dma_handle = dev_addr;
  562. memset(ret, 0, size);
  563. return ret;
  564. }
  565. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  566. void
  567. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  568. dma_addr_t dev_addr)
  569. {
  570. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  571. WARN_ON(irqs_disabled());
  572. if (!is_swiotlb_buffer(paddr))
  573. free_pages((unsigned long)vaddr, get_order(size));
  574. else
  575. /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
  576. swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
  577. }
  578. EXPORT_SYMBOL(swiotlb_free_coherent);
  579. static void
  580. swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
  581. int do_panic)
  582. {
  583. /*
  584. * Ran out of IOMMU space for this operation. This is very bad.
  585. * Unfortunately the drivers cannot handle this operation properly.
  586. * unless they check for dma_mapping_error (most don't)
  587. * When the mapping is small enough return a static buffer to limit
  588. * the damage, or panic when the transfer is too big.
  589. */
  590. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  591. "device %s\n", size, dev ? dev_name(dev) : "?");
  592. if (size <= io_tlb_overflow || !do_panic)
  593. return;
  594. if (dir == DMA_BIDIRECTIONAL)
  595. panic("DMA: Random memory could be DMA accessed\n");
  596. if (dir == DMA_FROM_DEVICE)
  597. panic("DMA: Random memory could be DMA written\n");
  598. if (dir == DMA_TO_DEVICE)
  599. panic("DMA: Random memory could be DMA read\n");
  600. }
  601. /*
  602. * Map a single buffer of the indicated size for DMA in streaming mode. The
  603. * physical address to use is returned.
  604. *
  605. * Once the device is given the dma address, the device owns this memory until
  606. * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
  607. */
  608. dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
  609. unsigned long offset, size_t size,
  610. enum dma_data_direction dir,
  611. struct dma_attrs *attrs)
  612. {
  613. phys_addr_t map, phys = page_to_phys(page) + offset;
  614. dma_addr_t dev_addr = phys_to_dma(dev, phys);
  615. BUG_ON(dir == DMA_NONE);
  616. /*
  617. * If the address happens to be in the device's DMA window,
  618. * we can safely return the device addr and not worry about bounce
  619. * buffering it.
  620. */
  621. if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
  622. return dev_addr;
  623. trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
  624. /* Oh well, have to allocate and map a bounce buffer. */
  625. map = map_single(dev, phys, size, dir);
  626. if (map == SWIOTLB_MAP_ERROR) {
  627. swiotlb_full(dev, size, dir, 1);
  628. return phys_to_dma(dev, io_tlb_overflow_buffer);
  629. }
  630. dev_addr = phys_to_dma(dev, map);
  631. /* Ensure that the address returned is DMA'ble */
  632. if (!dma_capable(dev, dev_addr, size)) {
  633. swiotlb_tbl_unmap_single(dev, map, size, dir);
  634. return phys_to_dma(dev, io_tlb_overflow_buffer);
  635. }
  636. return dev_addr;
  637. }
  638. EXPORT_SYMBOL_GPL(swiotlb_map_page);
  639. /*
  640. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  641. * match what was provided for in a previous swiotlb_map_page call. All
  642. * other usages are undefined.
  643. *
  644. * After this call, reads by the cpu to the buffer are guaranteed to see
  645. * whatever the device wrote there.
  646. */
  647. static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
  648. size_t size, enum dma_data_direction dir)
  649. {
  650. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  651. BUG_ON(dir == DMA_NONE);
  652. if (is_swiotlb_buffer(paddr)) {
  653. swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
  654. return;
  655. }
  656. if (dir != DMA_FROM_DEVICE)
  657. return;
  658. /*
  659. * phys_to_virt doesn't work with hihgmem page but we could
  660. * call dma_mark_clean() with hihgmem page here. However, we
  661. * are fine since dma_mark_clean() is null on POWERPC. We can
  662. * make dma_mark_clean() take a physical address if necessary.
  663. */
  664. dma_mark_clean(phys_to_virt(paddr), size);
  665. }
  666. void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
  667. size_t size, enum dma_data_direction dir,
  668. struct dma_attrs *attrs)
  669. {
  670. unmap_single(hwdev, dev_addr, size, dir);
  671. }
  672. EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
  673. /*
  674. * Make physical memory consistent for a single streaming mode DMA translation
  675. * after a transfer.
  676. *
  677. * If you perform a swiotlb_map_page() but wish to interrogate the buffer
  678. * using the cpu, yet do not wish to teardown the dma mapping, you must
  679. * call this function before doing so. At the next point you give the dma
  680. * address back to the card, you must first perform a
  681. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  682. */
  683. static void
  684. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  685. size_t size, enum dma_data_direction dir,
  686. enum dma_sync_target target)
  687. {
  688. phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
  689. BUG_ON(dir == DMA_NONE);
  690. if (is_swiotlb_buffer(paddr)) {
  691. swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
  692. return;
  693. }
  694. if (dir != DMA_FROM_DEVICE)
  695. return;
  696. dma_mark_clean(phys_to_virt(paddr), size);
  697. }
  698. void
  699. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  700. size_t size, enum dma_data_direction dir)
  701. {
  702. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  703. }
  704. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  705. void
  706. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  707. size_t size, enum dma_data_direction dir)
  708. {
  709. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  710. }
  711. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  712. /*
  713. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  714. * This is the scatter-gather version of the above swiotlb_map_page
  715. * interface. Here the scatter gather list elements are each tagged with the
  716. * appropriate dma address and length. They are obtained via
  717. * sg_dma_{address,length}(SG).
  718. *
  719. * NOTE: An implementation may be able to use a smaller number of
  720. * DMA address/length pairs than there are SG table elements.
  721. * (for example via virtual mapping capabilities)
  722. * The routine returns the number of addr/length pairs actually
  723. * used, at most nents.
  724. *
  725. * Device ownership issues as mentioned above for swiotlb_map_page are the
  726. * same here.
  727. */
  728. int
  729. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  730. enum dma_data_direction dir, struct dma_attrs *attrs)
  731. {
  732. struct scatterlist *sg;
  733. int i;
  734. BUG_ON(dir == DMA_NONE);
  735. for_each_sg(sgl, sg, nelems, i) {
  736. phys_addr_t paddr = sg_phys(sg);
  737. dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
  738. if (swiotlb_force ||
  739. !dma_capable(hwdev, dev_addr, sg->length)) {
  740. phys_addr_t map = map_single(hwdev, sg_phys(sg),
  741. sg->length, dir);
  742. if (map == SWIOTLB_MAP_ERROR) {
  743. /* Don't panic here, we expect map_sg users
  744. to do proper error handling. */
  745. swiotlb_full(hwdev, sg->length, dir, 0);
  746. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  747. attrs);
  748. sg_dma_len(sgl) = 0;
  749. return 0;
  750. }
  751. sg->dma_address = phys_to_dma(hwdev, map);
  752. } else
  753. sg->dma_address = dev_addr;
  754. sg_dma_len(sg) = sg->length;
  755. }
  756. return nelems;
  757. }
  758. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  759. int
  760. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  761. enum dma_data_direction dir)
  762. {
  763. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  764. }
  765. EXPORT_SYMBOL(swiotlb_map_sg);
  766. /*
  767. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  768. * concerning calls here are the same as for swiotlb_unmap_page() above.
  769. */
  770. void
  771. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  772. int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
  773. {
  774. struct scatterlist *sg;
  775. int i;
  776. BUG_ON(dir == DMA_NONE);
  777. for_each_sg(sgl, sg, nelems, i)
  778. unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
  779. }
  780. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  781. void
  782. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  783. enum dma_data_direction dir)
  784. {
  785. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  786. }
  787. EXPORT_SYMBOL(swiotlb_unmap_sg);
  788. /*
  789. * Make physical memory consistent for a set of streaming mode DMA translations
  790. * after a transfer.
  791. *
  792. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  793. * and usage.
  794. */
  795. static void
  796. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  797. int nelems, enum dma_data_direction dir,
  798. enum dma_sync_target target)
  799. {
  800. struct scatterlist *sg;
  801. int i;
  802. for_each_sg(sgl, sg, nelems, i)
  803. swiotlb_sync_single(hwdev, sg->dma_address,
  804. sg_dma_len(sg), dir, target);
  805. }
  806. void
  807. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  808. int nelems, enum dma_data_direction dir)
  809. {
  810. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  811. }
  812. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  813. void
  814. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  815. int nelems, enum dma_data_direction dir)
  816. {
  817. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  818. }
  819. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  820. int
  821. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  822. {
  823. return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
  824. }
  825. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  826. /*
  827. * Return whether the given device DMA address mask can be supported
  828. * properly. For example, if your device can only drive the low 24-bits
  829. * during bus mastering, then you would pass 0x00ffffff as the mask to
  830. * this function.
  831. */
  832. int
  833. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  834. {
  835. return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
  836. }
  837. EXPORT_SYMBOL(swiotlb_dma_supported);