drm_mode.h 13 KB

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  1. /*
  2. * Copyright (c) 2007 Dave Airlie <airlied@linux.ie>
  3. * Copyright (c) 2007 Jakob Bornecrantz <wallbraker@gmail.com>
  4. * Copyright (c) 2008 Red Hat Inc.
  5. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA
  6. * Copyright (c) 2007-2008 Intel Corporation
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
  21. * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  23. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  24. * IN THE SOFTWARE.
  25. */
  26. #ifndef _DRM_MODE_H
  27. #define _DRM_MODE_H
  28. #include <linux/types.h>
  29. #define DRM_DISPLAY_INFO_LEN 32
  30. #define DRM_CONNECTOR_NAME_LEN 32
  31. #define DRM_DISPLAY_MODE_LEN 32
  32. #define DRM_PROP_NAME_LEN 32
  33. #define DRM_MODE_TYPE_BUILTIN (1<<0)
  34. #define DRM_MODE_TYPE_CLOCK_C ((1<<1) | DRM_MODE_TYPE_BUILTIN)
  35. #define DRM_MODE_TYPE_CRTC_C ((1<<2) | DRM_MODE_TYPE_BUILTIN)
  36. #define DRM_MODE_TYPE_PREFERRED (1<<3)
  37. #define DRM_MODE_TYPE_DEFAULT (1<<4)
  38. #define DRM_MODE_TYPE_USERDEF (1<<5)
  39. #define DRM_MODE_TYPE_DRIVER (1<<6)
  40. /* Video mode flags */
  41. /* bit compatible with the xorg definitions. */
  42. #define DRM_MODE_FLAG_PHSYNC (1<<0)
  43. #define DRM_MODE_FLAG_NHSYNC (1<<1)
  44. #define DRM_MODE_FLAG_PVSYNC (1<<2)
  45. #define DRM_MODE_FLAG_NVSYNC (1<<3)
  46. #define DRM_MODE_FLAG_INTERLACE (1<<4)
  47. #define DRM_MODE_FLAG_DBLSCAN (1<<5)
  48. #define DRM_MODE_FLAG_CSYNC (1<<6)
  49. #define DRM_MODE_FLAG_PCSYNC (1<<7)
  50. #define DRM_MODE_FLAG_NCSYNC (1<<8)
  51. #define DRM_MODE_FLAG_HSKEW (1<<9) /* hskew provided */
  52. #define DRM_MODE_FLAG_BCAST (1<<10)
  53. #define DRM_MODE_FLAG_PIXMUX (1<<11)
  54. #define DRM_MODE_FLAG_DBLCLK (1<<12)
  55. #define DRM_MODE_FLAG_CLKDIV2 (1<<13)
  56. /*
  57. * When adding a new stereo mode don't forget to adjust DRM_MODE_FLAGS_3D_MAX
  58. * (define not exposed to user space).
  59. */
  60. #define DRM_MODE_FLAG_3D_MASK (0x1f<<14)
  61. #define DRM_MODE_FLAG_3D_NONE (0<<14)
  62. #define DRM_MODE_FLAG_3D_FRAME_PACKING (1<<14)
  63. #define DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE (2<<14)
  64. #define DRM_MODE_FLAG_3D_LINE_ALTERNATIVE (3<<14)
  65. #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL (4<<14)
  66. #define DRM_MODE_FLAG_3D_L_DEPTH (5<<14)
  67. #define DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH (6<<14)
  68. #define DRM_MODE_FLAG_3D_TOP_AND_BOTTOM (7<<14)
  69. #define DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF (8<<14)
  70. /* DPMS flags */
  71. /* bit compatible with the xorg definitions. */
  72. #define DRM_MODE_DPMS_ON 0
  73. #define DRM_MODE_DPMS_STANDBY 1
  74. #define DRM_MODE_DPMS_SUSPEND 2
  75. #define DRM_MODE_DPMS_OFF 3
  76. /* Scaling mode options */
  77. #define DRM_MODE_SCALE_NONE 0 /* Unmodified timing (display or
  78. software can still scale) */
  79. #define DRM_MODE_SCALE_FULLSCREEN 1 /* Full screen, ignore aspect */
  80. #define DRM_MODE_SCALE_CENTER 2 /* Centered, no scaling */
  81. #define DRM_MODE_SCALE_ASPECT 3 /* Full screen, preserve aspect */
  82. /* Dithering mode options */
  83. #define DRM_MODE_DITHERING_OFF 0
  84. #define DRM_MODE_DITHERING_ON 1
  85. #define DRM_MODE_DITHERING_AUTO 2
  86. /* Dirty info options */
  87. #define DRM_MODE_DIRTY_OFF 0
  88. #define DRM_MODE_DIRTY_ON 1
  89. #define DRM_MODE_DIRTY_ANNOTATE 2
  90. struct drm_mode_modeinfo {
  91. __u32 clock;
  92. __u16 hdisplay, hsync_start, hsync_end, htotal, hskew;
  93. __u16 vdisplay, vsync_start, vsync_end, vtotal, vscan;
  94. __u32 vrefresh;
  95. __u32 flags;
  96. __u32 type;
  97. char name[DRM_DISPLAY_MODE_LEN];
  98. };
  99. struct drm_mode_card_res {
  100. __u64 fb_id_ptr;
  101. __u64 crtc_id_ptr;
  102. __u64 connector_id_ptr;
  103. __u64 encoder_id_ptr;
  104. __u32 count_fbs;
  105. __u32 count_crtcs;
  106. __u32 count_connectors;
  107. __u32 count_encoders;
  108. __u32 min_width, max_width;
  109. __u32 min_height, max_height;
  110. };
  111. struct drm_mode_crtc {
  112. __u64 set_connectors_ptr;
  113. __u32 count_connectors;
  114. __u32 crtc_id; /**< Id */
  115. __u32 fb_id; /**< Id of framebuffer */
  116. __u32 x, y; /**< Position on the frameuffer */
  117. __u32 gamma_size;
  118. __u32 mode_valid;
  119. struct drm_mode_modeinfo mode;
  120. };
  121. #define DRM_MODE_PRESENT_TOP_FIELD (1<<0)
  122. #define DRM_MODE_PRESENT_BOTTOM_FIELD (1<<1)
  123. /* Planes blend with or override other bits on the CRTC */
  124. struct drm_mode_set_plane {
  125. __u32 plane_id;
  126. __u32 crtc_id;
  127. __u32 fb_id; /* fb object contains surface format type */
  128. __u32 flags; /* see above flags */
  129. /* Signed dest location allows it to be partially off screen */
  130. __s32 crtc_x, crtc_y;
  131. __u32 crtc_w, crtc_h;
  132. /* Source values are 16.16 fixed point */
  133. __u32 src_x, src_y;
  134. __u32 src_h, src_w;
  135. };
  136. struct drm_mode_get_plane {
  137. __u32 plane_id;
  138. __u32 crtc_id;
  139. __u32 fb_id;
  140. __u32 possible_crtcs;
  141. __u32 gamma_size;
  142. __u32 count_format_types;
  143. __u64 format_type_ptr;
  144. };
  145. struct drm_mode_get_plane_res {
  146. __u64 plane_id_ptr;
  147. __u32 count_planes;
  148. };
  149. #define DRM_MODE_ENCODER_NONE 0
  150. #define DRM_MODE_ENCODER_DAC 1
  151. #define DRM_MODE_ENCODER_TMDS 2
  152. #define DRM_MODE_ENCODER_LVDS 3
  153. #define DRM_MODE_ENCODER_TVDAC 4
  154. #define DRM_MODE_ENCODER_VIRTUAL 5
  155. #define DRM_MODE_ENCODER_DSI 6
  156. struct drm_mode_get_encoder {
  157. __u32 encoder_id;
  158. __u32 encoder_type;
  159. __u32 crtc_id; /**< Id of crtc */
  160. __u32 possible_crtcs;
  161. __u32 possible_clones;
  162. };
  163. /* This is for connectors with multiple signal types. */
  164. /* Try to match DRM_MODE_CONNECTOR_X as closely as possible. */
  165. #define DRM_MODE_SUBCONNECTOR_Automatic 0
  166. #define DRM_MODE_SUBCONNECTOR_Unknown 0
  167. #define DRM_MODE_SUBCONNECTOR_DVID 3
  168. #define DRM_MODE_SUBCONNECTOR_DVIA 4
  169. #define DRM_MODE_SUBCONNECTOR_Composite 5
  170. #define DRM_MODE_SUBCONNECTOR_SVIDEO 6
  171. #define DRM_MODE_SUBCONNECTOR_Component 8
  172. #define DRM_MODE_SUBCONNECTOR_SCART 9
  173. #define DRM_MODE_CONNECTOR_Unknown 0
  174. #define DRM_MODE_CONNECTOR_VGA 1
  175. #define DRM_MODE_CONNECTOR_DVII 2
  176. #define DRM_MODE_CONNECTOR_DVID 3
  177. #define DRM_MODE_CONNECTOR_DVIA 4
  178. #define DRM_MODE_CONNECTOR_Composite 5
  179. #define DRM_MODE_CONNECTOR_SVIDEO 6
  180. #define DRM_MODE_CONNECTOR_LVDS 7
  181. #define DRM_MODE_CONNECTOR_Component 8
  182. #define DRM_MODE_CONNECTOR_9PinDIN 9
  183. #define DRM_MODE_CONNECTOR_DisplayPort 10
  184. #define DRM_MODE_CONNECTOR_HDMIA 11
  185. #define DRM_MODE_CONNECTOR_HDMIB 12
  186. #define DRM_MODE_CONNECTOR_TV 13
  187. #define DRM_MODE_CONNECTOR_eDP 14
  188. #define DRM_MODE_CONNECTOR_VIRTUAL 15
  189. #define DRM_MODE_CONNECTOR_DSI 16
  190. struct drm_mode_get_connector {
  191. __u64 encoders_ptr;
  192. __u64 modes_ptr;
  193. __u64 props_ptr;
  194. __u64 prop_values_ptr;
  195. __u32 count_modes;
  196. __u32 count_props;
  197. __u32 count_encoders;
  198. __u32 encoder_id; /**< Current Encoder */
  199. __u32 connector_id; /**< Id */
  200. __u32 connector_type;
  201. __u32 connector_type_id;
  202. __u32 connection;
  203. __u32 mm_width, mm_height; /**< HxW in millimeters */
  204. __u32 subpixel;
  205. __u32 pad;
  206. };
  207. #define DRM_MODE_PROP_PENDING (1<<0)
  208. #define DRM_MODE_PROP_RANGE (1<<1)
  209. #define DRM_MODE_PROP_IMMUTABLE (1<<2)
  210. #define DRM_MODE_PROP_ENUM (1<<3) /* enumerated type with text strings */
  211. #define DRM_MODE_PROP_BLOB (1<<4)
  212. #define DRM_MODE_PROP_BITMASK (1<<5) /* bitmask of enumerated types */
  213. struct drm_mode_property_enum {
  214. __u64 value;
  215. char name[DRM_PROP_NAME_LEN];
  216. };
  217. struct drm_mode_get_property {
  218. __u64 values_ptr; /* values and blob lengths */
  219. __u64 enum_blob_ptr; /* enum and blob id ptrs */
  220. __u32 prop_id;
  221. __u32 flags;
  222. char name[DRM_PROP_NAME_LEN];
  223. __u32 count_values;
  224. __u32 count_enum_blobs;
  225. };
  226. struct drm_mode_connector_set_property {
  227. __u64 value;
  228. __u32 prop_id;
  229. __u32 connector_id;
  230. };
  231. struct drm_mode_obj_get_properties {
  232. __u64 props_ptr;
  233. __u64 prop_values_ptr;
  234. __u32 count_props;
  235. __u32 obj_id;
  236. __u32 obj_type;
  237. };
  238. struct drm_mode_obj_set_property {
  239. __u64 value;
  240. __u32 prop_id;
  241. __u32 obj_id;
  242. __u32 obj_type;
  243. };
  244. struct drm_mode_get_blob {
  245. __u32 blob_id;
  246. __u32 length;
  247. __u64 data;
  248. };
  249. struct drm_mode_fb_cmd {
  250. __u32 fb_id;
  251. __u32 width, height;
  252. __u32 pitch;
  253. __u32 bpp;
  254. __u32 depth;
  255. /* driver specific handle */
  256. __u32 handle;
  257. };
  258. #define DRM_MODE_FB_INTERLACED (1<<0) /* for interlaced framebuffers */
  259. struct drm_mode_fb_cmd2 {
  260. __u32 fb_id;
  261. __u32 width, height;
  262. __u32 pixel_format; /* fourcc code from drm_fourcc.h */
  263. __u32 flags; /* see above flags */
  264. /*
  265. * In case of planar formats, this ioctl allows up to 4
  266. * buffer objects with offets and pitches per plane.
  267. * The pitch and offset order is dictated by the fourcc,
  268. * e.g. NV12 (http://fourcc.org/yuv.php#NV12) is described as:
  269. *
  270. * YUV 4:2:0 image with a plane of 8 bit Y samples
  271. * followed by an interleaved U/V plane containing
  272. * 8 bit 2x2 subsampled colour difference samples.
  273. *
  274. * So it would consist of Y as offset[0] and UV as
  275. * offeset[1]. Note that offset[0] will generally
  276. * be 0.
  277. */
  278. __u32 handles[4];
  279. __u32 pitches[4]; /* pitch for each plane */
  280. __u32 offsets[4]; /* offset of each plane */
  281. };
  282. #define DRM_MODE_FB_DIRTY_ANNOTATE_COPY 0x01
  283. #define DRM_MODE_FB_DIRTY_ANNOTATE_FILL 0x02
  284. #define DRM_MODE_FB_DIRTY_FLAGS 0x03
  285. #define DRM_MODE_FB_DIRTY_MAX_CLIPS 256
  286. /*
  287. * Mark a region of a framebuffer as dirty.
  288. *
  289. * Some hardware does not automatically update display contents
  290. * as a hardware or software draw to a framebuffer. This ioctl
  291. * allows userspace to tell the kernel and the hardware what
  292. * regions of the framebuffer have changed.
  293. *
  294. * The kernel or hardware is free to update more then just the
  295. * region specified by the clip rects. The kernel or hardware
  296. * may also delay and/or coalesce several calls to dirty into a
  297. * single update.
  298. *
  299. * Userspace may annotate the updates, the annotates are a
  300. * promise made by the caller that the change is either a copy
  301. * of pixels or a fill of a single color in the region specified.
  302. *
  303. * If the DRM_MODE_FB_DIRTY_ANNOTATE_COPY flag is given then
  304. * the number of updated regions are half of num_clips given,
  305. * where the clip rects are paired in src and dst. The width and
  306. * height of each one of the pairs must match.
  307. *
  308. * If the DRM_MODE_FB_DIRTY_ANNOTATE_FILL flag is given the caller
  309. * promises that the region specified of the clip rects is filled
  310. * completely with a single color as given in the color argument.
  311. */
  312. struct drm_mode_fb_dirty_cmd {
  313. __u32 fb_id;
  314. __u32 flags;
  315. __u32 color;
  316. __u32 num_clips;
  317. __u64 clips_ptr;
  318. };
  319. struct drm_mode_mode_cmd {
  320. __u32 connector_id;
  321. struct drm_mode_modeinfo mode;
  322. };
  323. #define DRM_MODE_CURSOR_BO 0x01
  324. #define DRM_MODE_CURSOR_MOVE 0x02
  325. #define DRM_MODE_CURSOR_FLAGS 0x03
  326. /*
  327. * depending on the value in flags different members are used.
  328. *
  329. * CURSOR_BO uses
  330. * crtc_id
  331. * width
  332. * height
  333. * handle - if 0 turns the cursor off
  334. *
  335. * CURSOR_MOVE uses
  336. * crtc_id
  337. * x
  338. * y
  339. */
  340. struct drm_mode_cursor {
  341. __u32 flags;
  342. __u32 crtc_id;
  343. __s32 x;
  344. __s32 y;
  345. __u32 width;
  346. __u32 height;
  347. /* driver specific handle */
  348. __u32 handle;
  349. };
  350. struct drm_mode_cursor2 {
  351. __u32 flags;
  352. __u32 crtc_id;
  353. __s32 x;
  354. __s32 y;
  355. __u32 width;
  356. __u32 height;
  357. /* driver specific handle */
  358. __u32 handle;
  359. __s32 hot_x;
  360. __s32 hot_y;
  361. };
  362. struct drm_mode_crtc_lut {
  363. __u32 crtc_id;
  364. __u32 gamma_size;
  365. /* pointers to arrays */
  366. __u64 red;
  367. __u64 green;
  368. __u64 blue;
  369. };
  370. #define DRM_MODE_PAGE_FLIP_EVENT 0x01
  371. #define DRM_MODE_PAGE_FLIP_ASYNC 0x02
  372. #define DRM_MODE_PAGE_FLIP_FLAGS (DRM_MODE_PAGE_FLIP_EVENT|DRM_MODE_PAGE_FLIP_ASYNC)
  373. /*
  374. * Request a page flip on the specified crtc.
  375. *
  376. * This ioctl will ask KMS to schedule a page flip for the specified
  377. * crtc. Once any pending rendering targeting the specified fb (as of
  378. * ioctl time) has completed, the crtc will be reprogrammed to display
  379. * that fb after the next vertical refresh. The ioctl returns
  380. * immediately, but subsequent rendering to the current fb will block
  381. * in the execbuffer ioctl until the page flip happens. If a page
  382. * flip is already pending as the ioctl is called, EBUSY will be
  383. * returned.
  384. *
  385. * Flag DRM_MODE_PAGE_FLIP_EVENT requests that drm sends back a vblank
  386. * event (see drm.h: struct drm_event_vblank) when the page flip is
  387. * done. The user_data field passed in with this ioctl will be
  388. * returned as the user_data field in the vblank event struct.
  389. *
  390. * Flag DRM_MODE_PAGE_FLIP_ASYNC requests that the flip happen
  391. * 'as soon as possible', meaning that it not delay waiting for vblank.
  392. * This may cause tearing on the screen.
  393. *
  394. * The reserved field must be zero until we figure out something
  395. * clever to use it for.
  396. */
  397. struct drm_mode_crtc_page_flip {
  398. __u32 crtc_id;
  399. __u32 fb_id;
  400. __u32 flags;
  401. __u32 reserved;
  402. __u64 user_data;
  403. };
  404. /* create a dumb scanout buffer */
  405. struct drm_mode_create_dumb {
  406. uint32_t height;
  407. uint32_t width;
  408. uint32_t bpp;
  409. uint32_t flags;
  410. /* handle, pitch, size will be returned */
  411. uint32_t handle;
  412. uint32_t pitch;
  413. uint64_t size;
  414. };
  415. /* set up for mmap of a dumb scanout buffer */
  416. struct drm_mode_map_dumb {
  417. /** Handle for the object being mapped. */
  418. __u32 handle;
  419. __u32 pad;
  420. /**
  421. * Fake offset to use for subsequent mmap call
  422. *
  423. * This is a fixed-size type for 32/64 compatibility.
  424. */
  425. __u64 offset;
  426. };
  427. struct drm_mode_destroy_dumb {
  428. uint32_t handle;
  429. };
  430. #endif