ufshcd.c 76 KB

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  1. /*
  2. * Universal Flash Storage Host controller driver Core
  3. *
  4. * This code is based on drivers/scsi/ufs/ufshcd.c
  5. * Copyright (C) 2011-2013 Samsung India Software Operations
  6. *
  7. * Authors:
  8. * Santosh Yaraganavi <santosh.sy@samsung.com>
  9. * Vinayak Holikatti <h.vinayak@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. * See the COPYING file in the top-level directory or visit
  16. * <http://www.gnu.org/licenses/gpl-2.0.html>
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * This program is provided "AS IS" and "WITH ALL FAULTS" and
  24. * without warranty of any kind. You are solely responsible for
  25. * determining the appropriateness of using and distributing
  26. * the program and assume all risks associated with your exercise
  27. * of rights with respect to the program, including but not limited
  28. * to infringement of third party rights, the risks and costs of
  29. * program errors, damage to or loss of data, programs or equipment,
  30. * and unavailability or interruption of operations. Under no
  31. * circumstances will the contributor of this Program be liable for
  32. * any damages of any kind arising from your use or distribution of
  33. * this program.
  34. */
  35. #include <linux/async.h>
  36. #include "ufshcd.h"
  37. #include "unipro.h"
  38. #define UFSHCD_ENABLE_INTRS (UTP_TRANSFER_REQ_COMPL |\
  39. UTP_TASK_REQ_COMPL |\
  40. UIC_POWER_MODE |\
  41. UFSHCD_ERROR_MASK)
  42. /* UIC command timeout, unit: ms */
  43. #define UIC_CMD_TIMEOUT 500
  44. /* NOP OUT retries waiting for NOP IN response */
  45. #define NOP_OUT_RETRIES 10
  46. /* Timeout after 30 msecs if NOP OUT hangs without response */
  47. #define NOP_OUT_TIMEOUT 30 /* msecs */
  48. /* Query request retries */
  49. #define QUERY_REQ_RETRIES 10
  50. /* Query request timeout */
  51. #define QUERY_REQ_TIMEOUT 30 /* msec */
  52. /* Expose the flag value from utp_upiu_query.value */
  53. #define MASK_QUERY_UPIU_FLAG_LOC 0xFF
  54. /* Interrupt aggregation default timeout, unit: 40us */
  55. #define INT_AGGR_DEF_TO 0x02
  56. enum {
  57. UFSHCD_MAX_CHANNEL = 0,
  58. UFSHCD_MAX_ID = 1,
  59. UFSHCD_MAX_LUNS = 8,
  60. UFSHCD_CMD_PER_LUN = 32,
  61. UFSHCD_CAN_QUEUE = 32,
  62. };
  63. /* UFSHCD states */
  64. enum {
  65. UFSHCD_STATE_OPERATIONAL,
  66. UFSHCD_STATE_RESET,
  67. UFSHCD_STATE_ERROR,
  68. };
  69. /* Interrupt configuration options */
  70. enum {
  71. UFSHCD_INT_DISABLE,
  72. UFSHCD_INT_ENABLE,
  73. UFSHCD_INT_CLEAR,
  74. };
  75. /*
  76. * ufshcd_wait_for_register - wait for register value to change
  77. * @hba - per-adapter interface
  78. * @reg - mmio register offset
  79. * @mask - mask to apply to read register value
  80. * @val - wait condition
  81. * @interval_us - polling interval in microsecs
  82. * @timeout_ms - timeout in millisecs
  83. *
  84. * Returns -ETIMEDOUT on error, zero on success
  85. */
  86. static int ufshcd_wait_for_register(struct ufs_hba *hba, u32 reg, u32 mask,
  87. u32 val, unsigned long interval_us, unsigned long timeout_ms)
  88. {
  89. int err = 0;
  90. unsigned long timeout = jiffies + msecs_to_jiffies(timeout_ms);
  91. /* ignore bits that we don't intend to wait on */
  92. val = val & mask;
  93. while ((ufshcd_readl(hba, reg) & mask) != val) {
  94. /* wakeup within 50us of expiry */
  95. usleep_range(interval_us, interval_us + 50);
  96. if (time_after(jiffies, timeout)) {
  97. if ((ufshcd_readl(hba, reg) & mask) != val)
  98. err = -ETIMEDOUT;
  99. break;
  100. }
  101. }
  102. return err;
  103. }
  104. /**
  105. * ufshcd_get_intr_mask - Get the interrupt bit mask
  106. * @hba - Pointer to adapter instance
  107. *
  108. * Returns interrupt bit mask per version
  109. */
  110. static inline u32 ufshcd_get_intr_mask(struct ufs_hba *hba)
  111. {
  112. if (hba->ufs_version == UFSHCI_VERSION_10)
  113. return INTERRUPT_MASK_ALL_VER_10;
  114. else
  115. return INTERRUPT_MASK_ALL_VER_11;
  116. }
  117. /**
  118. * ufshcd_get_ufs_version - Get the UFS version supported by the HBA
  119. * @hba - Pointer to adapter instance
  120. *
  121. * Returns UFSHCI version supported by the controller
  122. */
  123. static inline u32 ufshcd_get_ufs_version(struct ufs_hba *hba)
  124. {
  125. return ufshcd_readl(hba, REG_UFS_VERSION);
  126. }
  127. /**
  128. * ufshcd_is_device_present - Check if any device connected to
  129. * the host controller
  130. * @reg_hcs - host controller status register value
  131. *
  132. * Returns 1 if device present, 0 if no device detected
  133. */
  134. static inline int ufshcd_is_device_present(u32 reg_hcs)
  135. {
  136. return (DEVICE_PRESENT & reg_hcs) ? 1 : 0;
  137. }
  138. /**
  139. * ufshcd_get_tr_ocs - Get the UTRD Overall Command Status
  140. * @lrb: pointer to local command reference block
  141. *
  142. * This function is used to get the OCS field from UTRD
  143. * Returns the OCS field in the UTRD
  144. */
  145. static inline int ufshcd_get_tr_ocs(struct ufshcd_lrb *lrbp)
  146. {
  147. return lrbp->utr_descriptor_ptr->header.dword_2 & MASK_OCS;
  148. }
  149. /**
  150. * ufshcd_get_tmr_ocs - Get the UTMRD Overall Command Status
  151. * @task_req_descp: pointer to utp_task_req_desc structure
  152. *
  153. * This function is used to get the OCS field from UTMRD
  154. * Returns the OCS field in the UTMRD
  155. */
  156. static inline int
  157. ufshcd_get_tmr_ocs(struct utp_task_req_desc *task_req_descp)
  158. {
  159. return task_req_descp->header.dword_2 & MASK_OCS;
  160. }
  161. /**
  162. * ufshcd_get_tm_free_slot - get a free slot for task management request
  163. * @hba: per adapter instance
  164. *
  165. * Returns maximum number of task management request slots in case of
  166. * task management queue full or returns the free slot number
  167. */
  168. static inline int ufshcd_get_tm_free_slot(struct ufs_hba *hba)
  169. {
  170. return find_first_zero_bit(&hba->outstanding_tasks, hba->nutmrs);
  171. }
  172. /**
  173. * ufshcd_utrl_clear - Clear a bit in UTRLCLR register
  174. * @hba: per adapter instance
  175. * @pos: position of the bit to be cleared
  176. */
  177. static inline void ufshcd_utrl_clear(struct ufs_hba *hba, u32 pos)
  178. {
  179. ufshcd_writel(hba, ~(1 << pos), REG_UTP_TRANSFER_REQ_LIST_CLEAR);
  180. }
  181. /**
  182. * ufshcd_get_lists_status - Check UCRDY, UTRLRDY and UTMRLRDY
  183. * @reg: Register value of host controller status
  184. *
  185. * Returns integer, 0 on Success and positive value if failed
  186. */
  187. static inline int ufshcd_get_lists_status(u32 reg)
  188. {
  189. /*
  190. * The mask 0xFF is for the following HCS register bits
  191. * Bit Description
  192. * 0 Device Present
  193. * 1 UTRLRDY
  194. * 2 UTMRLRDY
  195. * 3 UCRDY
  196. * 4 HEI
  197. * 5 DEI
  198. * 6-7 reserved
  199. */
  200. return (((reg) & (0xFF)) >> 1) ^ (0x07);
  201. }
  202. /**
  203. * ufshcd_get_uic_cmd_result - Get the UIC command result
  204. * @hba: Pointer to adapter instance
  205. *
  206. * This function gets the result of UIC command completion
  207. * Returns 0 on success, non zero value on error
  208. */
  209. static inline int ufshcd_get_uic_cmd_result(struct ufs_hba *hba)
  210. {
  211. return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_2) &
  212. MASK_UIC_COMMAND_RESULT;
  213. }
  214. /**
  215. * ufshcd_get_dme_attr_val - Get the value of attribute returned by UIC command
  216. * @hba: Pointer to adapter instance
  217. *
  218. * This function gets UIC command argument3
  219. * Returns 0 on success, non zero value on error
  220. */
  221. static inline u32 ufshcd_get_dme_attr_val(struct ufs_hba *hba)
  222. {
  223. return ufshcd_readl(hba, REG_UIC_COMMAND_ARG_3);
  224. }
  225. /**
  226. * ufshcd_get_req_rsp - returns the TR response transaction type
  227. * @ucd_rsp_ptr: pointer to response UPIU
  228. */
  229. static inline int
  230. ufshcd_get_req_rsp(struct utp_upiu_rsp *ucd_rsp_ptr)
  231. {
  232. return be32_to_cpu(ucd_rsp_ptr->header.dword_0) >> 24;
  233. }
  234. /**
  235. * ufshcd_get_rsp_upiu_result - Get the result from response UPIU
  236. * @ucd_rsp_ptr: pointer to response UPIU
  237. *
  238. * This function gets the response status and scsi_status from response UPIU
  239. * Returns the response result code.
  240. */
  241. static inline int
  242. ufshcd_get_rsp_upiu_result(struct utp_upiu_rsp *ucd_rsp_ptr)
  243. {
  244. return be32_to_cpu(ucd_rsp_ptr->header.dword_1) & MASK_RSP_UPIU_RESULT;
  245. }
  246. /*
  247. * ufshcd_get_rsp_upiu_data_seg_len - Get the data segment length
  248. * from response UPIU
  249. * @ucd_rsp_ptr: pointer to response UPIU
  250. *
  251. * Return the data segment length.
  252. */
  253. static inline unsigned int
  254. ufshcd_get_rsp_upiu_data_seg_len(struct utp_upiu_rsp *ucd_rsp_ptr)
  255. {
  256. return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
  257. MASK_RSP_UPIU_DATA_SEG_LEN;
  258. }
  259. /**
  260. * ufshcd_is_exception_event - Check if the device raised an exception event
  261. * @ucd_rsp_ptr: pointer to response UPIU
  262. *
  263. * The function checks if the device raised an exception event indicated in
  264. * the Device Information field of response UPIU.
  265. *
  266. * Returns true if exception is raised, false otherwise.
  267. */
  268. static inline bool ufshcd_is_exception_event(struct utp_upiu_rsp *ucd_rsp_ptr)
  269. {
  270. return be32_to_cpu(ucd_rsp_ptr->header.dword_2) &
  271. MASK_RSP_EXCEPTION_EVENT ? true : false;
  272. }
  273. /**
  274. * ufshcd_reset_intr_aggr - Reset interrupt aggregation values.
  275. * @hba: per adapter instance
  276. */
  277. static inline void
  278. ufshcd_reset_intr_aggr(struct ufs_hba *hba)
  279. {
  280. ufshcd_writel(hba, INT_AGGR_ENABLE |
  281. INT_AGGR_COUNTER_AND_TIMER_RESET,
  282. REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  283. }
  284. /**
  285. * ufshcd_config_intr_aggr - Configure interrupt aggregation values.
  286. * @hba: per adapter instance
  287. * @cnt: Interrupt aggregation counter threshold
  288. * @tmout: Interrupt aggregation timeout value
  289. */
  290. static inline void
  291. ufshcd_config_intr_aggr(struct ufs_hba *hba, u8 cnt, u8 tmout)
  292. {
  293. ufshcd_writel(hba, INT_AGGR_ENABLE | INT_AGGR_PARAM_WRITE |
  294. INT_AGGR_COUNTER_THLD_VAL(cnt) |
  295. INT_AGGR_TIMEOUT_VAL(tmout),
  296. REG_UTP_TRANSFER_REQ_INT_AGG_CONTROL);
  297. }
  298. /**
  299. * ufshcd_enable_run_stop_reg - Enable run-stop registers,
  300. * When run-stop registers are set to 1, it indicates the
  301. * host controller that it can process the requests
  302. * @hba: per adapter instance
  303. */
  304. static void ufshcd_enable_run_stop_reg(struct ufs_hba *hba)
  305. {
  306. ufshcd_writel(hba, UTP_TASK_REQ_LIST_RUN_STOP_BIT,
  307. REG_UTP_TASK_REQ_LIST_RUN_STOP);
  308. ufshcd_writel(hba, UTP_TRANSFER_REQ_LIST_RUN_STOP_BIT,
  309. REG_UTP_TRANSFER_REQ_LIST_RUN_STOP);
  310. }
  311. /**
  312. * ufshcd_hba_start - Start controller initialization sequence
  313. * @hba: per adapter instance
  314. */
  315. static inline void ufshcd_hba_start(struct ufs_hba *hba)
  316. {
  317. ufshcd_writel(hba, CONTROLLER_ENABLE, REG_CONTROLLER_ENABLE);
  318. }
  319. /**
  320. * ufshcd_is_hba_active - Get controller state
  321. * @hba: per adapter instance
  322. *
  323. * Returns zero if controller is active, 1 otherwise
  324. */
  325. static inline int ufshcd_is_hba_active(struct ufs_hba *hba)
  326. {
  327. return (ufshcd_readl(hba, REG_CONTROLLER_ENABLE) & 0x1) ? 0 : 1;
  328. }
  329. /**
  330. * ufshcd_send_command - Send SCSI or device management commands
  331. * @hba: per adapter instance
  332. * @task_tag: Task tag of the command
  333. */
  334. static inline
  335. void ufshcd_send_command(struct ufs_hba *hba, unsigned int task_tag)
  336. {
  337. __set_bit(task_tag, &hba->outstanding_reqs);
  338. ufshcd_writel(hba, 1 << task_tag, REG_UTP_TRANSFER_REQ_DOOR_BELL);
  339. }
  340. /**
  341. * ufshcd_copy_sense_data - Copy sense data in case of check condition
  342. * @lrb - pointer to local reference block
  343. */
  344. static inline void ufshcd_copy_sense_data(struct ufshcd_lrb *lrbp)
  345. {
  346. int len;
  347. if (lrbp->sense_buffer &&
  348. ufshcd_get_rsp_upiu_data_seg_len(lrbp->ucd_rsp_ptr)) {
  349. len = be16_to_cpu(lrbp->ucd_rsp_ptr->sr.sense_data_len);
  350. memcpy(lrbp->sense_buffer,
  351. lrbp->ucd_rsp_ptr->sr.sense_data,
  352. min_t(int, len, SCSI_SENSE_BUFFERSIZE));
  353. }
  354. }
  355. /**
  356. * ufshcd_query_to_cpu() - formats the buffer to native cpu endian
  357. * @response: upiu query response to convert
  358. */
  359. static inline void ufshcd_query_to_cpu(struct utp_upiu_query *response)
  360. {
  361. response->length = be16_to_cpu(response->length);
  362. response->value = be32_to_cpu(response->value);
  363. }
  364. /**
  365. * ufshcd_query_to_be() - formats the buffer to big endian
  366. * @request: upiu query request to convert
  367. */
  368. static inline void ufshcd_query_to_be(struct utp_upiu_query *request)
  369. {
  370. request->length = cpu_to_be16(request->length);
  371. request->value = cpu_to_be32(request->value);
  372. }
  373. /**
  374. * ufshcd_copy_query_response() - Copy the Query Response and the data
  375. * descriptor
  376. * @hba: per adapter instance
  377. * @lrb - pointer to local reference block
  378. */
  379. static
  380. void ufshcd_copy_query_response(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  381. {
  382. struct ufs_query_res *query_res = &hba->dev_cmd.query.response;
  383. /* Get the UPIU response */
  384. query_res->response = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr) >>
  385. UPIU_RSP_CODE_OFFSET;
  386. memcpy(&query_res->upiu_res, &lrbp->ucd_rsp_ptr->qr, QUERY_OSF_SIZE);
  387. ufshcd_query_to_cpu(&query_res->upiu_res);
  388. /* Get the descriptor */
  389. if (lrbp->ucd_rsp_ptr->qr.opcode == UPIU_QUERY_OPCODE_READ_DESC) {
  390. u8 *descp = (u8 *)&lrbp->ucd_rsp_ptr +
  391. GENERAL_UPIU_REQUEST_SIZE;
  392. u16 len;
  393. /* data segment length */
  394. len = be32_to_cpu(lrbp->ucd_rsp_ptr->header.dword_2) &
  395. MASK_QUERY_DATA_SEG_LEN;
  396. memcpy(hba->dev_cmd.query.descriptor, descp,
  397. min_t(u16, len, QUERY_DESC_MAX_SIZE));
  398. }
  399. }
  400. /**
  401. * ufshcd_hba_capabilities - Read controller capabilities
  402. * @hba: per adapter instance
  403. */
  404. static inline void ufshcd_hba_capabilities(struct ufs_hba *hba)
  405. {
  406. hba->capabilities = ufshcd_readl(hba, REG_CONTROLLER_CAPABILITIES);
  407. /* nutrs and nutmrs are 0 based values */
  408. hba->nutrs = (hba->capabilities & MASK_TRANSFER_REQUESTS_SLOTS) + 1;
  409. hba->nutmrs =
  410. ((hba->capabilities & MASK_TASK_MANAGEMENT_REQUEST_SLOTS) >> 16) + 1;
  411. }
  412. /**
  413. * ufshcd_ready_for_uic_cmd - Check if controller is ready
  414. * to accept UIC commands
  415. * @hba: per adapter instance
  416. * Return true on success, else false
  417. */
  418. static inline bool ufshcd_ready_for_uic_cmd(struct ufs_hba *hba)
  419. {
  420. if (ufshcd_readl(hba, REG_CONTROLLER_STATUS) & UIC_COMMAND_READY)
  421. return true;
  422. else
  423. return false;
  424. }
  425. /**
  426. * ufshcd_get_upmcrs - Get the power mode change request status
  427. * @hba: Pointer to adapter instance
  428. *
  429. * This function gets the UPMCRS field of HCS register
  430. * Returns value of UPMCRS field
  431. */
  432. static inline u8 ufshcd_get_upmcrs(struct ufs_hba *hba)
  433. {
  434. return (ufshcd_readl(hba, REG_CONTROLLER_STATUS) >> 8) & 0x7;
  435. }
  436. /**
  437. * ufshcd_dispatch_uic_cmd - Dispatch UIC commands to unipro layers
  438. * @hba: per adapter instance
  439. * @uic_cmd: UIC command
  440. *
  441. * Mutex must be held.
  442. */
  443. static inline void
  444. ufshcd_dispatch_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  445. {
  446. WARN_ON(hba->active_uic_cmd);
  447. hba->active_uic_cmd = uic_cmd;
  448. /* Write Args */
  449. ufshcd_writel(hba, uic_cmd->argument1, REG_UIC_COMMAND_ARG_1);
  450. ufshcd_writel(hba, uic_cmd->argument2, REG_UIC_COMMAND_ARG_2);
  451. ufshcd_writel(hba, uic_cmd->argument3, REG_UIC_COMMAND_ARG_3);
  452. /* Write UIC Cmd */
  453. ufshcd_writel(hba, uic_cmd->command & COMMAND_OPCODE_MASK,
  454. REG_UIC_COMMAND);
  455. }
  456. /**
  457. * ufshcd_wait_for_uic_cmd - Wait complectioin of UIC command
  458. * @hba: per adapter instance
  459. * @uic_command: UIC command
  460. *
  461. * Must be called with mutex held.
  462. * Returns 0 only if success.
  463. */
  464. static int
  465. ufshcd_wait_for_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  466. {
  467. int ret;
  468. unsigned long flags;
  469. if (wait_for_completion_timeout(&uic_cmd->done,
  470. msecs_to_jiffies(UIC_CMD_TIMEOUT)))
  471. ret = uic_cmd->argument2 & MASK_UIC_COMMAND_RESULT;
  472. else
  473. ret = -ETIMEDOUT;
  474. spin_lock_irqsave(hba->host->host_lock, flags);
  475. hba->active_uic_cmd = NULL;
  476. spin_unlock_irqrestore(hba->host->host_lock, flags);
  477. return ret;
  478. }
  479. /**
  480. * __ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
  481. * @hba: per adapter instance
  482. * @uic_cmd: UIC command
  483. *
  484. * Identical to ufshcd_send_uic_cmd() expect mutex. Must be called
  485. * with mutex held.
  486. * Returns 0 only if success.
  487. */
  488. static int
  489. __ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  490. {
  491. int ret;
  492. unsigned long flags;
  493. if (!ufshcd_ready_for_uic_cmd(hba)) {
  494. dev_err(hba->dev,
  495. "Controller not ready to accept UIC commands\n");
  496. return -EIO;
  497. }
  498. init_completion(&uic_cmd->done);
  499. spin_lock_irqsave(hba->host->host_lock, flags);
  500. ufshcd_dispatch_uic_cmd(hba, uic_cmd);
  501. spin_unlock_irqrestore(hba->host->host_lock, flags);
  502. ret = ufshcd_wait_for_uic_cmd(hba, uic_cmd);
  503. return ret;
  504. }
  505. /**
  506. * ufshcd_send_uic_cmd - Send UIC commands and retrieve the result
  507. * @hba: per adapter instance
  508. * @uic_cmd: UIC command
  509. *
  510. * Returns 0 only if success.
  511. */
  512. static int
  513. ufshcd_send_uic_cmd(struct ufs_hba *hba, struct uic_command *uic_cmd)
  514. {
  515. int ret;
  516. mutex_lock(&hba->uic_cmd_mutex);
  517. ret = __ufshcd_send_uic_cmd(hba, uic_cmd);
  518. mutex_unlock(&hba->uic_cmd_mutex);
  519. return ret;
  520. }
  521. /**
  522. * ufshcd_map_sg - Map scatter-gather list to prdt
  523. * @lrbp - pointer to local reference block
  524. *
  525. * Returns 0 in case of success, non-zero value in case of failure
  526. */
  527. static int ufshcd_map_sg(struct ufshcd_lrb *lrbp)
  528. {
  529. struct ufshcd_sg_entry *prd_table;
  530. struct scatterlist *sg;
  531. struct scsi_cmnd *cmd;
  532. int sg_segments;
  533. int i;
  534. cmd = lrbp->cmd;
  535. sg_segments = scsi_dma_map(cmd);
  536. if (sg_segments < 0)
  537. return sg_segments;
  538. if (sg_segments) {
  539. lrbp->utr_descriptor_ptr->prd_table_length =
  540. cpu_to_le16((u16) (sg_segments));
  541. prd_table = (struct ufshcd_sg_entry *)lrbp->ucd_prdt_ptr;
  542. scsi_for_each_sg(cmd, sg, sg_segments, i) {
  543. prd_table[i].size =
  544. cpu_to_le32(((u32) sg_dma_len(sg))-1);
  545. prd_table[i].base_addr =
  546. cpu_to_le32(lower_32_bits(sg->dma_address));
  547. prd_table[i].upper_addr =
  548. cpu_to_le32(upper_32_bits(sg->dma_address));
  549. }
  550. } else {
  551. lrbp->utr_descriptor_ptr->prd_table_length = 0;
  552. }
  553. return 0;
  554. }
  555. /**
  556. * ufshcd_enable_intr - enable interrupts
  557. * @hba: per adapter instance
  558. * @intrs: interrupt bits
  559. */
  560. static void ufshcd_enable_intr(struct ufs_hba *hba, u32 intrs)
  561. {
  562. u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
  563. if (hba->ufs_version == UFSHCI_VERSION_10) {
  564. u32 rw;
  565. rw = set & INTERRUPT_MASK_RW_VER_10;
  566. set = rw | ((set ^ intrs) & intrs);
  567. } else {
  568. set |= intrs;
  569. }
  570. ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
  571. }
  572. /**
  573. * ufshcd_disable_intr - disable interrupts
  574. * @hba: per adapter instance
  575. * @intrs: interrupt bits
  576. */
  577. static void ufshcd_disable_intr(struct ufs_hba *hba, u32 intrs)
  578. {
  579. u32 set = ufshcd_readl(hba, REG_INTERRUPT_ENABLE);
  580. if (hba->ufs_version == UFSHCI_VERSION_10) {
  581. u32 rw;
  582. rw = (set & INTERRUPT_MASK_RW_VER_10) &
  583. ~(intrs & INTERRUPT_MASK_RW_VER_10);
  584. set = rw | ((set & intrs) & ~INTERRUPT_MASK_RW_VER_10);
  585. } else {
  586. set &= ~intrs;
  587. }
  588. ufshcd_writel(hba, set, REG_INTERRUPT_ENABLE);
  589. }
  590. /**
  591. * ufshcd_prepare_req_desc_hdr() - Fills the requests header
  592. * descriptor according to request
  593. * @lrbp: pointer to local reference block
  594. * @upiu_flags: flags required in the header
  595. * @cmd_dir: requests data direction
  596. */
  597. static void ufshcd_prepare_req_desc_hdr(struct ufshcd_lrb *lrbp,
  598. u32 *upiu_flags, enum dma_data_direction cmd_dir)
  599. {
  600. struct utp_transfer_req_desc *req_desc = lrbp->utr_descriptor_ptr;
  601. u32 data_direction;
  602. u32 dword_0;
  603. if (cmd_dir == DMA_FROM_DEVICE) {
  604. data_direction = UTP_DEVICE_TO_HOST;
  605. *upiu_flags = UPIU_CMD_FLAGS_READ;
  606. } else if (cmd_dir == DMA_TO_DEVICE) {
  607. data_direction = UTP_HOST_TO_DEVICE;
  608. *upiu_flags = UPIU_CMD_FLAGS_WRITE;
  609. } else {
  610. data_direction = UTP_NO_DATA_TRANSFER;
  611. *upiu_flags = UPIU_CMD_FLAGS_NONE;
  612. }
  613. dword_0 = data_direction | (lrbp->command_type
  614. << UPIU_COMMAND_TYPE_OFFSET);
  615. if (lrbp->intr_cmd)
  616. dword_0 |= UTP_REQ_DESC_INT_CMD;
  617. /* Transfer request descriptor header fields */
  618. req_desc->header.dword_0 = cpu_to_le32(dword_0);
  619. /*
  620. * assigning invalid value for command status. Controller
  621. * updates OCS on command completion, with the command
  622. * status
  623. */
  624. req_desc->header.dword_2 =
  625. cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
  626. }
  627. /**
  628. * ufshcd_prepare_utp_scsi_cmd_upiu() - fills the utp_transfer_req_desc,
  629. * for scsi commands
  630. * @lrbp - local reference block pointer
  631. * @upiu_flags - flags
  632. */
  633. static
  634. void ufshcd_prepare_utp_scsi_cmd_upiu(struct ufshcd_lrb *lrbp, u32 upiu_flags)
  635. {
  636. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  637. /* command descriptor fields */
  638. ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
  639. UPIU_TRANSACTION_COMMAND, upiu_flags,
  640. lrbp->lun, lrbp->task_tag);
  641. ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
  642. UPIU_COMMAND_SET_TYPE_SCSI, 0, 0, 0);
  643. /* Total EHS length and Data segment length will be zero */
  644. ucd_req_ptr->header.dword_2 = 0;
  645. ucd_req_ptr->sc.exp_data_transfer_len =
  646. cpu_to_be32(lrbp->cmd->sdb.length);
  647. memcpy(ucd_req_ptr->sc.cdb, lrbp->cmd->cmnd,
  648. (min_t(unsigned short, lrbp->cmd->cmd_len, MAX_CDB_SIZE)));
  649. }
  650. /**
  651. * ufshcd_prepare_utp_query_req_upiu() - fills the utp_transfer_req_desc,
  652. * for query requsts
  653. * @hba: UFS hba
  654. * @lrbp: local reference block pointer
  655. * @upiu_flags: flags
  656. */
  657. static void ufshcd_prepare_utp_query_req_upiu(struct ufs_hba *hba,
  658. struct ufshcd_lrb *lrbp, u32 upiu_flags)
  659. {
  660. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  661. struct ufs_query *query = &hba->dev_cmd.query;
  662. u16 len = query->request.upiu_req.length;
  663. u8 *descp = (u8 *)lrbp->ucd_req_ptr + GENERAL_UPIU_REQUEST_SIZE;
  664. /* Query request header */
  665. ucd_req_ptr->header.dword_0 = UPIU_HEADER_DWORD(
  666. UPIU_TRANSACTION_QUERY_REQ, upiu_flags,
  667. lrbp->lun, lrbp->task_tag);
  668. ucd_req_ptr->header.dword_1 = UPIU_HEADER_DWORD(
  669. 0, query->request.query_func, 0, 0);
  670. /* Data segment length */
  671. ucd_req_ptr->header.dword_2 = UPIU_HEADER_DWORD(
  672. 0, 0, len >> 8, (u8)len);
  673. /* Copy the Query Request buffer as is */
  674. memcpy(&ucd_req_ptr->qr, &query->request.upiu_req,
  675. QUERY_OSF_SIZE);
  676. ufshcd_query_to_be(&ucd_req_ptr->qr);
  677. /* Copy the Descriptor */
  678. if ((len > 0) && (query->request.upiu_req.opcode ==
  679. UPIU_QUERY_OPCODE_WRITE_DESC)) {
  680. memcpy(descp, query->descriptor,
  681. min_t(u16, len, QUERY_DESC_MAX_SIZE));
  682. }
  683. }
  684. static inline void ufshcd_prepare_utp_nop_upiu(struct ufshcd_lrb *lrbp)
  685. {
  686. struct utp_upiu_req *ucd_req_ptr = lrbp->ucd_req_ptr;
  687. memset(ucd_req_ptr, 0, sizeof(struct utp_upiu_req));
  688. /* command descriptor fields */
  689. ucd_req_ptr->header.dword_0 =
  690. UPIU_HEADER_DWORD(
  691. UPIU_TRANSACTION_NOP_OUT, 0, 0, lrbp->task_tag);
  692. }
  693. /**
  694. * ufshcd_compose_upiu - form UFS Protocol Information Unit(UPIU)
  695. * @hba - per adapter instance
  696. * @lrb - pointer to local reference block
  697. */
  698. static int ufshcd_compose_upiu(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  699. {
  700. u32 upiu_flags;
  701. int ret = 0;
  702. switch (lrbp->command_type) {
  703. case UTP_CMD_TYPE_SCSI:
  704. if (likely(lrbp->cmd)) {
  705. ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags,
  706. lrbp->cmd->sc_data_direction);
  707. ufshcd_prepare_utp_scsi_cmd_upiu(lrbp, upiu_flags);
  708. } else {
  709. ret = -EINVAL;
  710. }
  711. break;
  712. case UTP_CMD_TYPE_DEV_MANAGE:
  713. ufshcd_prepare_req_desc_hdr(lrbp, &upiu_flags, DMA_NONE);
  714. if (hba->dev_cmd.type == DEV_CMD_TYPE_QUERY)
  715. ufshcd_prepare_utp_query_req_upiu(
  716. hba, lrbp, upiu_flags);
  717. else if (hba->dev_cmd.type == DEV_CMD_TYPE_NOP)
  718. ufshcd_prepare_utp_nop_upiu(lrbp);
  719. else
  720. ret = -EINVAL;
  721. break;
  722. case UTP_CMD_TYPE_UFS:
  723. /* For UFS native command implementation */
  724. ret = -ENOTSUPP;
  725. dev_err(hba->dev, "%s: UFS native command are not supported\n",
  726. __func__);
  727. break;
  728. default:
  729. ret = -ENOTSUPP;
  730. dev_err(hba->dev, "%s: unknown command type: 0x%x\n",
  731. __func__, lrbp->command_type);
  732. break;
  733. } /* end of switch */
  734. return ret;
  735. }
  736. /**
  737. * ufshcd_queuecommand - main entry point for SCSI requests
  738. * @cmd: command from SCSI Midlayer
  739. * @done: call back function
  740. *
  741. * Returns 0 for success, non-zero in case of failure
  742. */
  743. static int ufshcd_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
  744. {
  745. struct ufshcd_lrb *lrbp;
  746. struct ufs_hba *hba;
  747. unsigned long flags;
  748. int tag;
  749. int err = 0;
  750. hba = shost_priv(host);
  751. tag = cmd->request->tag;
  752. if (hba->ufshcd_state != UFSHCD_STATE_OPERATIONAL) {
  753. err = SCSI_MLQUEUE_HOST_BUSY;
  754. goto out;
  755. }
  756. /* acquire the tag to make sure device cmds don't use it */
  757. if (test_and_set_bit_lock(tag, &hba->lrb_in_use)) {
  758. /*
  759. * Dev manage command in progress, requeue the command.
  760. * Requeuing the command helps in cases where the request *may*
  761. * find different tag instead of waiting for dev manage command
  762. * completion.
  763. */
  764. err = SCSI_MLQUEUE_HOST_BUSY;
  765. goto out;
  766. }
  767. lrbp = &hba->lrb[tag];
  768. WARN_ON(lrbp->cmd);
  769. lrbp->cmd = cmd;
  770. lrbp->sense_bufflen = SCSI_SENSE_BUFFERSIZE;
  771. lrbp->sense_buffer = cmd->sense_buffer;
  772. lrbp->task_tag = tag;
  773. lrbp->lun = cmd->device->lun;
  774. lrbp->intr_cmd = false;
  775. lrbp->command_type = UTP_CMD_TYPE_SCSI;
  776. /* form UPIU before issuing the command */
  777. ufshcd_compose_upiu(hba, lrbp);
  778. err = ufshcd_map_sg(lrbp);
  779. if (err) {
  780. lrbp->cmd = NULL;
  781. clear_bit_unlock(tag, &hba->lrb_in_use);
  782. goto out;
  783. }
  784. /* issue command to the controller */
  785. spin_lock_irqsave(hba->host->host_lock, flags);
  786. ufshcd_send_command(hba, tag);
  787. spin_unlock_irqrestore(hba->host->host_lock, flags);
  788. out:
  789. return err;
  790. }
  791. static int ufshcd_compose_dev_cmd(struct ufs_hba *hba,
  792. struct ufshcd_lrb *lrbp, enum dev_cmd_type cmd_type, int tag)
  793. {
  794. lrbp->cmd = NULL;
  795. lrbp->sense_bufflen = 0;
  796. lrbp->sense_buffer = NULL;
  797. lrbp->task_tag = tag;
  798. lrbp->lun = 0; /* device management cmd is not specific to any LUN */
  799. lrbp->command_type = UTP_CMD_TYPE_DEV_MANAGE;
  800. lrbp->intr_cmd = true; /* No interrupt aggregation */
  801. hba->dev_cmd.type = cmd_type;
  802. return ufshcd_compose_upiu(hba, lrbp);
  803. }
  804. static int
  805. ufshcd_clear_cmd(struct ufs_hba *hba, int tag)
  806. {
  807. int err = 0;
  808. unsigned long flags;
  809. u32 mask = 1 << tag;
  810. /* clear outstanding transaction before retry */
  811. spin_lock_irqsave(hba->host->host_lock, flags);
  812. ufshcd_utrl_clear(hba, tag);
  813. spin_unlock_irqrestore(hba->host->host_lock, flags);
  814. /*
  815. * wait for for h/w to clear corresponding bit in door-bell.
  816. * max. wait is 1 sec.
  817. */
  818. err = ufshcd_wait_for_register(hba,
  819. REG_UTP_TRANSFER_REQ_DOOR_BELL,
  820. mask, ~mask, 1000, 1000);
  821. return err;
  822. }
  823. /**
  824. * ufshcd_dev_cmd_completion() - handles device management command responses
  825. * @hba: per adapter instance
  826. * @lrbp: pointer to local reference block
  827. */
  828. static int
  829. ufshcd_dev_cmd_completion(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  830. {
  831. int resp;
  832. int err = 0;
  833. resp = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
  834. switch (resp) {
  835. case UPIU_TRANSACTION_NOP_IN:
  836. if (hba->dev_cmd.type != DEV_CMD_TYPE_NOP) {
  837. err = -EINVAL;
  838. dev_err(hba->dev, "%s: unexpected response %x\n",
  839. __func__, resp);
  840. }
  841. break;
  842. case UPIU_TRANSACTION_QUERY_RSP:
  843. ufshcd_copy_query_response(hba, lrbp);
  844. break;
  845. case UPIU_TRANSACTION_REJECT_UPIU:
  846. /* TODO: handle Reject UPIU Response */
  847. err = -EPERM;
  848. dev_err(hba->dev, "%s: Reject UPIU not fully implemented\n",
  849. __func__);
  850. break;
  851. default:
  852. err = -EINVAL;
  853. dev_err(hba->dev, "%s: Invalid device management cmd response: %x\n",
  854. __func__, resp);
  855. break;
  856. }
  857. return err;
  858. }
  859. static int ufshcd_wait_for_dev_cmd(struct ufs_hba *hba,
  860. struct ufshcd_lrb *lrbp, int max_timeout)
  861. {
  862. int err = 0;
  863. unsigned long time_left;
  864. unsigned long flags;
  865. time_left = wait_for_completion_timeout(hba->dev_cmd.complete,
  866. msecs_to_jiffies(max_timeout));
  867. spin_lock_irqsave(hba->host->host_lock, flags);
  868. hba->dev_cmd.complete = NULL;
  869. if (likely(time_left)) {
  870. err = ufshcd_get_tr_ocs(lrbp);
  871. if (!err)
  872. err = ufshcd_dev_cmd_completion(hba, lrbp);
  873. }
  874. spin_unlock_irqrestore(hba->host->host_lock, flags);
  875. if (!time_left) {
  876. err = -ETIMEDOUT;
  877. if (!ufshcd_clear_cmd(hba, lrbp->task_tag))
  878. /* sucessfully cleared the command, retry if needed */
  879. err = -EAGAIN;
  880. }
  881. return err;
  882. }
  883. /**
  884. * ufshcd_get_dev_cmd_tag - Get device management command tag
  885. * @hba: per-adapter instance
  886. * @tag: pointer to variable with available slot value
  887. *
  888. * Get a free slot and lock it until device management command
  889. * completes.
  890. *
  891. * Returns false if free slot is unavailable for locking, else
  892. * return true with tag value in @tag.
  893. */
  894. static bool ufshcd_get_dev_cmd_tag(struct ufs_hba *hba, int *tag_out)
  895. {
  896. int tag;
  897. bool ret = false;
  898. unsigned long tmp;
  899. if (!tag_out)
  900. goto out;
  901. do {
  902. tmp = ~hba->lrb_in_use;
  903. tag = find_last_bit(&tmp, hba->nutrs);
  904. if (tag >= hba->nutrs)
  905. goto out;
  906. } while (test_and_set_bit_lock(tag, &hba->lrb_in_use));
  907. *tag_out = tag;
  908. ret = true;
  909. out:
  910. return ret;
  911. }
  912. static inline void ufshcd_put_dev_cmd_tag(struct ufs_hba *hba, int tag)
  913. {
  914. clear_bit_unlock(tag, &hba->lrb_in_use);
  915. }
  916. /**
  917. * ufshcd_exec_dev_cmd - API for sending device management requests
  918. * @hba - UFS hba
  919. * @cmd_type - specifies the type (NOP, Query...)
  920. * @timeout - time in seconds
  921. *
  922. * NOTE: Since there is only one available tag for device management commands,
  923. * it is expected you hold the hba->dev_cmd.lock mutex.
  924. */
  925. static int ufshcd_exec_dev_cmd(struct ufs_hba *hba,
  926. enum dev_cmd_type cmd_type, int timeout)
  927. {
  928. struct ufshcd_lrb *lrbp;
  929. int err;
  930. int tag;
  931. struct completion wait;
  932. unsigned long flags;
  933. /*
  934. * Get free slot, sleep if slots are unavailable.
  935. * Even though we use wait_event() which sleeps indefinitely,
  936. * the maximum wait time is bounded by SCSI request timeout.
  937. */
  938. wait_event(hba->dev_cmd.tag_wq, ufshcd_get_dev_cmd_tag(hba, &tag));
  939. init_completion(&wait);
  940. lrbp = &hba->lrb[tag];
  941. WARN_ON(lrbp->cmd);
  942. err = ufshcd_compose_dev_cmd(hba, lrbp, cmd_type, tag);
  943. if (unlikely(err))
  944. goto out_put_tag;
  945. hba->dev_cmd.complete = &wait;
  946. spin_lock_irqsave(hba->host->host_lock, flags);
  947. ufshcd_send_command(hba, tag);
  948. spin_unlock_irqrestore(hba->host->host_lock, flags);
  949. err = ufshcd_wait_for_dev_cmd(hba, lrbp, timeout);
  950. out_put_tag:
  951. ufshcd_put_dev_cmd_tag(hba, tag);
  952. wake_up(&hba->dev_cmd.tag_wq);
  953. return err;
  954. }
  955. /**
  956. * ufshcd_query_flag() - API function for sending flag query requests
  957. * hba: per-adapter instance
  958. * query_opcode: flag query to perform
  959. * idn: flag idn to access
  960. * flag_res: the flag value after the query request completes
  961. *
  962. * Returns 0 for success, non-zero in case of failure
  963. */
  964. static int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode,
  965. enum flag_idn idn, bool *flag_res)
  966. {
  967. struct ufs_query_req *request;
  968. struct ufs_query_res *response;
  969. int err;
  970. BUG_ON(!hba);
  971. mutex_lock(&hba->dev_cmd.lock);
  972. request = &hba->dev_cmd.query.request;
  973. response = &hba->dev_cmd.query.response;
  974. memset(request, 0, sizeof(struct ufs_query_req));
  975. memset(response, 0, sizeof(struct ufs_query_res));
  976. switch (opcode) {
  977. case UPIU_QUERY_OPCODE_SET_FLAG:
  978. case UPIU_QUERY_OPCODE_CLEAR_FLAG:
  979. case UPIU_QUERY_OPCODE_TOGGLE_FLAG:
  980. request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
  981. break;
  982. case UPIU_QUERY_OPCODE_READ_FLAG:
  983. request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
  984. if (!flag_res) {
  985. /* No dummy reads */
  986. dev_err(hba->dev, "%s: Invalid argument for read request\n",
  987. __func__);
  988. err = -EINVAL;
  989. goto out_unlock;
  990. }
  991. break;
  992. default:
  993. dev_err(hba->dev,
  994. "%s: Expected query flag opcode but got = %d\n",
  995. __func__, opcode);
  996. err = -EINVAL;
  997. goto out_unlock;
  998. }
  999. request->upiu_req.opcode = opcode;
  1000. request->upiu_req.idn = idn;
  1001. /* Send query request */
  1002. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY,
  1003. QUERY_REQ_TIMEOUT);
  1004. if (err) {
  1005. dev_err(hba->dev,
  1006. "%s: Sending flag query for idn %d failed, err = %d\n",
  1007. __func__, idn, err);
  1008. goto out_unlock;
  1009. }
  1010. if (flag_res)
  1011. *flag_res = (response->upiu_res.value &
  1012. MASK_QUERY_UPIU_FLAG_LOC) & 0x1;
  1013. out_unlock:
  1014. mutex_unlock(&hba->dev_cmd.lock);
  1015. return err;
  1016. }
  1017. /**
  1018. * ufshcd_query_attr - API function for sending attribute requests
  1019. * hba: per-adapter instance
  1020. * opcode: attribute opcode
  1021. * idn: attribute idn to access
  1022. * index: index field
  1023. * selector: selector field
  1024. * attr_val: the attribute value after the query request completes
  1025. *
  1026. * Returns 0 for success, non-zero in case of failure
  1027. */
  1028. int ufshcd_query_attr(struct ufs_hba *hba, enum query_opcode opcode,
  1029. enum attr_idn idn, u8 index, u8 selector, u32 *attr_val)
  1030. {
  1031. struct ufs_query_req *request;
  1032. struct ufs_query_res *response;
  1033. int err;
  1034. BUG_ON(!hba);
  1035. if (!attr_val) {
  1036. dev_err(hba->dev, "%s: attribute value required for opcode 0x%x\n",
  1037. __func__, opcode);
  1038. err = -EINVAL;
  1039. goto out;
  1040. }
  1041. mutex_lock(&hba->dev_cmd.lock);
  1042. request = &hba->dev_cmd.query.request;
  1043. response = &hba->dev_cmd.query.response;
  1044. memset(request, 0, sizeof(struct ufs_query_req));
  1045. memset(response, 0, sizeof(struct ufs_query_res));
  1046. switch (opcode) {
  1047. case UPIU_QUERY_OPCODE_WRITE_ATTR:
  1048. request->query_func = UPIU_QUERY_FUNC_STANDARD_WRITE_REQUEST;
  1049. request->upiu_req.value = *attr_val;
  1050. break;
  1051. case UPIU_QUERY_OPCODE_READ_ATTR:
  1052. request->query_func = UPIU_QUERY_FUNC_STANDARD_READ_REQUEST;
  1053. break;
  1054. default:
  1055. dev_err(hba->dev, "%s: Expected query attr opcode but got = 0x%.2x\n",
  1056. __func__, opcode);
  1057. err = -EINVAL;
  1058. goto out_unlock;
  1059. }
  1060. request->upiu_req.opcode = opcode;
  1061. request->upiu_req.idn = idn;
  1062. request->upiu_req.index = index;
  1063. request->upiu_req.selector = selector;
  1064. /* Send query request */
  1065. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_QUERY,
  1066. QUERY_REQ_TIMEOUT);
  1067. if (err) {
  1068. dev_err(hba->dev, "%s: opcode 0x%.2x for idn %d failed, err = %d\n",
  1069. __func__, opcode, idn, err);
  1070. goto out_unlock;
  1071. }
  1072. *attr_val = response->upiu_res.value;
  1073. out_unlock:
  1074. mutex_unlock(&hba->dev_cmd.lock);
  1075. out:
  1076. return err;
  1077. }
  1078. /**
  1079. * ufshcd_memory_alloc - allocate memory for host memory space data structures
  1080. * @hba: per adapter instance
  1081. *
  1082. * 1. Allocate DMA memory for Command Descriptor array
  1083. * Each command descriptor consist of Command UPIU, Response UPIU and PRDT
  1084. * 2. Allocate DMA memory for UTP Transfer Request Descriptor List (UTRDL).
  1085. * 3. Allocate DMA memory for UTP Task Management Request Descriptor List
  1086. * (UTMRDL)
  1087. * 4. Allocate memory for local reference block(lrb).
  1088. *
  1089. * Returns 0 for success, non-zero in case of failure
  1090. */
  1091. static int ufshcd_memory_alloc(struct ufs_hba *hba)
  1092. {
  1093. size_t utmrdl_size, utrdl_size, ucdl_size;
  1094. /* Allocate memory for UTP command descriptors */
  1095. ucdl_size = (sizeof(struct utp_transfer_cmd_desc) * hba->nutrs);
  1096. hba->ucdl_base_addr = dmam_alloc_coherent(hba->dev,
  1097. ucdl_size,
  1098. &hba->ucdl_dma_addr,
  1099. GFP_KERNEL);
  1100. /*
  1101. * UFSHCI requires UTP command descriptor to be 128 byte aligned.
  1102. * make sure hba->ucdl_dma_addr is aligned to PAGE_SIZE
  1103. * if hba->ucdl_dma_addr is aligned to PAGE_SIZE, then it will
  1104. * be aligned to 128 bytes as well
  1105. */
  1106. if (!hba->ucdl_base_addr ||
  1107. WARN_ON(hba->ucdl_dma_addr & (PAGE_SIZE - 1))) {
  1108. dev_err(hba->dev,
  1109. "Command Descriptor Memory allocation failed\n");
  1110. goto out;
  1111. }
  1112. /*
  1113. * Allocate memory for UTP Transfer descriptors
  1114. * UFSHCI requires 1024 byte alignment of UTRD
  1115. */
  1116. utrdl_size = (sizeof(struct utp_transfer_req_desc) * hba->nutrs);
  1117. hba->utrdl_base_addr = dmam_alloc_coherent(hba->dev,
  1118. utrdl_size,
  1119. &hba->utrdl_dma_addr,
  1120. GFP_KERNEL);
  1121. if (!hba->utrdl_base_addr ||
  1122. WARN_ON(hba->utrdl_dma_addr & (PAGE_SIZE - 1))) {
  1123. dev_err(hba->dev,
  1124. "Transfer Descriptor Memory allocation failed\n");
  1125. goto out;
  1126. }
  1127. /*
  1128. * Allocate memory for UTP Task Management descriptors
  1129. * UFSHCI requires 1024 byte alignment of UTMRD
  1130. */
  1131. utmrdl_size = sizeof(struct utp_task_req_desc) * hba->nutmrs;
  1132. hba->utmrdl_base_addr = dmam_alloc_coherent(hba->dev,
  1133. utmrdl_size,
  1134. &hba->utmrdl_dma_addr,
  1135. GFP_KERNEL);
  1136. if (!hba->utmrdl_base_addr ||
  1137. WARN_ON(hba->utmrdl_dma_addr & (PAGE_SIZE - 1))) {
  1138. dev_err(hba->dev,
  1139. "Task Management Descriptor Memory allocation failed\n");
  1140. goto out;
  1141. }
  1142. /* Allocate memory for local reference block */
  1143. hba->lrb = devm_kzalloc(hba->dev,
  1144. hba->nutrs * sizeof(struct ufshcd_lrb),
  1145. GFP_KERNEL);
  1146. if (!hba->lrb) {
  1147. dev_err(hba->dev, "LRB Memory allocation failed\n");
  1148. goto out;
  1149. }
  1150. return 0;
  1151. out:
  1152. return -ENOMEM;
  1153. }
  1154. /**
  1155. * ufshcd_host_memory_configure - configure local reference block with
  1156. * memory offsets
  1157. * @hba: per adapter instance
  1158. *
  1159. * Configure Host memory space
  1160. * 1. Update Corresponding UTRD.UCDBA and UTRD.UCDBAU with UCD DMA
  1161. * address.
  1162. * 2. Update each UTRD with Response UPIU offset, Response UPIU length
  1163. * and PRDT offset.
  1164. * 3. Save the corresponding addresses of UTRD, UCD.CMD, UCD.RSP and UCD.PRDT
  1165. * into local reference block.
  1166. */
  1167. static void ufshcd_host_memory_configure(struct ufs_hba *hba)
  1168. {
  1169. struct utp_transfer_cmd_desc *cmd_descp;
  1170. struct utp_transfer_req_desc *utrdlp;
  1171. dma_addr_t cmd_desc_dma_addr;
  1172. dma_addr_t cmd_desc_element_addr;
  1173. u16 response_offset;
  1174. u16 prdt_offset;
  1175. int cmd_desc_size;
  1176. int i;
  1177. utrdlp = hba->utrdl_base_addr;
  1178. cmd_descp = hba->ucdl_base_addr;
  1179. response_offset =
  1180. offsetof(struct utp_transfer_cmd_desc, response_upiu);
  1181. prdt_offset =
  1182. offsetof(struct utp_transfer_cmd_desc, prd_table);
  1183. cmd_desc_size = sizeof(struct utp_transfer_cmd_desc);
  1184. cmd_desc_dma_addr = hba->ucdl_dma_addr;
  1185. for (i = 0; i < hba->nutrs; i++) {
  1186. /* Configure UTRD with command descriptor base address */
  1187. cmd_desc_element_addr =
  1188. (cmd_desc_dma_addr + (cmd_desc_size * i));
  1189. utrdlp[i].command_desc_base_addr_lo =
  1190. cpu_to_le32(lower_32_bits(cmd_desc_element_addr));
  1191. utrdlp[i].command_desc_base_addr_hi =
  1192. cpu_to_le32(upper_32_bits(cmd_desc_element_addr));
  1193. /* Response upiu and prdt offset should be in double words */
  1194. utrdlp[i].response_upiu_offset =
  1195. cpu_to_le16((response_offset >> 2));
  1196. utrdlp[i].prd_table_offset =
  1197. cpu_to_le16((prdt_offset >> 2));
  1198. utrdlp[i].response_upiu_length =
  1199. cpu_to_le16(ALIGNED_UPIU_SIZE >> 2);
  1200. hba->lrb[i].utr_descriptor_ptr = (utrdlp + i);
  1201. hba->lrb[i].ucd_req_ptr =
  1202. (struct utp_upiu_req *)(cmd_descp + i);
  1203. hba->lrb[i].ucd_rsp_ptr =
  1204. (struct utp_upiu_rsp *)cmd_descp[i].response_upiu;
  1205. hba->lrb[i].ucd_prdt_ptr =
  1206. (struct ufshcd_sg_entry *)cmd_descp[i].prd_table;
  1207. }
  1208. }
  1209. /**
  1210. * ufshcd_dme_link_startup - Notify Unipro to perform link startup
  1211. * @hba: per adapter instance
  1212. *
  1213. * UIC_CMD_DME_LINK_STARTUP command must be issued to Unipro layer,
  1214. * in order to initialize the Unipro link startup procedure.
  1215. * Once the Unipro links are up, the device connected to the controller
  1216. * is detected.
  1217. *
  1218. * Returns 0 on success, non-zero value on failure
  1219. */
  1220. static int ufshcd_dme_link_startup(struct ufs_hba *hba)
  1221. {
  1222. struct uic_command uic_cmd = {0};
  1223. int ret;
  1224. uic_cmd.command = UIC_CMD_DME_LINK_STARTUP;
  1225. ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
  1226. if (ret)
  1227. dev_err(hba->dev,
  1228. "dme-link-startup: error code %d\n", ret);
  1229. return ret;
  1230. }
  1231. /**
  1232. * ufshcd_dme_set_attr - UIC command for DME_SET, DME_PEER_SET
  1233. * @hba: per adapter instance
  1234. * @attr_sel: uic command argument1
  1235. * @attr_set: attribute set type as uic command argument2
  1236. * @mib_val: setting value as uic command argument3
  1237. * @peer: indicate whether peer or local
  1238. *
  1239. * Returns 0 on success, non-zero value on failure
  1240. */
  1241. int ufshcd_dme_set_attr(struct ufs_hba *hba, u32 attr_sel,
  1242. u8 attr_set, u32 mib_val, u8 peer)
  1243. {
  1244. struct uic_command uic_cmd = {0};
  1245. static const char *const action[] = {
  1246. "dme-set",
  1247. "dme-peer-set"
  1248. };
  1249. const char *set = action[!!peer];
  1250. int ret;
  1251. uic_cmd.command = peer ?
  1252. UIC_CMD_DME_PEER_SET : UIC_CMD_DME_SET;
  1253. uic_cmd.argument1 = attr_sel;
  1254. uic_cmd.argument2 = UIC_ARG_ATTR_TYPE(attr_set);
  1255. uic_cmd.argument3 = mib_val;
  1256. ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
  1257. if (ret)
  1258. dev_err(hba->dev, "%s: attr-id 0x%x val 0x%x error code %d\n",
  1259. set, UIC_GET_ATTR_ID(attr_sel), mib_val, ret);
  1260. return ret;
  1261. }
  1262. EXPORT_SYMBOL_GPL(ufshcd_dme_set_attr);
  1263. /**
  1264. * ufshcd_dme_get_attr - UIC command for DME_GET, DME_PEER_GET
  1265. * @hba: per adapter instance
  1266. * @attr_sel: uic command argument1
  1267. * @mib_val: the value of the attribute as returned by the UIC command
  1268. * @peer: indicate whether peer or local
  1269. *
  1270. * Returns 0 on success, non-zero value on failure
  1271. */
  1272. int ufshcd_dme_get_attr(struct ufs_hba *hba, u32 attr_sel,
  1273. u32 *mib_val, u8 peer)
  1274. {
  1275. struct uic_command uic_cmd = {0};
  1276. static const char *const action[] = {
  1277. "dme-get",
  1278. "dme-peer-get"
  1279. };
  1280. const char *get = action[!!peer];
  1281. int ret;
  1282. uic_cmd.command = peer ?
  1283. UIC_CMD_DME_PEER_GET : UIC_CMD_DME_GET;
  1284. uic_cmd.argument1 = attr_sel;
  1285. ret = ufshcd_send_uic_cmd(hba, &uic_cmd);
  1286. if (ret) {
  1287. dev_err(hba->dev, "%s: attr-id 0x%x error code %d\n",
  1288. get, UIC_GET_ATTR_ID(attr_sel), ret);
  1289. goto out;
  1290. }
  1291. if (mib_val)
  1292. *mib_val = uic_cmd.argument3;
  1293. out:
  1294. return ret;
  1295. }
  1296. EXPORT_SYMBOL_GPL(ufshcd_dme_get_attr);
  1297. /**
  1298. * ufshcd_uic_change_pwr_mode - Perform the UIC power mode chage
  1299. * using DME_SET primitives.
  1300. * @hba: per adapter instance
  1301. * @mode: powr mode value
  1302. *
  1303. * Returns 0 on success, non-zero value on failure
  1304. */
  1305. int ufshcd_uic_change_pwr_mode(struct ufs_hba *hba, u8 mode)
  1306. {
  1307. struct uic_command uic_cmd = {0};
  1308. struct completion pwr_done;
  1309. unsigned long flags;
  1310. u8 status;
  1311. int ret;
  1312. uic_cmd.command = UIC_CMD_DME_SET;
  1313. uic_cmd.argument1 = UIC_ARG_MIB(PA_PWRMODE);
  1314. uic_cmd.argument3 = mode;
  1315. init_completion(&pwr_done);
  1316. mutex_lock(&hba->uic_cmd_mutex);
  1317. spin_lock_irqsave(hba->host->host_lock, flags);
  1318. hba->pwr_done = &pwr_done;
  1319. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1320. ret = __ufshcd_send_uic_cmd(hba, &uic_cmd);
  1321. if (ret) {
  1322. dev_err(hba->dev,
  1323. "pwr mode change with mode 0x%x uic error %d\n",
  1324. mode, ret);
  1325. goto out;
  1326. }
  1327. if (!wait_for_completion_timeout(hba->pwr_done,
  1328. msecs_to_jiffies(UIC_CMD_TIMEOUT))) {
  1329. dev_err(hba->dev,
  1330. "pwr mode change with mode 0x%x completion timeout\n",
  1331. mode);
  1332. ret = -ETIMEDOUT;
  1333. goto out;
  1334. }
  1335. status = ufshcd_get_upmcrs(hba);
  1336. if (status != PWR_LOCAL) {
  1337. dev_err(hba->dev,
  1338. "pwr mode change failed, host umpcrs:0x%x\n",
  1339. status);
  1340. ret = (status != PWR_OK) ? status : -1;
  1341. }
  1342. out:
  1343. spin_lock_irqsave(hba->host->host_lock, flags);
  1344. hba->pwr_done = NULL;
  1345. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1346. mutex_unlock(&hba->uic_cmd_mutex);
  1347. return ret;
  1348. }
  1349. /**
  1350. * ufshcd_config_max_pwr_mode - Set & Change power mode with
  1351. * maximum capability attribute information.
  1352. * @hba: per adapter instance
  1353. *
  1354. * Returns 0 on success, non-zero value on failure
  1355. */
  1356. static int ufshcd_config_max_pwr_mode(struct ufs_hba *hba)
  1357. {
  1358. enum {RX = 0, TX = 1};
  1359. u32 lanes[] = {1, 1};
  1360. u32 gear[] = {1, 1};
  1361. u8 pwr[] = {FASTAUTO_MODE, FASTAUTO_MODE};
  1362. int ret;
  1363. /* Get the connected lane count */
  1364. ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDRXDATALANES), &lanes[RX]);
  1365. ufshcd_dme_get(hba, UIC_ARG_MIB(PA_CONNECTEDTXDATALANES), &lanes[TX]);
  1366. /*
  1367. * First, get the maximum gears of HS speed.
  1368. * If a zero value, it means there is no HSGEAR capability.
  1369. * Then, get the maximum gears of PWM speed.
  1370. */
  1371. ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &gear[RX]);
  1372. if (!gear[RX]) {
  1373. ufshcd_dme_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR), &gear[RX]);
  1374. pwr[RX] = SLOWAUTO_MODE;
  1375. }
  1376. ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXHSGEAR), &gear[TX]);
  1377. if (!gear[TX]) {
  1378. ufshcd_dme_peer_get(hba, UIC_ARG_MIB(PA_MAXRXPWMGEAR),
  1379. &gear[TX]);
  1380. pwr[TX] = SLOWAUTO_MODE;
  1381. }
  1382. /*
  1383. * Configure attributes for power mode change with below.
  1384. * - PA_RXGEAR, PA_ACTIVERXDATALANES, PA_RXTERMINATION,
  1385. * - PA_TXGEAR, PA_ACTIVETXDATALANES, PA_TXTERMINATION,
  1386. * - PA_HSSERIES
  1387. */
  1388. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXGEAR), gear[RX]);
  1389. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVERXDATALANES), lanes[RX]);
  1390. if (pwr[RX] == FASTAUTO_MODE)
  1391. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_RXTERMINATION), TRUE);
  1392. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXGEAR), gear[TX]);
  1393. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_ACTIVETXDATALANES), lanes[TX]);
  1394. if (pwr[TX] == FASTAUTO_MODE)
  1395. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_TXTERMINATION), TRUE);
  1396. if (pwr[RX] == FASTAUTO_MODE || pwr[TX] == FASTAUTO_MODE)
  1397. ufshcd_dme_set(hba, UIC_ARG_MIB(PA_HSSERIES), PA_HS_MODE_B);
  1398. ret = ufshcd_uic_change_pwr_mode(hba, pwr[RX] << 4 | pwr[TX]);
  1399. if (ret)
  1400. dev_err(hba->dev,
  1401. "pwr_mode: power mode change failed %d\n", ret);
  1402. return ret;
  1403. }
  1404. /**
  1405. * ufshcd_complete_dev_init() - checks device readiness
  1406. * hba: per-adapter instance
  1407. *
  1408. * Set fDeviceInit flag and poll until device toggles it.
  1409. */
  1410. static int ufshcd_complete_dev_init(struct ufs_hba *hba)
  1411. {
  1412. int i, retries, err = 0;
  1413. bool flag_res = 1;
  1414. for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
  1415. /* Set the fDeviceInit flag */
  1416. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
  1417. QUERY_FLAG_IDN_FDEVICEINIT, NULL);
  1418. if (!err || err == -ETIMEDOUT)
  1419. break;
  1420. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
  1421. }
  1422. if (err) {
  1423. dev_err(hba->dev,
  1424. "%s setting fDeviceInit flag failed with error %d\n",
  1425. __func__, err);
  1426. goto out;
  1427. }
  1428. /* poll for max. 100 iterations for fDeviceInit flag to clear */
  1429. for (i = 0; i < 100 && !err && flag_res; i++) {
  1430. for (retries = QUERY_REQ_RETRIES; retries > 0; retries--) {
  1431. err = ufshcd_query_flag(hba,
  1432. UPIU_QUERY_OPCODE_READ_FLAG,
  1433. QUERY_FLAG_IDN_FDEVICEINIT, &flag_res);
  1434. if (!err || err == -ETIMEDOUT)
  1435. break;
  1436. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__,
  1437. err);
  1438. }
  1439. }
  1440. if (err)
  1441. dev_err(hba->dev,
  1442. "%s reading fDeviceInit flag failed with error %d\n",
  1443. __func__, err);
  1444. else if (flag_res)
  1445. dev_err(hba->dev,
  1446. "%s fDeviceInit was not cleared by the device\n",
  1447. __func__);
  1448. out:
  1449. return err;
  1450. }
  1451. /**
  1452. * ufshcd_make_hba_operational - Make UFS controller operational
  1453. * @hba: per adapter instance
  1454. *
  1455. * To bring UFS host controller to operational state,
  1456. * 1. Check if device is present
  1457. * 2. Enable required interrupts
  1458. * 3. Configure interrupt aggregation
  1459. * 4. Program UTRL and UTMRL base addres
  1460. * 5. Configure run-stop-registers
  1461. *
  1462. * Returns 0 on success, non-zero value on failure
  1463. */
  1464. static int ufshcd_make_hba_operational(struct ufs_hba *hba)
  1465. {
  1466. int err = 0;
  1467. u32 reg;
  1468. /* check if device present */
  1469. reg = ufshcd_readl(hba, REG_CONTROLLER_STATUS);
  1470. if (!ufshcd_is_device_present(reg)) {
  1471. dev_err(hba->dev, "cc: Device not present\n");
  1472. err = -ENXIO;
  1473. goto out;
  1474. }
  1475. /* Enable required interrupts */
  1476. ufshcd_enable_intr(hba, UFSHCD_ENABLE_INTRS);
  1477. /* Configure interrupt aggregation */
  1478. ufshcd_config_intr_aggr(hba, hba->nutrs - 1, INT_AGGR_DEF_TO);
  1479. /* Configure UTRL and UTMRL base address registers */
  1480. ufshcd_writel(hba, lower_32_bits(hba->utrdl_dma_addr),
  1481. REG_UTP_TRANSFER_REQ_LIST_BASE_L);
  1482. ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr),
  1483. REG_UTP_TRANSFER_REQ_LIST_BASE_H);
  1484. ufshcd_writel(hba, lower_32_bits(hba->utmrdl_dma_addr),
  1485. REG_UTP_TASK_REQ_LIST_BASE_L);
  1486. ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr),
  1487. REG_UTP_TASK_REQ_LIST_BASE_H);
  1488. /*
  1489. * UCRDY, UTMRLDY and UTRLRDY bits must be 1
  1490. * DEI, HEI bits must be 0
  1491. */
  1492. if (!(ufshcd_get_lists_status(reg))) {
  1493. ufshcd_enable_run_stop_reg(hba);
  1494. } else {
  1495. dev_err(hba->dev,
  1496. "Host controller not ready to process requests");
  1497. err = -EIO;
  1498. goto out;
  1499. }
  1500. if (hba->ufshcd_state == UFSHCD_STATE_RESET)
  1501. scsi_unblock_requests(hba->host);
  1502. hba->ufshcd_state = UFSHCD_STATE_OPERATIONAL;
  1503. out:
  1504. return err;
  1505. }
  1506. /**
  1507. * ufshcd_hba_enable - initialize the controller
  1508. * @hba: per adapter instance
  1509. *
  1510. * The controller resets itself and controller firmware initialization
  1511. * sequence kicks off. When controller is ready it will set
  1512. * the Host Controller Enable bit to 1.
  1513. *
  1514. * Returns 0 on success, non-zero value on failure
  1515. */
  1516. static int ufshcd_hba_enable(struct ufs_hba *hba)
  1517. {
  1518. int retry;
  1519. /*
  1520. * msleep of 1 and 5 used in this function might result in msleep(20),
  1521. * but it was necessary to send the UFS FPGA to reset mode during
  1522. * development and testing of this driver. msleep can be changed to
  1523. * mdelay and retry count can be reduced based on the controller.
  1524. */
  1525. if (!ufshcd_is_hba_active(hba)) {
  1526. /* change controller state to "reset state" */
  1527. ufshcd_hba_stop(hba);
  1528. /*
  1529. * This delay is based on the testing done with UFS host
  1530. * controller FPGA. The delay can be changed based on the
  1531. * host controller used.
  1532. */
  1533. msleep(5);
  1534. }
  1535. /* start controller initialization sequence */
  1536. ufshcd_hba_start(hba);
  1537. /*
  1538. * To initialize a UFS host controller HCE bit must be set to 1.
  1539. * During initialization the HCE bit value changes from 1->0->1.
  1540. * When the host controller completes initialization sequence
  1541. * it sets the value of HCE bit to 1. The same HCE bit is read back
  1542. * to check if the controller has completed initialization sequence.
  1543. * So without this delay the value HCE = 1, set in the previous
  1544. * instruction might be read back.
  1545. * This delay can be changed based on the controller.
  1546. */
  1547. msleep(1);
  1548. /* wait for the host controller to complete initialization */
  1549. retry = 10;
  1550. while (ufshcd_is_hba_active(hba)) {
  1551. if (retry) {
  1552. retry--;
  1553. } else {
  1554. dev_err(hba->dev,
  1555. "Controller enable failed\n");
  1556. return -EIO;
  1557. }
  1558. msleep(5);
  1559. }
  1560. return 0;
  1561. }
  1562. /**
  1563. * ufshcd_link_startup - Initialize unipro link startup
  1564. * @hba: per adapter instance
  1565. *
  1566. * Returns 0 for success, non-zero in case of failure
  1567. */
  1568. static int ufshcd_link_startup(struct ufs_hba *hba)
  1569. {
  1570. int ret;
  1571. /* enable UIC related interrupts */
  1572. ufshcd_enable_intr(hba, UIC_COMMAND_COMPL);
  1573. ret = ufshcd_dme_link_startup(hba);
  1574. if (ret)
  1575. goto out;
  1576. ret = ufshcd_make_hba_operational(hba);
  1577. out:
  1578. if (ret)
  1579. dev_err(hba->dev, "link startup failed %d\n", ret);
  1580. return ret;
  1581. }
  1582. /**
  1583. * ufshcd_verify_dev_init() - Verify device initialization
  1584. * @hba: per-adapter instance
  1585. *
  1586. * Send NOP OUT UPIU and wait for NOP IN response to check whether the
  1587. * device Transport Protocol (UTP) layer is ready after a reset.
  1588. * If the UTP layer at the device side is not initialized, it may
  1589. * not respond with NOP IN UPIU within timeout of %NOP_OUT_TIMEOUT
  1590. * and we retry sending NOP OUT for %NOP_OUT_RETRIES iterations.
  1591. */
  1592. static int ufshcd_verify_dev_init(struct ufs_hba *hba)
  1593. {
  1594. int err = 0;
  1595. int retries;
  1596. mutex_lock(&hba->dev_cmd.lock);
  1597. for (retries = NOP_OUT_RETRIES; retries > 0; retries--) {
  1598. err = ufshcd_exec_dev_cmd(hba, DEV_CMD_TYPE_NOP,
  1599. NOP_OUT_TIMEOUT);
  1600. if (!err || err == -ETIMEDOUT)
  1601. break;
  1602. dev_dbg(hba->dev, "%s: error %d retrying\n", __func__, err);
  1603. }
  1604. mutex_unlock(&hba->dev_cmd.lock);
  1605. if (err)
  1606. dev_err(hba->dev, "%s: NOP OUT failed %d\n", __func__, err);
  1607. return err;
  1608. }
  1609. /**
  1610. * ufshcd_do_reset - reset the host controller
  1611. * @hba: per adapter instance
  1612. *
  1613. * Returns SUCCESS/FAILED
  1614. */
  1615. static int ufshcd_do_reset(struct ufs_hba *hba)
  1616. {
  1617. struct ufshcd_lrb *lrbp;
  1618. unsigned long flags;
  1619. int tag;
  1620. /* block commands from midlayer */
  1621. scsi_block_requests(hba->host);
  1622. spin_lock_irqsave(hba->host->host_lock, flags);
  1623. hba->ufshcd_state = UFSHCD_STATE_RESET;
  1624. /* send controller to reset state */
  1625. ufshcd_hba_stop(hba);
  1626. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1627. /* abort outstanding commands */
  1628. for (tag = 0; tag < hba->nutrs; tag++) {
  1629. if (test_bit(tag, &hba->outstanding_reqs)) {
  1630. lrbp = &hba->lrb[tag];
  1631. if (lrbp->cmd) {
  1632. scsi_dma_unmap(lrbp->cmd);
  1633. lrbp->cmd->result = DID_RESET << 16;
  1634. lrbp->cmd->scsi_done(lrbp->cmd);
  1635. lrbp->cmd = NULL;
  1636. clear_bit_unlock(tag, &hba->lrb_in_use);
  1637. }
  1638. }
  1639. }
  1640. /* complete device management command */
  1641. if (hba->dev_cmd.complete)
  1642. complete(hba->dev_cmd.complete);
  1643. /* clear outstanding request/task bit maps */
  1644. hba->outstanding_reqs = 0;
  1645. hba->outstanding_tasks = 0;
  1646. /* Host controller enable */
  1647. if (ufshcd_hba_enable(hba)) {
  1648. dev_err(hba->dev,
  1649. "Reset: Controller initialization failed\n");
  1650. return FAILED;
  1651. }
  1652. if (ufshcd_link_startup(hba)) {
  1653. dev_err(hba->dev,
  1654. "Reset: Link start-up failed\n");
  1655. return FAILED;
  1656. }
  1657. return SUCCESS;
  1658. }
  1659. /**
  1660. * ufshcd_slave_alloc - handle initial SCSI device configurations
  1661. * @sdev: pointer to SCSI device
  1662. *
  1663. * Returns success
  1664. */
  1665. static int ufshcd_slave_alloc(struct scsi_device *sdev)
  1666. {
  1667. struct ufs_hba *hba;
  1668. hba = shost_priv(sdev->host);
  1669. sdev->tagged_supported = 1;
  1670. /* Mode sense(6) is not supported by UFS, so use Mode sense(10) */
  1671. sdev->use_10_for_ms = 1;
  1672. scsi_set_tag_type(sdev, MSG_SIMPLE_TAG);
  1673. /*
  1674. * Inform SCSI Midlayer that the LUN queue depth is same as the
  1675. * controller queue depth. If a LUN queue depth is less than the
  1676. * controller queue depth and if the LUN reports
  1677. * SAM_STAT_TASK_SET_FULL, the LUN queue depth will be adjusted
  1678. * with scsi_adjust_queue_depth.
  1679. */
  1680. scsi_activate_tcq(sdev, hba->nutrs);
  1681. return 0;
  1682. }
  1683. /**
  1684. * ufshcd_slave_destroy - remove SCSI device configurations
  1685. * @sdev: pointer to SCSI device
  1686. */
  1687. static void ufshcd_slave_destroy(struct scsi_device *sdev)
  1688. {
  1689. struct ufs_hba *hba;
  1690. hba = shost_priv(sdev->host);
  1691. scsi_deactivate_tcq(sdev, hba->nutrs);
  1692. }
  1693. /**
  1694. * ufshcd_task_req_compl - handle task management request completion
  1695. * @hba: per adapter instance
  1696. * @index: index of the completed request
  1697. *
  1698. * Returns SUCCESS/FAILED
  1699. */
  1700. static int ufshcd_task_req_compl(struct ufs_hba *hba, u32 index)
  1701. {
  1702. struct utp_task_req_desc *task_req_descp;
  1703. struct utp_upiu_task_rsp *task_rsp_upiup;
  1704. unsigned long flags;
  1705. int ocs_value;
  1706. int task_result;
  1707. spin_lock_irqsave(hba->host->host_lock, flags);
  1708. /* Clear completed tasks from outstanding_tasks */
  1709. __clear_bit(index, &hba->outstanding_tasks);
  1710. task_req_descp = hba->utmrdl_base_addr;
  1711. ocs_value = ufshcd_get_tmr_ocs(&task_req_descp[index]);
  1712. if (ocs_value == OCS_SUCCESS) {
  1713. task_rsp_upiup = (struct utp_upiu_task_rsp *)
  1714. task_req_descp[index].task_rsp_upiu;
  1715. task_result = be32_to_cpu(task_rsp_upiup->header.dword_1);
  1716. task_result = ((task_result & MASK_TASK_RESPONSE) >> 8);
  1717. if (task_result != UPIU_TASK_MANAGEMENT_FUNC_COMPL &&
  1718. task_result != UPIU_TASK_MANAGEMENT_FUNC_SUCCEEDED)
  1719. task_result = FAILED;
  1720. else
  1721. task_result = SUCCESS;
  1722. } else {
  1723. task_result = FAILED;
  1724. dev_err(hba->dev,
  1725. "trc: Invalid ocs = %x\n", ocs_value);
  1726. }
  1727. spin_unlock_irqrestore(hba->host->host_lock, flags);
  1728. return task_result;
  1729. }
  1730. /**
  1731. * ufshcd_adjust_lun_qdepth - Update LUN queue depth if device responds with
  1732. * SAM_STAT_TASK_SET_FULL SCSI command status.
  1733. * @cmd: pointer to SCSI command
  1734. */
  1735. static void ufshcd_adjust_lun_qdepth(struct scsi_cmnd *cmd)
  1736. {
  1737. struct ufs_hba *hba;
  1738. int i;
  1739. int lun_qdepth = 0;
  1740. hba = shost_priv(cmd->device->host);
  1741. /*
  1742. * LUN queue depth can be obtained by counting outstanding commands
  1743. * on the LUN.
  1744. */
  1745. for (i = 0; i < hba->nutrs; i++) {
  1746. if (test_bit(i, &hba->outstanding_reqs)) {
  1747. /*
  1748. * Check if the outstanding command belongs
  1749. * to the LUN which reported SAM_STAT_TASK_SET_FULL.
  1750. */
  1751. if (cmd->device->lun == hba->lrb[i].lun)
  1752. lun_qdepth++;
  1753. }
  1754. }
  1755. /*
  1756. * LUN queue depth will be total outstanding commands, except the
  1757. * command for which the LUN reported SAM_STAT_TASK_SET_FULL.
  1758. */
  1759. scsi_adjust_queue_depth(cmd->device, MSG_SIMPLE_TAG, lun_qdepth - 1);
  1760. }
  1761. /**
  1762. * ufshcd_scsi_cmd_status - Update SCSI command result based on SCSI status
  1763. * @lrb: pointer to local reference block of completed command
  1764. * @scsi_status: SCSI command status
  1765. *
  1766. * Returns value base on SCSI command status
  1767. */
  1768. static inline int
  1769. ufshcd_scsi_cmd_status(struct ufshcd_lrb *lrbp, int scsi_status)
  1770. {
  1771. int result = 0;
  1772. switch (scsi_status) {
  1773. case SAM_STAT_CHECK_CONDITION:
  1774. ufshcd_copy_sense_data(lrbp);
  1775. case SAM_STAT_GOOD:
  1776. result |= DID_OK << 16 |
  1777. COMMAND_COMPLETE << 8 |
  1778. scsi_status;
  1779. break;
  1780. case SAM_STAT_TASK_SET_FULL:
  1781. /*
  1782. * If a LUN reports SAM_STAT_TASK_SET_FULL, then the LUN queue
  1783. * depth needs to be adjusted to the exact number of
  1784. * outstanding commands the LUN can handle at any given time.
  1785. */
  1786. ufshcd_adjust_lun_qdepth(lrbp->cmd);
  1787. case SAM_STAT_BUSY:
  1788. case SAM_STAT_TASK_ABORTED:
  1789. ufshcd_copy_sense_data(lrbp);
  1790. result |= scsi_status;
  1791. break;
  1792. default:
  1793. result |= DID_ERROR << 16;
  1794. break;
  1795. } /* end of switch */
  1796. return result;
  1797. }
  1798. /**
  1799. * ufshcd_transfer_rsp_status - Get overall status of the response
  1800. * @hba: per adapter instance
  1801. * @lrb: pointer to local reference block of completed command
  1802. *
  1803. * Returns result of the command to notify SCSI midlayer
  1804. */
  1805. static inline int
  1806. ufshcd_transfer_rsp_status(struct ufs_hba *hba, struct ufshcd_lrb *lrbp)
  1807. {
  1808. int result = 0;
  1809. int scsi_status;
  1810. int ocs;
  1811. /* overall command status of utrd */
  1812. ocs = ufshcd_get_tr_ocs(lrbp);
  1813. switch (ocs) {
  1814. case OCS_SUCCESS:
  1815. result = ufshcd_get_req_rsp(lrbp->ucd_rsp_ptr);
  1816. switch (result) {
  1817. case UPIU_TRANSACTION_RESPONSE:
  1818. /*
  1819. * get the response UPIU result to extract
  1820. * the SCSI command status
  1821. */
  1822. result = ufshcd_get_rsp_upiu_result(lrbp->ucd_rsp_ptr);
  1823. /*
  1824. * get the result based on SCSI status response
  1825. * to notify the SCSI midlayer of the command status
  1826. */
  1827. scsi_status = result & MASK_SCSI_STATUS;
  1828. result = ufshcd_scsi_cmd_status(lrbp, scsi_status);
  1829. if (ufshcd_is_exception_event(lrbp->ucd_rsp_ptr))
  1830. schedule_work(&hba->eeh_work);
  1831. break;
  1832. case UPIU_TRANSACTION_REJECT_UPIU:
  1833. /* TODO: handle Reject UPIU Response */
  1834. result = DID_ERROR << 16;
  1835. dev_err(hba->dev,
  1836. "Reject UPIU not fully implemented\n");
  1837. break;
  1838. default:
  1839. result = DID_ERROR << 16;
  1840. dev_err(hba->dev,
  1841. "Unexpected request response code = %x\n",
  1842. result);
  1843. break;
  1844. }
  1845. break;
  1846. case OCS_ABORTED:
  1847. result |= DID_ABORT << 16;
  1848. break;
  1849. case OCS_INVALID_CMD_TABLE_ATTR:
  1850. case OCS_INVALID_PRDT_ATTR:
  1851. case OCS_MISMATCH_DATA_BUF_SIZE:
  1852. case OCS_MISMATCH_RESP_UPIU_SIZE:
  1853. case OCS_PEER_COMM_FAILURE:
  1854. case OCS_FATAL_ERROR:
  1855. default:
  1856. result |= DID_ERROR << 16;
  1857. dev_err(hba->dev,
  1858. "OCS error from controller = %x\n", ocs);
  1859. break;
  1860. } /* end of switch */
  1861. return result;
  1862. }
  1863. /**
  1864. * ufshcd_uic_cmd_compl - handle completion of uic command
  1865. * @hba: per adapter instance
  1866. * @intr_status: interrupt status generated by the controller
  1867. */
  1868. static void ufshcd_uic_cmd_compl(struct ufs_hba *hba, u32 intr_status)
  1869. {
  1870. if ((intr_status & UIC_COMMAND_COMPL) && hba->active_uic_cmd) {
  1871. hba->active_uic_cmd->argument2 |=
  1872. ufshcd_get_uic_cmd_result(hba);
  1873. hba->active_uic_cmd->argument3 =
  1874. ufshcd_get_dme_attr_val(hba);
  1875. complete(&hba->active_uic_cmd->done);
  1876. }
  1877. if ((intr_status & UIC_POWER_MODE) && hba->pwr_done)
  1878. complete(hba->pwr_done);
  1879. }
  1880. /**
  1881. * ufshcd_transfer_req_compl - handle SCSI and query command completion
  1882. * @hba: per adapter instance
  1883. */
  1884. static void ufshcd_transfer_req_compl(struct ufs_hba *hba)
  1885. {
  1886. struct ufshcd_lrb *lrbp;
  1887. struct scsi_cmnd *cmd;
  1888. unsigned long completed_reqs;
  1889. u32 tr_doorbell;
  1890. int result;
  1891. int index;
  1892. bool int_aggr_reset = false;
  1893. tr_doorbell = ufshcd_readl(hba, REG_UTP_TRANSFER_REQ_DOOR_BELL);
  1894. completed_reqs = tr_doorbell ^ hba->outstanding_reqs;
  1895. for (index = 0; index < hba->nutrs; index++) {
  1896. if (test_bit(index, &completed_reqs)) {
  1897. lrbp = &hba->lrb[index];
  1898. cmd = lrbp->cmd;
  1899. /*
  1900. * Don't skip resetting interrupt aggregation counters
  1901. * if a regular command is present.
  1902. */
  1903. int_aggr_reset |= !lrbp->intr_cmd;
  1904. if (cmd) {
  1905. result = ufshcd_transfer_rsp_status(hba, lrbp);
  1906. scsi_dma_unmap(cmd);
  1907. cmd->result = result;
  1908. /* Mark completed command as NULL in LRB */
  1909. lrbp->cmd = NULL;
  1910. clear_bit_unlock(index, &hba->lrb_in_use);
  1911. /* Do not touch lrbp after scsi done */
  1912. cmd->scsi_done(cmd);
  1913. } else if (lrbp->command_type ==
  1914. UTP_CMD_TYPE_DEV_MANAGE) {
  1915. if (hba->dev_cmd.complete)
  1916. complete(hba->dev_cmd.complete);
  1917. }
  1918. } /* end of if */
  1919. } /* end of for */
  1920. /* clear corresponding bits of completed commands */
  1921. hba->outstanding_reqs ^= completed_reqs;
  1922. /* we might have free'd some tags above */
  1923. wake_up(&hba->dev_cmd.tag_wq);
  1924. /* Reset interrupt aggregation counters */
  1925. if (int_aggr_reset)
  1926. ufshcd_reset_intr_aggr(hba);
  1927. }
  1928. /**
  1929. * ufshcd_disable_ee - disable exception event
  1930. * @hba: per-adapter instance
  1931. * @mask: exception event to disable
  1932. *
  1933. * Disables exception event in the device so that the EVENT_ALERT
  1934. * bit is not set.
  1935. *
  1936. * Returns zero on success, non-zero error value on failure.
  1937. */
  1938. static int ufshcd_disable_ee(struct ufs_hba *hba, u16 mask)
  1939. {
  1940. int err = 0;
  1941. u32 val;
  1942. if (!(hba->ee_ctrl_mask & mask))
  1943. goto out;
  1944. val = hba->ee_ctrl_mask & ~mask;
  1945. val &= 0xFFFF; /* 2 bytes */
  1946. err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
  1947. QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
  1948. if (!err)
  1949. hba->ee_ctrl_mask &= ~mask;
  1950. out:
  1951. return err;
  1952. }
  1953. /**
  1954. * ufshcd_enable_ee - enable exception event
  1955. * @hba: per-adapter instance
  1956. * @mask: exception event to enable
  1957. *
  1958. * Enable corresponding exception event in the device to allow
  1959. * device to alert host in critical scenarios.
  1960. *
  1961. * Returns zero on success, non-zero error value on failure.
  1962. */
  1963. static int ufshcd_enable_ee(struct ufs_hba *hba, u16 mask)
  1964. {
  1965. int err = 0;
  1966. u32 val;
  1967. if (hba->ee_ctrl_mask & mask)
  1968. goto out;
  1969. val = hba->ee_ctrl_mask | mask;
  1970. val &= 0xFFFF; /* 2 bytes */
  1971. err = ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_WRITE_ATTR,
  1972. QUERY_ATTR_IDN_EE_CONTROL, 0, 0, &val);
  1973. if (!err)
  1974. hba->ee_ctrl_mask |= mask;
  1975. out:
  1976. return err;
  1977. }
  1978. /**
  1979. * ufshcd_enable_auto_bkops - Allow device managed BKOPS
  1980. * @hba: per-adapter instance
  1981. *
  1982. * Allow device to manage background operations on its own. Enabling
  1983. * this might lead to inconsistent latencies during normal data transfers
  1984. * as the device is allowed to manage its own way of handling background
  1985. * operations.
  1986. *
  1987. * Returns zero on success, non-zero on failure.
  1988. */
  1989. static int ufshcd_enable_auto_bkops(struct ufs_hba *hba)
  1990. {
  1991. int err = 0;
  1992. if (hba->auto_bkops_enabled)
  1993. goto out;
  1994. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_SET_FLAG,
  1995. QUERY_FLAG_IDN_BKOPS_EN, NULL);
  1996. if (err) {
  1997. dev_err(hba->dev, "%s: failed to enable bkops %d\n",
  1998. __func__, err);
  1999. goto out;
  2000. }
  2001. hba->auto_bkops_enabled = true;
  2002. /* No need of URGENT_BKOPS exception from the device */
  2003. err = ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
  2004. if (err)
  2005. dev_err(hba->dev, "%s: failed to disable exception event %d\n",
  2006. __func__, err);
  2007. out:
  2008. return err;
  2009. }
  2010. /**
  2011. * ufshcd_disable_auto_bkops - block device in doing background operations
  2012. * @hba: per-adapter instance
  2013. *
  2014. * Disabling background operations improves command response latency but
  2015. * has drawback of device moving into critical state where the device is
  2016. * not-operable. Make sure to call ufshcd_enable_auto_bkops() whenever the
  2017. * host is idle so that BKOPS are managed effectively without any negative
  2018. * impacts.
  2019. *
  2020. * Returns zero on success, non-zero on failure.
  2021. */
  2022. static int ufshcd_disable_auto_bkops(struct ufs_hba *hba)
  2023. {
  2024. int err = 0;
  2025. if (!hba->auto_bkops_enabled)
  2026. goto out;
  2027. /*
  2028. * If host assisted BKOPs is to be enabled, make sure
  2029. * urgent bkops exception is allowed.
  2030. */
  2031. err = ufshcd_enable_ee(hba, MASK_EE_URGENT_BKOPS);
  2032. if (err) {
  2033. dev_err(hba->dev, "%s: failed to enable exception event %d\n",
  2034. __func__, err);
  2035. goto out;
  2036. }
  2037. err = ufshcd_query_flag(hba, UPIU_QUERY_OPCODE_CLEAR_FLAG,
  2038. QUERY_FLAG_IDN_BKOPS_EN, NULL);
  2039. if (err) {
  2040. dev_err(hba->dev, "%s: failed to disable bkops %d\n",
  2041. __func__, err);
  2042. ufshcd_disable_ee(hba, MASK_EE_URGENT_BKOPS);
  2043. goto out;
  2044. }
  2045. hba->auto_bkops_enabled = false;
  2046. out:
  2047. return err;
  2048. }
  2049. /**
  2050. * ufshcd_force_reset_auto_bkops - force enable of auto bkops
  2051. * @hba: per adapter instance
  2052. *
  2053. * After a device reset the device may toggle the BKOPS_EN flag
  2054. * to default value. The s/w tracking variables should be updated
  2055. * as well. Do this by forcing enable of auto bkops.
  2056. */
  2057. static void ufshcd_force_reset_auto_bkops(struct ufs_hba *hba)
  2058. {
  2059. hba->auto_bkops_enabled = false;
  2060. hba->ee_ctrl_mask |= MASK_EE_URGENT_BKOPS;
  2061. ufshcd_enable_auto_bkops(hba);
  2062. }
  2063. static inline int ufshcd_get_bkops_status(struct ufs_hba *hba, u32 *status)
  2064. {
  2065. return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
  2066. QUERY_ATTR_IDN_BKOPS_STATUS, 0, 0, status);
  2067. }
  2068. /**
  2069. * ufshcd_urgent_bkops - handle urgent bkops exception event
  2070. * @hba: per-adapter instance
  2071. *
  2072. * Enable fBackgroundOpsEn flag in the device to permit background
  2073. * operations.
  2074. */
  2075. static int ufshcd_urgent_bkops(struct ufs_hba *hba)
  2076. {
  2077. int err;
  2078. u32 status = 0;
  2079. err = ufshcd_get_bkops_status(hba, &status);
  2080. if (err) {
  2081. dev_err(hba->dev, "%s: failed to get BKOPS status %d\n",
  2082. __func__, err);
  2083. goto out;
  2084. }
  2085. status = status & 0xF;
  2086. /* handle only if status indicates performance impact or critical */
  2087. if (status >= BKOPS_STATUS_PERF_IMPACT)
  2088. err = ufshcd_enable_auto_bkops(hba);
  2089. out:
  2090. return err;
  2091. }
  2092. static inline int ufshcd_get_ee_status(struct ufs_hba *hba, u32 *status)
  2093. {
  2094. return ufshcd_query_attr(hba, UPIU_QUERY_OPCODE_READ_ATTR,
  2095. QUERY_ATTR_IDN_EE_STATUS, 0, 0, status);
  2096. }
  2097. /**
  2098. * ufshcd_exception_event_handler - handle exceptions raised by device
  2099. * @work: pointer to work data
  2100. *
  2101. * Read bExceptionEventStatus attribute from the device and handle the
  2102. * exception event accordingly.
  2103. */
  2104. static void ufshcd_exception_event_handler(struct work_struct *work)
  2105. {
  2106. struct ufs_hba *hba;
  2107. int err;
  2108. u32 status = 0;
  2109. hba = container_of(work, struct ufs_hba, eeh_work);
  2110. pm_runtime_get_sync(hba->dev);
  2111. err = ufshcd_get_ee_status(hba, &status);
  2112. if (err) {
  2113. dev_err(hba->dev, "%s: failed to get exception status %d\n",
  2114. __func__, err);
  2115. goto out;
  2116. }
  2117. status &= hba->ee_ctrl_mask;
  2118. if (status & MASK_EE_URGENT_BKOPS) {
  2119. err = ufshcd_urgent_bkops(hba);
  2120. if (err)
  2121. dev_err(hba->dev, "%s: failed to handle urgent bkops %d\n",
  2122. __func__, err);
  2123. }
  2124. out:
  2125. pm_runtime_put_sync(hba->dev);
  2126. return;
  2127. }
  2128. /**
  2129. * ufshcd_fatal_err_handler - handle fatal errors
  2130. * @hba: per adapter instance
  2131. */
  2132. static void ufshcd_fatal_err_handler(struct work_struct *work)
  2133. {
  2134. struct ufs_hba *hba;
  2135. hba = container_of(work, struct ufs_hba, feh_workq);
  2136. pm_runtime_get_sync(hba->dev);
  2137. /* check if reset is already in progress */
  2138. if (hba->ufshcd_state != UFSHCD_STATE_RESET)
  2139. ufshcd_do_reset(hba);
  2140. pm_runtime_put_sync(hba->dev);
  2141. }
  2142. /**
  2143. * ufshcd_err_handler - Check for fatal errors
  2144. * @work: pointer to a work queue structure
  2145. */
  2146. static void ufshcd_err_handler(struct ufs_hba *hba)
  2147. {
  2148. u32 reg;
  2149. if (hba->errors & INT_FATAL_ERRORS)
  2150. goto fatal_eh;
  2151. if (hba->errors & UIC_ERROR) {
  2152. reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER);
  2153. if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT)
  2154. goto fatal_eh;
  2155. }
  2156. return;
  2157. fatal_eh:
  2158. hba->ufshcd_state = UFSHCD_STATE_ERROR;
  2159. schedule_work(&hba->feh_workq);
  2160. }
  2161. /**
  2162. * ufshcd_tmc_handler - handle task management function completion
  2163. * @hba: per adapter instance
  2164. */
  2165. static void ufshcd_tmc_handler(struct ufs_hba *hba)
  2166. {
  2167. u32 tm_doorbell;
  2168. tm_doorbell = ufshcd_readl(hba, REG_UTP_TASK_REQ_DOOR_BELL);
  2169. hba->tm_condition = tm_doorbell ^ hba->outstanding_tasks;
  2170. wake_up_interruptible(&hba->ufshcd_tm_wait_queue);
  2171. }
  2172. /**
  2173. * ufshcd_sl_intr - Interrupt service routine
  2174. * @hba: per adapter instance
  2175. * @intr_status: contains interrupts generated by the controller
  2176. */
  2177. static void ufshcd_sl_intr(struct ufs_hba *hba, u32 intr_status)
  2178. {
  2179. hba->errors = UFSHCD_ERROR_MASK & intr_status;
  2180. if (hba->errors)
  2181. ufshcd_err_handler(hba);
  2182. if (intr_status & UFSHCD_UIC_MASK)
  2183. ufshcd_uic_cmd_compl(hba, intr_status);
  2184. if (intr_status & UTP_TASK_REQ_COMPL)
  2185. ufshcd_tmc_handler(hba);
  2186. if (intr_status & UTP_TRANSFER_REQ_COMPL)
  2187. ufshcd_transfer_req_compl(hba);
  2188. }
  2189. /**
  2190. * ufshcd_intr - Main interrupt service routine
  2191. * @irq: irq number
  2192. * @__hba: pointer to adapter instance
  2193. *
  2194. * Returns IRQ_HANDLED - If interrupt is valid
  2195. * IRQ_NONE - If invalid interrupt
  2196. */
  2197. static irqreturn_t ufshcd_intr(int irq, void *__hba)
  2198. {
  2199. u32 intr_status;
  2200. irqreturn_t retval = IRQ_NONE;
  2201. struct ufs_hba *hba = __hba;
  2202. spin_lock(hba->host->host_lock);
  2203. intr_status = ufshcd_readl(hba, REG_INTERRUPT_STATUS);
  2204. if (intr_status) {
  2205. ufshcd_writel(hba, intr_status, REG_INTERRUPT_STATUS);
  2206. ufshcd_sl_intr(hba, intr_status);
  2207. retval = IRQ_HANDLED;
  2208. }
  2209. spin_unlock(hba->host->host_lock);
  2210. return retval;
  2211. }
  2212. /**
  2213. * ufshcd_issue_tm_cmd - issues task management commands to controller
  2214. * @hba: per adapter instance
  2215. * @lrbp: pointer to local reference block
  2216. *
  2217. * Returns SUCCESS/FAILED
  2218. */
  2219. static int
  2220. ufshcd_issue_tm_cmd(struct ufs_hba *hba,
  2221. struct ufshcd_lrb *lrbp,
  2222. u8 tm_function)
  2223. {
  2224. struct utp_task_req_desc *task_req_descp;
  2225. struct utp_upiu_task_req *task_req_upiup;
  2226. struct Scsi_Host *host;
  2227. unsigned long flags;
  2228. int free_slot = 0;
  2229. int err;
  2230. host = hba->host;
  2231. spin_lock_irqsave(host->host_lock, flags);
  2232. /* If task management queue is full */
  2233. free_slot = ufshcd_get_tm_free_slot(hba);
  2234. if (free_slot >= hba->nutmrs) {
  2235. spin_unlock_irqrestore(host->host_lock, flags);
  2236. dev_err(hba->dev, "Task management queue full\n");
  2237. err = FAILED;
  2238. goto out;
  2239. }
  2240. task_req_descp = hba->utmrdl_base_addr;
  2241. task_req_descp += free_slot;
  2242. /* Configure task request descriptor */
  2243. task_req_descp->header.dword_0 = cpu_to_le32(UTP_REQ_DESC_INT_CMD);
  2244. task_req_descp->header.dword_2 =
  2245. cpu_to_le32(OCS_INVALID_COMMAND_STATUS);
  2246. /* Configure task request UPIU */
  2247. task_req_upiup =
  2248. (struct utp_upiu_task_req *) task_req_descp->task_req_upiu;
  2249. task_req_upiup->header.dword_0 =
  2250. UPIU_HEADER_DWORD(UPIU_TRANSACTION_TASK_REQ, 0,
  2251. lrbp->lun, lrbp->task_tag);
  2252. task_req_upiup->header.dword_1 =
  2253. UPIU_HEADER_DWORD(0, tm_function, 0, 0);
  2254. task_req_upiup->input_param1 = lrbp->lun;
  2255. task_req_upiup->input_param1 =
  2256. cpu_to_be32(task_req_upiup->input_param1);
  2257. task_req_upiup->input_param2 = lrbp->task_tag;
  2258. task_req_upiup->input_param2 =
  2259. cpu_to_be32(task_req_upiup->input_param2);
  2260. /* send command to the controller */
  2261. __set_bit(free_slot, &hba->outstanding_tasks);
  2262. ufshcd_writel(hba, 1 << free_slot, REG_UTP_TASK_REQ_DOOR_BELL);
  2263. spin_unlock_irqrestore(host->host_lock, flags);
  2264. /* wait until the task management command is completed */
  2265. err =
  2266. wait_event_interruptible_timeout(hba->ufshcd_tm_wait_queue,
  2267. (test_bit(free_slot,
  2268. &hba->tm_condition) != 0),
  2269. 60 * HZ);
  2270. if (!err) {
  2271. dev_err(hba->dev,
  2272. "Task management command timed-out\n");
  2273. err = FAILED;
  2274. goto out;
  2275. }
  2276. clear_bit(free_slot, &hba->tm_condition);
  2277. err = ufshcd_task_req_compl(hba, free_slot);
  2278. out:
  2279. return err;
  2280. }
  2281. /**
  2282. * ufshcd_device_reset - reset device and abort all the pending commands
  2283. * @cmd: SCSI command pointer
  2284. *
  2285. * Returns SUCCESS/FAILED
  2286. */
  2287. static int ufshcd_device_reset(struct scsi_cmnd *cmd)
  2288. {
  2289. struct Scsi_Host *host;
  2290. struct ufs_hba *hba;
  2291. unsigned int tag;
  2292. u32 pos;
  2293. int err;
  2294. host = cmd->device->host;
  2295. hba = shost_priv(host);
  2296. tag = cmd->request->tag;
  2297. err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_LOGICAL_RESET);
  2298. if (err == FAILED)
  2299. goto out;
  2300. for (pos = 0; pos < hba->nutrs; pos++) {
  2301. if (test_bit(pos, &hba->outstanding_reqs) &&
  2302. (hba->lrb[tag].lun == hba->lrb[pos].lun)) {
  2303. /* clear the respective UTRLCLR register bit */
  2304. ufshcd_utrl_clear(hba, pos);
  2305. clear_bit(pos, &hba->outstanding_reqs);
  2306. if (hba->lrb[pos].cmd) {
  2307. scsi_dma_unmap(hba->lrb[pos].cmd);
  2308. hba->lrb[pos].cmd->result =
  2309. DID_ABORT << 16;
  2310. hba->lrb[pos].cmd->scsi_done(cmd);
  2311. hba->lrb[pos].cmd = NULL;
  2312. clear_bit_unlock(pos, &hba->lrb_in_use);
  2313. wake_up(&hba->dev_cmd.tag_wq);
  2314. }
  2315. }
  2316. } /* end of for */
  2317. out:
  2318. return err;
  2319. }
  2320. /**
  2321. * ufshcd_host_reset - Main reset function registered with scsi layer
  2322. * @cmd: SCSI command pointer
  2323. *
  2324. * Returns SUCCESS/FAILED
  2325. */
  2326. static int ufshcd_host_reset(struct scsi_cmnd *cmd)
  2327. {
  2328. struct ufs_hba *hba;
  2329. hba = shost_priv(cmd->device->host);
  2330. if (hba->ufshcd_state == UFSHCD_STATE_RESET)
  2331. return SUCCESS;
  2332. return ufshcd_do_reset(hba);
  2333. }
  2334. /**
  2335. * ufshcd_abort - abort a specific command
  2336. * @cmd: SCSI command pointer
  2337. *
  2338. * Returns SUCCESS/FAILED
  2339. */
  2340. static int ufshcd_abort(struct scsi_cmnd *cmd)
  2341. {
  2342. struct Scsi_Host *host;
  2343. struct ufs_hba *hba;
  2344. unsigned long flags;
  2345. unsigned int tag;
  2346. int err;
  2347. host = cmd->device->host;
  2348. hba = shost_priv(host);
  2349. tag = cmd->request->tag;
  2350. spin_lock_irqsave(host->host_lock, flags);
  2351. /* check if command is still pending */
  2352. if (!(test_bit(tag, &hba->outstanding_reqs))) {
  2353. err = FAILED;
  2354. spin_unlock_irqrestore(host->host_lock, flags);
  2355. goto out;
  2356. }
  2357. spin_unlock_irqrestore(host->host_lock, flags);
  2358. err = ufshcd_issue_tm_cmd(hba, &hba->lrb[tag], UFS_ABORT_TASK);
  2359. if (err == FAILED)
  2360. goto out;
  2361. scsi_dma_unmap(cmd);
  2362. spin_lock_irqsave(host->host_lock, flags);
  2363. /* clear the respective UTRLCLR register bit */
  2364. ufshcd_utrl_clear(hba, tag);
  2365. __clear_bit(tag, &hba->outstanding_reqs);
  2366. hba->lrb[tag].cmd = NULL;
  2367. spin_unlock_irqrestore(host->host_lock, flags);
  2368. clear_bit_unlock(tag, &hba->lrb_in_use);
  2369. wake_up(&hba->dev_cmd.tag_wq);
  2370. out:
  2371. return err;
  2372. }
  2373. /**
  2374. * ufshcd_async_scan - asynchronous execution for link startup
  2375. * @data: data pointer to pass to this function
  2376. * @cookie: cookie data
  2377. */
  2378. static void ufshcd_async_scan(void *data, async_cookie_t cookie)
  2379. {
  2380. struct ufs_hba *hba = (struct ufs_hba *)data;
  2381. int ret;
  2382. ret = ufshcd_link_startup(hba);
  2383. if (ret)
  2384. goto out;
  2385. ufshcd_config_max_pwr_mode(hba);
  2386. ret = ufshcd_verify_dev_init(hba);
  2387. if (ret)
  2388. goto out;
  2389. ret = ufshcd_complete_dev_init(hba);
  2390. if (ret)
  2391. goto out;
  2392. ufshcd_force_reset_auto_bkops(hba);
  2393. scsi_scan_host(hba->host);
  2394. pm_runtime_put_sync(hba->dev);
  2395. out:
  2396. return;
  2397. }
  2398. static struct scsi_host_template ufshcd_driver_template = {
  2399. .module = THIS_MODULE,
  2400. .name = UFSHCD,
  2401. .proc_name = UFSHCD,
  2402. .queuecommand = ufshcd_queuecommand,
  2403. .slave_alloc = ufshcd_slave_alloc,
  2404. .slave_destroy = ufshcd_slave_destroy,
  2405. .eh_abort_handler = ufshcd_abort,
  2406. .eh_device_reset_handler = ufshcd_device_reset,
  2407. .eh_host_reset_handler = ufshcd_host_reset,
  2408. .this_id = -1,
  2409. .sg_tablesize = SG_ALL,
  2410. .cmd_per_lun = UFSHCD_CMD_PER_LUN,
  2411. .can_queue = UFSHCD_CAN_QUEUE,
  2412. };
  2413. /**
  2414. * ufshcd_suspend - suspend power management function
  2415. * @hba: per adapter instance
  2416. * @state: power state
  2417. *
  2418. * Returns -ENOSYS
  2419. */
  2420. int ufshcd_suspend(struct ufs_hba *hba, pm_message_t state)
  2421. {
  2422. /*
  2423. * TODO:
  2424. * 1. Block SCSI requests from SCSI midlayer
  2425. * 2. Change the internal driver state to non operational
  2426. * 3. Set UTRLRSR and UTMRLRSR bits to zero
  2427. * 4. Wait until outstanding commands are completed
  2428. * 5. Set HCE to zero to send the UFS host controller to reset state
  2429. */
  2430. return -ENOSYS;
  2431. }
  2432. EXPORT_SYMBOL_GPL(ufshcd_suspend);
  2433. /**
  2434. * ufshcd_resume - resume power management function
  2435. * @hba: per adapter instance
  2436. *
  2437. * Returns -ENOSYS
  2438. */
  2439. int ufshcd_resume(struct ufs_hba *hba)
  2440. {
  2441. /*
  2442. * TODO:
  2443. * 1. Set HCE to 1, to start the UFS host controller
  2444. * initialization process
  2445. * 2. Set UTRLRSR and UTMRLRSR bits to 1
  2446. * 3. Change the internal driver state to operational
  2447. * 4. Unblock SCSI requests from SCSI midlayer
  2448. */
  2449. return -ENOSYS;
  2450. }
  2451. EXPORT_SYMBOL_GPL(ufshcd_resume);
  2452. int ufshcd_runtime_suspend(struct ufs_hba *hba)
  2453. {
  2454. if (!hba)
  2455. return 0;
  2456. /*
  2457. * The device is idle with no requests in the queue,
  2458. * allow background operations.
  2459. */
  2460. return ufshcd_enable_auto_bkops(hba);
  2461. }
  2462. EXPORT_SYMBOL(ufshcd_runtime_suspend);
  2463. int ufshcd_runtime_resume(struct ufs_hba *hba)
  2464. {
  2465. if (!hba)
  2466. return 0;
  2467. return ufshcd_disable_auto_bkops(hba);
  2468. }
  2469. EXPORT_SYMBOL(ufshcd_runtime_resume);
  2470. int ufshcd_runtime_idle(struct ufs_hba *hba)
  2471. {
  2472. return 0;
  2473. }
  2474. EXPORT_SYMBOL(ufshcd_runtime_idle);
  2475. /**
  2476. * ufshcd_remove - de-allocate SCSI host and host memory space
  2477. * data structure memory
  2478. * @hba - per adapter instance
  2479. */
  2480. void ufshcd_remove(struct ufs_hba *hba)
  2481. {
  2482. scsi_remove_host(hba->host);
  2483. /* disable interrupts */
  2484. ufshcd_disable_intr(hba, hba->intr_mask);
  2485. ufshcd_hba_stop(hba);
  2486. scsi_host_put(hba->host);
  2487. }
  2488. EXPORT_SYMBOL_GPL(ufshcd_remove);
  2489. /**
  2490. * ufshcd_init - Driver initialization routine
  2491. * @dev: pointer to device handle
  2492. * @hba_handle: driver private handle
  2493. * @mmio_base: base register address
  2494. * @irq: Interrupt line of device
  2495. * Returns 0 on success, non-zero value on failure
  2496. */
  2497. int ufshcd_init(struct device *dev, struct ufs_hba **hba_handle,
  2498. void __iomem *mmio_base, unsigned int irq)
  2499. {
  2500. struct Scsi_Host *host;
  2501. struct ufs_hba *hba;
  2502. int err;
  2503. if (!dev) {
  2504. dev_err(dev,
  2505. "Invalid memory reference for dev is NULL\n");
  2506. err = -ENODEV;
  2507. goto out_error;
  2508. }
  2509. if (!mmio_base) {
  2510. dev_err(dev,
  2511. "Invalid memory reference for mmio_base is NULL\n");
  2512. err = -ENODEV;
  2513. goto out_error;
  2514. }
  2515. host = scsi_host_alloc(&ufshcd_driver_template,
  2516. sizeof(struct ufs_hba));
  2517. if (!host) {
  2518. dev_err(dev, "scsi_host_alloc failed\n");
  2519. err = -ENOMEM;
  2520. goto out_error;
  2521. }
  2522. hba = shost_priv(host);
  2523. hba->host = host;
  2524. hba->dev = dev;
  2525. hba->mmio_base = mmio_base;
  2526. hba->irq = irq;
  2527. /* Read capabilities registers */
  2528. ufshcd_hba_capabilities(hba);
  2529. /* Get UFS version supported by the controller */
  2530. hba->ufs_version = ufshcd_get_ufs_version(hba);
  2531. /* Get Interrupt bit mask per version */
  2532. hba->intr_mask = ufshcd_get_intr_mask(hba);
  2533. /* Allocate memory for host memory space */
  2534. err = ufshcd_memory_alloc(hba);
  2535. if (err) {
  2536. dev_err(hba->dev, "Memory allocation failed\n");
  2537. goto out_disable;
  2538. }
  2539. /* Configure LRB */
  2540. ufshcd_host_memory_configure(hba);
  2541. host->can_queue = hba->nutrs;
  2542. host->cmd_per_lun = hba->nutrs;
  2543. host->max_id = UFSHCD_MAX_ID;
  2544. host->max_lun = UFSHCD_MAX_LUNS;
  2545. host->max_channel = UFSHCD_MAX_CHANNEL;
  2546. host->unique_id = host->host_no;
  2547. host->max_cmd_len = MAX_CDB_SIZE;
  2548. /* Initailize wait queue for task management */
  2549. init_waitqueue_head(&hba->ufshcd_tm_wait_queue);
  2550. /* Initialize work queues */
  2551. INIT_WORK(&hba->feh_workq, ufshcd_fatal_err_handler);
  2552. INIT_WORK(&hba->eeh_work, ufshcd_exception_event_handler);
  2553. /* Initialize UIC command mutex */
  2554. mutex_init(&hba->uic_cmd_mutex);
  2555. /* Initialize mutex for device management commands */
  2556. mutex_init(&hba->dev_cmd.lock);
  2557. /* Initialize device management tag acquire wait queue */
  2558. init_waitqueue_head(&hba->dev_cmd.tag_wq);
  2559. /* IRQ registration */
  2560. err = devm_request_irq(dev, irq, ufshcd_intr, IRQF_SHARED, UFSHCD, hba);
  2561. if (err) {
  2562. dev_err(hba->dev, "request irq failed\n");
  2563. goto out_disable;
  2564. }
  2565. /* Enable SCSI tag mapping */
  2566. err = scsi_init_shared_tag_map(host, host->can_queue);
  2567. if (err) {
  2568. dev_err(hba->dev, "init shared queue failed\n");
  2569. goto out_disable;
  2570. }
  2571. err = scsi_add_host(host, hba->dev);
  2572. if (err) {
  2573. dev_err(hba->dev, "scsi_add_host failed\n");
  2574. goto out_disable;
  2575. }
  2576. /* Host controller enable */
  2577. err = ufshcd_hba_enable(hba);
  2578. if (err) {
  2579. dev_err(hba->dev, "Host controller enable failed\n");
  2580. goto out_remove_scsi_host;
  2581. }
  2582. *hba_handle = hba;
  2583. /* Hold auto suspend until async scan completes */
  2584. pm_runtime_get_sync(dev);
  2585. async_schedule(ufshcd_async_scan, hba);
  2586. return 0;
  2587. out_remove_scsi_host:
  2588. scsi_remove_host(hba->host);
  2589. out_disable:
  2590. scsi_host_put(host);
  2591. out_error:
  2592. return err;
  2593. }
  2594. EXPORT_SYMBOL_GPL(ufshcd_init);
  2595. MODULE_AUTHOR("Santosh Yaragnavi <santosh.sy@samsung.com>");
  2596. MODULE_AUTHOR("Vinayak Holikatti <h.vinayak@samsung.com>");
  2597. MODULE_DESCRIPTION("Generic UFS host controller driver Core");
  2598. MODULE_LICENSE("GPL");
  2599. MODULE_VERSION(UFSHCD_DRIVER_VERSION);