ipr.c 281 KB

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  1. /*
  2. * ipr.c -- driver for IBM Power Linux RAID adapters
  3. *
  4. * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
  5. *
  6. * Copyright (C) 2003, 2004 IBM Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. /*
  24. * Notes:
  25. *
  26. * This driver is used to control the following SCSI adapters:
  27. *
  28. * IBM iSeries: 5702, 5703, 2780, 5709, 570A, 570B
  29. *
  30. * IBM pSeries: PCI-X Dual Channel Ultra 320 SCSI RAID Adapter
  31. * PCI-X Dual Channel Ultra 320 SCSI Adapter
  32. * PCI-X Dual Channel Ultra 320 SCSI RAID Enablement Card
  33. * Embedded SCSI adapter on p615 and p655 systems
  34. *
  35. * Supported Hardware Features:
  36. * - Ultra 320 SCSI controller
  37. * - PCI-X host interface
  38. * - Embedded PowerPC RISC Processor and Hardware XOR DMA Engine
  39. * - Non-Volatile Write Cache
  40. * - Supports attachment of non-RAID disks, tape, and optical devices
  41. * - RAID Levels 0, 5, 10
  42. * - Hot spare
  43. * - Background Parity Checking
  44. * - Background Data Scrubbing
  45. * - Ability to increase the capacity of an existing RAID 5 disk array
  46. * by adding disks
  47. *
  48. * Driver Features:
  49. * - Tagged command queuing
  50. * - Adapter microcode download
  51. * - PCI hot plug
  52. * - SCSI device hot plug
  53. *
  54. */
  55. #include <linux/fs.h>
  56. #include <linux/init.h>
  57. #include <linux/types.h>
  58. #include <linux/errno.h>
  59. #include <linux/kernel.h>
  60. #include <linux/slab.h>
  61. #include <linux/vmalloc.h>
  62. #include <linux/ioport.h>
  63. #include <linux/delay.h>
  64. #include <linux/pci.h>
  65. #include <linux/wait.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/sched.h>
  68. #include <linux/interrupt.h>
  69. #include <linux/blkdev.h>
  70. #include <linux/firmware.h>
  71. #include <linux/module.h>
  72. #include <linux/moduleparam.h>
  73. #include <linux/libata.h>
  74. #include <linux/hdreg.h>
  75. #include <linux/reboot.h>
  76. #include <linux/stringify.h>
  77. #include <asm/io.h>
  78. #include <asm/irq.h>
  79. #include <asm/processor.h>
  80. #include <scsi/scsi.h>
  81. #include <scsi/scsi_host.h>
  82. #include <scsi/scsi_tcq.h>
  83. #include <scsi/scsi_eh.h>
  84. #include <scsi/scsi_cmnd.h>
  85. #include "ipr.h"
  86. /*
  87. * Global Data
  88. */
  89. static LIST_HEAD(ipr_ioa_head);
  90. static unsigned int ipr_log_level = IPR_DEFAULT_LOG_LEVEL;
  91. static unsigned int ipr_max_speed = 1;
  92. static int ipr_testmode = 0;
  93. static unsigned int ipr_fastfail = 0;
  94. static unsigned int ipr_transop_timeout = 0;
  95. static unsigned int ipr_debug = 0;
  96. static unsigned int ipr_max_devs = IPR_DEFAULT_SIS64_DEVS;
  97. static unsigned int ipr_dual_ioa_raid = 1;
  98. static unsigned int ipr_number_of_msix = 2;
  99. static DEFINE_SPINLOCK(ipr_driver_lock);
  100. /* This table describes the differences between DMA controller chips */
  101. static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
  102. { /* Gemstone, Citrine, Obsidian, and Obsidian-E */
  103. .mailbox = 0x0042C,
  104. .max_cmds = 100,
  105. .cache_line_size = 0x20,
  106. .clear_isr = 1,
  107. .iopoll_weight = 0,
  108. {
  109. .set_interrupt_mask_reg = 0x0022C,
  110. .clr_interrupt_mask_reg = 0x00230,
  111. .clr_interrupt_mask_reg32 = 0x00230,
  112. .sense_interrupt_mask_reg = 0x0022C,
  113. .sense_interrupt_mask_reg32 = 0x0022C,
  114. .clr_interrupt_reg = 0x00228,
  115. .clr_interrupt_reg32 = 0x00228,
  116. .sense_interrupt_reg = 0x00224,
  117. .sense_interrupt_reg32 = 0x00224,
  118. .ioarrin_reg = 0x00404,
  119. .sense_uproc_interrupt_reg = 0x00214,
  120. .sense_uproc_interrupt_reg32 = 0x00214,
  121. .set_uproc_interrupt_reg = 0x00214,
  122. .set_uproc_interrupt_reg32 = 0x00214,
  123. .clr_uproc_interrupt_reg = 0x00218,
  124. .clr_uproc_interrupt_reg32 = 0x00218
  125. }
  126. },
  127. { /* Snipe and Scamp */
  128. .mailbox = 0x0052C,
  129. .max_cmds = 100,
  130. .cache_line_size = 0x20,
  131. .clear_isr = 1,
  132. .iopoll_weight = 0,
  133. {
  134. .set_interrupt_mask_reg = 0x00288,
  135. .clr_interrupt_mask_reg = 0x0028C,
  136. .clr_interrupt_mask_reg32 = 0x0028C,
  137. .sense_interrupt_mask_reg = 0x00288,
  138. .sense_interrupt_mask_reg32 = 0x00288,
  139. .clr_interrupt_reg = 0x00284,
  140. .clr_interrupt_reg32 = 0x00284,
  141. .sense_interrupt_reg = 0x00280,
  142. .sense_interrupt_reg32 = 0x00280,
  143. .ioarrin_reg = 0x00504,
  144. .sense_uproc_interrupt_reg = 0x00290,
  145. .sense_uproc_interrupt_reg32 = 0x00290,
  146. .set_uproc_interrupt_reg = 0x00290,
  147. .set_uproc_interrupt_reg32 = 0x00290,
  148. .clr_uproc_interrupt_reg = 0x00294,
  149. .clr_uproc_interrupt_reg32 = 0x00294
  150. }
  151. },
  152. { /* CRoC */
  153. .mailbox = 0x00044,
  154. .max_cmds = 1000,
  155. .cache_line_size = 0x20,
  156. .clear_isr = 0,
  157. .iopoll_weight = 64,
  158. {
  159. .set_interrupt_mask_reg = 0x00010,
  160. .clr_interrupt_mask_reg = 0x00018,
  161. .clr_interrupt_mask_reg32 = 0x0001C,
  162. .sense_interrupt_mask_reg = 0x00010,
  163. .sense_interrupt_mask_reg32 = 0x00014,
  164. .clr_interrupt_reg = 0x00008,
  165. .clr_interrupt_reg32 = 0x0000C,
  166. .sense_interrupt_reg = 0x00000,
  167. .sense_interrupt_reg32 = 0x00004,
  168. .ioarrin_reg = 0x00070,
  169. .sense_uproc_interrupt_reg = 0x00020,
  170. .sense_uproc_interrupt_reg32 = 0x00024,
  171. .set_uproc_interrupt_reg = 0x00020,
  172. .set_uproc_interrupt_reg32 = 0x00024,
  173. .clr_uproc_interrupt_reg = 0x00028,
  174. .clr_uproc_interrupt_reg32 = 0x0002C,
  175. .init_feedback_reg = 0x0005C,
  176. .dump_addr_reg = 0x00064,
  177. .dump_data_reg = 0x00068,
  178. .endian_swap_reg = 0x00084
  179. }
  180. },
  181. };
  182. static const struct ipr_chip_t ipr_chip[] = {
  183. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  184. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  185. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  186. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  187. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E, IPR_USE_MSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[0] },
  188. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  189. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP, IPR_USE_LSI, IPR_SIS32, IPR_PCI_CFG, &ipr_chip_cfg[1] },
  190. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] },
  191. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE, IPR_USE_MSI, IPR_SIS64, IPR_MMIO, &ipr_chip_cfg[2] }
  192. };
  193. static int ipr_max_bus_speeds[] = {
  194. IPR_80MBs_SCSI_RATE, IPR_U160_SCSI_RATE, IPR_U320_SCSI_RATE
  195. };
  196. MODULE_AUTHOR("Brian King <brking@us.ibm.com>");
  197. MODULE_DESCRIPTION("IBM Power RAID SCSI Adapter Driver");
  198. module_param_named(max_speed, ipr_max_speed, uint, 0);
  199. MODULE_PARM_DESC(max_speed, "Maximum bus speed (0-2). Default: 1=U160. Speeds: 0=80 MB/s, 1=U160, 2=U320");
  200. module_param_named(log_level, ipr_log_level, uint, 0);
  201. MODULE_PARM_DESC(log_level, "Set to 0 - 4 for increasing verbosity of device driver");
  202. module_param_named(testmode, ipr_testmode, int, 0);
  203. MODULE_PARM_DESC(testmode, "DANGEROUS!!! Allows unsupported configurations");
  204. module_param_named(fastfail, ipr_fastfail, int, S_IRUGO | S_IWUSR);
  205. MODULE_PARM_DESC(fastfail, "Reduce timeouts and retries");
  206. module_param_named(transop_timeout, ipr_transop_timeout, int, 0);
  207. MODULE_PARM_DESC(transop_timeout, "Time in seconds to wait for adapter to come operational (default: 300)");
  208. module_param_named(debug, ipr_debug, int, S_IRUGO | S_IWUSR);
  209. MODULE_PARM_DESC(debug, "Enable device driver debugging logging. Set to 1 to enable. (default: 0)");
  210. module_param_named(dual_ioa_raid, ipr_dual_ioa_raid, int, 0);
  211. MODULE_PARM_DESC(dual_ioa_raid, "Enable dual adapter RAID support. Set to 1 to enable. (default: 1)");
  212. module_param_named(max_devs, ipr_max_devs, int, 0);
  213. MODULE_PARM_DESC(max_devs, "Specify the maximum number of physical devices. "
  214. "[Default=" __stringify(IPR_DEFAULT_SIS64_DEVS) "]");
  215. module_param_named(number_of_msix, ipr_number_of_msix, int, 0);
  216. MODULE_PARM_DESC(number_of_msix, "Specify the number of MSIX interrupts to use on capable adapters (1 - 5). (default:2)");
  217. MODULE_LICENSE("GPL");
  218. MODULE_VERSION(IPR_DRIVER_VERSION);
  219. /* A constant array of IOASCs/URCs/Error Messages */
  220. static const
  221. struct ipr_error_table_t ipr_error_table[] = {
  222. {0x00000000, 1, IPR_DEFAULT_LOG_LEVEL,
  223. "8155: An unknown error was received"},
  224. {0x00330000, 0, 0,
  225. "Soft underlength error"},
  226. {0x005A0000, 0, 0,
  227. "Command to be cancelled not found"},
  228. {0x00808000, 0, 0,
  229. "Qualified success"},
  230. {0x01080000, 1, IPR_DEFAULT_LOG_LEVEL,
  231. "FFFE: Soft device bus error recovered by the IOA"},
  232. {0x01088100, 0, IPR_DEFAULT_LOG_LEVEL,
  233. "4101: Soft device bus fabric error"},
  234. {0x01100100, 0, IPR_DEFAULT_LOG_LEVEL,
  235. "FFFC: Logical block guard error recovered by the device"},
  236. {0x01100300, 0, IPR_DEFAULT_LOG_LEVEL,
  237. "FFFC: Logical block reference tag error recovered by the device"},
  238. {0x01108300, 0, IPR_DEFAULT_LOG_LEVEL,
  239. "4171: Recovered scatter list tag / sequence number error"},
  240. {0x01109000, 0, IPR_DEFAULT_LOG_LEVEL,
  241. "FF3D: Recovered logical block CRC error on IOA to Host transfer"},
  242. {0x01109200, 0, IPR_DEFAULT_LOG_LEVEL,
  243. "4171: Recovered logical block sequence number error on IOA to Host transfer"},
  244. {0x0110A000, 0, IPR_DEFAULT_LOG_LEVEL,
  245. "FFFD: Recovered logical block reference tag error detected by the IOA"},
  246. {0x0110A100, 0, IPR_DEFAULT_LOG_LEVEL,
  247. "FFFD: Logical block guard error recovered by the IOA"},
  248. {0x01170600, 0, IPR_DEFAULT_LOG_LEVEL,
  249. "FFF9: Device sector reassign successful"},
  250. {0x01170900, 0, IPR_DEFAULT_LOG_LEVEL,
  251. "FFF7: Media error recovered by device rewrite procedures"},
  252. {0x01180200, 0, IPR_DEFAULT_LOG_LEVEL,
  253. "7001: IOA sector reassignment successful"},
  254. {0x01180500, 0, IPR_DEFAULT_LOG_LEVEL,
  255. "FFF9: Soft media error. Sector reassignment recommended"},
  256. {0x01180600, 0, IPR_DEFAULT_LOG_LEVEL,
  257. "FFF7: Media error recovered by IOA rewrite procedures"},
  258. {0x01418000, 0, IPR_DEFAULT_LOG_LEVEL,
  259. "FF3D: Soft PCI bus error recovered by the IOA"},
  260. {0x01440000, 1, IPR_DEFAULT_LOG_LEVEL,
  261. "FFF6: Device hardware error recovered by the IOA"},
  262. {0x01448100, 0, IPR_DEFAULT_LOG_LEVEL,
  263. "FFF6: Device hardware error recovered by the device"},
  264. {0x01448200, 1, IPR_DEFAULT_LOG_LEVEL,
  265. "FF3D: Soft IOA error recovered by the IOA"},
  266. {0x01448300, 0, IPR_DEFAULT_LOG_LEVEL,
  267. "FFFA: Undefined device response recovered by the IOA"},
  268. {0x014A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  269. "FFF6: Device bus error, message or command phase"},
  270. {0x014A8000, 0, IPR_DEFAULT_LOG_LEVEL,
  271. "FFFE: Task Management Function failed"},
  272. {0x015D0000, 0, IPR_DEFAULT_LOG_LEVEL,
  273. "FFF6: Failure prediction threshold exceeded"},
  274. {0x015D9200, 0, IPR_DEFAULT_LOG_LEVEL,
  275. "8009: Impending cache battery pack failure"},
  276. {0x02040100, 0, 0,
  277. "Logical Unit in process of becoming ready"},
  278. {0x02040200, 0, 0,
  279. "Initializing command required"},
  280. {0x02040400, 0, 0,
  281. "34FF: Disk device format in progress"},
  282. {0x02040C00, 0, 0,
  283. "Logical unit not accessible, target port in unavailable state"},
  284. {0x02048000, 0, IPR_DEFAULT_LOG_LEVEL,
  285. "9070: IOA requested reset"},
  286. {0x023F0000, 0, 0,
  287. "Synchronization required"},
  288. {0x02408500, 0, 0,
  289. "IOA microcode download required"},
  290. {0x02408600, 0, 0,
  291. "Device bus connection is prohibited by host"},
  292. {0x024E0000, 0, 0,
  293. "No ready, IOA shutdown"},
  294. {0x025A0000, 0, 0,
  295. "Not ready, IOA has been shutdown"},
  296. {0x02670100, 0, IPR_DEFAULT_LOG_LEVEL,
  297. "3020: Storage subsystem configuration error"},
  298. {0x03110B00, 0, 0,
  299. "FFF5: Medium error, data unreadable, recommend reassign"},
  300. {0x03110C00, 0, 0,
  301. "7000: Medium error, data unreadable, do not reassign"},
  302. {0x03310000, 0, IPR_DEFAULT_LOG_LEVEL,
  303. "FFF3: Disk media format bad"},
  304. {0x04050000, 0, IPR_DEFAULT_LOG_LEVEL,
  305. "3002: Addressed device failed to respond to selection"},
  306. {0x04080000, 1, IPR_DEFAULT_LOG_LEVEL,
  307. "3100: Device bus error"},
  308. {0x04080100, 0, IPR_DEFAULT_LOG_LEVEL,
  309. "3109: IOA timed out a device command"},
  310. {0x04088000, 0, 0,
  311. "3120: SCSI bus is not operational"},
  312. {0x04088100, 0, IPR_DEFAULT_LOG_LEVEL,
  313. "4100: Hard device bus fabric error"},
  314. {0x04100100, 0, IPR_DEFAULT_LOG_LEVEL,
  315. "310C: Logical block guard error detected by the device"},
  316. {0x04100300, 0, IPR_DEFAULT_LOG_LEVEL,
  317. "310C: Logical block reference tag error detected by the device"},
  318. {0x04108300, 1, IPR_DEFAULT_LOG_LEVEL,
  319. "4170: Scatter list tag / sequence number error"},
  320. {0x04109000, 1, IPR_DEFAULT_LOG_LEVEL,
  321. "8150: Logical block CRC error on IOA to Host transfer"},
  322. {0x04109200, 1, IPR_DEFAULT_LOG_LEVEL,
  323. "4170: Logical block sequence number error on IOA to Host transfer"},
  324. {0x0410A000, 0, IPR_DEFAULT_LOG_LEVEL,
  325. "310D: Logical block reference tag error detected by the IOA"},
  326. {0x0410A100, 0, IPR_DEFAULT_LOG_LEVEL,
  327. "310D: Logical block guard error detected by the IOA"},
  328. {0x04118000, 0, IPR_DEFAULT_LOG_LEVEL,
  329. "9000: IOA reserved area data check"},
  330. {0x04118100, 0, IPR_DEFAULT_LOG_LEVEL,
  331. "9001: IOA reserved area invalid data pattern"},
  332. {0x04118200, 0, IPR_DEFAULT_LOG_LEVEL,
  333. "9002: IOA reserved area LRC error"},
  334. {0x04118300, 1, IPR_DEFAULT_LOG_LEVEL,
  335. "Hardware Error, IOA metadata access error"},
  336. {0x04320000, 0, IPR_DEFAULT_LOG_LEVEL,
  337. "102E: Out of alternate sectors for disk storage"},
  338. {0x04330000, 1, IPR_DEFAULT_LOG_LEVEL,
  339. "FFF4: Data transfer underlength error"},
  340. {0x04338000, 1, IPR_DEFAULT_LOG_LEVEL,
  341. "FFF4: Data transfer overlength error"},
  342. {0x043E0100, 0, IPR_DEFAULT_LOG_LEVEL,
  343. "3400: Logical unit failure"},
  344. {0x04408500, 0, IPR_DEFAULT_LOG_LEVEL,
  345. "FFF4: Device microcode is corrupt"},
  346. {0x04418000, 1, IPR_DEFAULT_LOG_LEVEL,
  347. "8150: PCI bus error"},
  348. {0x04430000, 1, 0,
  349. "Unsupported device bus message received"},
  350. {0x04440000, 1, IPR_DEFAULT_LOG_LEVEL,
  351. "FFF4: Disk device problem"},
  352. {0x04448200, 1, IPR_DEFAULT_LOG_LEVEL,
  353. "8150: Permanent IOA failure"},
  354. {0x04448300, 0, IPR_DEFAULT_LOG_LEVEL,
  355. "3010: Disk device returned wrong response to IOA"},
  356. {0x04448400, 0, IPR_DEFAULT_LOG_LEVEL,
  357. "8151: IOA microcode error"},
  358. {0x04448500, 0, 0,
  359. "Device bus status error"},
  360. {0x04448600, 0, IPR_DEFAULT_LOG_LEVEL,
  361. "8157: IOA error requiring IOA reset to recover"},
  362. {0x04448700, 0, 0,
  363. "ATA device status error"},
  364. {0x04490000, 0, 0,
  365. "Message reject received from the device"},
  366. {0x04449200, 0, IPR_DEFAULT_LOG_LEVEL,
  367. "8008: A permanent cache battery pack failure occurred"},
  368. {0x0444A000, 0, IPR_DEFAULT_LOG_LEVEL,
  369. "9090: Disk unit has been modified after the last known status"},
  370. {0x0444A200, 0, IPR_DEFAULT_LOG_LEVEL,
  371. "9081: IOA detected device error"},
  372. {0x0444A300, 0, IPR_DEFAULT_LOG_LEVEL,
  373. "9082: IOA detected device error"},
  374. {0x044A0000, 1, IPR_DEFAULT_LOG_LEVEL,
  375. "3110: Device bus error, message or command phase"},
  376. {0x044A8000, 1, IPR_DEFAULT_LOG_LEVEL,
  377. "3110: SAS Command / Task Management Function failed"},
  378. {0x04670400, 0, IPR_DEFAULT_LOG_LEVEL,
  379. "9091: Incorrect hardware configuration change has been detected"},
  380. {0x04678000, 0, IPR_DEFAULT_LOG_LEVEL,
  381. "9073: Invalid multi-adapter configuration"},
  382. {0x04678100, 0, IPR_DEFAULT_LOG_LEVEL,
  383. "4010: Incorrect connection between cascaded expanders"},
  384. {0x04678200, 0, IPR_DEFAULT_LOG_LEVEL,
  385. "4020: Connections exceed IOA design limits"},
  386. {0x04678300, 0, IPR_DEFAULT_LOG_LEVEL,
  387. "4030: Incorrect multipath connection"},
  388. {0x04679000, 0, IPR_DEFAULT_LOG_LEVEL,
  389. "4110: Unsupported enclosure function"},
  390. {0x04679800, 0, IPR_DEFAULT_LOG_LEVEL,
  391. "4120: SAS cable VPD cannot be read"},
  392. {0x046E0000, 0, IPR_DEFAULT_LOG_LEVEL,
  393. "FFF4: Command to logical unit failed"},
  394. {0x05240000, 1, 0,
  395. "Illegal request, invalid request type or request packet"},
  396. {0x05250000, 0, 0,
  397. "Illegal request, invalid resource handle"},
  398. {0x05258000, 0, 0,
  399. "Illegal request, commands not allowed to this device"},
  400. {0x05258100, 0, 0,
  401. "Illegal request, command not allowed to a secondary adapter"},
  402. {0x05258200, 0, 0,
  403. "Illegal request, command not allowed to a non-optimized resource"},
  404. {0x05260000, 0, 0,
  405. "Illegal request, invalid field in parameter list"},
  406. {0x05260100, 0, 0,
  407. "Illegal request, parameter not supported"},
  408. {0x05260200, 0, 0,
  409. "Illegal request, parameter value invalid"},
  410. {0x052C0000, 0, 0,
  411. "Illegal request, command sequence error"},
  412. {0x052C8000, 1, 0,
  413. "Illegal request, dual adapter support not enabled"},
  414. {0x052C8100, 1, 0,
  415. "Illegal request, another cable connector was physically disabled"},
  416. {0x054E8000, 1, 0,
  417. "Illegal request, inconsistent group id/group count"},
  418. {0x06040500, 0, IPR_DEFAULT_LOG_LEVEL,
  419. "9031: Array protection temporarily suspended, protection resuming"},
  420. {0x06040600, 0, IPR_DEFAULT_LOG_LEVEL,
  421. "9040: Array protection temporarily suspended, protection resuming"},
  422. {0x060B0100, 0, IPR_DEFAULT_LOG_LEVEL,
  423. "4080: IOA exceeded maximum operating temperature"},
  424. {0x060B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  425. "4085: Service required"},
  426. {0x06288000, 0, IPR_DEFAULT_LOG_LEVEL,
  427. "3140: Device bus not ready to ready transition"},
  428. {0x06290000, 0, IPR_DEFAULT_LOG_LEVEL,
  429. "FFFB: SCSI bus was reset"},
  430. {0x06290500, 0, 0,
  431. "FFFE: SCSI bus transition to single ended"},
  432. {0x06290600, 0, 0,
  433. "FFFE: SCSI bus transition to LVD"},
  434. {0x06298000, 0, IPR_DEFAULT_LOG_LEVEL,
  435. "FFFB: SCSI bus was reset by another initiator"},
  436. {0x063F0300, 0, IPR_DEFAULT_LOG_LEVEL,
  437. "3029: A device replacement has occurred"},
  438. {0x063F8300, 0, IPR_DEFAULT_LOG_LEVEL,
  439. "4102: Device bus fabric performance degradation"},
  440. {0x064C8000, 0, IPR_DEFAULT_LOG_LEVEL,
  441. "9051: IOA cache data exists for a missing or failed device"},
  442. {0x064C8100, 0, IPR_DEFAULT_LOG_LEVEL,
  443. "9055: Auxiliary cache IOA contains cache data needed by the primary IOA"},
  444. {0x06670100, 0, IPR_DEFAULT_LOG_LEVEL,
  445. "9025: Disk unit is not supported at its physical location"},
  446. {0x06670600, 0, IPR_DEFAULT_LOG_LEVEL,
  447. "3020: IOA detected a SCSI bus configuration error"},
  448. {0x06678000, 0, IPR_DEFAULT_LOG_LEVEL,
  449. "3150: SCSI bus configuration error"},
  450. {0x06678100, 0, IPR_DEFAULT_LOG_LEVEL,
  451. "9074: Asymmetric advanced function disk configuration"},
  452. {0x06678300, 0, IPR_DEFAULT_LOG_LEVEL,
  453. "4040: Incomplete multipath connection between IOA and enclosure"},
  454. {0x06678400, 0, IPR_DEFAULT_LOG_LEVEL,
  455. "4041: Incomplete multipath connection between enclosure and device"},
  456. {0x06678500, 0, IPR_DEFAULT_LOG_LEVEL,
  457. "9075: Incomplete multipath connection between IOA and remote IOA"},
  458. {0x06678600, 0, IPR_DEFAULT_LOG_LEVEL,
  459. "9076: Configuration error, missing remote IOA"},
  460. {0x06679100, 0, IPR_DEFAULT_LOG_LEVEL,
  461. "4050: Enclosure does not support a required multipath function"},
  462. {0x06679800, 0, IPR_DEFAULT_LOG_LEVEL,
  463. "4121: Configuration error, required cable is missing"},
  464. {0x06679900, 0, IPR_DEFAULT_LOG_LEVEL,
  465. "4122: Cable is not plugged into the correct location on remote IOA"},
  466. {0x06679A00, 0, IPR_DEFAULT_LOG_LEVEL,
  467. "4123: Configuration error, invalid cable vital product data"},
  468. {0x06679B00, 0, IPR_DEFAULT_LOG_LEVEL,
  469. "4124: Configuration error, both cable ends are plugged into the same IOA"},
  470. {0x06690000, 0, IPR_DEFAULT_LOG_LEVEL,
  471. "4070: Logically bad block written on device"},
  472. {0x06690200, 0, IPR_DEFAULT_LOG_LEVEL,
  473. "9041: Array protection temporarily suspended"},
  474. {0x06698200, 0, IPR_DEFAULT_LOG_LEVEL,
  475. "9042: Corrupt array parity detected on specified device"},
  476. {0x066B0200, 0, IPR_DEFAULT_LOG_LEVEL,
  477. "9030: Array no longer protected due to missing or failed disk unit"},
  478. {0x066B8000, 0, IPR_DEFAULT_LOG_LEVEL,
  479. "9071: Link operational transition"},
  480. {0x066B8100, 0, IPR_DEFAULT_LOG_LEVEL,
  481. "9072: Link not operational transition"},
  482. {0x066B8200, 0, IPR_DEFAULT_LOG_LEVEL,
  483. "9032: Array exposed but still protected"},
  484. {0x066B8300, 0, IPR_DEFAULT_LOG_LEVEL + 1,
  485. "70DD: Device forced failed by disrupt device command"},
  486. {0x066B9100, 0, IPR_DEFAULT_LOG_LEVEL,
  487. "4061: Multipath redundancy level got better"},
  488. {0x066B9200, 0, IPR_DEFAULT_LOG_LEVEL,
  489. "4060: Multipath redundancy level got worse"},
  490. {0x07270000, 0, 0,
  491. "Failure due to other device"},
  492. {0x07278000, 0, IPR_DEFAULT_LOG_LEVEL,
  493. "9008: IOA does not support functions expected by devices"},
  494. {0x07278100, 0, IPR_DEFAULT_LOG_LEVEL,
  495. "9010: Cache data associated with attached devices cannot be found"},
  496. {0x07278200, 0, IPR_DEFAULT_LOG_LEVEL,
  497. "9011: Cache data belongs to devices other than those attached"},
  498. {0x07278400, 0, IPR_DEFAULT_LOG_LEVEL,
  499. "9020: Array missing 2 or more devices with only 1 device present"},
  500. {0x07278500, 0, IPR_DEFAULT_LOG_LEVEL,
  501. "9021: Array missing 2 or more devices with 2 or more devices present"},
  502. {0x07278600, 0, IPR_DEFAULT_LOG_LEVEL,
  503. "9022: Exposed array is missing a required device"},
  504. {0x07278700, 0, IPR_DEFAULT_LOG_LEVEL,
  505. "9023: Array member(s) not at required physical locations"},
  506. {0x07278800, 0, IPR_DEFAULT_LOG_LEVEL,
  507. "9024: Array not functional due to present hardware configuration"},
  508. {0x07278900, 0, IPR_DEFAULT_LOG_LEVEL,
  509. "9026: Array not functional due to present hardware configuration"},
  510. {0x07278A00, 0, IPR_DEFAULT_LOG_LEVEL,
  511. "9027: Array is missing a device and parity is out of sync"},
  512. {0x07278B00, 0, IPR_DEFAULT_LOG_LEVEL,
  513. "9028: Maximum number of arrays already exist"},
  514. {0x07278C00, 0, IPR_DEFAULT_LOG_LEVEL,
  515. "9050: Required cache data cannot be located for a disk unit"},
  516. {0x07278D00, 0, IPR_DEFAULT_LOG_LEVEL,
  517. "9052: Cache data exists for a device that has been modified"},
  518. {0x07278F00, 0, IPR_DEFAULT_LOG_LEVEL,
  519. "9054: IOA resources not available due to previous problems"},
  520. {0x07279100, 0, IPR_DEFAULT_LOG_LEVEL,
  521. "9092: Disk unit requires initialization before use"},
  522. {0x07279200, 0, IPR_DEFAULT_LOG_LEVEL,
  523. "9029: Incorrect hardware configuration change has been detected"},
  524. {0x07279600, 0, IPR_DEFAULT_LOG_LEVEL,
  525. "9060: One or more disk pairs are missing from an array"},
  526. {0x07279700, 0, IPR_DEFAULT_LOG_LEVEL,
  527. "9061: One or more disks are missing from an array"},
  528. {0x07279800, 0, IPR_DEFAULT_LOG_LEVEL,
  529. "9062: One or more disks are missing from an array"},
  530. {0x07279900, 0, IPR_DEFAULT_LOG_LEVEL,
  531. "9063: Maximum number of functional arrays has been exceeded"},
  532. {0x07279A00, 0, 0,
  533. "Data protect, other volume set problem"},
  534. {0x0B260000, 0, 0,
  535. "Aborted command, invalid descriptor"},
  536. {0x0B3F9000, 0, 0,
  537. "Target operating conditions have changed, dual adapter takeover"},
  538. {0x0B530200, 0, 0,
  539. "Aborted command, medium removal prevented"},
  540. {0x0B5A0000, 0, 0,
  541. "Command terminated by host"},
  542. {0x0B5B8000, 0, 0,
  543. "Aborted command, command terminated by host"}
  544. };
  545. static const struct ipr_ses_table_entry ipr_ses_table[] = {
  546. { "2104-DL1 ", "XXXXXXXXXXXXXXXX", 80 },
  547. { "2104-TL1 ", "XXXXXXXXXXXXXXXX", 80 },
  548. { "HSBP07M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 7 slot */
  549. { "HSBP05M P U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Hidive 5 slot */
  550. { "HSBP05M S U2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* Bowtie */
  551. { "HSBP06E ASU2SCSI", "XXXXXXXXXXXXXXXX", 80 }, /* MartinFenning */
  552. { "2104-DU3 ", "XXXXXXXXXXXXXXXX", 160 },
  553. { "2104-TU3 ", "XXXXXXXXXXXXXXXX", 160 },
  554. { "HSBP04C RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  555. { "HSBP06E RSU2SCSI", "XXXXXXX*XXXXXXXX", 160 },
  556. { "St V1S2 ", "XXXXXXXXXXXXXXXX", 160 },
  557. { "HSBPD4M PU3SCSI", "XXXXXXX*XXXXXXXX", 160 },
  558. { "VSBPD1H U3SCSI", "XXXXXXX*XXXXXXXX", 160 }
  559. };
  560. /*
  561. * Function Prototypes
  562. */
  563. static int ipr_reset_alert(struct ipr_cmnd *);
  564. static void ipr_process_ccn(struct ipr_cmnd *);
  565. static void ipr_process_error(struct ipr_cmnd *);
  566. static void ipr_reset_ioa_job(struct ipr_cmnd *);
  567. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *,
  568. enum ipr_shutdown_type);
  569. #ifdef CONFIG_SCSI_IPR_TRACE
  570. /**
  571. * ipr_trc_hook - Add a trace entry to the driver trace
  572. * @ipr_cmd: ipr command struct
  573. * @type: trace type
  574. * @add_data: additional data
  575. *
  576. * Return value:
  577. * none
  578. **/
  579. static void ipr_trc_hook(struct ipr_cmnd *ipr_cmd,
  580. u8 type, u32 add_data)
  581. {
  582. struct ipr_trace_entry *trace_entry;
  583. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  584. trace_entry = &ioa_cfg->trace[atomic_add_return
  585. (1, &ioa_cfg->trace_index)%IPR_NUM_TRACE_ENTRIES];
  586. trace_entry->time = jiffies;
  587. trace_entry->op_code = ipr_cmd->ioarcb.cmd_pkt.cdb[0];
  588. trace_entry->type = type;
  589. if (ipr_cmd->ioa_cfg->sis64)
  590. trace_entry->ata_op_code = ipr_cmd->i.ata_ioadl.regs.command;
  591. else
  592. trace_entry->ata_op_code = ipr_cmd->ioarcb.u.add_data.u.regs.command;
  593. trace_entry->cmd_index = ipr_cmd->cmd_index & 0xff;
  594. trace_entry->res_handle = ipr_cmd->ioarcb.res_handle;
  595. trace_entry->u.add_data = add_data;
  596. wmb();
  597. }
  598. #else
  599. #define ipr_trc_hook(ipr_cmd, type, add_data) do { } while (0)
  600. #endif
  601. /**
  602. * ipr_lock_and_done - Acquire lock and complete command
  603. * @ipr_cmd: ipr command struct
  604. *
  605. * Return value:
  606. * none
  607. **/
  608. static void ipr_lock_and_done(struct ipr_cmnd *ipr_cmd)
  609. {
  610. unsigned long lock_flags;
  611. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  612. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  613. ipr_cmd->done(ipr_cmd);
  614. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  615. }
  616. /**
  617. * ipr_reinit_ipr_cmnd - Re-initialize an IPR Cmnd block for reuse
  618. * @ipr_cmd: ipr command struct
  619. *
  620. * Return value:
  621. * none
  622. **/
  623. static void ipr_reinit_ipr_cmnd(struct ipr_cmnd *ipr_cmd)
  624. {
  625. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  626. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  627. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  628. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  629. int hrrq_id;
  630. hrrq_id = ioarcb->cmd_pkt.hrrq_id;
  631. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  632. ioarcb->cmd_pkt.hrrq_id = hrrq_id;
  633. ioarcb->data_transfer_length = 0;
  634. ioarcb->read_data_transfer_length = 0;
  635. ioarcb->ioadl_len = 0;
  636. ioarcb->read_ioadl_len = 0;
  637. if (ipr_cmd->ioa_cfg->sis64) {
  638. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  639. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  640. ioasa64->u.gata.status = 0;
  641. } else {
  642. ioarcb->write_ioadl_addr =
  643. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  644. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  645. ioasa->u.gata.status = 0;
  646. }
  647. ioasa->hdr.ioasc = 0;
  648. ioasa->hdr.residual_data_len = 0;
  649. ipr_cmd->scsi_cmd = NULL;
  650. ipr_cmd->qc = NULL;
  651. ipr_cmd->sense_buffer[0] = 0;
  652. ipr_cmd->dma_use_sg = 0;
  653. }
  654. /**
  655. * ipr_init_ipr_cmnd - Initialize an IPR Cmnd block
  656. * @ipr_cmd: ipr command struct
  657. *
  658. * Return value:
  659. * none
  660. **/
  661. static void ipr_init_ipr_cmnd(struct ipr_cmnd *ipr_cmd,
  662. void (*fast_done) (struct ipr_cmnd *))
  663. {
  664. ipr_reinit_ipr_cmnd(ipr_cmd);
  665. ipr_cmd->u.scratch = 0;
  666. ipr_cmd->sibling = NULL;
  667. ipr_cmd->fast_done = fast_done;
  668. init_timer(&ipr_cmd->timer);
  669. }
  670. /**
  671. * __ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block
  672. * @ioa_cfg: ioa config struct
  673. *
  674. * Return value:
  675. * pointer to ipr command struct
  676. **/
  677. static
  678. struct ipr_cmnd *__ipr_get_free_ipr_cmnd(struct ipr_hrr_queue *hrrq)
  679. {
  680. struct ipr_cmnd *ipr_cmd = NULL;
  681. if (likely(!list_empty(&hrrq->hrrq_free_q))) {
  682. ipr_cmd = list_entry(hrrq->hrrq_free_q.next,
  683. struct ipr_cmnd, queue);
  684. list_del(&ipr_cmd->queue);
  685. }
  686. return ipr_cmd;
  687. }
  688. /**
  689. * ipr_get_free_ipr_cmnd - Get a free IPR Cmnd block and initialize it
  690. * @ioa_cfg: ioa config struct
  691. *
  692. * Return value:
  693. * pointer to ipr command struct
  694. **/
  695. static
  696. struct ipr_cmnd *ipr_get_free_ipr_cmnd(struct ipr_ioa_cfg *ioa_cfg)
  697. {
  698. struct ipr_cmnd *ipr_cmd =
  699. __ipr_get_free_ipr_cmnd(&ioa_cfg->hrrq[IPR_INIT_HRRQ]);
  700. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  701. return ipr_cmd;
  702. }
  703. /**
  704. * ipr_mask_and_clear_interrupts - Mask all and clear specified interrupts
  705. * @ioa_cfg: ioa config struct
  706. * @clr_ints: interrupts to clear
  707. *
  708. * This function masks all interrupts on the adapter, then clears the
  709. * interrupts specified in the mask
  710. *
  711. * Return value:
  712. * none
  713. **/
  714. static void ipr_mask_and_clear_interrupts(struct ipr_ioa_cfg *ioa_cfg,
  715. u32 clr_ints)
  716. {
  717. volatile u32 int_reg;
  718. int i;
  719. /* Stop new interrupts */
  720. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  721. spin_lock(&ioa_cfg->hrrq[i]._lock);
  722. ioa_cfg->hrrq[i].allow_interrupts = 0;
  723. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  724. }
  725. wmb();
  726. /* Set interrupt mask to stop all new interrupts */
  727. if (ioa_cfg->sis64)
  728. writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  729. else
  730. writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
  731. /* Clear any pending interrupts */
  732. if (ioa_cfg->sis64)
  733. writel(~0, ioa_cfg->regs.clr_interrupt_reg);
  734. writel(clr_ints, ioa_cfg->regs.clr_interrupt_reg32);
  735. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  736. }
  737. /**
  738. * ipr_save_pcix_cmd_reg - Save PCI-X command register
  739. * @ioa_cfg: ioa config struct
  740. *
  741. * Return value:
  742. * 0 on success / -EIO on failure
  743. **/
  744. static int ipr_save_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  745. {
  746. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  747. if (pcix_cmd_reg == 0)
  748. return 0;
  749. if (pci_read_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  750. &ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  751. dev_err(&ioa_cfg->pdev->dev, "Failed to save PCI-X command register\n");
  752. return -EIO;
  753. }
  754. ioa_cfg->saved_pcix_cmd_reg |= PCI_X_CMD_DPERR_E | PCI_X_CMD_ERO;
  755. return 0;
  756. }
  757. /**
  758. * ipr_set_pcix_cmd_reg - Setup PCI-X command register
  759. * @ioa_cfg: ioa config struct
  760. *
  761. * Return value:
  762. * 0 on success / -EIO on failure
  763. **/
  764. static int ipr_set_pcix_cmd_reg(struct ipr_ioa_cfg *ioa_cfg)
  765. {
  766. int pcix_cmd_reg = pci_find_capability(ioa_cfg->pdev, PCI_CAP_ID_PCIX);
  767. if (pcix_cmd_reg) {
  768. if (pci_write_config_word(ioa_cfg->pdev, pcix_cmd_reg + PCI_X_CMD,
  769. ioa_cfg->saved_pcix_cmd_reg) != PCIBIOS_SUCCESSFUL) {
  770. dev_err(&ioa_cfg->pdev->dev, "Failed to setup PCI-X command register\n");
  771. return -EIO;
  772. }
  773. }
  774. return 0;
  775. }
  776. /**
  777. * ipr_sata_eh_done - done function for aborted SATA commands
  778. * @ipr_cmd: ipr command struct
  779. *
  780. * This function is invoked for ops generated to SATA
  781. * devices which are being aborted.
  782. *
  783. * Return value:
  784. * none
  785. **/
  786. static void ipr_sata_eh_done(struct ipr_cmnd *ipr_cmd)
  787. {
  788. struct ata_queued_cmd *qc = ipr_cmd->qc;
  789. struct ipr_sata_port *sata_port = qc->ap->private_data;
  790. qc->err_mask |= AC_ERR_OTHER;
  791. sata_port->ioasa.status |= ATA_BUSY;
  792. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  793. ata_qc_complete(qc);
  794. }
  795. /**
  796. * ipr_scsi_eh_done - mid-layer done function for aborted ops
  797. * @ipr_cmd: ipr command struct
  798. *
  799. * This function is invoked by the interrupt handler for
  800. * ops generated by the SCSI mid-layer which are being aborted.
  801. *
  802. * Return value:
  803. * none
  804. **/
  805. static void ipr_scsi_eh_done(struct ipr_cmnd *ipr_cmd)
  806. {
  807. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  808. scsi_cmd->result |= (DID_ERROR << 16);
  809. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  810. scsi_cmd->scsi_done(scsi_cmd);
  811. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  812. }
  813. /**
  814. * ipr_fail_all_ops - Fails all outstanding ops.
  815. * @ioa_cfg: ioa config struct
  816. *
  817. * This function fails all outstanding ops.
  818. *
  819. * Return value:
  820. * none
  821. **/
  822. static void ipr_fail_all_ops(struct ipr_ioa_cfg *ioa_cfg)
  823. {
  824. struct ipr_cmnd *ipr_cmd, *temp;
  825. struct ipr_hrr_queue *hrrq;
  826. ENTER;
  827. for_each_hrrq(hrrq, ioa_cfg) {
  828. spin_lock(&hrrq->_lock);
  829. list_for_each_entry_safe(ipr_cmd,
  830. temp, &hrrq->hrrq_pending_q, queue) {
  831. list_del(&ipr_cmd->queue);
  832. ipr_cmd->s.ioasa.hdr.ioasc =
  833. cpu_to_be32(IPR_IOASC_IOA_WAS_RESET);
  834. ipr_cmd->s.ioasa.hdr.ilid =
  835. cpu_to_be32(IPR_DRIVER_ILID);
  836. if (ipr_cmd->scsi_cmd)
  837. ipr_cmd->done = ipr_scsi_eh_done;
  838. else if (ipr_cmd->qc)
  839. ipr_cmd->done = ipr_sata_eh_done;
  840. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH,
  841. IPR_IOASC_IOA_WAS_RESET);
  842. del_timer(&ipr_cmd->timer);
  843. ipr_cmd->done(ipr_cmd);
  844. }
  845. spin_unlock(&hrrq->_lock);
  846. }
  847. LEAVE;
  848. }
  849. /**
  850. * ipr_send_command - Send driver initiated requests.
  851. * @ipr_cmd: ipr command struct
  852. *
  853. * This function sends a command to the adapter using the correct write call.
  854. * In the case of sis64, calculate the ioarcb size required. Then or in the
  855. * appropriate bits.
  856. *
  857. * Return value:
  858. * none
  859. **/
  860. static void ipr_send_command(struct ipr_cmnd *ipr_cmd)
  861. {
  862. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  863. dma_addr_t send_dma_addr = ipr_cmd->dma_addr;
  864. if (ioa_cfg->sis64) {
  865. /* The default size is 256 bytes */
  866. send_dma_addr |= 0x1;
  867. /* If the number of ioadls * size of ioadl > 128 bytes,
  868. then use a 512 byte ioarcb */
  869. if (ipr_cmd->dma_use_sg * sizeof(struct ipr_ioadl64_desc) > 128 )
  870. send_dma_addr |= 0x4;
  871. writeq(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  872. } else
  873. writel(send_dma_addr, ioa_cfg->regs.ioarrin_reg);
  874. }
  875. /**
  876. * ipr_do_req - Send driver initiated requests.
  877. * @ipr_cmd: ipr command struct
  878. * @done: done function
  879. * @timeout_func: timeout function
  880. * @timeout: timeout value
  881. *
  882. * This function sends the specified command to the adapter with the
  883. * timeout given. The done function is invoked on command completion.
  884. *
  885. * Return value:
  886. * none
  887. **/
  888. static void ipr_do_req(struct ipr_cmnd *ipr_cmd,
  889. void (*done) (struct ipr_cmnd *),
  890. void (*timeout_func) (struct ipr_cmnd *), u32 timeout)
  891. {
  892. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  893. ipr_cmd->done = done;
  894. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  895. ipr_cmd->timer.expires = jiffies + timeout;
  896. ipr_cmd->timer.function = (void (*)(unsigned long))timeout_func;
  897. add_timer(&ipr_cmd->timer);
  898. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, 0);
  899. ipr_send_command(ipr_cmd);
  900. }
  901. /**
  902. * ipr_internal_cmd_done - Op done function for an internally generated op.
  903. * @ipr_cmd: ipr command struct
  904. *
  905. * This function is the op done function for an internally generated,
  906. * blocking op. It simply wakes the sleeping thread.
  907. *
  908. * Return value:
  909. * none
  910. **/
  911. static void ipr_internal_cmd_done(struct ipr_cmnd *ipr_cmd)
  912. {
  913. if (ipr_cmd->sibling)
  914. ipr_cmd->sibling = NULL;
  915. else
  916. complete(&ipr_cmd->completion);
  917. }
  918. /**
  919. * ipr_init_ioadl - initialize the ioadl for the correct SIS type
  920. * @ipr_cmd: ipr command struct
  921. * @dma_addr: dma address
  922. * @len: transfer length
  923. * @flags: ioadl flag value
  924. *
  925. * This function initializes an ioadl in the case where there is only a single
  926. * descriptor.
  927. *
  928. * Return value:
  929. * nothing
  930. **/
  931. static void ipr_init_ioadl(struct ipr_cmnd *ipr_cmd, dma_addr_t dma_addr,
  932. u32 len, int flags)
  933. {
  934. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  935. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  936. ipr_cmd->dma_use_sg = 1;
  937. if (ipr_cmd->ioa_cfg->sis64) {
  938. ioadl64->flags = cpu_to_be32(flags);
  939. ioadl64->data_len = cpu_to_be32(len);
  940. ioadl64->address = cpu_to_be64(dma_addr);
  941. ipr_cmd->ioarcb.ioadl_len =
  942. cpu_to_be32(sizeof(struct ipr_ioadl64_desc));
  943. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  944. } else {
  945. ioadl->flags_and_data_len = cpu_to_be32(flags | len);
  946. ioadl->address = cpu_to_be32(dma_addr);
  947. if (flags == IPR_IOADL_FLAGS_READ_LAST) {
  948. ipr_cmd->ioarcb.read_ioadl_len =
  949. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  950. ipr_cmd->ioarcb.read_data_transfer_length = cpu_to_be32(len);
  951. } else {
  952. ipr_cmd->ioarcb.ioadl_len =
  953. cpu_to_be32(sizeof(struct ipr_ioadl_desc));
  954. ipr_cmd->ioarcb.data_transfer_length = cpu_to_be32(len);
  955. }
  956. }
  957. }
  958. /**
  959. * ipr_send_blocking_cmd - Send command and sleep on its completion.
  960. * @ipr_cmd: ipr command struct
  961. * @timeout_func: function to invoke if command times out
  962. * @timeout: timeout
  963. *
  964. * Return value:
  965. * none
  966. **/
  967. static void ipr_send_blocking_cmd(struct ipr_cmnd *ipr_cmd,
  968. void (*timeout_func) (struct ipr_cmnd *ipr_cmd),
  969. u32 timeout)
  970. {
  971. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  972. init_completion(&ipr_cmd->completion);
  973. ipr_do_req(ipr_cmd, ipr_internal_cmd_done, timeout_func, timeout);
  974. spin_unlock_irq(ioa_cfg->host->host_lock);
  975. wait_for_completion(&ipr_cmd->completion);
  976. spin_lock_irq(ioa_cfg->host->host_lock);
  977. }
  978. static int ipr_get_hrrq_index(struct ipr_ioa_cfg *ioa_cfg)
  979. {
  980. if (ioa_cfg->hrrq_num == 1)
  981. return 0;
  982. else
  983. return (atomic_add_return(1, &ioa_cfg->hrrq_index) % (ioa_cfg->hrrq_num - 1)) + 1;
  984. }
  985. /**
  986. * ipr_send_hcam - Send an HCAM to the adapter.
  987. * @ioa_cfg: ioa config struct
  988. * @type: HCAM type
  989. * @hostrcb: hostrcb struct
  990. *
  991. * This function will send a Host Controlled Async command to the adapter.
  992. * If HCAMs are currently not allowed to be issued to the adapter, it will
  993. * place the hostrcb on the free queue.
  994. *
  995. * Return value:
  996. * none
  997. **/
  998. static void ipr_send_hcam(struct ipr_ioa_cfg *ioa_cfg, u8 type,
  999. struct ipr_hostrcb *hostrcb)
  1000. {
  1001. struct ipr_cmnd *ipr_cmd;
  1002. struct ipr_ioarcb *ioarcb;
  1003. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  1004. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  1005. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  1006. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_pending_q);
  1007. ipr_cmd->u.hostrcb = hostrcb;
  1008. ioarcb = &ipr_cmd->ioarcb;
  1009. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  1010. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_HCAM;
  1011. ioarcb->cmd_pkt.cdb[0] = IPR_HOST_CONTROLLED_ASYNC;
  1012. ioarcb->cmd_pkt.cdb[1] = type;
  1013. ioarcb->cmd_pkt.cdb[7] = (sizeof(hostrcb->hcam) >> 8) & 0xff;
  1014. ioarcb->cmd_pkt.cdb[8] = sizeof(hostrcb->hcam) & 0xff;
  1015. ipr_init_ioadl(ipr_cmd, hostrcb->hostrcb_dma,
  1016. sizeof(hostrcb->hcam), IPR_IOADL_FLAGS_READ_LAST);
  1017. if (type == IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE)
  1018. ipr_cmd->done = ipr_process_ccn;
  1019. else
  1020. ipr_cmd->done = ipr_process_error;
  1021. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_IOA_RES_ADDR);
  1022. ipr_send_command(ipr_cmd);
  1023. } else {
  1024. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  1025. }
  1026. }
  1027. /**
  1028. * ipr_update_ata_class - Update the ata class in the resource entry
  1029. * @res: resource entry struct
  1030. * @proto: cfgte device bus protocol value
  1031. *
  1032. * Return value:
  1033. * none
  1034. **/
  1035. static void ipr_update_ata_class(struct ipr_resource_entry *res, unsigned int proto)
  1036. {
  1037. switch (proto) {
  1038. case IPR_PROTO_SATA:
  1039. case IPR_PROTO_SAS_STP:
  1040. res->ata_class = ATA_DEV_ATA;
  1041. break;
  1042. case IPR_PROTO_SATA_ATAPI:
  1043. case IPR_PROTO_SAS_STP_ATAPI:
  1044. res->ata_class = ATA_DEV_ATAPI;
  1045. break;
  1046. default:
  1047. res->ata_class = ATA_DEV_UNKNOWN;
  1048. break;
  1049. };
  1050. }
  1051. /**
  1052. * ipr_init_res_entry - Initialize a resource entry struct.
  1053. * @res: resource entry struct
  1054. * @cfgtew: config table entry wrapper struct
  1055. *
  1056. * Return value:
  1057. * none
  1058. **/
  1059. static void ipr_init_res_entry(struct ipr_resource_entry *res,
  1060. struct ipr_config_table_entry_wrapper *cfgtew)
  1061. {
  1062. int found = 0;
  1063. unsigned int proto;
  1064. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1065. struct ipr_resource_entry *gscsi_res = NULL;
  1066. res->needs_sync_complete = 0;
  1067. res->in_erp = 0;
  1068. res->add_to_ml = 0;
  1069. res->del_from_ml = 0;
  1070. res->resetting_device = 0;
  1071. res->sdev = NULL;
  1072. res->sata_port = NULL;
  1073. if (ioa_cfg->sis64) {
  1074. proto = cfgtew->u.cfgte64->proto;
  1075. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1076. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1077. res->type = cfgtew->u.cfgte64->res_type;
  1078. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1079. sizeof(res->res_path));
  1080. res->bus = 0;
  1081. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1082. sizeof(res->dev_lun.scsi_lun));
  1083. res->lun = scsilun_to_int(&res->dev_lun);
  1084. if (res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1085. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue) {
  1086. if (gscsi_res->dev_id == cfgtew->u.cfgte64->dev_id) {
  1087. found = 1;
  1088. res->target = gscsi_res->target;
  1089. break;
  1090. }
  1091. }
  1092. if (!found) {
  1093. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1094. ioa_cfg->max_devs_supported);
  1095. set_bit(res->target, ioa_cfg->target_ids);
  1096. }
  1097. } else if (res->type == IPR_RES_TYPE_IOAFP) {
  1098. res->bus = IPR_IOAFP_VIRTUAL_BUS;
  1099. res->target = 0;
  1100. } else if (res->type == IPR_RES_TYPE_ARRAY) {
  1101. res->bus = IPR_ARRAY_VIRTUAL_BUS;
  1102. res->target = find_first_zero_bit(ioa_cfg->array_ids,
  1103. ioa_cfg->max_devs_supported);
  1104. set_bit(res->target, ioa_cfg->array_ids);
  1105. } else if (res->type == IPR_RES_TYPE_VOLUME_SET) {
  1106. res->bus = IPR_VSET_VIRTUAL_BUS;
  1107. res->target = find_first_zero_bit(ioa_cfg->vset_ids,
  1108. ioa_cfg->max_devs_supported);
  1109. set_bit(res->target, ioa_cfg->vset_ids);
  1110. } else {
  1111. res->target = find_first_zero_bit(ioa_cfg->target_ids,
  1112. ioa_cfg->max_devs_supported);
  1113. set_bit(res->target, ioa_cfg->target_ids);
  1114. }
  1115. } else {
  1116. proto = cfgtew->u.cfgte->proto;
  1117. res->qmodel = IPR_QUEUEING_MODEL(res);
  1118. res->flags = cfgtew->u.cfgte->flags;
  1119. if (res->flags & IPR_IS_IOA_RESOURCE)
  1120. res->type = IPR_RES_TYPE_IOAFP;
  1121. else
  1122. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1123. res->bus = cfgtew->u.cfgte->res_addr.bus;
  1124. res->target = cfgtew->u.cfgte->res_addr.target;
  1125. res->lun = cfgtew->u.cfgte->res_addr.lun;
  1126. res->lun_wwn = get_unaligned_be64(cfgtew->u.cfgte->lun_wwn);
  1127. }
  1128. ipr_update_ata_class(res, proto);
  1129. }
  1130. /**
  1131. * ipr_is_same_device - Determine if two devices are the same.
  1132. * @res: resource entry struct
  1133. * @cfgtew: config table entry wrapper struct
  1134. *
  1135. * Return value:
  1136. * 1 if the devices are the same / 0 otherwise
  1137. **/
  1138. static int ipr_is_same_device(struct ipr_resource_entry *res,
  1139. struct ipr_config_table_entry_wrapper *cfgtew)
  1140. {
  1141. if (res->ioa_cfg->sis64) {
  1142. if (!memcmp(&res->dev_id, &cfgtew->u.cfgte64->dev_id,
  1143. sizeof(cfgtew->u.cfgte64->dev_id)) &&
  1144. !memcmp(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1145. sizeof(cfgtew->u.cfgte64->lun))) {
  1146. return 1;
  1147. }
  1148. } else {
  1149. if (res->bus == cfgtew->u.cfgte->res_addr.bus &&
  1150. res->target == cfgtew->u.cfgte->res_addr.target &&
  1151. res->lun == cfgtew->u.cfgte->res_addr.lun)
  1152. return 1;
  1153. }
  1154. return 0;
  1155. }
  1156. /**
  1157. * __ipr_format_res_path - Format the resource path for printing.
  1158. * @res_path: resource path
  1159. * @buf: buffer
  1160. * @len: length of buffer provided
  1161. *
  1162. * Return value:
  1163. * pointer to buffer
  1164. **/
  1165. static char *__ipr_format_res_path(u8 *res_path, char *buffer, int len)
  1166. {
  1167. int i;
  1168. char *p = buffer;
  1169. *p = '\0';
  1170. p += snprintf(p, buffer + len - p, "%02X", res_path[0]);
  1171. for (i = 1; res_path[i] != 0xff && ((i * 3) < len); i++)
  1172. p += snprintf(p, buffer + len - p, "-%02X", res_path[i]);
  1173. return buffer;
  1174. }
  1175. /**
  1176. * ipr_format_res_path - Format the resource path for printing.
  1177. * @ioa_cfg: ioa config struct
  1178. * @res_path: resource path
  1179. * @buf: buffer
  1180. * @len: length of buffer provided
  1181. *
  1182. * Return value:
  1183. * pointer to buffer
  1184. **/
  1185. static char *ipr_format_res_path(struct ipr_ioa_cfg *ioa_cfg,
  1186. u8 *res_path, char *buffer, int len)
  1187. {
  1188. char *p = buffer;
  1189. *p = '\0';
  1190. p += snprintf(p, buffer + len - p, "%d/", ioa_cfg->host->host_no);
  1191. __ipr_format_res_path(res_path, p, len - (buffer - p));
  1192. return buffer;
  1193. }
  1194. /**
  1195. * ipr_update_res_entry - Update the resource entry.
  1196. * @res: resource entry struct
  1197. * @cfgtew: config table entry wrapper struct
  1198. *
  1199. * Return value:
  1200. * none
  1201. **/
  1202. static void ipr_update_res_entry(struct ipr_resource_entry *res,
  1203. struct ipr_config_table_entry_wrapper *cfgtew)
  1204. {
  1205. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1206. unsigned int proto;
  1207. int new_path = 0;
  1208. if (res->ioa_cfg->sis64) {
  1209. res->flags = cfgtew->u.cfgte64->flags;
  1210. res->res_flags = cfgtew->u.cfgte64->res_flags;
  1211. res->type = cfgtew->u.cfgte64->res_type;
  1212. memcpy(&res->std_inq_data, &cfgtew->u.cfgte64->std_inq_data,
  1213. sizeof(struct ipr_std_inq_data));
  1214. res->qmodel = IPR_QUEUEING_MODEL64(res);
  1215. proto = cfgtew->u.cfgte64->proto;
  1216. res->res_handle = cfgtew->u.cfgte64->res_handle;
  1217. res->dev_id = cfgtew->u.cfgte64->dev_id;
  1218. memcpy(&res->dev_lun.scsi_lun, &cfgtew->u.cfgte64->lun,
  1219. sizeof(res->dev_lun.scsi_lun));
  1220. if (memcmp(res->res_path, &cfgtew->u.cfgte64->res_path,
  1221. sizeof(res->res_path))) {
  1222. memcpy(res->res_path, &cfgtew->u.cfgte64->res_path,
  1223. sizeof(res->res_path));
  1224. new_path = 1;
  1225. }
  1226. if (res->sdev && new_path)
  1227. sdev_printk(KERN_INFO, res->sdev, "Resource path: %s\n",
  1228. ipr_format_res_path(res->ioa_cfg,
  1229. res->res_path, buffer, sizeof(buffer)));
  1230. } else {
  1231. res->flags = cfgtew->u.cfgte->flags;
  1232. if (res->flags & IPR_IS_IOA_RESOURCE)
  1233. res->type = IPR_RES_TYPE_IOAFP;
  1234. else
  1235. res->type = cfgtew->u.cfgte->rsvd_subtype & 0x0f;
  1236. memcpy(&res->std_inq_data, &cfgtew->u.cfgte->std_inq_data,
  1237. sizeof(struct ipr_std_inq_data));
  1238. res->qmodel = IPR_QUEUEING_MODEL(res);
  1239. proto = cfgtew->u.cfgte->proto;
  1240. res->res_handle = cfgtew->u.cfgte->res_handle;
  1241. }
  1242. ipr_update_ata_class(res, proto);
  1243. }
  1244. /**
  1245. * ipr_clear_res_target - Clear the bit in the bit map representing the target
  1246. * for the resource.
  1247. * @res: resource entry struct
  1248. * @cfgtew: config table entry wrapper struct
  1249. *
  1250. * Return value:
  1251. * none
  1252. **/
  1253. static void ipr_clear_res_target(struct ipr_resource_entry *res)
  1254. {
  1255. struct ipr_resource_entry *gscsi_res = NULL;
  1256. struct ipr_ioa_cfg *ioa_cfg = res->ioa_cfg;
  1257. if (!ioa_cfg->sis64)
  1258. return;
  1259. if (res->bus == IPR_ARRAY_VIRTUAL_BUS)
  1260. clear_bit(res->target, ioa_cfg->array_ids);
  1261. else if (res->bus == IPR_VSET_VIRTUAL_BUS)
  1262. clear_bit(res->target, ioa_cfg->vset_ids);
  1263. else if (res->bus == 0 && res->type == IPR_RES_TYPE_GENERIC_SCSI) {
  1264. list_for_each_entry(gscsi_res, &ioa_cfg->used_res_q, queue)
  1265. if (gscsi_res->dev_id == res->dev_id && gscsi_res != res)
  1266. return;
  1267. clear_bit(res->target, ioa_cfg->target_ids);
  1268. } else if (res->bus == 0)
  1269. clear_bit(res->target, ioa_cfg->target_ids);
  1270. }
  1271. /**
  1272. * ipr_handle_config_change - Handle a config change from the adapter
  1273. * @ioa_cfg: ioa config struct
  1274. * @hostrcb: hostrcb
  1275. *
  1276. * Return value:
  1277. * none
  1278. **/
  1279. static void ipr_handle_config_change(struct ipr_ioa_cfg *ioa_cfg,
  1280. struct ipr_hostrcb *hostrcb)
  1281. {
  1282. struct ipr_resource_entry *res = NULL;
  1283. struct ipr_config_table_entry_wrapper cfgtew;
  1284. __be32 cc_res_handle;
  1285. u32 is_ndn = 1;
  1286. if (ioa_cfg->sis64) {
  1287. cfgtew.u.cfgte64 = &hostrcb->hcam.u.ccn.u.cfgte64;
  1288. cc_res_handle = cfgtew.u.cfgte64->res_handle;
  1289. } else {
  1290. cfgtew.u.cfgte = &hostrcb->hcam.u.ccn.u.cfgte;
  1291. cc_res_handle = cfgtew.u.cfgte->res_handle;
  1292. }
  1293. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  1294. if (res->res_handle == cc_res_handle) {
  1295. is_ndn = 0;
  1296. break;
  1297. }
  1298. }
  1299. if (is_ndn) {
  1300. if (list_empty(&ioa_cfg->free_res_q)) {
  1301. ipr_send_hcam(ioa_cfg,
  1302. IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE,
  1303. hostrcb);
  1304. return;
  1305. }
  1306. res = list_entry(ioa_cfg->free_res_q.next,
  1307. struct ipr_resource_entry, queue);
  1308. list_del(&res->queue);
  1309. ipr_init_res_entry(res, &cfgtew);
  1310. list_add_tail(&res->queue, &ioa_cfg->used_res_q);
  1311. }
  1312. ipr_update_res_entry(res, &cfgtew);
  1313. if (hostrcb->hcam.notify_type == IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY) {
  1314. if (res->sdev) {
  1315. res->del_from_ml = 1;
  1316. res->res_handle = IPR_INVALID_RES_HANDLE;
  1317. if (ioa_cfg->allow_ml_add_del)
  1318. schedule_work(&ioa_cfg->work_q);
  1319. } else {
  1320. ipr_clear_res_target(res);
  1321. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  1322. }
  1323. } else if (!res->sdev || res->del_from_ml) {
  1324. res->add_to_ml = 1;
  1325. if (ioa_cfg->allow_ml_add_del)
  1326. schedule_work(&ioa_cfg->work_q);
  1327. }
  1328. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1329. }
  1330. /**
  1331. * ipr_process_ccn - Op done function for a CCN.
  1332. * @ipr_cmd: ipr command struct
  1333. *
  1334. * This function is the op done function for a configuration
  1335. * change notification host controlled async from the adapter.
  1336. *
  1337. * Return value:
  1338. * none
  1339. **/
  1340. static void ipr_process_ccn(struct ipr_cmnd *ipr_cmd)
  1341. {
  1342. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  1343. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  1344. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  1345. list_del(&hostrcb->queue);
  1346. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  1347. if (ioasc) {
  1348. if (ioasc != IPR_IOASC_IOA_WAS_RESET)
  1349. dev_err(&ioa_cfg->pdev->dev,
  1350. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  1351. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  1352. } else {
  1353. ipr_handle_config_change(ioa_cfg, hostrcb);
  1354. }
  1355. }
  1356. /**
  1357. * strip_and_pad_whitespace - Strip and pad trailing whitespace.
  1358. * @i: index into buffer
  1359. * @buf: string to modify
  1360. *
  1361. * This function will strip all trailing whitespace, pad the end
  1362. * of the string with a single space, and NULL terminate the string.
  1363. *
  1364. * Return value:
  1365. * new length of string
  1366. **/
  1367. static int strip_and_pad_whitespace(int i, char *buf)
  1368. {
  1369. while (i && buf[i] == ' ')
  1370. i--;
  1371. buf[i+1] = ' ';
  1372. buf[i+2] = '\0';
  1373. return i + 2;
  1374. }
  1375. /**
  1376. * ipr_log_vpd_compact - Log the passed extended VPD compactly.
  1377. * @prefix: string to print at start of printk
  1378. * @hostrcb: hostrcb pointer
  1379. * @vpd: vendor/product id/sn struct
  1380. *
  1381. * Return value:
  1382. * none
  1383. **/
  1384. static void ipr_log_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1385. struct ipr_vpd *vpd)
  1386. {
  1387. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN + IPR_SERIAL_NUM_LEN + 3];
  1388. int i = 0;
  1389. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1390. i = strip_and_pad_whitespace(IPR_VENDOR_ID_LEN - 1, buffer);
  1391. memcpy(&buffer[i], vpd->vpids.product_id, IPR_PROD_ID_LEN);
  1392. i = strip_and_pad_whitespace(i + IPR_PROD_ID_LEN - 1, buffer);
  1393. memcpy(&buffer[i], vpd->sn, IPR_SERIAL_NUM_LEN);
  1394. buffer[IPR_SERIAL_NUM_LEN + i] = '\0';
  1395. ipr_hcam_err(hostrcb, "%s VPID/SN: %s\n", prefix, buffer);
  1396. }
  1397. /**
  1398. * ipr_log_vpd - Log the passed VPD to the error log.
  1399. * @vpd: vendor/product id/sn struct
  1400. *
  1401. * Return value:
  1402. * none
  1403. **/
  1404. static void ipr_log_vpd(struct ipr_vpd *vpd)
  1405. {
  1406. char buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN
  1407. + IPR_SERIAL_NUM_LEN];
  1408. memcpy(buffer, vpd->vpids.vendor_id, IPR_VENDOR_ID_LEN);
  1409. memcpy(buffer + IPR_VENDOR_ID_LEN, vpd->vpids.product_id,
  1410. IPR_PROD_ID_LEN);
  1411. buffer[IPR_VENDOR_ID_LEN + IPR_PROD_ID_LEN] = '\0';
  1412. ipr_err("Vendor/Product ID: %s\n", buffer);
  1413. memcpy(buffer, vpd->sn, IPR_SERIAL_NUM_LEN);
  1414. buffer[IPR_SERIAL_NUM_LEN] = '\0';
  1415. ipr_err(" Serial Number: %s\n", buffer);
  1416. }
  1417. /**
  1418. * ipr_log_ext_vpd_compact - Log the passed extended VPD compactly.
  1419. * @prefix: string to print at start of printk
  1420. * @hostrcb: hostrcb pointer
  1421. * @vpd: vendor/product id/sn/wwn struct
  1422. *
  1423. * Return value:
  1424. * none
  1425. **/
  1426. static void ipr_log_ext_vpd_compact(char *prefix, struct ipr_hostrcb *hostrcb,
  1427. struct ipr_ext_vpd *vpd)
  1428. {
  1429. ipr_log_vpd_compact(prefix, hostrcb, &vpd->vpd);
  1430. ipr_hcam_err(hostrcb, "%s WWN: %08X%08X\n", prefix,
  1431. be32_to_cpu(vpd->wwid[0]), be32_to_cpu(vpd->wwid[1]));
  1432. }
  1433. /**
  1434. * ipr_log_ext_vpd - Log the passed extended VPD to the error log.
  1435. * @vpd: vendor/product id/sn/wwn struct
  1436. *
  1437. * Return value:
  1438. * none
  1439. **/
  1440. static void ipr_log_ext_vpd(struct ipr_ext_vpd *vpd)
  1441. {
  1442. ipr_log_vpd(&vpd->vpd);
  1443. ipr_err(" WWN: %08X%08X\n", be32_to_cpu(vpd->wwid[0]),
  1444. be32_to_cpu(vpd->wwid[1]));
  1445. }
  1446. /**
  1447. * ipr_log_enhanced_cache_error - Log a cache error.
  1448. * @ioa_cfg: ioa config struct
  1449. * @hostrcb: hostrcb struct
  1450. *
  1451. * Return value:
  1452. * none
  1453. **/
  1454. static void ipr_log_enhanced_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1455. struct ipr_hostrcb *hostrcb)
  1456. {
  1457. struct ipr_hostrcb_type_12_error *error;
  1458. if (ioa_cfg->sis64)
  1459. error = &hostrcb->hcam.u.error64.u.type_12_error;
  1460. else
  1461. error = &hostrcb->hcam.u.error.u.type_12_error;
  1462. ipr_err("-----Current Configuration-----\n");
  1463. ipr_err("Cache Directory Card Information:\n");
  1464. ipr_log_ext_vpd(&error->ioa_vpd);
  1465. ipr_err("Adapter Card Information:\n");
  1466. ipr_log_ext_vpd(&error->cfc_vpd);
  1467. ipr_err("-----Expected Configuration-----\n");
  1468. ipr_err("Cache Directory Card Information:\n");
  1469. ipr_log_ext_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1470. ipr_err("Adapter Card Information:\n");
  1471. ipr_log_ext_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1472. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1473. be32_to_cpu(error->ioa_data[0]),
  1474. be32_to_cpu(error->ioa_data[1]),
  1475. be32_to_cpu(error->ioa_data[2]));
  1476. }
  1477. /**
  1478. * ipr_log_cache_error - Log a cache error.
  1479. * @ioa_cfg: ioa config struct
  1480. * @hostrcb: hostrcb struct
  1481. *
  1482. * Return value:
  1483. * none
  1484. **/
  1485. static void ipr_log_cache_error(struct ipr_ioa_cfg *ioa_cfg,
  1486. struct ipr_hostrcb *hostrcb)
  1487. {
  1488. struct ipr_hostrcb_type_02_error *error =
  1489. &hostrcb->hcam.u.error.u.type_02_error;
  1490. ipr_err("-----Current Configuration-----\n");
  1491. ipr_err("Cache Directory Card Information:\n");
  1492. ipr_log_vpd(&error->ioa_vpd);
  1493. ipr_err("Adapter Card Information:\n");
  1494. ipr_log_vpd(&error->cfc_vpd);
  1495. ipr_err("-----Expected Configuration-----\n");
  1496. ipr_err("Cache Directory Card Information:\n");
  1497. ipr_log_vpd(&error->ioa_last_attached_to_cfc_vpd);
  1498. ipr_err("Adapter Card Information:\n");
  1499. ipr_log_vpd(&error->cfc_last_attached_to_ioa_vpd);
  1500. ipr_err("Additional IOA Data: %08X %08X %08X\n",
  1501. be32_to_cpu(error->ioa_data[0]),
  1502. be32_to_cpu(error->ioa_data[1]),
  1503. be32_to_cpu(error->ioa_data[2]));
  1504. }
  1505. /**
  1506. * ipr_log_enhanced_config_error - Log a configuration error.
  1507. * @ioa_cfg: ioa config struct
  1508. * @hostrcb: hostrcb struct
  1509. *
  1510. * Return value:
  1511. * none
  1512. **/
  1513. static void ipr_log_enhanced_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1514. struct ipr_hostrcb *hostrcb)
  1515. {
  1516. int errors_logged, i;
  1517. struct ipr_hostrcb_device_data_entry_enhanced *dev_entry;
  1518. struct ipr_hostrcb_type_13_error *error;
  1519. error = &hostrcb->hcam.u.error.u.type_13_error;
  1520. errors_logged = be32_to_cpu(error->errors_logged);
  1521. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1522. be32_to_cpu(error->errors_detected), errors_logged);
  1523. dev_entry = error->dev;
  1524. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1525. ipr_err_separator;
  1526. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1527. ipr_log_ext_vpd(&dev_entry->vpd);
  1528. ipr_err("-----New Device Information-----\n");
  1529. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1530. ipr_err("Cache Directory Card Information:\n");
  1531. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1532. ipr_err("Adapter Card Information:\n");
  1533. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1534. }
  1535. }
  1536. /**
  1537. * ipr_log_sis64_config_error - Log a device error.
  1538. * @ioa_cfg: ioa config struct
  1539. * @hostrcb: hostrcb struct
  1540. *
  1541. * Return value:
  1542. * none
  1543. **/
  1544. static void ipr_log_sis64_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1545. struct ipr_hostrcb *hostrcb)
  1546. {
  1547. int errors_logged, i;
  1548. struct ipr_hostrcb64_device_data_entry_enhanced *dev_entry;
  1549. struct ipr_hostrcb_type_23_error *error;
  1550. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1551. error = &hostrcb->hcam.u.error64.u.type_23_error;
  1552. errors_logged = be32_to_cpu(error->errors_logged);
  1553. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1554. be32_to_cpu(error->errors_detected), errors_logged);
  1555. dev_entry = error->dev;
  1556. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1557. ipr_err_separator;
  1558. ipr_err("Device %d : %s", i + 1,
  1559. __ipr_format_res_path(dev_entry->res_path,
  1560. buffer, sizeof(buffer)));
  1561. ipr_log_ext_vpd(&dev_entry->vpd);
  1562. ipr_err("-----New Device Information-----\n");
  1563. ipr_log_ext_vpd(&dev_entry->new_vpd);
  1564. ipr_err("Cache Directory Card Information:\n");
  1565. ipr_log_ext_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1566. ipr_err("Adapter Card Information:\n");
  1567. ipr_log_ext_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1568. }
  1569. }
  1570. /**
  1571. * ipr_log_config_error - Log a configuration error.
  1572. * @ioa_cfg: ioa config struct
  1573. * @hostrcb: hostrcb struct
  1574. *
  1575. * Return value:
  1576. * none
  1577. **/
  1578. static void ipr_log_config_error(struct ipr_ioa_cfg *ioa_cfg,
  1579. struct ipr_hostrcb *hostrcb)
  1580. {
  1581. int errors_logged, i;
  1582. struct ipr_hostrcb_device_data_entry *dev_entry;
  1583. struct ipr_hostrcb_type_03_error *error;
  1584. error = &hostrcb->hcam.u.error.u.type_03_error;
  1585. errors_logged = be32_to_cpu(error->errors_logged);
  1586. ipr_err("Device Errors Detected/Logged: %d/%d\n",
  1587. be32_to_cpu(error->errors_detected), errors_logged);
  1588. dev_entry = error->dev;
  1589. for (i = 0; i < errors_logged; i++, dev_entry++) {
  1590. ipr_err_separator;
  1591. ipr_phys_res_err(ioa_cfg, dev_entry->dev_res_addr, "Device %d", i + 1);
  1592. ipr_log_vpd(&dev_entry->vpd);
  1593. ipr_err("-----New Device Information-----\n");
  1594. ipr_log_vpd(&dev_entry->new_vpd);
  1595. ipr_err("Cache Directory Card Information:\n");
  1596. ipr_log_vpd(&dev_entry->ioa_last_with_dev_vpd);
  1597. ipr_err("Adapter Card Information:\n");
  1598. ipr_log_vpd(&dev_entry->cfc_last_with_dev_vpd);
  1599. ipr_err("Additional IOA Data: %08X %08X %08X %08X %08X\n",
  1600. be32_to_cpu(dev_entry->ioa_data[0]),
  1601. be32_to_cpu(dev_entry->ioa_data[1]),
  1602. be32_to_cpu(dev_entry->ioa_data[2]),
  1603. be32_to_cpu(dev_entry->ioa_data[3]),
  1604. be32_to_cpu(dev_entry->ioa_data[4]));
  1605. }
  1606. }
  1607. /**
  1608. * ipr_log_enhanced_array_error - Log an array configuration error.
  1609. * @ioa_cfg: ioa config struct
  1610. * @hostrcb: hostrcb struct
  1611. *
  1612. * Return value:
  1613. * none
  1614. **/
  1615. static void ipr_log_enhanced_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1616. struct ipr_hostrcb *hostrcb)
  1617. {
  1618. int i, num_entries;
  1619. struct ipr_hostrcb_type_14_error *error;
  1620. struct ipr_hostrcb_array_data_entry_enhanced *array_entry;
  1621. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1622. error = &hostrcb->hcam.u.error.u.type_14_error;
  1623. ipr_err_separator;
  1624. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1625. error->protection_level,
  1626. ioa_cfg->host->host_no,
  1627. error->last_func_vset_res_addr.bus,
  1628. error->last_func_vset_res_addr.target,
  1629. error->last_func_vset_res_addr.lun);
  1630. ipr_err_separator;
  1631. array_entry = error->array_member;
  1632. num_entries = min_t(u32, be32_to_cpu(error->num_entries),
  1633. ARRAY_SIZE(error->array_member));
  1634. for (i = 0; i < num_entries; i++, array_entry++) {
  1635. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1636. continue;
  1637. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1638. ipr_err("Exposed Array Member %d:\n", i);
  1639. else
  1640. ipr_err("Array Member %d:\n", i);
  1641. ipr_log_ext_vpd(&array_entry->vpd);
  1642. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1643. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1644. "Expected Location");
  1645. ipr_err_separator;
  1646. }
  1647. }
  1648. /**
  1649. * ipr_log_array_error - Log an array configuration error.
  1650. * @ioa_cfg: ioa config struct
  1651. * @hostrcb: hostrcb struct
  1652. *
  1653. * Return value:
  1654. * none
  1655. **/
  1656. static void ipr_log_array_error(struct ipr_ioa_cfg *ioa_cfg,
  1657. struct ipr_hostrcb *hostrcb)
  1658. {
  1659. int i;
  1660. struct ipr_hostrcb_type_04_error *error;
  1661. struct ipr_hostrcb_array_data_entry *array_entry;
  1662. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  1663. error = &hostrcb->hcam.u.error.u.type_04_error;
  1664. ipr_err_separator;
  1665. ipr_err("RAID %s Array Configuration: %d:%d:%d:%d\n",
  1666. error->protection_level,
  1667. ioa_cfg->host->host_no,
  1668. error->last_func_vset_res_addr.bus,
  1669. error->last_func_vset_res_addr.target,
  1670. error->last_func_vset_res_addr.lun);
  1671. ipr_err_separator;
  1672. array_entry = error->array_member;
  1673. for (i = 0; i < 18; i++) {
  1674. if (!memcmp(array_entry->vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  1675. continue;
  1676. if (be32_to_cpu(error->exposed_mode_adn) == i)
  1677. ipr_err("Exposed Array Member %d:\n", i);
  1678. else
  1679. ipr_err("Array Member %d:\n", i);
  1680. ipr_log_vpd(&array_entry->vpd);
  1681. ipr_phys_res_err(ioa_cfg, array_entry->dev_res_addr, "Current Location");
  1682. ipr_phys_res_err(ioa_cfg, array_entry->expected_dev_res_addr,
  1683. "Expected Location");
  1684. ipr_err_separator;
  1685. if (i == 9)
  1686. array_entry = error->array_member2;
  1687. else
  1688. array_entry++;
  1689. }
  1690. }
  1691. /**
  1692. * ipr_log_hex_data - Log additional hex IOA error data.
  1693. * @ioa_cfg: ioa config struct
  1694. * @data: IOA error data
  1695. * @len: data length
  1696. *
  1697. * Return value:
  1698. * none
  1699. **/
  1700. static void ipr_log_hex_data(struct ipr_ioa_cfg *ioa_cfg, u32 *data, int len)
  1701. {
  1702. int i;
  1703. if (len == 0)
  1704. return;
  1705. if (ioa_cfg->log_level <= IPR_DEFAULT_LOG_LEVEL)
  1706. len = min_t(int, len, IPR_DEFAULT_MAX_ERROR_DUMP);
  1707. for (i = 0; i < len / 4; i += 4) {
  1708. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  1709. be32_to_cpu(data[i]),
  1710. be32_to_cpu(data[i+1]),
  1711. be32_to_cpu(data[i+2]),
  1712. be32_to_cpu(data[i+3]));
  1713. }
  1714. }
  1715. /**
  1716. * ipr_log_enhanced_dual_ioa_error - Log an enhanced dual adapter error.
  1717. * @ioa_cfg: ioa config struct
  1718. * @hostrcb: hostrcb struct
  1719. *
  1720. * Return value:
  1721. * none
  1722. **/
  1723. static void ipr_log_enhanced_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1724. struct ipr_hostrcb *hostrcb)
  1725. {
  1726. struct ipr_hostrcb_type_17_error *error;
  1727. if (ioa_cfg->sis64)
  1728. error = &hostrcb->hcam.u.error64.u.type_17_error;
  1729. else
  1730. error = &hostrcb->hcam.u.error.u.type_17_error;
  1731. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1732. strim(error->failure_reason);
  1733. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1734. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1735. ipr_log_ext_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1736. ipr_log_hex_data(ioa_cfg, error->data,
  1737. be32_to_cpu(hostrcb->hcam.length) -
  1738. (offsetof(struct ipr_hostrcb_error, u) +
  1739. offsetof(struct ipr_hostrcb_type_17_error, data)));
  1740. }
  1741. /**
  1742. * ipr_log_dual_ioa_error - Log a dual adapter error.
  1743. * @ioa_cfg: ioa config struct
  1744. * @hostrcb: hostrcb struct
  1745. *
  1746. * Return value:
  1747. * none
  1748. **/
  1749. static void ipr_log_dual_ioa_error(struct ipr_ioa_cfg *ioa_cfg,
  1750. struct ipr_hostrcb *hostrcb)
  1751. {
  1752. struct ipr_hostrcb_type_07_error *error;
  1753. error = &hostrcb->hcam.u.error.u.type_07_error;
  1754. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  1755. strim(error->failure_reason);
  1756. ipr_hcam_err(hostrcb, "%s [PRC: %08X]\n", error->failure_reason,
  1757. be32_to_cpu(hostrcb->hcam.u.error.prc));
  1758. ipr_log_vpd_compact("Remote IOA", hostrcb, &error->vpd);
  1759. ipr_log_hex_data(ioa_cfg, error->data,
  1760. be32_to_cpu(hostrcb->hcam.length) -
  1761. (offsetof(struct ipr_hostrcb_error, u) +
  1762. offsetof(struct ipr_hostrcb_type_07_error, data)));
  1763. }
  1764. static const struct {
  1765. u8 active;
  1766. char *desc;
  1767. } path_active_desc[] = {
  1768. { IPR_PATH_NO_INFO, "Path" },
  1769. { IPR_PATH_ACTIVE, "Active path" },
  1770. { IPR_PATH_NOT_ACTIVE, "Inactive path" }
  1771. };
  1772. static const struct {
  1773. u8 state;
  1774. char *desc;
  1775. } path_state_desc[] = {
  1776. { IPR_PATH_STATE_NO_INFO, "has no path state information available" },
  1777. { IPR_PATH_HEALTHY, "is healthy" },
  1778. { IPR_PATH_DEGRADED, "is degraded" },
  1779. { IPR_PATH_FAILED, "is failed" }
  1780. };
  1781. /**
  1782. * ipr_log_fabric_path - Log a fabric path error
  1783. * @hostrcb: hostrcb struct
  1784. * @fabric: fabric descriptor
  1785. *
  1786. * Return value:
  1787. * none
  1788. **/
  1789. static void ipr_log_fabric_path(struct ipr_hostrcb *hostrcb,
  1790. struct ipr_hostrcb_fabric_desc *fabric)
  1791. {
  1792. int i, j;
  1793. u8 path_state = fabric->path_state;
  1794. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1795. u8 state = path_state & IPR_PATH_STATE_MASK;
  1796. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1797. if (path_active_desc[i].active != active)
  1798. continue;
  1799. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1800. if (path_state_desc[j].state != state)
  1801. continue;
  1802. if (fabric->cascaded_expander == 0xff && fabric->phy == 0xff) {
  1803. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d\n",
  1804. path_active_desc[i].desc, path_state_desc[j].desc,
  1805. fabric->ioa_port);
  1806. } else if (fabric->cascaded_expander == 0xff) {
  1807. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Phy=%d\n",
  1808. path_active_desc[i].desc, path_state_desc[j].desc,
  1809. fabric->ioa_port, fabric->phy);
  1810. } else if (fabric->phy == 0xff) {
  1811. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d\n",
  1812. path_active_desc[i].desc, path_state_desc[j].desc,
  1813. fabric->ioa_port, fabric->cascaded_expander);
  1814. } else {
  1815. ipr_hcam_err(hostrcb, "%s %s: IOA Port=%d, Cascade=%d, Phy=%d\n",
  1816. path_active_desc[i].desc, path_state_desc[j].desc,
  1817. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1818. }
  1819. return;
  1820. }
  1821. }
  1822. ipr_err("Path state=%02X IOA Port=%d Cascade=%d Phy=%d\n", path_state,
  1823. fabric->ioa_port, fabric->cascaded_expander, fabric->phy);
  1824. }
  1825. /**
  1826. * ipr_log64_fabric_path - Log a fabric path error
  1827. * @hostrcb: hostrcb struct
  1828. * @fabric: fabric descriptor
  1829. *
  1830. * Return value:
  1831. * none
  1832. **/
  1833. static void ipr_log64_fabric_path(struct ipr_hostrcb *hostrcb,
  1834. struct ipr_hostrcb64_fabric_desc *fabric)
  1835. {
  1836. int i, j;
  1837. u8 path_state = fabric->path_state;
  1838. u8 active = path_state & IPR_PATH_ACTIVE_MASK;
  1839. u8 state = path_state & IPR_PATH_STATE_MASK;
  1840. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1841. for (i = 0; i < ARRAY_SIZE(path_active_desc); i++) {
  1842. if (path_active_desc[i].active != active)
  1843. continue;
  1844. for (j = 0; j < ARRAY_SIZE(path_state_desc); j++) {
  1845. if (path_state_desc[j].state != state)
  1846. continue;
  1847. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s\n",
  1848. path_active_desc[i].desc, path_state_desc[j].desc,
  1849. ipr_format_res_path(hostrcb->ioa_cfg,
  1850. fabric->res_path,
  1851. buffer, sizeof(buffer)));
  1852. return;
  1853. }
  1854. }
  1855. ipr_err("Path state=%02X Resource Path=%s\n", path_state,
  1856. ipr_format_res_path(hostrcb->ioa_cfg, fabric->res_path,
  1857. buffer, sizeof(buffer)));
  1858. }
  1859. static const struct {
  1860. u8 type;
  1861. char *desc;
  1862. } path_type_desc[] = {
  1863. { IPR_PATH_CFG_IOA_PORT, "IOA port" },
  1864. { IPR_PATH_CFG_EXP_PORT, "Expander port" },
  1865. { IPR_PATH_CFG_DEVICE_PORT, "Device port" },
  1866. { IPR_PATH_CFG_DEVICE_LUN, "Device LUN" }
  1867. };
  1868. static const struct {
  1869. u8 status;
  1870. char *desc;
  1871. } path_status_desc[] = {
  1872. { IPR_PATH_CFG_NO_PROB, "Functional" },
  1873. { IPR_PATH_CFG_DEGRADED, "Degraded" },
  1874. { IPR_PATH_CFG_FAILED, "Failed" },
  1875. { IPR_PATH_CFG_SUSPECT, "Suspect" },
  1876. { IPR_PATH_NOT_DETECTED, "Missing" },
  1877. { IPR_PATH_INCORRECT_CONN, "Incorrectly connected" }
  1878. };
  1879. static const char *link_rate[] = {
  1880. "unknown",
  1881. "disabled",
  1882. "phy reset problem",
  1883. "spinup hold",
  1884. "port selector",
  1885. "unknown",
  1886. "unknown",
  1887. "unknown",
  1888. "1.5Gbps",
  1889. "3.0Gbps",
  1890. "unknown",
  1891. "unknown",
  1892. "unknown",
  1893. "unknown",
  1894. "unknown",
  1895. "unknown"
  1896. };
  1897. /**
  1898. * ipr_log_path_elem - Log a fabric path element.
  1899. * @hostrcb: hostrcb struct
  1900. * @cfg: fabric path element struct
  1901. *
  1902. * Return value:
  1903. * none
  1904. **/
  1905. static void ipr_log_path_elem(struct ipr_hostrcb *hostrcb,
  1906. struct ipr_hostrcb_config_element *cfg)
  1907. {
  1908. int i, j;
  1909. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1910. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1911. if (type == IPR_PATH_CFG_NOT_EXIST)
  1912. return;
  1913. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1914. if (path_type_desc[i].type != type)
  1915. continue;
  1916. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1917. if (path_status_desc[j].status != status)
  1918. continue;
  1919. if (type == IPR_PATH_CFG_IOA_PORT) {
  1920. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, WWN=%08X%08X\n",
  1921. path_status_desc[j].desc, path_type_desc[i].desc,
  1922. cfg->phy, link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1923. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1924. } else {
  1925. if (cfg->cascaded_expander == 0xff && cfg->phy == 0xff) {
  1926. ipr_hcam_err(hostrcb, "%s %s: Link rate=%s, WWN=%08X%08X\n",
  1927. path_status_desc[j].desc, path_type_desc[i].desc,
  1928. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1929. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1930. } else if (cfg->cascaded_expander == 0xff) {
  1931. ipr_hcam_err(hostrcb, "%s %s: Phy=%d, Link rate=%s, "
  1932. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1933. path_type_desc[i].desc, cfg->phy,
  1934. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1935. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1936. } else if (cfg->phy == 0xff) {
  1937. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Link rate=%s, "
  1938. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1939. path_type_desc[i].desc, cfg->cascaded_expander,
  1940. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1941. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1942. } else {
  1943. ipr_hcam_err(hostrcb, "%s %s: Cascade=%d, Phy=%d, Link rate=%s "
  1944. "WWN=%08X%08X\n", path_status_desc[j].desc,
  1945. path_type_desc[i].desc, cfg->cascaded_expander, cfg->phy,
  1946. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1947. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1948. }
  1949. }
  1950. return;
  1951. }
  1952. }
  1953. ipr_hcam_err(hostrcb, "Path element=%02X: Cascade=%d Phy=%d Link rate=%s "
  1954. "WWN=%08X%08X\n", cfg->type_status, cfg->cascaded_expander, cfg->phy,
  1955. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1956. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1957. }
  1958. /**
  1959. * ipr_log64_path_elem - Log a fabric path element.
  1960. * @hostrcb: hostrcb struct
  1961. * @cfg: fabric path element struct
  1962. *
  1963. * Return value:
  1964. * none
  1965. **/
  1966. static void ipr_log64_path_elem(struct ipr_hostrcb *hostrcb,
  1967. struct ipr_hostrcb64_config_element *cfg)
  1968. {
  1969. int i, j;
  1970. u8 desc_id = cfg->descriptor_id & IPR_DESCRIPTOR_MASK;
  1971. u8 type = cfg->type_status & IPR_PATH_CFG_TYPE_MASK;
  1972. u8 status = cfg->type_status & IPR_PATH_CFG_STATUS_MASK;
  1973. char buffer[IPR_MAX_RES_PATH_LENGTH];
  1974. if (type == IPR_PATH_CFG_NOT_EXIST || desc_id != IPR_DESCRIPTOR_SIS64)
  1975. return;
  1976. for (i = 0; i < ARRAY_SIZE(path_type_desc); i++) {
  1977. if (path_type_desc[i].type != type)
  1978. continue;
  1979. for (j = 0; j < ARRAY_SIZE(path_status_desc); j++) {
  1980. if (path_status_desc[j].status != status)
  1981. continue;
  1982. ipr_hcam_err(hostrcb, "%s %s: Resource Path=%s, Link rate=%s, WWN=%08X%08X\n",
  1983. path_status_desc[j].desc, path_type_desc[i].desc,
  1984. ipr_format_res_path(hostrcb->ioa_cfg,
  1985. cfg->res_path, buffer, sizeof(buffer)),
  1986. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1987. be32_to_cpu(cfg->wwid[0]),
  1988. be32_to_cpu(cfg->wwid[1]));
  1989. return;
  1990. }
  1991. }
  1992. ipr_hcam_err(hostrcb, "Path element=%02X: Resource Path=%s, Link rate=%s "
  1993. "WWN=%08X%08X\n", cfg->type_status,
  1994. ipr_format_res_path(hostrcb->ioa_cfg,
  1995. cfg->res_path, buffer, sizeof(buffer)),
  1996. link_rate[cfg->link_rate & IPR_PHY_LINK_RATE_MASK],
  1997. be32_to_cpu(cfg->wwid[0]), be32_to_cpu(cfg->wwid[1]));
  1998. }
  1999. /**
  2000. * ipr_log_fabric_error - Log a fabric error.
  2001. * @ioa_cfg: ioa config struct
  2002. * @hostrcb: hostrcb struct
  2003. *
  2004. * Return value:
  2005. * none
  2006. **/
  2007. static void ipr_log_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2008. struct ipr_hostrcb *hostrcb)
  2009. {
  2010. struct ipr_hostrcb_type_20_error *error;
  2011. struct ipr_hostrcb_fabric_desc *fabric;
  2012. struct ipr_hostrcb_config_element *cfg;
  2013. int i, add_len;
  2014. error = &hostrcb->hcam.u.error.u.type_20_error;
  2015. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2016. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2017. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2018. (offsetof(struct ipr_hostrcb_error, u) +
  2019. offsetof(struct ipr_hostrcb_type_20_error, desc));
  2020. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2021. ipr_log_fabric_path(hostrcb, fabric);
  2022. for_each_fabric_cfg(fabric, cfg)
  2023. ipr_log_path_elem(hostrcb, cfg);
  2024. add_len -= be16_to_cpu(fabric->length);
  2025. fabric = (struct ipr_hostrcb_fabric_desc *)
  2026. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2027. }
  2028. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  2029. }
  2030. /**
  2031. * ipr_log_sis64_array_error - Log a sis64 array error.
  2032. * @ioa_cfg: ioa config struct
  2033. * @hostrcb: hostrcb struct
  2034. *
  2035. * Return value:
  2036. * none
  2037. **/
  2038. static void ipr_log_sis64_array_error(struct ipr_ioa_cfg *ioa_cfg,
  2039. struct ipr_hostrcb *hostrcb)
  2040. {
  2041. int i, num_entries;
  2042. struct ipr_hostrcb_type_24_error *error;
  2043. struct ipr_hostrcb64_array_data_entry *array_entry;
  2044. char buffer[IPR_MAX_RES_PATH_LENGTH];
  2045. const u8 zero_sn[IPR_SERIAL_NUM_LEN] = { [0 ... IPR_SERIAL_NUM_LEN-1] = '0' };
  2046. error = &hostrcb->hcam.u.error64.u.type_24_error;
  2047. ipr_err_separator;
  2048. ipr_err("RAID %s Array Configuration: %s\n",
  2049. error->protection_level,
  2050. ipr_format_res_path(ioa_cfg, error->last_res_path,
  2051. buffer, sizeof(buffer)));
  2052. ipr_err_separator;
  2053. array_entry = error->array_member;
  2054. num_entries = min_t(u32, error->num_entries,
  2055. ARRAY_SIZE(error->array_member));
  2056. for (i = 0; i < num_entries; i++, array_entry++) {
  2057. if (!memcmp(array_entry->vpd.vpd.sn, zero_sn, IPR_SERIAL_NUM_LEN))
  2058. continue;
  2059. if (error->exposed_mode_adn == i)
  2060. ipr_err("Exposed Array Member %d:\n", i);
  2061. else
  2062. ipr_err("Array Member %d:\n", i);
  2063. ipr_err("Array Member %d:\n", i);
  2064. ipr_log_ext_vpd(&array_entry->vpd);
  2065. ipr_err("Current Location: %s\n",
  2066. ipr_format_res_path(ioa_cfg, array_entry->res_path,
  2067. buffer, sizeof(buffer)));
  2068. ipr_err("Expected Location: %s\n",
  2069. ipr_format_res_path(ioa_cfg,
  2070. array_entry->expected_res_path,
  2071. buffer, sizeof(buffer)));
  2072. ipr_err_separator;
  2073. }
  2074. }
  2075. /**
  2076. * ipr_log_sis64_fabric_error - Log a sis64 fabric error.
  2077. * @ioa_cfg: ioa config struct
  2078. * @hostrcb: hostrcb struct
  2079. *
  2080. * Return value:
  2081. * none
  2082. **/
  2083. static void ipr_log_sis64_fabric_error(struct ipr_ioa_cfg *ioa_cfg,
  2084. struct ipr_hostrcb *hostrcb)
  2085. {
  2086. struct ipr_hostrcb_type_30_error *error;
  2087. struct ipr_hostrcb64_fabric_desc *fabric;
  2088. struct ipr_hostrcb64_config_element *cfg;
  2089. int i, add_len;
  2090. error = &hostrcb->hcam.u.error64.u.type_30_error;
  2091. error->failure_reason[sizeof(error->failure_reason) - 1] = '\0';
  2092. ipr_hcam_err(hostrcb, "%s\n", error->failure_reason);
  2093. add_len = be32_to_cpu(hostrcb->hcam.length) -
  2094. (offsetof(struct ipr_hostrcb64_error, u) +
  2095. offsetof(struct ipr_hostrcb_type_30_error, desc));
  2096. for (i = 0, fabric = error->desc; i < error->num_entries; i++) {
  2097. ipr_log64_fabric_path(hostrcb, fabric);
  2098. for_each_fabric_cfg(fabric, cfg)
  2099. ipr_log64_path_elem(hostrcb, cfg);
  2100. add_len -= be16_to_cpu(fabric->length);
  2101. fabric = (struct ipr_hostrcb64_fabric_desc *)
  2102. ((unsigned long)fabric + be16_to_cpu(fabric->length));
  2103. }
  2104. ipr_log_hex_data(ioa_cfg, (u32 *)fabric, add_len);
  2105. }
  2106. /**
  2107. * ipr_log_generic_error - Log an adapter error.
  2108. * @ioa_cfg: ioa config struct
  2109. * @hostrcb: hostrcb struct
  2110. *
  2111. * Return value:
  2112. * none
  2113. **/
  2114. static void ipr_log_generic_error(struct ipr_ioa_cfg *ioa_cfg,
  2115. struct ipr_hostrcb *hostrcb)
  2116. {
  2117. ipr_log_hex_data(ioa_cfg, hostrcb->hcam.u.raw.data,
  2118. be32_to_cpu(hostrcb->hcam.length));
  2119. }
  2120. /**
  2121. * ipr_get_error - Find the specfied IOASC in the ipr_error_table.
  2122. * @ioasc: IOASC
  2123. *
  2124. * This function will return the index of into the ipr_error_table
  2125. * for the specified IOASC. If the IOASC is not in the table,
  2126. * 0 will be returned, which points to the entry used for unknown errors.
  2127. *
  2128. * Return value:
  2129. * index into the ipr_error_table
  2130. **/
  2131. static u32 ipr_get_error(u32 ioasc)
  2132. {
  2133. int i;
  2134. for (i = 0; i < ARRAY_SIZE(ipr_error_table); i++)
  2135. if (ipr_error_table[i].ioasc == (ioasc & IPR_IOASC_IOASC_MASK))
  2136. return i;
  2137. return 0;
  2138. }
  2139. /**
  2140. * ipr_handle_log_data - Log an adapter error.
  2141. * @ioa_cfg: ioa config struct
  2142. * @hostrcb: hostrcb struct
  2143. *
  2144. * This function logs an adapter error to the system.
  2145. *
  2146. * Return value:
  2147. * none
  2148. **/
  2149. static void ipr_handle_log_data(struct ipr_ioa_cfg *ioa_cfg,
  2150. struct ipr_hostrcb *hostrcb)
  2151. {
  2152. u32 ioasc;
  2153. int error_index;
  2154. if (hostrcb->hcam.notify_type != IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY)
  2155. return;
  2156. if (hostrcb->hcam.notifications_lost == IPR_HOST_RCB_NOTIFICATIONS_LOST)
  2157. dev_err(&ioa_cfg->pdev->dev, "Error notifications lost\n");
  2158. if (ioa_cfg->sis64)
  2159. ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2160. else
  2161. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2162. if (!ioa_cfg->sis64 && (ioasc == IPR_IOASC_BUS_WAS_RESET ||
  2163. ioasc == IPR_IOASC_BUS_WAS_RESET_BY_OTHER)) {
  2164. /* Tell the midlayer we had a bus reset so it will handle the UA properly */
  2165. scsi_report_bus_reset(ioa_cfg->host,
  2166. hostrcb->hcam.u.error.fd_res_addr.bus);
  2167. }
  2168. error_index = ipr_get_error(ioasc);
  2169. if (!ipr_error_table[error_index].log_hcam)
  2170. return;
  2171. ipr_hcam_err(hostrcb, "%s\n", ipr_error_table[error_index].error);
  2172. /* Set indication we have logged an error */
  2173. ioa_cfg->errors_logged++;
  2174. if (ioa_cfg->log_level < ipr_error_table[error_index].log_hcam)
  2175. return;
  2176. if (be32_to_cpu(hostrcb->hcam.length) > sizeof(hostrcb->hcam.u.raw))
  2177. hostrcb->hcam.length = cpu_to_be32(sizeof(hostrcb->hcam.u.raw));
  2178. switch (hostrcb->hcam.overlay_id) {
  2179. case IPR_HOST_RCB_OVERLAY_ID_2:
  2180. ipr_log_cache_error(ioa_cfg, hostrcb);
  2181. break;
  2182. case IPR_HOST_RCB_OVERLAY_ID_3:
  2183. ipr_log_config_error(ioa_cfg, hostrcb);
  2184. break;
  2185. case IPR_HOST_RCB_OVERLAY_ID_4:
  2186. case IPR_HOST_RCB_OVERLAY_ID_6:
  2187. ipr_log_array_error(ioa_cfg, hostrcb);
  2188. break;
  2189. case IPR_HOST_RCB_OVERLAY_ID_7:
  2190. ipr_log_dual_ioa_error(ioa_cfg, hostrcb);
  2191. break;
  2192. case IPR_HOST_RCB_OVERLAY_ID_12:
  2193. ipr_log_enhanced_cache_error(ioa_cfg, hostrcb);
  2194. break;
  2195. case IPR_HOST_RCB_OVERLAY_ID_13:
  2196. ipr_log_enhanced_config_error(ioa_cfg, hostrcb);
  2197. break;
  2198. case IPR_HOST_RCB_OVERLAY_ID_14:
  2199. case IPR_HOST_RCB_OVERLAY_ID_16:
  2200. ipr_log_enhanced_array_error(ioa_cfg, hostrcb);
  2201. break;
  2202. case IPR_HOST_RCB_OVERLAY_ID_17:
  2203. ipr_log_enhanced_dual_ioa_error(ioa_cfg, hostrcb);
  2204. break;
  2205. case IPR_HOST_RCB_OVERLAY_ID_20:
  2206. ipr_log_fabric_error(ioa_cfg, hostrcb);
  2207. break;
  2208. case IPR_HOST_RCB_OVERLAY_ID_23:
  2209. ipr_log_sis64_config_error(ioa_cfg, hostrcb);
  2210. break;
  2211. case IPR_HOST_RCB_OVERLAY_ID_24:
  2212. case IPR_HOST_RCB_OVERLAY_ID_26:
  2213. ipr_log_sis64_array_error(ioa_cfg, hostrcb);
  2214. break;
  2215. case IPR_HOST_RCB_OVERLAY_ID_30:
  2216. ipr_log_sis64_fabric_error(ioa_cfg, hostrcb);
  2217. break;
  2218. case IPR_HOST_RCB_OVERLAY_ID_1:
  2219. case IPR_HOST_RCB_OVERLAY_ID_DEFAULT:
  2220. default:
  2221. ipr_log_generic_error(ioa_cfg, hostrcb);
  2222. break;
  2223. }
  2224. }
  2225. /**
  2226. * ipr_process_error - Op done function for an adapter error log.
  2227. * @ipr_cmd: ipr command struct
  2228. *
  2229. * This function is the op done function for an error log host
  2230. * controlled async from the adapter. It will log the error and
  2231. * send the HCAM back to the adapter.
  2232. *
  2233. * Return value:
  2234. * none
  2235. **/
  2236. static void ipr_process_error(struct ipr_cmnd *ipr_cmd)
  2237. {
  2238. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2239. struct ipr_hostrcb *hostrcb = ipr_cmd->u.hostrcb;
  2240. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  2241. u32 fd_ioasc;
  2242. if (ioa_cfg->sis64)
  2243. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error64.fd_ioasc);
  2244. else
  2245. fd_ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  2246. list_del(&hostrcb->queue);
  2247. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  2248. if (!ioasc) {
  2249. ipr_handle_log_data(ioa_cfg, hostrcb);
  2250. if (fd_ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED)
  2251. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  2252. } else if (ioasc != IPR_IOASC_IOA_WAS_RESET) {
  2253. dev_err(&ioa_cfg->pdev->dev,
  2254. "Host RCB failed with IOASC: 0x%08X\n", ioasc);
  2255. }
  2256. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  2257. }
  2258. /**
  2259. * ipr_timeout - An internally generated op has timed out.
  2260. * @ipr_cmd: ipr command struct
  2261. *
  2262. * This function blocks host requests and initiates an
  2263. * adapter reset.
  2264. *
  2265. * Return value:
  2266. * none
  2267. **/
  2268. static void ipr_timeout(struct ipr_cmnd *ipr_cmd)
  2269. {
  2270. unsigned long lock_flags = 0;
  2271. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2272. ENTER;
  2273. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2274. ioa_cfg->errors_logged++;
  2275. dev_err(&ioa_cfg->pdev->dev,
  2276. "Adapter being reset due to command timeout.\n");
  2277. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2278. ioa_cfg->sdt_state = GET_DUMP;
  2279. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd)
  2280. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2281. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2282. LEAVE;
  2283. }
  2284. /**
  2285. * ipr_oper_timeout - Adapter timed out transitioning to operational
  2286. * @ipr_cmd: ipr command struct
  2287. *
  2288. * This function blocks host requests and initiates an
  2289. * adapter reset.
  2290. *
  2291. * Return value:
  2292. * none
  2293. **/
  2294. static void ipr_oper_timeout(struct ipr_cmnd *ipr_cmd)
  2295. {
  2296. unsigned long lock_flags = 0;
  2297. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  2298. ENTER;
  2299. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2300. ioa_cfg->errors_logged++;
  2301. dev_err(&ioa_cfg->pdev->dev,
  2302. "Adapter timed out transitioning to operational.\n");
  2303. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  2304. ioa_cfg->sdt_state = GET_DUMP;
  2305. if (!ioa_cfg->in_reset_reload || ioa_cfg->reset_cmd == ipr_cmd) {
  2306. if (ipr_fastfail)
  2307. ioa_cfg->reset_retries += IPR_NUM_RESET_RELOAD_RETRIES;
  2308. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2309. }
  2310. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2311. LEAVE;
  2312. }
  2313. /**
  2314. * ipr_find_ses_entry - Find matching SES in SES table
  2315. * @res: resource entry struct of SES
  2316. *
  2317. * Return value:
  2318. * pointer to SES table entry / NULL on failure
  2319. **/
  2320. static const struct ipr_ses_table_entry *
  2321. ipr_find_ses_entry(struct ipr_resource_entry *res)
  2322. {
  2323. int i, j, matches;
  2324. struct ipr_std_inq_vpids *vpids;
  2325. const struct ipr_ses_table_entry *ste = ipr_ses_table;
  2326. for (i = 0; i < ARRAY_SIZE(ipr_ses_table); i++, ste++) {
  2327. for (j = 0, matches = 0; j < IPR_PROD_ID_LEN; j++) {
  2328. if (ste->compare_product_id_byte[j] == 'X') {
  2329. vpids = &res->std_inq_data.vpids;
  2330. if (vpids->product_id[j] == ste->product_id[j])
  2331. matches++;
  2332. else
  2333. break;
  2334. } else
  2335. matches++;
  2336. }
  2337. if (matches == IPR_PROD_ID_LEN)
  2338. return ste;
  2339. }
  2340. return NULL;
  2341. }
  2342. /**
  2343. * ipr_get_max_scsi_speed - Determine max SCSI speed for a given bus
  2344. * @ioa_cfg: ioa config struct
  2345. * @bus: SCSI bus
  2346. * @bus_width: bus width
  2347. *
  2348. * Return value:
  2349. * SCSI bus speed in units of 100KHz, 1600 is 160 MHz
  2350. * For a 2-byte wide SCSI bus, the maximum transfer speed is
  2351. * twice the maximum transfer rate (e.g. for a wide enabled bus,
  2352. * max 160MHz = max 320MB/sec).
  2353. **/
  2354. static u32 ipr_get_max_scsi_speed(struct ipr_ioa_cfg *ioa_cfg, u8 bus, u8 bus_width)
  2355. {
  2356. struct ipr_resource_entry *res;
  2357. const struct ipr_ses_table_entry *ste;
  2358. u32 max_xfer_rate = IPR_MAX_SCSI_RATE(bus_width);
  2359. /* Loop through each config table entry in the config table buffer */
  2360. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2361. if (!(IPR_IS_SES_DEVICE(res->std_inq_data)))
  2362. continue;
  2363. if (bus != res->bus)
  2364. continue;
  2365. if (!(ste = ipr_find_ses_entry(res)))
  2366. continue;
  2367. max_xfer_rate = (ste->max_bus_speed_limit * 10) / (bus_width / 8);
  2368. }
  2369. return max_xfer_rate;
  2370. }
  2371. /**
  2372. * ipr_wait_iodbg_ack - Wait for an IODEBUG ACK from the IOA
  2373. * @ioa_cfg: ioa config struct
  2374. * @max_delay: max delay in micro-seconds to wait
  2375. *
  2376. * Waits for an IODEBUG ACK from the IOA, doing busy looping.
  2377. *
  2378. * Return value:
  2379. * 0 on success / other on failure
  2380. **/
  2381. static int ipr_wait_iodbg_ack(struct ipr_ioa_cfg *ioa_cfg, int max_delay)
  2382. {
  2383. volatile u32 pcii_reg;
  2384. int delay = 1;
  2385. /* Read interrupt reg until IOA signals IO Debug Acknowledge */
  2386. while (delay < max_delay) {
  2387. pcii_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  2388. if (pcii_reg & IPR_PCII_IO_DEBUG_ACKNOWLEDGE)
  2389. return 0;
  2390. /* udelay cannot be used if delay is more than a few milliseconds */
  2391. if ((delay / 1000) > MAX_UDELAY_MS)
  2392. mdelay(delay / 1000);
  2393. else
  2394. udelay(delay);
  2395. delay += delay;
  2396. }
  2397. return -EIO;
  2398. }
  2399. /**
  2400. * ipr_get_sis64_dump_data_section - Dump IOA memory
  2401. * @ioa_cfg: ioa config struct
  2402. * @start_addr: adapter address to dump
  2403. * @dest: destination kernel buffer
  2404. * @length_in_words: length to dump in 4 byte words
  2405. *
  2406. * Return value:
  2407. * 0 on success
  2408. **/
  2409. static int ipr_get_sis64_dump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2410. u32 start_addr,
  2411. __be32 *dest, u32 length_in_words)
  2412. {
  2413. int i;
  2414. for (i = 0; i < length_in_words; i++) {
  2415. writel(start_addr+(i*4), ioa_cfg->regs.dump_addr_reg);
  2416. *dest = cpu_to_be32(readl(ioa_cfg->regs.dump_data_reg));
  2417. dest++;
  2418. }
  2419. return 0;
  2420. }
  2421. /**
  2422. * ipr_get_ldump_data_section - Dump IOA memory
  2423. * @ioa_cfg: ioa config struct
  2424. * @start_addr: adapter address to dump
  2425. * @dest: destination kernel buffer
  2426. * @length_in_words: length to dump in 4 byte words
  2427. *
  2428. * Return value:
  2429. * 0 on success / -EIO on failure
  2430. **/
  2431. static int ipr_get_ldump_data_section(struct ipr_ioa_cfg *ioa_cfg,
  2432. u32 start_addr,
  2433. __be32 *dest, u32 length_in_words)
  2434. {
  2435. volatile u32 temp_pcii_reg;
  2436. int i, delay = 0;
  2437. if (ioa_cfg->sis64)
  2438. return ipr_get_sis64_dump_data_section(ioa_cfg, start_addr,
  2439. dest, length_in_words);
  2440. /* Write IOA interrupt reg starting LDUMP state */
  2441. writel((IPR_UPROCI_RESET_ALERT | IPR_UPROCI_IO_DEBUG_ALERT),
  2442. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2443. /* Wait for IO debug acknowledge */
  2444. if (ipr_wait_iodbg_ack(ioa_cfg,
  2445. IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC)) {
  2446. dev_err(&ioa_cfg->pdev->dev,
  2447. "IOA dump long data transfer timeout\n");
  2448. return -EIO;
  2449. }
  2450. /* Signal LDUMP interlocked - clear IO debug ack */
  2451. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2452. ioa_cfg->regs.clr_interrupt_reg);
  2453. /* Write Mailbox with starting address */
  2454. writel(start_addr, ioa_cfg->ioa_mailbox);
  2455. /* Signal address valid - clear IOA Reset alert */
  2456. writel(IPR_UPROCI_RESET_ALERT,
  2457. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2458. for (i = 0; i < length_in_words; i++) {
  2459. /* Wait for IO debug acknowledge */
  2460. if (ipr_wait_iodbg_ack(ioa_cfg,
  2461. IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC)) {
  2462. dev_err(&ioa_cfg->pdev->dev,
  2463. "IOA dump short data transfer timeout\n");
  2464. return -EIO;
  2465. }
  2466. /* Read data from mailbox and increment destination pointer */
  2467. *dest = cpu_to_be32(readl(ioa_cfg->ioa_mailbox));
  2468. dest++;
  2469. /* For all but the last word of data, signal data received */
  2470. if (i < (length_in_words - 1)) {
  2471. /* Signal dump data received - Clear IO debug Ack */
  2472. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2473. ioa_cfg->regs.clr_interrupt_reg);
  2474. }
  2475. }
  2476. /* Signal end of block transfer. Set reset alert then clear IO debug ack */
  2477. writel(IPR_UPROCI_RESET_ALERT,
  2478. ioa_cfg->regs.set_uproc_interrupt_reg32);
  2479. writel(IPR_UPROCI_IO_DEBUG_ALERT,
  2480. ioa_cfg->regs.clr_uproc_interrupt_reg32);
  2481. /* Signal dump data received - Clear IO debug Ack */
  2482. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE,
  2483. ioa_cfg->regs.clr_interrupt_reg);
  2484. /* Wait for IOA to signal LDUMP exit - IOA reset alert will be cleared */
  2485. while (delay < IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC) {
  2486. temp_pcii_reg =
  2487. readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  2488. if (!(temp_pcii_reg & IPR_UPROCI_RESET_ALERT))
  2489. return 0;
  2490. udelay(10);
  2491. delay += 10;
  2492. }
  2493. return 0;
  2494. }
  2495. #ifdef CONFIG_SCSI_IPR_DUMP
  2496. /**
  2497. * ipr_sdt_copy - Copy Smart Dump Table to kernel buffer
  2498. * @ioa_cfg: ioa config struct
  2499. * @pci_address: adapter address
  2500. * @length: length of data to copy
  2501. *
  2502. * Copy data from PCI adapter to kernel buffer.
  2503. * Note: length MUST be a 4 byte multiple
  2504. * Return value:
  2505. * 0 on success / other on failure
  2506. **/
  2507. static int ipr_sdt_copy(struct ipr_ioa_cfg *ioa_cfg,
  2508. unsigned long pci_address, u32 length)
  2509. {
  2510. int bytes_copied = 0;
  2511. int cur_len, rc, rem_len, rem_page_len, max_dump_size;
  2512. __be32 *page;
  2513. unsigned long lock_flags = 0;
  2514. struct ipr_ioa_dump *ioa_dump = &ioa_cfg->dump->ioa_dump;
  2515. if (ioa_cfg->sis64)
  2516. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2517. else
  2518. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2519. while (bytes_copied < length &&
  2520. (ioa_dump->hdr.len + bytes_copied) < max_dump_size) {
  2521. if (ioa_dump->page_offset >= PAGE_SIZE ||
  2522. ioa_dump->page_offset == 0) {
  2523. page = (__be32 *)__get_free_page(GFP_ATOMIC);
  2524. if (!page) {
  2525. ipr_trace;
  2526. return bytes_copied;
  2527. }
  2528. ioa_dump->page_offset = 0;
  2529. ioa_dump->ioa_data[ioa_dump->next_page_index] = page;
  2530. ioa_dump->next_page_index++;
  2531. } else
  2532. page = ioa_dump->ioa_data[ioa_dump->next_page_index - 1];
  2533. rem_len = length - bytes_copied;
  2534. rem_page_len = PAGE_SIZE - ioa_dump->page_offset;
  2535. cur_len = min(rem_len, rem_page_len);
  2536. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2537. if (ioa_cfg->sdt_state == ABORT_DUMP) {
  2538. rc = -EIO;
  2539. } else {
  2540. rc = ipr_get_ldump_data_section(ioa_cfg,
  2541. pci_address + bytes_copied,
  2542. &page[ioa_dump->page_offset / 4],
  2543. (cur_len / sizeof(u32)));
  2544. }
  2545. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2546. if (!rc) {
  2547. ioa_dump->page_offset += cur_len;
  2548. bytes_copied += cur_len;
  2549. } else {
  2550. ipr_trace;
  2551. break;
  2552. }
  2553. schedule();
  2554. }
  2555. return bytes_copied;
  2556. }
  2557. /**
  2558. * ipr_init_dump_entry_hdr - Initialize a dump entry header.
  2559. * @hdr: dump entry header struct
  2560. *
  2561. * Return value:
  2562. * nothing
  2563. **/
  2564. static void ipr_init_dump_entry_hdr(struct ipr_dump_entry_header *hdr)
  2565. {
  2566. hdr->eye_catcher = IPR_DUMP_EYE_CATCHER;
  2567. hdr->num_elems = 1;
  2568. hdr->offset = sizeof(*hdr);
  2569. hdr->status = IPR_DUMP_STATUS_SUCCESS;
  2570. }
  2571. /**
  2572. * ipr_dump_ioa_type_data - Fill in the adapter type in the dump.
  2573. * @ioa_cfg: ioa config struct
  2574. * @driver_dump: driver dump struct
  2575. *
  2576. * Return value:
  2577. * nothing
  2578. **/
  2579. static void ipr_dump_ioa_type_data(struct ipr_ioa_cfg *ioa_cfg,
  2580. struct ipr_driver_dump *driver_dump)
  2581. {
  2582. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2583. ipr_init_dump_entry_hdr(&driver_dump->ioa_type_entry.hdr);
  2584. driver_dump->ioa_type_entry.hdr.len =
  2585. sizeof(struct ipr_dump_ioa_type_entry) -
  2586. sizeof(struct ipr_dump_entry_header);
  2587. driver_dump->ioa_type_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2588. driver_dump->ioa_type_entry.hdr.id = IPR_DUMP_DRIVER_TYPE_ID;
  2589. driver_dump->ioa_type_entry.type = ioa_cfg->type;
  2590. driver_dump->ioa_type_entry.fw_version = (ucode_vpd->major_release << 24) |
  2591. (ucode_vpd->card_type << 16) | (ucode_vpd->minor_release[0] << 8) |
  2592. ucode_vpd->minor_release[1];
  2593. driver_dump->hdr.num_entries++;
  2594. }
  2595. /**
  2596. * ipr_dump_version_data - Fill in the driver version in the dump.
  2597. * @ioa_cfg: ioa config struct
  2598. * @driver_dump: driver dump struct
  2599. *
  2600. * Return value:
  2601. * nothing
  2602. **/
  2603. static void ipr_dump_version_data(struct ipr_ioa_cfg *ioa_cfg,
  2604. struct ipr_driver_dump *driver_dump)
  2605. {
  2606. ipr_init_dump_entry_hdr(&driver_dump->version_entry.hdr);
  2607. driver_dump->version_entry.hdr.len =
  2608. sizeof(struct ipr_dump_version_entry) -
  2609. sizeof(struct ipr_dump_entry_header);
  2610. driver_dump->version_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2611. driver_dump->version_entry.hdr.id = IPR_DUMP_DRIVER_VERSION_ID;
  2612. strcpy(driver_dump->version_entry.version, IPR_DRIVER_VERSION);
  2613. driver_dump->hdr.num_entries++;
  2614. }
  2615. /**
  2616. * ipr_dump_trace_data - Fill in the IOA trace in the dump.
  2617. * @ioa_cfg: ioa config struct
  2618. * @driver_dump: driver dump struct
  2619. *
  2620. * Return value:
  2621. * nothing
  2622. **/
  2623. static void ipr_dump_trace_data(struct ipr_ioa_cfg *ioa_cfg,
  2624. struct ipr_driver_dump *driver_dump)
  2625. {
  2626. ipr_init_dump_entry_hdr(&driver_dump->trace_entry.hdr);
  2627. driver_dump->trace_entry.hdr.len =
  2628. sizeof(struct ipr_dump_trace_entry) -
  2629. sizeof(struct ipr_dump_entry_header);
  2630. driver_dump->trace_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2631. driver_dump->trace_entry.hdr.id = IPR_DUMP_TRACE_ID;
  2632. memcpy(driver_dump->trace_entry.trace, ioa_cfg->trace, IPR_TRACE_SIZE);
  2633. driver_dump->hdr.num_entries++;
  2634. }
  2635. /**
  2636. * ipr_dump_location_data - Fill in the IOA location in the dump.
  2637. * @ioa_cfg: ioa config struct
  2638. * @driver_dump: driver dump struct
  2639. *
  2640. * Return value:
  2641. * nothing
  2642. **/
  2643. static void ipr_dump_location_data(struct ipr_ioa_cfg *ioa_cfg,
  2644. struct ipr_driver_dump *driver_dump)
  2645. {
  2646. ipr_init_dump_entry_hdr(&driver_dump->location_entry.hdr);
  2647. driver_dump->location_entry.hdr.len =
  2648. sizeof(struct ipr_dump_location_entry) -
  2649. sizeof(struct ipr_dump_entry_header);
  2650. driver_dump->location_entry.hdr.data_type = IPR_DUMP_DATA_TYPE_ASCII;
  2651. driver_dump->location_entry.hdr.id = IPR_DUMP_LOCATION_ID;
  2652. strcpy(driver_dump->location_entry.location, dev_name(&ioa_cfg->pdev->dev));
  2653. driver_dump->hdr.num_entries++;
  2654. }
  2655. /**
  2656. * ipr_get_ioa_dump - Perform a dump of the driver and adapter.
  2657. * @ioa_cfg: ioa config struct
  2658. * @dump: dump struct
  2659. *
  2660. * Return value:
  2661. * nothing
  2662. **/
  2663. static void ipr_get_ioa_dump(struct ipr_ioa_cfg *ioa_cfg, struct ipr_dump *dump)
  2664. {
  2665. unsigned long start_addr, sdt_word;
  2666. unsigned long lock_flags = 0;
  2667. struct ipr_driver_dump *driver_dump = &dump->driver_dump;
  2668. struct ipr_ioa_dump *ioa_dump = &dump->ioa_dump;
  2669. u32 num_entries, max_num_entries, start_off, end_off;
  2670. u32 max_dump_size, bytes_to_copy, bytes_copied, rc;
  2671. struct ipr_sdt *sdt;
  2672. int valid = 1;
  2673. int i;
  2674. ENTER;
  2675. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2676. if (ioa_cfg->sdt_state != READ_DUMP) {
  2677. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2678. return;
  2679. }
  2680. if (ioa_cfg->sis64) {
  2681. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2682. ssleep(IPR_DUMP_DELAY_SECONDS);
  2683. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2684. }
  2685. start_addr = readl(ioa_cfg->ioa_mailbox);
  2686. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(start_addr)) {
  2687. dev_err(&ioa_cfg->pdev->dev,
  2688. "Invalid dump table format: %lx\n", start_addr);
  2689. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2690. return;
  2691. }
  2692. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA initiated\n");
  2693. driver_dump->hdr.eye_catcher = IPR_DUMP_EYE_CATCHER;
  2694. /* Initialize the overall dump header */
  2695. driver_dump->hdr.len = sizeof(struct ipr_driver_dump);
  2696. driver_dump->hdr.num_entries = 1;
  2697. driver_dump->hdr.first_entry_offset = sizeof(struct ipr_dump_header);
  2698. driver_dump->hdr.status = IPR_DUMP_STATUS_SUCCESS;
  2699. driver_dump->hdr.os = IPR_DUMP_OS_LINUX;
  2700. driver_dump->hdr.driver_name = IPR_DUMP_DRIVER_NAME;
  2701. ipr_dump_version_data(ioa_cfg, driver_dump);
  2702. ipr_dump_location_data(ioa_cfg, driver_dump);
  2703. ipr_dump_ioa_type_data(ioa_cfg, driver_dump);
  2704. ipr_dump_trace_data(ioa_cfg, driver_dump);
  2705. /* Update dump_header */
  2706. driver_dump->hdr.len += sizeof(struct ipr_dump_entry_header);
  2707. /* IOA Dump entry */
  2708. ipr_init_dump_entry_hdr(&ioa_dump->hdr);
  2709. ioa_dump->hdr.len = 0;
  2710. ioa_dump->hdr.data_type = IPR_DUMP_DATA_TYPE_BINARY;
  2711. ioa_dump->hdr.id = IPR_DUMP_IOA_DUMP_ID;
  2712. /* First entries in sdt are actually a list of dump addresses and
  2713. lengths to gather the real dump data. sdt represents the pointer
  2714. to the ioa generated dump table. Dump data will be extracted based
  2715. on entries in this table */
  2716. sdt = &ioa_dump->sdt;
  2717. if (ioa_cfg->sis64) {
  2718. max_num_entries = IPR_FMT3_NUM_SDT_ENTRIES;
  2719. max_dump_size = IPR_FMT3_MAX_IOA_DUMP_SIZE;
  2720. } else {
  2721. max_num_entries = IPR_FMT2_NUM_SDT_ENTRIES;
  2722. max_dump_size = IPR_FMT2_MAX_IOA_DUMP_SIZE;
  2723. }
  2724. bytes_to_copy = offsetof(struct ipr_sdt, entry) +
  2725. (max_num_entries * sizeof(struct ipr_sdt_entry));
  2726. rc = ipr_get_ldump_data_section(ioa_cfg, start_addr, (__be32 *)sdt,
  2727. bytes_to_copy / sizeof(__be32));
  2728. /* Smart Dump table is ready to use and the first entry is valid */
  2729. if (rc || ((be32_to_cpu(sdt->hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  2730. (be32_to_cpu(sdt->hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  2731. dev_err(&ioa_cfg->pdev->dev,
  2732. "Dump of IOA failed. Dump table not valid: %d, %X.\n",
  2733. rc, be32_to_cpu(sdt->hdr.state));
  2734. driver_dump->hdr.status = IPR_DUMP_STATUS_FAILED;
  2735. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2736. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2737. return;
  2738. }
  2739. num_entries = be32_to_cpu(sdt->hdr.num_entries_used);
  2740. if (num_entries > max_num_entries)
  2741. num_entries = max_num_entries;
  2742. /* Update dump length to the actual data to be copied */
  2743. dump->driver_dump.hdr.len += sizeof(struct ipr_sdt_header);
  2744. if (ioa_cfg->sis64)
  2745. dump->driver_dump.hdr.len += num_entries * sizeof(struct ipr_sdt_entry);
  2746. else
  2747. dump->driver_dump.hdr.len += max_num_entries * sizeof(struct ipr_sdt_entry);
  2748. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2749. for (i = 0; i < num_entries; i++) {
  2750. if (ioa_dump->hdr.len > max_dump_size) {
  2751. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2752. break;
  2753. }
  2754. if (sdt->entry[i].flags & IPR_SDT_VALID_ENTRY) {
  2755. sdt_word = be32_to_cpu(sdt->entry[i].start_token);
  2756. if (ioa_cfg->sis64)
  2757. bytes_to_copy = be32_to_cpu(sdt->entry[i].end_token);
  2758. else {
  2759. start_off = sdt_word & IPR_FMT2_MBX_ADDR_MASK;
  2760. end_off = be32_to_cpu(sdt->entry[i].end_token);
  2761. if (ipr_sdt_is_fmt2(sdt_word) && sdt_word)
  2762. bytes_to_copy = end_off - start_off;
  2763. else
  2764. valid = 0;
  2765. }
  2766. if (valid) {
  2767. if (bytes_to_copy > max_dump_size) {
  2768. sdt->entry[i].flags &= ~IPR_SDT_VALID_ENTRY;
  2769. continue;
  2770. }
  2771. /* Copy data from adapter to driver buffers */
  2772. bytes_copied = ipr_sdt_copy(ioa_cfg, sdt_word,
  2773. bytes_to_copy);
  2774. ioa_dump->hdr.len += bytes_copied;
  2775. if (bytes_copied != bytes_to_copy) {
  2776. driver_dump->hdr.status = IPR_DUMP_STATUS_QUAL_SUCCESS;
  2777. break;
  2778. }
  2779. }
  2780. }
  2781. }
  2782. dev_err(&ioa_cfg->pdev->dev, "Dump of IOA completed.\n");
  2783. /* Update dump_header */
  2784. driver_dump->hdr.len += ioa_dump->hdr.len;
  2785. wmb();
  2786. ioa_cfg->sdt_state = DUMP_OBTAINED;
  2787. LEAVE;
  2788. }
  2789. #else
  2790. #define ipr_get_ioa_dump(ioa_cfg, dump) do { } while (0)
  2791. #endif
  2792. /**
  2793. * ipr_release_dump - Free adapter dump memory
  2794. * @kref: kref struct
  2795. *
  2796. * Return value:
  2797. * nothing
  2798. **/
  2799. static void ipr_release_dump(struct kref *kref)
  2800. {
  2801. struct ipr_dump *dump = container_of(kref, struct ipr_dump, kref);
  2802. struct ipr_ioa_cfg *ioa_cfg = dump->ioa_cfg;
  2803. unsigned long lock_flags = 0;
  2804. int i;
  2805. ENTER;
  2806. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2807. ioa_cfg->dump = NULL;
  2808. ioa_cfg->sdt_state = INACTIVE;
  2809. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2810. for (i = 0; i < dump->ioa_dump.next_page_index; i++)
  2811. free_page((unsigned long) dump->ioa_dump.ioa_data[i]);
  2812. vfree(dump->ioa_dump.ioa_data);
  2813. kfree(dump);
  2814. LEAVE;
  2815. }
  2816. /**
  2817. * ipr_worker_thread - Worker thread
  2818. * @work: ioa config struct
  2819. *
  2820. * Called at task level from a work thread. This function takes care
  2821. * of adding and removing device from the mid-layer as configuration
  2822. * changes are detected by the adapter.
  2823. *
  2824. * Return value:
  2825. * nothing
  2826. **/
  2827. static void ipr_worker_thread(struct work_struct *work)
  2828. {
  2829. unsigned long lock_flags;
  2830. struct ipr_resource_entry *res;
  2831. struct scsi_device *sdev;
  2832. struct ipr_dump *dump;
  2833. struct ipr_ioa_cfg *ioa_cfg =
  2834. container_of(work, struct ipr_ioa_cfg, work_q);
  2835. u8 bus, target, lun;
  2836. int did_work;
  2837. ENTER;
  2838. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2839. if (ioa_cfg->sdt_state == READ_DUMP) {
  2840. dump = ioa_cfg->dump;
  2841. if (!dump) {
  2842. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2843. return;
  2844. }
  2845. kref_get(&dump->kref);
  2846. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2847. ipr_get_ioa_dump(ioa_cfg, dump);
  2848. kref_put(&dump->kref, ipr_release_dump);
  2849. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2850. if (ioa_cfg->sdt_state == DUMP_OBTAINED && !ioa_cfg->dump_timeout)
  2851. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  2852. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2853. return;
  2854. }
  2855. restart:
  2856. do {
  2857. did_work = 0;
  2858. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds ||
  2859. !ioa_cfg->allow_ml_add_del) {
  2860. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2861. return;
  2862. }
  2863. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2864. if (res->del_from_ml && res->sdev) {
  2865. did_work = 1;
  2866. sdev = res->sdev;
  2867. if (!scsi_device_get(sdev)) {
  2868. if (!res->add_to_ml)
  2869. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  2870. else
  2871. res->del_from_ml = 0;
  2872. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2873. scsi_remove_device(sdev);
  2874. scsi_device_put(sdev);
  2875. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2876. }
  2877. break;
  2878. }
  2879. }
  2880. } while (did_work);
  2881. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  2882. if (res->add_to_ml) {
  2883. bus = res->bus;
  2884. target = res->target;
  2885. lun = res->lun;
  2886. res->add_to_ml = 0;
  2887. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2888. scsi_add_device(ioa_cfg->host, bus, target, lun);
  2889. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2890. goto restart;
  2891. }
  2892. }
  2893. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2894. kobject_uevent(&ioa_cfg->host->shost_dev.kobj, KOBJ_CHANGE);
  2895. LEAVE;
  2896. }
  2897. #ifdef CONFIG_SCSI_IPR_TRACE
  2898. /**
  2899. * ipr_read_trace - Dump the adapter trace
  2900. * @filp: open sysfs file
  2901. * @kobj: kobject struct
  2902. * @bin_attr: bin_attribute struct
  2903. * @buf: buffer
  2904. * @off: offset
  2905. * @count: buffer size
  2906. *
  2907. * Return value:
  2908. * number of bytes printed to buffer
  2909. **/
  2910. static ssize_t ipr_read_trace(struct file *filp, struct kobject *kobj,
  2911. struct bin_attribute *bin_attr,
  2912. char *buf, loff_t off, size_t count)
  2913. {
  2914. struct device *dev = container_of(kobj, struct device, kobj);
  2915. struct Scsi_Host *shost = class_to_shost(dev);
  2916. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2917. unsigned long lock_flags = 0;
  2918. ssize_t ret;
  2919. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2920. ret = memory_read_from_buffer(buf, count, &off, ioa_cfg->trace,
  2921. IPR_TRACE_SIZE);
  2922. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2923. return ret;
  2924. }
  2925. static struct bin_attribute ipr_trace_attr = {
  2926. .attr = {
  2927. .name = "trace",
  2928. .mode = S_IRUGO,
  2929. },
  2930. .size = 0,
  2931. .read = ipr_read_trace,
  2932. };
  2933. #endif
  2934. /**
  2935. * ipr_show_fw_version - Show the firmware version
  2936. * @dev: class device struct
  2937. * @buf: buffer
  2938. *
  2939. * Return value:
  2940. * number of bytes printed to buffer
  2941. **/
  2942. static ssize_t ipr_show_fw_version(struct device *dev,
  2943. struct device_attribute *attr, char *buf)
  2944. {
  2945. struct Scsi_Host *shost = class_to_shost(dev);
  2946. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2947. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  2948. unsigned long lock_flags = 0;
  2949. int len;
  2950. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2951. len = snprintf(buf, PAGE_SIZE, "%02X%02X%02X%02X\n",
  2952. ucode_vpd->major_release, ucode_vpd->card_type,
  2953. ucode_vpd->minor_release[0],
  2954. ucode_vpd->minor_release[1]);
  2955. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2956. return len;
  2957. }
  2958. static struct device_attribute ipr_fw_version_attr = {
  2959. .attr = {
  2960. .name = "fw_version",
  2961. .mode = S_IRUGO,
  2962. },
  2963. .show = ipr_show_fw_version,
  2964. };
  2965. /**
  2966. * ipr_show_log_level - Show the adapter's error logging level
  2967. * @dev: class device struct
  2968. * @buf: buffer
  2969. *
  2970. * Return value:
  2971. * number of bytes printed to buffer
  2972. **/
  2973. static ssize_t ipr_show_log_level(struct device *dev,
  2974. struct device_attribute *attr, char *buf)
  2975. {
  2976. struct Scsi_Host *shost = class_to_shost(dev);
  2977. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2978. unsigned long lock_flags = 0;
  2979. int len;
  2980. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  2981. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->log_level);
  2982. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  2983. return len;
  2984. }
  2985. /**
  2986. * ipr_store_log_level - Change the adapter's error logging level
  2987. * @dev: class device struct
  2988. * @buf: buffer
  2989. *
  2990. * Return value:
  2991. * number of bytes printed to buffer
  2992. **/
  2993. static ssize_t ipr_store_log_level(struct device *dev,
  2994. struct device_attribute *attr,
  2995. const char *buf, size_t count)
  2996. {
  2997. struct Scsi_Host *shost = class_to_shost(dev);
  2998. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  2999. unsigned long lock_flags = 0;
  3000. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3001. ioa_cfg->log_level = simple_strtoul(buf, NULL, 10);
  3002. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3003. return strlen(buf);
  3004. }
  3005. static struct device_attribute ipr_log_level_attr = {
  3006. .attr = {
  3007. .name = "log_level",
  3008. .mode = S_IRUGO | S_IWUSR,
  3009. },
  3010. .show = ipr_show_log_level,
  3011. .store = ipr_store_log_level
  3012. };
  3013. /**
  3014. * ipr_store_diagnostics - IOA Diagnostics interface
  3015. * @dev: device struct
  3016. * @buf: buffer
  3017. * @count: buffer size
  3018. *
  3019. * This function will reset the adapter and wait a reasonable
  3020. * amount of time for any errors that the adapter might log.
  3021. *
  3022. * Return value:
  3023. * count on success / other on failure
  3024. **/
  3025. static ssize_t ipr_store_diagnostics(struct device *dev,
  3026. struct device_attribute *attr,
  3027. const char *buf, size_t count)
  3028. {
  3029. struct Scsi_Host *shost = class_to_shost(dev);
  3030. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3031. unsigned long lock_flags = 0;
  3032. int rc = count;
  3033. if (!capable(CAP_SYS_ADMIN))
  3034. return -EACCES;
  3035. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3036. while (ioa_cfg->in_reset_reload) {
  3037. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3038. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3039. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3040. }
  3041. ioa_cfg->errors_logged = 0;
  3042. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3043. if (ioa_cfg->in_reset_reload) {
  3044. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3045. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3046. /* Wait for a second for any errors to be logged */
  3047. msleep(1000);
  3048. } else {
  3049. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3050. return -EIO;
  3051. }
  3052. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3053. if (ioa_cfg->in_reset_reload || ioa_cfg->errors_logged)
  3054. rc = -EIO;
  3055. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3056. return rc;
  3057. }
  3058. static struct device_attribute ipr_diagnostics_attr = {
  3059. .attr = {
  3060. .name = "run_diagnostics",
  3061. .mode = S_IWUSR,
  3062. },
  3063. .store = ipr_store_diagnostics
  3064. };
  3065. /**
  3066. * ipr_show_adapter_state - Show the adapter's state
  3067. * @class_dev: device struct
  3068. * @buf: buffer
  3069. *
  3070. * Return value:
  3071. * number of bytes printed to buffer
  3072. **/
  3073. static ssize_t ipr_show_adapter_state(struct device *dev,
  3074. struct device_attribute *attr, char *buf)
  3075. {
  3076. struct Scsi_Host *shost = class_to_shost(dev);
  3077. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3078. unsigned long lock_flags = 0;
  3079. int len;
  3080. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3081. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  3082. len = snprintf(buf, PAGE_SIZE, "offline\n");
  3083. else
  3084. len = snprintf(buf, PAGE_SIZE, "online\n");
  3085. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3086. return len;
  3087. }
  3088. /**
  3089. * ipr_store_adapter_state - Change adapter state
  3090. * @dev: device struct
  3091. * @buf: buffer
  3092. * @count: buffer size
  3093. *
  3094. * This function will change the adapter's state.
  3095. *
  3096. * Return value:
  3097. * count on success / other on failure
  3098. **/
  3099. static ssize_t ipr_store_adapter_state(struct device *dev,
  3100. struct device_attribute *attr,
  3101. const char *buf, size_t count)
  3102. {
  3103. struct Scsi_Host *shost = class_to_shost(dev);
  3104. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3105. unsigned long lock_flags;
  3106. int result = count, i;
  3107. if (!capable(CAP_SYS_ADMIN))
  3108. return -EACCES;
  3109. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3110. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead &&
  3111. !strncmp(buf, "online", 6)) {
  3112. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  3113. spin_lock(&ioa_cfg->hrrq[i]._lock);
  3114. ioa_cfg->hrrq[i].ioa_is_dead = 0;
  3115. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  3116. }
  3117. wmb();
  3118. ioa_cfg->reset_retries = 0;
  3119. ioa_cfg->in_ioa_bringdown = 0;
  3120. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  3121. }
  3122. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3123. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3124. return result;
  3125. }
  3126. static struct device_attribute ipr_ioa_state_attr = {
  3127. .attr = {
  3128. .name = "online_state",
  3129. .mode = S_IRUGO | S_IWUSR,
  3130. },
  3131. .show = ipr_show_adapter_state,
  3132. .store = ipr_store_adapter_state
  3133. };
  3134. /**
  3135. * ipr_store_reset_adapter - Reset the adapter
  3136. * @dev: device struct
  3137. * @buf: buffer
  3138. * @count: buffer size
  3139. *
  3140. * This function will reset the adapter.
  3141. *
  3142. * Return value:
  3143. * count on success / other on failure
  3144. **/
  3145. static ssize_t ipr_store_reset_adapter(struct device *dev,
  3146. struct device_attribute *attr,
  3147. const char *buf, size_t count)
  3148. {
  3149. struct Scsi_Host *shost = class_to_shost(dev);
  3150. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3151. unsigned long lock_flags;
  3152. int result = count;
  3153. if (!capable(CAP_SYS_ADMIN))
  3154. return -EACCES;
  3155. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3156. if (!ioa_cfg->in_reset_reload)
  3157. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3158. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3159. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3160. return result;
  3161. }
  3162. static struct device_attribute ipr_ioa_reset_attr = {
  3163. .attr = {
  3164. .name = "reset_host",
  3165. .mode = S_IWUSR,
  3166. },
  3167. .store = ipr_store_reset_adapter
  3168. };
  3169. static int ipr_iopoll(struct blk_iopoll *iop, int budget);
  3170. /**
  3171. * ipr_show_iopoll_weight - Show ipr polling mode
  3172. * @dev: class device struct
  3173. * @buf: buffer
  3174. *
  3175. * Return value:
  3176. * number of bytes printed to buffer
  3177. **/
  3178. static ssize_t ipr_show_iopoll_weight(struct device *dev,
  3179. struct device_attribute *attr, char *buf)
  3180. {
  3181. struct Scsi_Host *shost = class_to_shost(dev);
  3182. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3183. unsigned long lock_flags = 0;
  3184. int len;
  3185. spin_lock_irqsave(shost->host_lock, lock_flags);
  3186. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->iopoll_weight);
  3187. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3188. return len;
  3189. }
  3190. /**
  3191. * ipr_store_iopoll_weight - Change the adapter's polling mode
  3192. * @dev: class device struct
  3193. * @buf: buffer
  3194. *
  3195. * Return value:
  3196. * number of bytes printed to buffer
  3197. **/
  3198. static ssize_t ipr_store_iopoll_weight(struct device *dev,
  3199. struct device_attribute *attr,
  3200. const char *buf, size_t count)
  3201. {
  3202. struct Scsi_Host *shost = class_to_shost(dev);
  3203. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3204. unsigned long user_iopoll_weight;
  3205. unsigned long lock_flags = 0;
  3206. int i;
  3207. if (!ioa_cfg->sis64) {
  3208. dev_info(&ioa_cfg->pdev->dev, "blk-iopoll not supported on this adapter\n");
  3209. return -EINVAL;
  3210. }
  3211. if (kstrtoul(buf, 10, &user_iopoll_weight))
  3212. return -EINVAL;
  3213. if (user_iopoll_weight > 256) {
  3214. dev_info(&ioa_cfg->pdev->dev, "Invalid blk-iopoll weight. It must be less than 256\n");
  3215. return -EINVAL;
  3216. }
  3217. if (user_iopoll_weight == ioa_cfg->iopoll_weight) {
  3218. dev_info(&ioa_cfg->pdev->dev, "Current blk-iopoll weight has the same weight\n");
  3219. return strlen(buf);
  3220. }
  3221. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  3222. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3223. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  3224. blk_iopoll_disable(&ioa_cfg->hrrq[i].iopoll);
  3225. }
  3226. spin_lock_irqsave(shost->host_lock, lock_flags);
  3227. ioa_cfg->iopoll_weight = user_iopoll_weight;
  3228. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  3229. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  3230. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  3231. blk_iopoll_init(&ioa_cfg->hrrq[i].iopoll,
  3232. ioa_cfg->iopoll_weight, ipr_iopoll);
  3233. blk_iopoll_enable(&ioa_cfg->hrrq[i].iopoll);
  3234. }
  3235. }
  3236. spin_unlock_irqrestore(shost->host_lock, lock_flags);
  3237. return strlen(buf);
  3238. }
  3239. static struct device_attribute ipr_iopoll_weight_attr = {
  3240. .attr = {
  3241. .name = "iopoll_weight",
  3242. .mode = S_IRUGO | S_IWUSR,
  3243. },
  3244. .show = ipr_show_iopoll_weight,
  3245. .store = ipr_store_iopoll_weight
  3246. };
  3247. /**
  3248. * ipr_alloc_ucode_buffer - Allocates a microcode download buffer
  3249. * @buf_len: buffer length
  3250. *
  3251. * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
  3252. * list to use for microcode download
  3253. *
  3254. * Return value:
  3255. * pointer to sglist / NULL on failure
  3256. **/
  3257. static struct ipr_sglist *ipr_alloc_ucode_buffer(int buf_len)
  3258. {
  3259. int sg_size, order, bsize_elem, num_elem, i, j;
  3260. struct ipr_sglist *sglist;
  3261. struct scatterlist *scatterlist;
  3262. struct page *page;
  3263. /* Get the minimum size per scatter/gather element */
  3264. sg_size = buf_len / (IPR_MAX_SGLIST - 1);
  3265. /* Get the actual size per element */
  3266. order = get_order(sg_size);
  3267. /* Determine the actual number of bytes per element */
  3268. bsize_elem = PAGE_SIZE * (1 << order);
  3269. /* Determine the actual number of sg entries needed */
  3270. if (buf_len % bsize_elem)
  3271. num_elem = (buf_len / bsize_elem) + 1;
  3272. else
  3273. num_elem = buf_len / bsize_elem;
  3274. /* Allocate a scatter/gather list for the DMA */
  3275. sglist = kzalloc(sizeof(struct ipr_sglist) +
  3276. (sizeof(struct scatterlist) * (num_elem - 1)),
  3277. GFP_KERNEL);
  3278. if (sglist == NULL) {
  3279. ipr_trace;
  3280. return NULL;
  3281. }
  3282. scatterlist = sglist->scatterlist;
  3283. sg_init_table(scatterlist, num_elem);
  3284. sglist->order = order;
  3285. sglist->num_sg = num_elem;
  3286. /* Allocate a bunch of sg elements */
  3287. for (i = 0; i < num_elem; i++) {
  3288. page = alloc_pages(GFP_KERNEL, order);
  3289. if (!page) {
  3290. ipr_trace;
  3291. /* Free up what we already allocated */
  3292. for (j = i - 1; j >= 0; j--)
  3293. __free_pages(sg_page(&scatterlist[j]), order);
  3294. kfree(sglist);
  3295. return NULL;
  3296. }
  3297. sg_set_page(&scatterlist[i], page, 0, 0);
  3298. }
  3299. return sglist;
  3300. }
  3301. /**
  3302. * ipr_free_ucode_buffer - Frees a microcode download buffer
  3303. * @p_dnld: scatter/gather list pointer
  3304. *
  3305. * Free a DMA'able ucode download buffer previously allocated with
  3306. * ipr_alloc_ucode_buffer
  3307. *
  3308. * Return value:
  3309. * nothing
  3310. **/
  3311. static void ipr_free_ucode_buffer(struct ipr_sglist *sglist)
  3312. {
  3313. int i;
  3314. for (i = 0; i < sglist->num_sg; i++)
  3315. __free_pages(sg_page(&sglist->scatterlist[i]), sglist->order);
  3316. kfree(sglist);
  3317. }
  3318. /**
  3319. * ipr_copy_ucode_buffer - Copy user buffer to kernel buffer
  3320. * @sglist: scatter/gather list pointer
  3321. * @buffer: buffer pointer
  3322. * @len: buffer length
  3323. *
  3324. * Copy a microcode image from a user buffer into a buffer allocated by
  3325. * ipr_alloc_ucode_buffer
  3326. *
  3327. * Return value:
  3328. * 0 on success / other on failure
  3329. **/
  3330. static int ipr_copy_ucode_buffer(struct ipr_sglist *sglist,
  3331. u8 *buffer, u32 len)
  3332. {
  3333. int bsize_elem, i, result = 0;
  3334. struct scatterlist *scatterlist;
  3335. void *kaddr;
  3336. /* Determine the actual number of bytes per element */
  3337. bsize_elem = PAGE_SIZE * (1 << sglist->order);
  3338. scatterlist = sglist->scatterlist;
  3339. for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
  3340. struct page *page = sg_page(&scatterlist[i]);
  3341. kaddr = kmap(page);
  3342. memcpy(kaddr, buffer, bsize_elem);
  3343. kunmap(page);
  3344. scatterlist[i].length = bsize_elem;
  3345. if (result != 0) {
  3346. ipr_trace;
  3347. return result;
  3348. }
  3349. }
  3350. if (len % bsize_elem) {
  3351. struct page *page = sg_page(&scatterlist[i]);
  3352. kaddr = kmap(page);
  3353. memcpy(kaddr, buffer, len % bsize_elem);
  3354. kunmap(page);
  3355. scatterlist[i].length = len % bsize_elem;
  3356. }
  3357. sglist->buffer_len = len;
  3358. return result;
  3359. }
  3360. /**
  3361. * ipr_build_ucode_ioadl64 - Build a microcode download IOADL
  3362. * @ipr_cmd: ipr command struct
  3363. * @sglist: scatter/gather list
  3364. *
  3365. * Builds a microcode download IOA data list (IOADL).
  3366. *
  3367. **/
  3368. static void ipr_build_ucode_ioadl64(struct ipr_cmnd *ipr_cmd,
  3369. struct ipr_sglist *sglist)
  3370. {
  3371. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3372. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  3373. struct scatterlist *scatterlist = sglist->scatterlist;
  3374. int i;
  3375. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3376. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3377. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3378. ioarcb->ioadl_len =
  3379. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  3380. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3381. ioadl64[i].flags = cpu_to_be32(IPR_IOADL_FLAGS_WRITE);
  3382. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(&scatterlist[i]));
  3383. ioadl64[i].address = cpu_to_be64(sg_dma_address(&scatterlist[i]));
  3384. }
  3385. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3386. }
  3387. /**
  3388. * ipr_build_ucode_ioadl - Build a microcode download IOADL
  3389. * @ipr_cmd: ipr command struct
  3390. * @sglist: scatter/gather list
  3391. *
  3392. * Builds a microcode download IOA data list (IOADL).
  3393. *
  3394. **/
  3395. static void ipr_build_ucode_ioadl(struct ipr_cmnd *ipr_cmd,
  3396. struct ipr_sglist *sglist)
  3397. {
  3398. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  3399. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  3400. struct scatterlist *scatterlist = sglist->scatterlist;
  3401. int i;
  3402. ipr_cmd->dma_use_sg = sglist->num_dma_sg;
  3403. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  3404. ioarcb->data_transfer_length = cpu_to_be32(sglist->buffer_len);
  3405. ioarcb->ioadl_len =
  3406. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  3407. for (i = 0; i < ipr_cmd->dma_use_sg; i++) {
  3408. ioadl[i].flags_and_data_len =
  3409. cpu_to_be32(IPR_IOADL_FLAGS_WRITE | sg_dma_len(&scatterlist[i]));
  3410. ioadl[i].address =
  3411. cpu_to_be32(sg_dma_address(&scatterlist[i]));
  3412. }
  3413. ioadl[i-1].flags_and_data_len |=
  3414. cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  3415. }
  3416. /**
  3417. * ipr_update_ioa_ucode - Update IOA's microcode
  3418. * @ioa_cfg: ioa config struct
  3419. * @sglist: scatter/gather list
  3420. *
  3421. * Initiate an adapter reset to update the IOA's microcode
  3422. *
  3423. * Return value:
  3424. * 0 on success / -EIO on failure
  3425. **/
  3426. static int ipr_update_ioa_ucode(struct ipr_ioa_cfg *ioa_cfg,
  3427. struct ipr_sglist *sglist)
  3428. {
  3429. unsigned long lock_flags;
  3430. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3431. while (ioa_cfg->in_reset_reload) {
  3432. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3433. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3434. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3435. }
  3436. if (ioa_cfg->ucode_sglist) {
  3437. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3438. dev_err(&ioa_cfg->pdev->dev,
  3439. "Microcode download already in progress\n");
  3440. return -EIO;
  3441. }
  3442. sglist->num_dma_sg = pci_map_sg(ioa_cfg->pdev, sglist->scatterlist,
  3443. sglist->num_sg, DMA_TO_DEVICE);
  3444. if (!sglist->num_dma_sg) {
  3445. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3446. dev_err(&ioa_cfg->pdev->dev,
  3447. "Failed to map microcode download buffer!\n");
  3448. return -EIO;
  3449. }
  3450. ioa_cfg->ucode_sglist = sglist;
  3451. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  3452. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3453. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  3454. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3455. ioa_cfg->ucode_sglist = NULL;
  3456. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3457. return 0;
  3458. }
  3459. /**
  3460. * ipr_store_update_fw - Update the firmware on the adapter
  3461. * @class_dev: device struct
  3462. * @buf: buffer
  3463. * @count: buffer size
  3464. *
  3465. * This function will update the firmware on the adapter.
  3466. *
  3467. * Return value:
  3468. * count on success / other on failure
  3469. **/
  3470. static ssize_t ipr_store_update_fw(struct device *dev,
  3471. struct device_attribute *attr,
  3472. const char *buf, size_t count)
  3473. {
  3474. struct Scsi_Host *shost = class_to_shost(dev);
  3475. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3476. struct ipr_ucode_image_header *image_hdr;
  3477. const struct firmware *fw_entry;
  3478. struct ipr_sglist *sglist;
  3479. char fname[100];
  3480. char *src;
  3481. int len, result, dnld_size;
  3482. if (!capable(CAP_SYS_ADMIN))
  3483. return -EACCES;
  3484. len = snprintf(fname, 99, "%s", buf);
  3485. fname[len-1] = '\0';
  3486. if (request_firmware(&fw_entry, fname, &ioa_cfg->pdev->dev)) {
  3487. dev_err(&ioa_cfg->pdev->dev, "Firmware file %s not found\n", fname);
  3488. return -EIO;
  3489. }
  3490. image_hdr = (struct ipr_ucode_image_header *)fw_entry->data;
  3491. src = (u8 *)image_hdr + be32_to_cpu(image_hdr->header_length);
  3492. dnld_size = fw_entry->size - be32_to_cpu(image_hdr->header_length);
  3493. sglist = ipr_alloc_ucode_buffer(dnld_size);
  3494. if (!sglist) {
  3495. dev_err(&ioa_cfg->pdev->dev, "Microcode buffer allocation failed\n");
  3496. release_firmware(fw_entry);
  3497. return -ENOMEM;
  3498. }
  3499. result = ipr_copy_ucode_buffer(sglist, src, dnld_size);
  3500. if (result) {
  3501. dev_err(&ioa_cfg->pdev->dev,
  3502. "Microcode buffer copy to DMA buffer failed\n");
  3503. goto out;
  3504. }
  3505. ipr_info("Updating microcode, please be patient. This may take up to 30 minutes.\n");
  3506. result = ipr_update_ioa_ucode(ioa_cfg, sglist);
  3507. if (!result)
  3508. result = count;
  3509. out:
  3510. ipr_free_ucode_buffer(sglist);
  3511. release_firmware(fw_entry);
  3512. return result;
  3513. }
  3514. static struct device_attribute ipr_update_fw_attr = {
  3515. .attr = {
  3516. .name = "update_fw",
  3517. .mode = S_IWUSR,
  3518. },
  3519. .store = ipr_store_update_fw
  3520. };
  3521. /**
  3522. * ipr_show_fw_type - Show the adapter's firmware type.
  3523. * @dev: class device struct
  3524. * @buf: buffer
  3525. *
  3526. * Return value:
  3527. * number of bytes printed to buffer
  3528. **/
  3529. static ssize_t ipr_show_fw_type(struct device *dev,
  3530. struct device_attribute *attr, char *buf)
  3531. {
  3532. struct Scsi_Host *shost = class_to_shost(dev);
  3533. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3534. unsigned long lock_flags = 0;
  3535. int len;
  3536. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3537. len = snprintf(buf, PAGE_SIZE, "%d\n", ioa_cfg->sis64);
  3538. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3539. return len;
  3540. }
  3541. static struct device_attribute ipr_ioa_fw_type_attr = {
  3542. .attr = {
  3543. .name = "fw_type",
  3544. .mode = S_IRUGO,
  3545. },
  3546. .show = ipr_show_fw_type
  3547. };
  3548. static struct device_attribute *ipr_ioa_attrs[] = {
  3549. &ipr_fw_version_attr,
  3550. &ipr_log_level_attr,
  3551. &ipr_diagnostics_attr,
  3552. &ipr_ioa_state_attr,
  3553. &ipr_ioa_reset_attr,
  3554. &ipr_update_fw_attr,
  3555. &ipr_ioa_fw_type_attr,
  3556. &ipr_iopoll_weight_attr,
  3557. NULL,
  3558. };
  3559. #ifdef CONFIG_SCSI_IPR_DUMP
  3560. /**
  3561. * ipr_read_dump - Dump the adapter
  3562. * @filp: open sysfs file
  3563. * @kobj: kobject struct
  3564. * @bin_attr: bin_attribute struct
  3565. * @buf: buffer
  3566. * @off: offset
  3567. * @count: buffer size
  3568. *
  3569. * Return value:
  3570. * number of bytes printed to buffer
  3571. **/
  3572. static ssize_t ipr_read_dump(struct file *filp, struct kobject *kobj,
  3573. struct bin_attribute *bin_attr,
  3574. char *buf, loff_t off, size_t count)
  3575. {
  3576. struct device *cdev = container_of(kobj, struct device, kobj);
  3577. struct Scsi_Host *shost = class_to_shost(cdev);
  3578. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3579. struct ipr_dump *dump;
  3580. unsigned long lock_flags = 0;
  3581. char *src;
  3582. int len, sdt_end;
  3583. size_t rc = count;
  3584. if (!capable(CAP_SYS_ADMIN))
  3585. return -EACCES;
  3586. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3587. dump = ioa_cfg->dump;
  3588. if (ioa_cfg->sdt_state != DUMP_OBTAINED || !dump) {
  3589. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3590. return 0;
  3591. }
  3592. kref_get(&dump->kref);
  3593. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3594. if (off > dump->driver_dump.hdr.len) {
  3595. kref_put(&dump->kref, ipr_release_dump);
  3596. return 0;
  3597. }
  3598. if (off + count > dump->driver_dump.hdr.len) {
  3599. count = dump->driver_dump.hdr.len - off;
  3600. rc = count;
  3601. }
  3602. if (count && off < sizeof(dump->driver_dump)) {
  3603. if (off + count > sizeof(dump->driver_dump))
  3604. len = sizeof(dump->driver_dump) - off;
  3605. else
  3606. len = count;
  3607. src = (u8 *)&dump->driver_dump + off;
  3608. memcpy(buf, src, len);
  3609. buf += len;
  3610. off += len;
  3611. count -= len;
  3612. }
  3613. off -= sizeof(dump->driver_dump);
  3614. if (ioa_cfg->sis64)
  3615. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3616. (be32_to_cpu(dump->ioa_dump.sdt.hdr.num_entries_used) *
  3617. sizeof(struct ipr_sdt_entry));
  3618. else
  3619. sdt_end = offsetof(struct ipr_ioa_dump, sdt.entry) +
  3620. (IPR_FMT2_NUM_SDT_ENTRIES * sizeof(struct ipr_sdt_entry));
  3621. if (count && off < sdt_end) {
  3622. if (off + count > sdt_end)
  3623. len = sdt_end - off;
  3624. else
  3625. len = count;
  3626. src = (u8 *)&dump->ioa_dump + off;
  3627. memcpy(buf, src, len);
  3628. buf += len;
  3629. off += len;
  3630. count -= len;
  3631. }
  3632. off -= sdt_end;
  3633. while (count) {
  3634. if ((off & PAGE_MASK) != ((off + count) & PAGE_MASK))
  3635. len = PAGE_ALIGN(off) - off;
  3636. else
  3637. len = count;
  3638. src = (u8 *)dump->ioa_dump.ioa_data[(off & PAGE_MASK) >> PAGE_SHIFT];
  3639. src += off & ~PAGE_MASK;
  3640. memcpy(buf, src, len);
  3641. buf += len;
  3642. off += len;
  3643. count -= len;
  3644. }
  3645. kref_put(&dump->kref, ipr_release_dump);
  3646. return rc;
  3647. }
  3648. /**
  3649. * ipr_alloc_dump - Prepare for adapter dump
  3650. * @ioa_cfg: ioa config struct
  3651. *
  3652. * Return value:
  3653. * 0 on success / other on failure
  3654. **/
  3655. static int ipr_alloc_dump(struct ipr_ioa_cfg *ioa_cfg)
  3656. {
  3657. struct ipr_dump *dump;
  3658. __be32 **ioa_data;
  3659. unsigned long lock_flags = 0;
  3660. dump = kzalloc(sizeof(struct ipr_dump), GFP_KERNEL);
  3661. if (!dump) {
  3662. ipr_err("Dump memory allocation failed\n");
  3663. return -ENOMEM;
  3664. }
  3665. if (ioa_cfg->sis64)
  3666. ioa_data = vmalloc(IPR_FMT3_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3667. else
  3668. ioa_data = vmalloc(IPR_FMT2_MAX_NUM_DUMP_PAGES * sizeof(__be32 *));
  3669. if (!ioa_data) {
  3670. ipr_err("Dump memory allocation failed\n");
  3671. kfree(dump);
  3672. return -ENOMEM;
  3673. }
  3674. dump->ioa_dump.ioa_data = ioa_data;
  3675. kref_init(&dump->kref);
  3676. dump->ioa_cfg = ioa_cfg;
  3677. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3678. if (INACTIVE != ioa_cfg->sdt_state) {
  3679. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3680. vfree(dump->ioa_dump.ioa_data);
  3681. kfree(dump);
  3682. return 0;
  3683. }
  3684. ioa_cfg->dump = dump;
  3685. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  3686. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead && !ioa_cfg->dump_taken) {
  3687. ioa_cfg->dump_taken = 1;
  3688. schedule_work(&ioa_cfg->work_q);
  3689. }
  3690. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3691. return 0;
  3692. }
  3693. /**
  3694. * ipr_free_dump - Free adapter dump memory
  3695. * @ioa_cfg: ioa config struct
  3696. *
  3697. * Return value:
  3698. * 0 on success / other on failure
  3699. **/
  3700. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg)
  3701. {
  3702. struct ipr_dump *dump;
  3703. unsigned long lock_flags = 0;
  3704. ENTER;
  3705. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3706. dump = ioa_cfg->dump;
  3707. if (!dump) {
  3708. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3709. return 0;
  3710. }
  3711. ioa_cfg->dump = NULL;
  3712. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3713. kref_put(&dump->kref, ipr_release_dump);
  3714. LEAVE;
  3715. return 0;
  3716. }
  3717. /**
  3718. * ipr_write_dump - Setup dump state of adapter
  3719. * @filp: open sysfs file
  3720. * @kobj: kobject struct
  3721. * @bin_attr: bin_attribute struct
  3722. * @buf: buffer
  3723. * @off: offset
  3724. * @count: buffer size
  3725. *
  3726. * Return value:
  3727. * number of bytes printed to buffer
  3728. **/
  3729. static ssize_t ipr_write_dump(struct file *filp, struct kobject *kobj,
  3730. struct bin_attribute *bin_attr,
  3731. char *buf, loff_t off, size_t count)
  3732. {
  3733. struct device *cdev = container_of(kobj, struct device, kobj);
  3734. struct Scsi_Host *shost = class_to_shost(cdev);
  3735. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  3736. int rc;
  3737. if (!capable(CAP_SYS_ADMIN))
  3738. return -EACCES;
  3739. if (buf[0] == '1')
  3740. rc = ipr_alloc_dump(ioa_cfg);
  3741. else if (buf[0] == '0')
  3742. rc = ipr_free_dump(ioa_cfg);
  3743. else
  3744. return -EINVAL;
  3745. if (rc)
  3746. return rc;
  3747. else
  3748. return count;
  3749. }
  3750. static struct bin_attribute ipr_dump_attr = {
  3751. .attr = {
  3752. .name = "dump",
  3753. .mode = S_IRUSR | S_IWUSR,
  3754. },
  3755. .size = 0,
  3756. .read = ipr_read_dump,
  3757. .write = ipr_write_dump
  3758. };
  3759. #else
  3760. static int ipr_free_dump(struct ipr_ioa_cfg *ioa_cfg) { return 0; };
  3761. #endif
  3762. /**
  3763. * ipr_change_queue_depth - Change the device's queue depth
  3764. * @sdev: scsi device struct
  3765. * @qdepth: depth to set
  3766. * @reason: calling context
  3767. *
  3768. * Return value:
  3769. * actual depth set
  3770. **/
  3771. static int ipr_change_queue_depth(struct scsi_device *sdev, int qdepth,
  3772. int reason)
  3773. {
  3774. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3775. struct ipr_resource_entry *res;
  3776. unsigned long lock_flags = 0;
  3777. if (reason != SCSI_QDEPTH_DEFAULT)
  3778. return -EOPNOTSUPP;
  3779. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3780. res = (struct ipr_resource_entry *)sdev->hostdata;
  3781. if (res && ipr_is_gata(res) && qdepth > IPR_MAX_CMD_PER_ATA_LUN)
  3782. qdepth = IPR_MAX_CMD_PER_ATA_LUN;
  3783. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3784. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  3785. return sdev->queue_depth;
  3786. }
  3787. /**
  3788. * ipr_change_queue_type - Change the device's queue type
  3789. * @dsev: scsi device struct
  3790. * @tag_type: type of tags to use
  3791. *
  3792. * Return value:
  3793. * actual queue type set
  3794. **/
  3795. static int ipr_change_queue_type(struct scsi_device *sdev, int tag_type)
  3796. {
  3797. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3798. struct ipr_resource_entry *res;
  3799. unsigned long lock_flags = 0;
  3800. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3801. res = (struct ipr_resource_entry *)sdev->hostdata;
  3802. if (res) {
  3803. if (ipr_is_gscsi(res) && sdev->tagged_supported) {
  3804. /*
  3805. * We don't bother quiescing the device here since the
  3806. * adapter firmware does it for us.
  3807. */
  3808. scsi_set_tag_type(sdev, tag_type);
  3809. if (tag_type)
  3810. scsi_activate_tcq(sdev, sdev->queue_depth);
  3811. else
  3812. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  3813. } else
  3814. tag_type = 0;
  3815. } else
  3816. tag_type = 0;
  3817. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3818. return tag_type;
  3819. }
  3820. /**
  3821. * ipr_show_adapter_handle - Show the adapter's resource handle for this device
  3822. * @dev: device struct
  3823. * @attr: device attribute structure
  3824. * @buf: buffer
  3825. *
  3826. * Return value:
  3827. * number of bytes printed to buffer
  3828. **/
  3829. static ssize_t ipr_show_adapter_handle(struct device *dev, struct device_attribute *attr, char *buf)
  3830. {
  3831. struct scsi_device *sdev = to_scsi_device(dev);
  3832. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3833. struct ipr_resource_entry *res;
  3834. unsigned long lock_flags = 0;
  3835. ssize_t len = -ENXIO;
  3836. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3837. res = (struct ipr_resource_entry *)sdev->hostdata;
  3838. if (res)
  3839. len = snprintf(buf, PAGE_SIZE, "%08X\n", res->res_handle);
  3840. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3841. return len;
  3842. }
  3843. static struct device_attribute ipr_adapter_handle_attr = {
  3844. .attr = {
  3845. .name = "adapter_handle",
  3846. .mode = S_IRUSR,
  3847. },
  3848. .show = ipr_show_adapter_handle
  3849. };
  3850. /**
  3851. * ipr_show_resource_path - Show the resource path or the resource address for
  3852. * this device.
  3853. * @dev: device struct
  3854. * @attr: device attribute structure
  3855. * @buf: buffer
  3856. *
  3857. * Return value:
  3858. * number of bytes printed to buffer
  3859. **/
  3860. static ssize_t ipr_show_resource_path(struct device *dev, struct device_attribute *attr, char *buf)
  3861. {
  3862. struct scsi_device *sdev = to_scsi_device(dev);
  3863. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3864. struct ipr_resource_entry *res;
  3865. unsigned long lock_flags = 0;
  3866. ssize_t len = -ENXIO;
  3867. char buffer[IPR_MAX_RES_PATH_LENGTH];
  3868. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3869. res = (struct ipr_resource_entry *)sdev->hostdata;
  3870. if (res && ioa_cfg->sis64)
  3871. len = snprintf(buf, PAGE_SIZE, "%s\n",
  3872. __ipr_format_res_path(res->res_path, buffer,
  3873. sizeof(buffer)));
  3874. else if (res)
  3875. len = snprintf(buf, PAGE_SIZE, "%d:%d:%d:%d\n", ioa_cfg->host->host_no,
  3876. res->bus, res->target, res->lun);
  3877. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3878. return len;
  3879. }
  3880. static struct device_attribute ipr_resource_path_attr = {
  3881. .attr = {
  3882. .name = "resource_path",
  3883. .mode = S_IRUGO,
  3884. },
  3885. .show = ipr_show_resource_path
  3886. };
  3887. /**
  3888. * ipr_show_device_id - Show the device_id for this device.
  3889. * @dev: device struct
  3890. * @attr: device attribute structure
  3891. * @buf: buffer
  3892. *
  3893. * Return value:
  3894. * number of bytes printed to buffer
  3895. **/
  3896. static ssize_t ipr_show_device_id(struct device *dev, struct device_attribute *attr, char *buf)
  3897. {
  3898. struct scsi_device *sdev = to_scsi_device(dev);
  3899. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3900. struct ipr_resource_entry *res;
  3901. unsigned long lock_flags = 0;
  3902. ssize_t len = -ENXIO;
  3903. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3904. res = (struct ipr_resource_entry *)sdev->hostdata;
  3905. if (res && ioa_cfg->sis64)
  3906. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->dev_id);
  3907. else if (res)
  3908. len = snprintf(buf, PAGE_SIZE, "0x%llx\n", res->lun_wwn);
  3909. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3910. return len;
  3911. }
  3912. static struct device_attribute ipr_device_id_attr = {
  3913. .attr = {
  3914. .name = "device_id",
  3915. .mode = S_IRUGO,
  3916. },
  3917. .show = ipr_show_device_id
  3918. };
  3919. /**
  3920. * ipr_show_resource_type - Show the resource type for this device.
  3921. * @dev: device struct
  3922. * @attr: device attribute structure
  3923. * @buf: buffer
  3924. *
  3925. * Return value:
  3926. * number of bytes printed to buffer
  3927. **/
  3928. static ssize_t ipr_show_resource_type(struct device *dev, struct device_attribute *attr, char *buf)
  3929. {
  3930. struct scsi_device *sdev = to_scsi_device(dev);
  3931. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)sdev->host->hostdata;
  3932. struct ipr_resource_entry *res;
  3933. unsigned long lock_flags = 0;
  3934. ssize_t len = -ENXIO;
  3935. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  3936. res = (struct ipr_resource_entry *)sdev->hostdata;
  3937. if (res)
  3938. len = snprintf(buf, PAGE_SIZE, "%x\n", res->type);
  3939. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  3940. return len;
  3941. }
  3942. static struct device_attribute ipr_resource_type_attr = {
  3943. .attr = {
  3944. .name = "resource_type",
  3945. .mode = S_IRUGO,
  3946. },
  3947. .show = ipr_show_resource_type
  3948. };
  3949. static struct device_attribute *ipr_dev_attrs[] = {
  3950. &ipr_adapter_handle_attr,
  3951. &ipr_resource_path_attr,
  3952. &ipr_device_id_attr,
  3953. &ipr_resource_type_attr,
  3954. NULL,
  3955. };
  3956. /**
  3957. * ipr_biosparam - Return the HSC mapping
  3958. * @sdev: scsi device struct
  3959. * @block_device: block device pointer
  3960. * @capacity: capacity of the device
  3961. * @parm: Array containing returned HSC values.
  3962. *
  3963. * This function generates the HSC parms that fdisk uses.
  3964. * We want to make sure we return something that places partitions
  3965. * on 4k boundaries for best performance with the IOA.
  3966. *
  3967. * Return value:
  3968. * 0 on success
  3969. **/
  3970. static int ipr_biosparam(struct scsi_device *sdev,
  3971. struct block_device *block_device,
  3972. sector_t capacity, int *parm)
  3973. {
  3974. int heads, sectors;
  3975. sector_t cylinders;
  3976. heads = 128;
  3977. sectors = 32;
  3978. cylinders = capacity;
  3979. sector_div(cylinders, (128 * 32));
  3980. /* return result */
  3981. parm[0] = heads;
  3982. parm[1] = sectors;
  3983. parm[2] = cylinders;
  3984. return 0;
  3985. }
  3986. /**
  3987. * ipr_find_starget - Find target based on bus/target.
  3988. * @starget: scsi target struct
  3989. *
  3990. * Return value:
  3991. * resource entry pointer if found / NULL if not found
  3992. **/
  3993. static struct ipr_resource_entry *ipr_find_starget(struct scsi_target *starget)
  3994. {
  3995. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  3996. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  3997. struct ipr_resource_entry *res;
  3998. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  3999. if ((res->bus == starget->channel) &&
  4000. (res->target == starget->id)) {
  4001. return res;
  4002. }
  4003. }
  4004. return NULL;
  4005. }
  4006. static struct ata_port_info sata_port_info;
  4007. /**
  4008. * ipr_target_alloc - Prepare for commands to a SCSI target
  4009. * @starget: scsi target struct
  4010. *
  4011. * If the device is a SATA device, this function allocates an
  4012. * ATA port with libata, else it does nothing.
  4013. *
  4014. * Return value:
  4015. * 0 on success / non-0 on failure
  4016. **/
  4017. static int ipr_target_alloc(struct scsi_target *starget)
  4018. {
  4019. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4020. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4021. struct ipr_sata_port *sata_port;
  4022. struct ata_port *ap;
  4023. struct ipr_resource_entry *res;
  4024. unsigned long lock_flags;
  4025. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4026. res = ipr_find_starget(starget);
  4027. starget->hostdata = NULL;
  4028. if (res && ipr_is_gata(res)) {
  4029. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4030. sata_port = kzalloc(sizeof(*sata_port), GFP_KERNEL);
  4031. if (!sata_port)
  4032. return -ENOMEM;
  4033. ap = ata_sas_port_alloc(&ioa_cfg->ata_host, &sata_port_info, shost);
  4034. if (ap) {
  4035. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4036. sata_port->ioa_cfg = ioa_cfg;
  4037. sata_port->ap = ap;
  4038. sata_port->res = res;
  4039. res->sata_port = sata_port;
  4040. ap->private_data = sata_port;
  4041. starget->hostdata = sata_port;
  4042. } else {
  4043. kfree(sata_port);
  4044. return -ENOMEM;
  4045. }
  4046. }
  4047. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4048. return 0;
  4049. }
  4050. /**
  4051. * ipr_target_destroy - Destroy a SCSI target
  4052. * @starget: scsi target struct
  4053. *
  4054. * If the device was a SATA device, this function frees the libata
  4055. * ATA port, else it does nothing.
  4056. *
  4057. **/
  4058. static void ipr_target_destroy(struct scsi_target *starget)
  4059. {
  4060. struct ipr_sata_port *sata_port = starget->hostdata;
  4061. struct Scsi_Host *shost = dev_to_shost(&starget->dev);
  4062. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) shost->hostdata;
  4063. if (ioa_cfg->sis64) {
  4064. if (!ipr_find_starget(starget)) {
  4065. if (starget->channel == IPR_ARRAY_VIRTUAL_BUS)
  4066. clear_bit(starget->id, ioa_cfg->array_ids);
  4067. else if (starget->channel == IPR_VSET_VIRTUAL_BUS)
  4068. clear_bit(starget->id, ioa_cfg->vset_ids);
  4069. else if (starget->channel == 0)
  4070. clear_bit(starget->id, ioa_cfg->target_ids);
  4071. }
  4072. }
  4073. if (sata_port) {
  4074. starget->hostdata = NULL;
  4075. ata_sas_port_destroy(sata_port->ap);
  4076. kfree(sata_port);
  4077. }
  4078. }
  4079. /**
  4080. * ipr_find_sdev - Find device based on bus/target/lun.
  4081. * @sdev: scsi device struct
  4082. *
  4083. * Return value:
  4084. * resource entry pointer if found / NULL if not found
  4085. **/
  4086. static struct ipr_resource_entry *ipr_find_sdev(struct scsi_device *sdev)
  4087. {
  4088. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4089. struct ipr_resource_entry *res;
  4090. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4091. if ((res->bus == sdev->channel) &&
  4092. (res->target == sdev->id) &&
  4093. (res->lun == sdev->lun))
  4094. return res;
  4095. }
  4096. return NULL;
  4097. }
  4098. /**
  4099. * ipr_slave_destroy - Unconfigure a SCSI device
  4100. * @sdev: scsi device struct
  4101. *
  4102. * Return value:
  4103. * nothing
  4104. **/
  4105. static void ipr_slave_destroy(struct scsi_device *sdev)
  4106. {
  4107. struct ipr_resource_entry *res;
  4108. struct ipr_ioa_cfg *ioa_cfg;
  4109. unsigned long lock_flags = 0;
  4110. ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4111. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4112. res = (struct ipr_resource_entry *) sdev->hostdata;
  4113. if (res) {
  4114. if (res->sata_port)
  4115. res->sata_port->ap->link.device[0].class = ATA_DEV_NONE;
  4116. sdev->hostdata = NULL;
  4117. res->sdev = NULL;
  4118. res->sata_port = NULL;
  4119. }
  4120. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4121. }
  4122. /**
  4123. * ipr_slave_configure - Configure a SCSI device
  4124. * @sdev: scsi device struct
  4125. *
  4126. * This function configures the specified scsi device.
  4127. *
  4128. * Return value:
  4129. * 0 on success
  4130. **/
  4131. static int ipr_slave_configure(struct scsi_device *sdev)
  4132. {
  4133. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4134. struct ipr_resource_entry *res;
  4135. struct ata_port *ap = NULL;
  4136. unsigned long lock_flags = 0;
  4137. char buffer[IPR_MAX_RES_PATH_LENGTH];
  4138. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4139. res = sdev->hostdata;
  4140. if (res) {
  4141. if (ipr_is_af_dasd_device(res))
  4142. sdev->type = TYPE_RAID;
  4143. if (ipr_is_af_dasd_device(res) || ipr_is_ioa_resource(res)) {
  4144. sdev->scsi_level = 4;
  4145. sdev->no_uld_attach = 1;
  4146. }
  4147. if (ipr_is_vset_device(res)) {
  4148. blk_queue_rq_timeout(sdev->request_queue,
  4149. IPR_VSET_RW_TIMEOUT);
  4150. blk_queue_max_hw_sectors(sdev->request_queue, IPR_VSET_MAX_SECTORS);
  4151. }
  4152. if (ipr_is_gata(res) && res->sata_port)
  4153. ap = res->sata_port->ap;
  4154. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4155. if (ap) {
  4156. scsi_adjust_queue_depth(sdev, 0, IPR_MAX_CMD_PER_ATA_LUN);
  4157. ata_sas_slave_configure(sdev, ap);
  4158. } else
  4159. scsi_adjust_queue_depth(sdev, 0, sdev->host->cmd_per_lun);
  4160. if (ioa_cfg->sis64)
  4161. sdev_printk(KERN_INFO, sdev, "Resource path: %s\n",
  4162. ipr_format_res_path(ioa_cfg,
  4163. res->res_path, buffer, sizeof(buffer)));
  4164. return 0;
  4165. }
  4166. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4167. return 0;
  4168. }
  4169. /**
  4170. * ipr_ata_slave_alloc - Prepare for commands to a SATA device
  4171. * @sdev: scsi device struct
  4172. *
  4173. * This function initializes an ATA port so that future commands
  4174. * sent through queuecommand will work.
  4175. *
  4176. * Return value:
  4177. * 0 on success
  4178. **/
  4179. static int ipr_ata_slave_alloc(struct scsi_device *sdev)
  4180. {
  4181. struct ipr_sata_port *sata_port = NULL;
  4182. int rc = -ENXIO;
  4183. ENTER;
  4184. if (sdev->sdev_target)
  4185. sata_port = sdev->sdev_target->hostdata;
  4186. if (sata_port) {
  4187. rc = ata_sas_port_init(sata_port->ap);
  4188. if (rc == 0)
  4189. rc = ata_sas_sync_probe(sata_port->ap);
  4190. }
  4191. if (rc)
  4192. ipr_slave_destroy(sdev);
  4193. LEAVE;
  4194. return rc;
  4195. }
  4196. /**
  4197. * ipr_slave_alloc - Prepare for commands to a device.
  4198. * @sdev: scsi device struct
  4199. *
  4200. * This function saves a pointer to the resource entry
  4201. * in the scsi device struct if the device exists. We
  4202. * can then use this pointer in ipr_queuecommand when
  4203. * handling new commands.
  4204. *
  4205. * Return value:
  4206. * 0 on success / -ENXIO if device does not exist
  4207. **/
  4208. static int ipr_slave_alloc(struct scsi_device *sdev)
  4209. {
  4210. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *) sdev->host->hostdata;
  4211. struct ipr_resource_entry *res;
  4212. unsigned long lock_flags;
  4213. int rc = -ENXIO;
  4214. sdev->hostdata = NULL;
  4215. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4216. res = ipr_find_sdev(sdev);
  4217. if (res) {
  4218. res->sdev = sdev;
  4219. res->add_to_ml = 0;
  4220. res->in_erp = 0;
  4221. sdev->hostdata = res;
  4222. if (!ipr_is_naca_model(res))
  4223. res->needs_sync_complete = 1;
  4224. rc = 0;
  4225. if (ipr_is_gata(res)) {
  4226. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4227. return ipr_ata_slave_alloc(sdev);
  4228. }
  4229. }
  4230. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4231. return rc;
  4232. }
  4233. static int ipr_eh_host_reset(struct scsi_cmnd *cmd)
  4234. {
  4235. struct ipr_ioa_cfg *ioa_cfg;
  4236. unsigned long lock_flags = 0;
  4237. int rc = SUCCESS;
  4238. ENTER;
  4239. ioa_cfg = (struct ipr_ioa_cfg *) cmd->device->host->hostdata;
  4240. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4241. if (!ioa_cfg->in_reset_reload && !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4242. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_ABBREV);
  4243. dev_err(&ioa_cfg->pdev->dev,
  4244. "Adapter being reset as a result of error recovery.\n");
  4245. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4246. ioa_cfg->sdt_state = GET_DUMP;
  4247. }
  4248. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4249. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4250. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4251. /* If we got hit with a host reset while we were already resetting
  4252. the adapter for some reason, and the reset failed. */
  4253. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  4254. ipr_trace;
  4255. rc = FAILED;
  4256. }
  4257. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4258. LEAVE;
  4259. return rc;
  4260. }
  4261. /**
  4262. * ipr_device_reset - Reset the device
  4263. * @ioa_cfg: ioa config struct
  4264. * @res: resource entry struct
  4265. *
  4266. * This function issues a device reset to the affected device.
  4267. * If the device is a SCSI device, a LUN reset will be sent
  4268. * to the device first. If that does not work, a target reset
  4269. * will be sent. If the device is a SATA device, a PHY reset will
  4270. * be sent.
  4271. *
  4272. * Return value:
  4273. * 0 on success / non-zero on failure
  4274. **/
  4275. static int ipr_device_reset(struct ipr_ioa_cfg *ioa_cfg,
  4276. struct ipr_resource_entry *res)
  4277. {
  4278. struct ipr_cmnd *ipr_cmd;
  4279. struct ipr_ioarcb *ioarcb;
  4280. struct ipr_cmd_pkt *cmd_pkt;
  4281. struct ipr_ioarcb_ata_regs *regs;
  4282. u32 ioasc;
  4283. ENTER;
  4284. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4285. ioarcb = &ipr_cmd->ioarcb;
  4286. cmd_pkt = &ioarcb->cmd_pkt;
  4287. if (ipr_cmd->ioa_cfg->sis64) {
  4288. regs = &ipr_cmd->i.ata_ioadl.regs;
  4289. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  4290. } else
  4291. regs = &ioarcb->u.add_data.u.regs;
  4292. ioarcb->res_handle = res->res_handle;
  4293. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4294. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4295. if (ipr_is_gata(res)) {
  4296. cmd_pkt->cdb[2] = IPR_ATA_PHY_RESET;
  4297. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(regs->flags));
  4298. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  4299. }
  4300. ipr_send_blocking_cmd(ipr_cmd, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4301. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4302. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4303. if (ipr_is_gata(res) && res->sata_port && ioasc != IPR_IOASC_IOA_WAS_RESET) {
  4304. if (ipr_cmd->ioa_cfg->sis64)
  4305. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  4306. sizeof(struct ipr_ioasa_gata));
  4307. else
  4308. memcpy(&res->sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  4309. sizeof(struct ipr_ioasa_gata));
  4310. }
  4311. LEAVE;
  4312. return IPR_IOASC_SENSE_KEY(ioasc) ? -EIO : 0;
  4313. }
  4314. /**
  4315. * ipr_sata_reset - Reset the SATA port
  4316. * @link: SATA link to reset
  4317. * @classes: class of the attached device
  4318. *
  4319. * This function issues a SATA phy reset to the affected ATA link.
  4320. *
  4321. * Return value:
  4322. * 0 on success / non-zero on failure
  4323. **/
  4324. static int ipr_sata_reset(struct ata_link *link, unsigned int *classes,
  4325. unsigned long deadline)
  4326. {
  4327. struct ipr_sata_port *sata_port = link->ap->private_data;
  4328. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  4329. struct ipr_resource_entry *res;
  4330. unsigned long lock_flags = 0;
  4331. int rc = -ENXIO;
  4332. ENTER;
  4333. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4334. while (ioa_cfg->in_reset_reload) {
  4335. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4336. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  4337. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4338. }
  4339. res = sata_port->res;
  4340. if (res) {
  4341. rc = ipr_device_reset(ioa_cfg, res);
  4342. *classes = res->ata_class;
  4343. }
  4344. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4345. LEAVE;
  4346. return rc;
  4347. }
  4348. /**
  4349. * ipr_eh_dev_reset - Reset the device
  4350. * @scsi_cmd: scsi command struct
  4351. *
  4352. * This function issues a device reset to the affected device.
  4353. * A LUN reset will be sent to the device first. If that does
  4354. * not work, a target reset will be sent.
  4355. *
  4356. * Return value:
  4357. * SUCCESS / FAILED
  4358. **/
  4359. static int __ipr_eh_dev_reset(struct scsi_cmnd *scsi_cmd)
  4360. {
  4361. struct ipr_cmnd *ipr_cmd;
  4362. struct ipr_ioa_cfg *ioa_cfg;
  4363. struct ipr_resource_entry *res;
  4364. struct ata_port *ap;
  4365. int rc = 0;
  4366. struct ipr_hrr_queue *hrrq;
  4367. ENTER;
  4368. ioa_cfg = (struct ipr_ioa_cfg *) scsi_cmd->device->host->hostdata;
  4369. res = scsi_cmd->device->hostdata;
  4370. if (!res)
  4371. return FAILED;
  4372. /*
  4373. * If we are currently going through reset/reload, return failed. This will force the
  4374. * mid-layer to call ipr_eh_host_reset, which will then go to sleep and wait for the
  4375. * reset to complete
  4376. */
  4377. if (ioa_cfg->in_reset_reload)
  4378. return FAILED;
  4379. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4380. return FAILED;
  4381. for_each_hrrq(hrrq, ioa_cfg) {
  4382. spin_lock(&hrrq->_lock);
  4383. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4384. if (ipr_cmd->ioarcb.res_handle == res->res_handle) {
  4385. if (ipr_cmd->scsi_cmd)
  4386. ipr_cmd->done = ipr_scsi_eh_done;
  4387. if (ipr_cmd->qc)
  4388. ipr_cmd->done = ipr_sata_eh_done;
  4389. if (ipr_cmd->qc &&
  4390. !(ipr_cmd->qc->flags & ATA_QCFLAG_FAILED)) {
  4391. ipr_cmd->qc->err_mask |= AC_ERR_TIMEOUT;
  4392. ipr_cmd->qc->flags |= ATA_QCFLAG_FAILED;
  4393. }
  4394. }
  4395. }
  4396. spin_unlock(&hrrq->_lock);
  4397. }
  4398. res->resetting_device = 1;
  4399. scmd_printk(KERN_ERR, scsi_cmd, "Resetting device\n");
  4400. if (ipr_is_gata(res) && res->sata_port) {
  4401. ap = res->sata_port->ap;
  4402. spin_unlock_irq(scsi_cmd->device->host->host_lock);
  4403. ata_std_error_handler(ap);
  4404. spin_lock_irq(scsi_cmd->device->host->host_lock);
  4405. for_each_hrrq(hrrq, ioa_cfg) {
  4406. spin_lock(&hrrq->_lock);
  4407. list_for_each_entry(ipr_cmd,
  4408. &hrrq->hrrq_pending_q, queue) {
  4409. if (ipr_cmd->ioarcb.res_handle ==
  4410. res->res_handle) {
  4411. rc = -EIO;
  4412. break;
  4413. }
  4414. }
  4415. spin_unlock(&hrrq->_lock);
  4416. }
  4417. } else
  4418. rc = ipr_device_reset(ioa_cfg, res);
  4419. res->resetting_device = 0;
  4420. LEAVE;
  4421. return rc ? FAILED : SUCCESS;
  4422. }
  4423. static int ipr_eh_dev_reset(struct scsi_cmnd *cmd)
  4424. {
  4425. int rc;
  4426. spin_lock_irq(cmd->device->host->host_lock);
  4427. rc = __ipr_eh_dev_reset(cmd);
  4428. spin_unlock_irq(cmd->device->host->host_lock);
  4429. return rc;
  4430. }
  4431. /**
  4432. * ipr_bus_reset_done - Op done function for bus reset.
  4433. * @ipr_cmd: ipr command struct
  4434. *
  4435. * This function is the op done function for a bus reset
  4436. *
  4437. * Return value:
  4438. * none
  4439. **/
  4440. static void ipr_bus_reset_done(struct ipr_cmnd *ipr_cmd)
  4441. {
  4442. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4443. struct ipr_resource_entry *res;
  4444. ENTER;
  4445. if (!ioa_cfg->sis64)
  4446. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  4447. if (res->res_handle == ipr_cmd->ioarcb.res_handle) {
  4448. scsi_report_bus_reset(ioa_cfg->host, res->bus);
  4449. break;
  4450. }
  4451. }
  4452. /*
  4453. * If abort has not completed, indicate the reset has, else call the
  4454. * abort's done function to wake the sleeping eh thread
  4455. */
  4456. if (ipr_cmd->sibling->sibling)
  4457. ipr_cmd->sibling->sibling = NULL;
  4458. else
  4459. ipr_cmd->sibling->done(ipr_cmd->sibling);
  4460. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4461. LEAVE;
  4462. }
  4463. /**
  4464. * ipr_abort_timeout - An abort task has timed out
  4465. * @ipr_cmd: ipr command struct
  4466. *
  4467. * This function handles when an abort task times out. If this
  4468. * happens we issue a bus reset since we have resources tied
  4469. * up that must be freed before returning to the midlayer.
  4470. *
  4471. * Return value:
  4472. * none
  4473. **/
  4474. static void ipr_abort_timeout(struct ipr_cmnd *ipr_cmd)
  4475. {
  4476. struct ipr_cmnd *reset_cmd;
  4477. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  4478. struct ipr_cmd_pkt *cmd_pkt;
  4479. unsigned long lock_flags = 0;
  4480. ENTER;
  4481. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  4482. if (ipr_cmd->completion.done || ioa_cfg->in_reset_reload) {
  4483. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4484. return;
  4485. }
  4486. sdev_printk(KERN_ERR, ipr_cmd->u.sdev, "Abort timed out. Resetting bus.\n");
  4487. reset_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4488. ipr_cmd->sibling = reset_cmd;
  4489. reset_cmd->sibling = ipr_cmd;
  4490. reset_cmd->ioarcb.res_handle = ipr_cmd->ioarcb.res_handle;
  4491. cmd_pkt = &reset_cmd->ioarcb.cmd_pkt;
  4492. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4493. cmd_pkt->cdb[0] = IPR_RESET_DEVICE;
  4494. cmd_pkt->cdb[2] = IPR_RESET_TYPE_SELECT | IPR_BUS_RESET;
  4495. ipr_do_req(reset_cmd, ipr_bus_reset_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  4496. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  4497. LEAVE;
  4498. }
  4499. /**
  4500. * ipr_cancel_op - Cancel specified op
  4501. * @scsi_cmd: scsi command struct
  4502. *
  4503. * This function cancels specified op.
  4504. *
  4505. * Return value:
  4506. * SUCCESS / FAILED
  4507. **/
  4508. static int ipr_cancel_op(struct scsi_cmnd *scsi_cmd)
  4509. {
  4510. struct ipr_cmnd *ipr_cmd;
  4511. struct ipr_ioa_cfg *ioa_cfg;
  4512. struct ipr_resource_entry *res;
  4513. struct ipr_cmd_pkt *cmd_pkt;
  4514. u32 ioasc, int_reg;
  4515. int op_found = 0;
  4516. struct ipr_hrr_queue *hrrq;
  4517. ENTER;
  4518. ioa_cfg = (struct ipr_ioa_cfg *)scsi_cmd->device->host->hostdata;
  4519. res = scsi_cmd->device->hostdata;
  4520. /* If we are currently going through reset/reload, return failed.
  4521. * This will force the mid-layer to call ipr_eh_host_reset,
  4522. * which will then go to sleep and wait for the reset to complete
  4523. */
  4524. if (ioa_cfg->in_reset_reload ||
  4525. ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  4526. return FAILED;
  4527. if (!res)
  4528. return FAILED;
  4529. /*
  4530. * If we are aborting a timed out op, chances are that the timeout was caused
  4531. * by a still not detected EEH error. In such cases, reading a register will
  4532. * trigger the EEH recovery infrastructure.
  4533. */
  4534. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4535. if (!ipr_is_gscsi(res))
  4536. return FAILED;
  4537. for_each_hrrq(hrrq, ioa_cfg) {
  4538. spin_lock(&hrrq->_lock);
  4539. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  4540. if (ipr_cmd->scsi_cmd == scsi_cmd) {
  4541. ipr_cmd->done = ipr_scsi_eh_done;
  4542. op_found = 1;
  4543. break;
  4544. }
  4545. }
  4546. spin_unlock(&hrrq->_lock);
  4547. }
  4548. if (!op_found)
  4549. return SUCCESS;
  4550. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  4551. ipr_cmd->ioarcb.res_handle = res->res_handle;
  4552. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  4553. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  4554. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  4555. ipr_cmd->u.sdev = scsi_cmd->device;
  4556. scmd_printk(KERN_ERR, scsi_cmd, "Aborting command: %02X\n",
  4557. scsi_cmd->cmnd[0]);
  4558. ipr_send_blocking_cmd(ipr_cmd, ipr_abort_timeout, IPR_CANCEL_ALL_TIMEOUT);
  4559. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4560. /*
  4561. * If the abort task timed out and we sent a bus reset, we will get
  4562. * one the following responses to the abort
  4563. */
  4564. if (ioasc == IPR_IOASC_BUS_WAS_RESET || ioasc == IPR_IOASC_SYNC_REQUIRED) {
  4565. ioasc = 0;
  4566. ipr_trace;
  4567. }
  4568. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4569. if (!ipr_is_naca_model(res))
  4570. res->needs_sync_complete = 1;
  4571. LEAVE;
  4572. return IPR_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
  4573. }
  4574. /**
  4575. * ipr_eh_abort - Abort a single op
  4576. * @scsi_cmd: scsi command struct
  4577. *
  4578. * Return value:
  4579. * SUCCESS / FAILED
  4580. **/
  4581. static int ipr_eh_abort(struct scsi_cmnd *scsi_cmd)
  4582. {
  4583. unsigned long flags;
  4584. int rc;
  4585. ENTER;
  4586. spin_lock_irqsave(scsi_cmd->device->host->host_lock, flags);
  4587. rc = ipr_cancel_op(scsi_cmd);
  4588. spin_unlock_irqrestore(scsi_cmd->device->host->host_lock, flags);
  4589. LEAVE;
  4590. return rc;
  4591. }
  4592. /**
  4593. * ipr_handle_other_interrupt - Handle "other" interrupts
  4594. * @ioa_cfg: ioa config struct
  4595. * @int_reg: interrupt register
  4596. *
  4597. * Return value:
  4598. * IRQ_NONE / IRQ_HANDLED
  4599. **/
  4600. static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
  4601. u32 int_reg)
  4602. {
  4603. irqreturn_t rc = IRQ_HANDLED;
  4604. u32 int_mask_reg;
  4605. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  4606. int_reg &= ~int_mask_reg;
  4607. /* If an interrupt on the adapter did not occur, ignore it.
  4608. * Or in the case of SIS 64, check for a stage change interrupt.
  4609. */
  4610. if ((int_reg & IPR_PCII_OPER_INTERRUPTS) == 0) {
  4611. if (ioa_cfg->sis64) {
  4612. int_mask_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  4613. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4614. if (int_reg & IPR_PCII_IPL_STAGE_CHANGE) {
  4615. /* clear stage change */
  4616. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.clr_interrupt_reg);
  4617. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
  4618. list_del(&ioa_cfg->reset_cmd->queue);
  4619. del_timer(&ioa_cfg->reset_cmd->timer);
  4620. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4621. return IRQ_HANDLED;
  4622. }
  4623. }
  4624. return IRQ_NONE;
  4625. }
  4626. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  4627. /* Mask the interrupt */
  4628. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
  4629. /* Clear the interrupt */
  4630. writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.clr_interrupt_reg);
  4631. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  4632. list_del(&ioa_cfg->reset_cmd->queue);
  4633. del_timer(&ioa_cfg->reset_cmd->timer);
  4634. ipr_reset_ioa_job(ioa_cfg->reset_cmd);
  4635. } else if ((int_reg & IPR_PCII_HRRQ_UPDATED) == int_reg) {
  4636. if (ioa_cfg->clear_isr) {
  4637. if (ipr_debug && printk_ratelimit())
  4638. dev_err(&ioa_cfg->pdev->dev,
  4639. "Spurious interrupt detected. 0x%08X\n", int_reg);
  4640. writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg32);
  4641. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4642. return IRQ_NONE;
  4643. }
  4644. } else {
  4645. if (int_reg & IPR_PCII_IOA_UNIT_CHECKED)
  4646. ioa_cfg->ioa_unit_checked = 1;
  4647. else if (int_reg & IPR_PCII_NO_HOST_RRQ)
  4648. dev_err(&ioa_cfg->pdev->dev,
  4649. "No Host RRQ. 0x%08X\n", int_reg);
  4650. else
  4651. dev_err(&ioa_cfg->pdev->dev,
  4652. "Permanent IOA failure. 0x%08X\n", int_reg);
  4653. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4654. ioa_cfg->sdt_state = GET_DUMP;
  4655. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  4656. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4657. }
  4658. return rc;
  4659. }
  4660. /**
  4661. * ipr_isr_eh - Interrupt service routine error handler
  4662. * @ioa_cfg: ioa config struct
  4663. * @msg: message to log
  4664. *
  4665. * Return value:
  4666. * none
  4667. **/
  4668. static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg, u16 number)
  4669. {
  4670. ioa_cfg->errors_logged++;
  4671. dev_err(&ioa_cfg->pdev->dev, "%s %d\n", msg, number);
  4672. if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
  4673. ioa_cfg->sdt_state = GET_DUMP;
  4674. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  4675. }
  4676. static int ipr_process_hrrq(struct ipr_hrr_queue *hrr_queue, int budget,
  4677. struct list_head *doneq)
  4678. {
  4679. u32 ioasc;
  4680. u16 cmd_index;
  4681. struct ipr_cmnd *ipr_cmd;
  4682. struct ipr_ioa_cfg *ioa_cfg = hrr_queue->ioa_cfg;
  4683. int num_hrrq = 0;
  4684. /* If interrupts are disabled, ignore the interrupt */
  4685. if (!hrr_queue->allow_interrupts)
  4686. return 0;
  4687. while ((be32_to_cpu(*hrr_queue->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4688. hrr_queue->toggle_bit) {
  4689. cmd_index = (be32_to_cpu(*hrr_queue->hrrq_curr) &
  4690. IPR_HRRQ_REQ_RESP_HANDLE_MASK) >>
  4691. IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
  4692. if (unlikely(cmd_index > hrr_queue->max_cmd_id ||
  4693. cmd_index < hrr_queue->min_cmd_id)) {
  4694. ipr_isr_eh(ioa_cfg,
  4695. "Invalid response handle from IOA: ",
  4696. cmd_index);
  4697. break;
  4698. }
  4699. ipr_cmd = ioa_cfg->ipr_cmnd_list[cmd_index];
  4700. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4701. ipr_trc_hook(ipr_cmd, IPR_TRACE_FINISH, ioasc);
  4702. list_move_tail(&ipr_cmd->queue, doneq);
  4703. if (hrr_queue->hrrq_curr < hrr_queue->hrrq_end) {
  4704. hrr_queue->hrrq_curr++;
  4705. } else {
  4706. hrr_queue->hrrq_curr = hrr_queue->hrrq_start;
  4707. hrr_queue->toggle_bit ^= 1u;
  4708. }
  4709. num_hrrq++;
  4710. if (budget > 0 && num_hrrq >= budget)
  4711. break;
  4712. }
  4713. return num_hrrq;
  4714. }
  4715. static int ipr_iopoll(struct blk_iopoll *iop, int budget)
  4716. {
  4717. struct ipr_ioa_cfg *ioa_cfg;
  4718. struct ipr_hrr_queue *hrrq;
  4719. struct ipr_cmnd *ipr_cmd, *temp;
  4720. unsigned long hrrq_flags;
  4721. int completed_ops;
  4722. LIST_HEAD(doneq);
  4723. hrrq = container_of(iop, struct ipr_hrr_queue, iopoll);
  4724. ioa_cfg = hrrq->ioa_cfg;
  4725. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4726. completed_ops = ipr_process_hrrq(hrrq, budget, &doneq);
  4727. if (completed_ops < budget)
  4728. blk_iopoll_complete(iop);
  4729. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4730. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4731. list_del(&ipr_cmd->queue);
  4732. del_timer(&ipr_cmd->timer);
  4733. ipr_cmd->fast_done(ipr_cmd);
  4734. }
  4735. return completed_ops;
  4736. }
  4737. /**
  4738. * ipr_isr - Interrupt service routine
  4739. * @irq: irq number
  4740. * @devp: pointer to ioa config struct
  4741. *
  4742. * Return value:
  4743. * IRQ_NONE / IRQ_HANDLED
  4744. **/
  4745. static irqreturn_t ipr_isr(int irq, void *devp)
  4746. {
  4747. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4748. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4749. unsigned long hrrq_flags = 0;
  4750. u32 int_reg = 0;
  4751. int num_hrrq = 0;
  4752. int irq_none = 0;
  4753. struct ipr_cmnd *ipr_cmd, *temp;
  4754. irqreturn_t rc = IRQ_NONE;
  4755. LIST_HEAD(doneq);
  4756. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4757. /* If interrupts are disabled, ignore the interrupt */
  4758. if (!hrrq->allow_interrupts) {
  4759. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4760. return IRQ_NONE;
  4761. }
  4762. while (1) {
  4763. if (ipr_process_hrrq(hrrq, -1, &doneq)) {
  4764. rc = IRQ_HANDLED;
  4765. if (!ioa_cfg->clear_isr)
  4766. break;
  4767. /* Clear the PCI interrupt */
  4768. num_hrrq = 0;
  4769. do {
  4770. writel(IPR_PCII_HRRQ_UPDATED,
  4771. ioa_cfg->regs.clr_interrupt_reg32);
  4772. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4773. } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
  4774. num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
  4775. } else if (rc == IRQ_NONE && irq_none == 0) {
  4776. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  4777. irq_none++;
  4778. } else if (num_hrrq == IPR_MAX_HRRQ_RETRIES &&
  4779. int_reg & IPR_PCII_HRRQ_UPDATED) {
  4780. ipr_isr_eh(ioa_cfg,
  4781. "Error clearing HRRQ: ", num_hrrq);
  4782. rc = IRQ_HANDLED;
  4783. break;
  4784. } else
  4785. break;
  4786. }
  4787. if (unlikely(rc == IRQ_NONE))
  4788. rc = ipr_handle_other_interrupt(ioa_cfg, int_reg);
  4789. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4790. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4791. list_del(&ipr_cmd->queue);
  4792. del_timer(&ipr_cmd->timer);
  4793. ipr_cmd->fast_done(ipr_cmd);
  4794. }
  4795. return rc;
  4796. }
  4797. /**
  4798. * ipr_isr_mhrrq - Interrupt service routine
  4799. * @irq: irq number
  4800. * @devp: pointer to ioa config struct
  4801. *
  4802. * Return value:
  4803. * IRQ_NONE / IRQ_HANDLED
  4804. **/
  4805. static irqreturn_t ipr_isr_mhrrq(int irq, void *devp)
  4806. {
  4807. struct ipr_hrr_queue *hrrq = (struct ipr_hrr_queue *)devp;
  4808. struct ipr_ioa_cfg *ioa_cfg = hrrq->ioa_cfg;
  4809. unsigned long hrrq_flags = 0;
  4810. struct ipr_cmnd *ipr_cmd, *temp;
  4811. irqreturn_t rc = IRQ_NONE;
  4812. LIST_HEAD(doneq);
  4813. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  4814. /* If interrupts are disabled, ignore the interrupt */
  4815. if (!hrrq->allow_interrupts) {
  4816. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4817. return IRQ_NONE;
  4818. }
  4819. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  4820. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  4821. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4822. hrrq->toggle_bit) {
  4823. if (!blk_iopoll_sched_prep(&hrrq->iopoll))
  4824. blk_iopoll_sched(&hrrq->iopoll);
  4825. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4826. return IRQ_HANDLED;
  4827. }
  4828. } else {
  4829. if ((be32_to_cpu(*hrrq->hrrq_curr) & IPR_HRRQ_TOGGLE_BIT) ==
  4830. hrrq->toggle_bit)
  4831. if (ipr_process_hrrq(hrrq, -1, &doneq))
  4832. rc = IRQ_HANDLED;
  4833. }
  4834. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  4835. list_for_each_entry_safe(ipr_cmd, temp, &doneq, queue) {
  4836. list_del(&ipr_cmd->queue);
  4837. del_timer(&ipr_cmd->timer);
  4838. ipr_cmd->fast_done(ipr_cmd);
  4839. }
  4840. return rc;
  4841. }
  4842. /**
  4843. * ipr_build_ioadl64 - Build a scatter/gather list and map the buffer
  4844. * @ioa_cfg: ioa config struct
  4845. * @ipr_cmd: ipr command struct
  4846. *
  4847. * Return value:
  4848. * 0 on success / -1 on failure
  4849. **/
  4850. static int ipr_build_ioadl64(struct ipr_ioa_cfg *ioa_cfg,
  4851. struct ipr_cmnd *ipr_cmd)
  4852. {
  4853. int i, nseg;
  4854. struct scatterlist *sg;
  4855. u32 length;
  4856. u32 ioadl_flags = 0;
  4857. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4858. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4859. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ioadl64;
  4860. length = scsi_bufflen(scsi_cmd);
  4861. if (!length)
  4862. return 0;
  4863. nseg = scsi_dma_map(scsi_cmd);
  4864. if (nseg < 0) {
  4865. if (printk_ratelimit())
  4866. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4867. return -1;
  4868. }
  4869. ipr_cmd->dma_use_sg = nseg;
  4870. ioarcb->data_transfer_length = cpu_to_be32(length);
  4871. ioarcb->ioadl_len =
  4872. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  4873. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4874. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4875. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4876. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE)
  4877. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4878. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4879. ioadl64[i].flags = cpu_to_be32(ioadl_flags);
  4880. ioadl64[i].data_len = cpu_to_be32(sg_dma_len(sg));
  4881. ioadl64[i].address = cpu_to_be64(sg_dma_address(sg));
  4882. }
  4883. ioadl64[i-1].flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4884. return 0;
  4885. }
  4886. /**
  4887. * ipr_build_ioadl - Build a scatter/gather list and map the buffer
  4888. * @ioa_cfg: ioa config struct
  4889. * @ipr_cmd: ipr command struct
  4890. *
  4891. * Return value:
  4892. * 0 on success / -1 on failure
  4893. **/
  4894. static int ipr_build_ioadl(struct ipr_ioa_cfg *ioa_cfg,
  4895. struct ipr_cmnd *ipr_cmd)
  4896. {
  4897. int i, nseg;
  4898. struct scatterlist *sg;
  4899. u32 length;
  4900. u32 ioadl_flags = 0;
  4901. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4902. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  4903. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  4904. length = scsi_bufflen(scsi_cmd);
  4905. if (!length)
  4906. return 0;
  4907. nseg = scsi_dma_map(scsi_cmd);
  4908. if (nseg < 0) {
  4909. dev_err(&ioa_cfg->pdev->dev, "pci_map_sg failed!\n");
  4910. return -1;
  4911. }
  4912. ipr_cmd->dma_use_sg = nseg;
  4913. if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE) {
  4914. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  4915. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  4916. ioarcb->data_transfer_length = cpu_to_be32(length);
  4917. ioarcb->ioadl_len =
  4918. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4919. } else if (scsi_cmd->sc_data_direction == DMA_FROM_DEVICE) {
  4920. ioadl_flags = IPR_IOADL_FLAGS_READ;
  4921. ioarcb->read_data_transfer_length = cpu_to_be32(length);
  4922. ioarcb->read_ioadl_len =
  4923. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  4924. }
  4925. if (ipr_cmd->dma_use_sg <= ARRAY_SIZE(ioarcb->u.add_data.u.ioadl)) {
  4926. ioadl = ioarcb->u.add_data.u.ioadl;
  4927. ioarcb->write_ioadl_addr = cpu_to_be32((ipr_cmd->dma_addr) +
  4928. offsetof(struct ipr_ioarcb, u.add_data));
  4929. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  4930. }
  4931. scsi_for_each_sg(scsi_cmd, sg, ipr_cmd->dma_use_sg, i) {
  4932. ioadl[i].flags_and_data_len =
  4933. cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  4934. ioadl[i].address = cpu_to_be32(sg_dma_address(sg));
  4935. }
  4936. ioadl[i-1].flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  4937. return 0;
  4938. }
  4939. /**
  4940. * ipr_get_task_attributes - Translate SPI Q-Tag to task attributes
  4941. * @scsi_cmd: scsi command struct
  4942. *
  4943. * Return value:
  4944. * task attributes
  4945. **/
  4946. static u8 ipr_get_task_attributes(struct scsi_cmnd *scsi_cmd)
  4947. {
  4948. u8 tag[2];
  4949. u8 rc = IPR_FLAGS_LO_UNTAGGED_TASK;
  4950. if (scsi_populate_tag_msg(scsi_cmd, tag)) {
  4951. switch (tag[0]) {
  4952. case MSG_SIMPLE_TAG:
  4953. rc = IPR_FLAGS_LO_SIMPLE_TASK;
  4954. break;
  4955. case MSG_HEAD_TAG:
  4956. rc = IPR_FLAGS_LO_HEAD_OF_Q_TASK;
  4957. break;
  4958. case MSG_ORDERED_TAG:
  4959. rc = IPR_FLAGS_LO_ORDERED_TASK;
  4960. break;
  4961. };
  4962. }
  4963. return rc;
  4964. }
  4965. /**
  4966. * ipr_erp_done - Process completion of ERP for a device
  4967. * @ipr_cmd: ipr command struct
  4968. *
  4969. * This function copies the sense buffer into the scsi_cmd
  4970. * struct and pushes the scsi_done function.
  4971. *
  4972. * Return value:
  4973. * nothing
  4974. **/
  4975. static void ipr_erp_done(struct ipr_cmnd *ipr_cmd)
  4976. {
  4977. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  4978. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  4979. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  4980. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  4981. scsi_cmd->result |= (DID_ERROR << 16);
  4982. scmd_printk(KERN_ERR, scsi_cmd,
  4983. "Request Sense failed with IOASC: 0x%08X\n", ioasc);
  4984. } else {
  4985. memcpy(scsi_cmd->sense_buffer, ipr_cmd->sense_buffer,
  4986. SCSI_SENSE_BUFFERSIZE);
  4987. }
  4988. if (res) {
  4989. if (!ipr_is_naca_model(res))
  4990. res->needs_sync_complete = 1;
  4991. res->in_erp = 0;
  4992. }
  4993. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  4994. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  4995. scsi_cmd->scsi_done(scsi_cmd);
  4996. }
  4997. /**
  4998. * ipr_reinit_ipr_cmnd_for_erp - Re-initialize a cmnd block to be used for ERP
  4999. * @ipr_cmd: ipr command struct
  5000. *
  5001. * Return value:
  5002. * none
  5003. **/
  5004. static void ipr_reinit_ipr_cmnd_for_erp(struct ipr_cmnd *ipr_cmd)
  5005. {
  5006. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5007. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5008. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5009. memset(&ioarcb->cmd_pkt, 0, sizeof(struct ipr_cmd_pkt));
  5010. ioarcb->data_transfer_length = 0;
  5011. ioarcb->read_data_transfer_length = 0;
  5012. ioarcb->ioadl_len = 0;
  5013. ioarcb->read_ioadl_len = 0;
  5014. ioasa->hdr.ioasc = 0;
  5015. ioasa->hdr.residual_data_len = 0;
  5016. if (ipr_cmd->ioa_cfg->sis64)
  5017. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5018. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  5019. else {
  5020. ioarcb->write_ioadl_addr =
  5021. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  5022. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  5023. }
  5024. }
  5025. /**
  5026. * ipr_erp_request_sense - Send request sense to a device
  5027. * @ipr_cmd: ipr command struct
  5028. *
  5029. * This function sends a request sense to a device as a result
  5030. * of a check condition.
  5031. *
  5032. * Return value:
  5033. * nothing
  5034. **/
  5035. static void ipr_erp_request_sense(struct ipr_cmnd *ipr_cmd)
  5036. {
  5037. struct ipr_cmd_pkt *cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5038. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5039. if (IPR_IOASC_SENSE_KEY(ioasc) > 0) {
  5040. ipr_erp_done(ipr_cmd);
  5041. return;
  5042. }
  5043. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5044. cmd_pkt->request_type = IPR_RQTYPE_SCSICDB;
  5045. cmd_pkt->cdb[0] = REQUEST_SENSE;
  5046. cmd_pkt->cdb[4] = SCSI_SENSE_BUFFERSIZE;
  5047. cmd_pkt->flags_hi |= IPR_FLAGS_HI_SYNC_OVERRIDE;
  5048. cmd_pkt->flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5049. cmd_pkt->timeout = cpu_to_be16(IPR_REQUEST_SENSE_TIMEOUT / HZ);
  5050. ipr_init_ioadl(ipr_cmd, ipr_cmd->sense_buffer_dma,
  5051. SCSI_SENSE_BUFFERSIZE, IPR_IOADL_FLAGS_READ_LAST);
  5052. ipr_do_req(ipr_cmd, ipr_erp_done, ipr_timeout,
  5053. IPR_REQUEST_SENSE_TIMEOUT * 2);
  5054. }
  5055. /**
  5056. * ipr_erp_cancel_all - Send cancel all to a device
  5057. * @ipr_cmd: ipr command struct
  5058. *
  5059. * This function sends a cancel all to a device to clear the
  5060. * queue. If we are running TCQ on the device, QERR is set to 1,
  5061. * which means all outstanding ops have been dropped on the floor.
  5062. * Cancel all will return them to us.
  5063. *
  5064. * Return value:
  5065. * nothing
  5066. **/
  5067. static void ipr_erp_cancel_all(struct ipr_cmnd *ipr_cmd)
  5068. {
  5069. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5070. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5071. struct ipr_cmd_pkt *cmd_pkt;
  5072. res->in_erp = 1;
  5073. ipr_reinit_ipr_cmnd_for_erp(ipr_cmd);
  5074. if (!scsi_get_tag_type(scsi_cmd->device)) {
  5075. ipr_erp_request_sense(ipr_cmd);
  5076. return;
  5077. }
  5078. cmd_pkt = &ipr_cmd->ioarcb.cmd_pkt;
  5079. cmd_pkt->request_type = IPR_RQTYPE_IOACMD;
  5080. cmd_pkt->cdb[0] = IPR_CANCEL_ALL_REQUESTS;
  5081. ipr_do_req(ipr_cmd, ipr_erp_request_sense, ipr_timeout,
  5082. IPR_CANCEL_ALL_TIMEOUT);
  5083. }
  5084. /**
  5085. * ipr_dump_ioasa - Dump contents of IOASA
  5086. * @ioa_cfg: ioa config struct
  5087. * @ipr_cmd: ipr command struct
  5088. * @res: resource entry struct
  5089. *
  5090. * This function is invoked by the interrupt handler when ops
  5091. * fail. It will log the IOASA if appropriate. Only called
  5092. * for GPDD ops.
  5093. *
  5094. * Return value:
  5095. * none
  5096. **/
  5097. static void ipr_dump_ioasa(struct ipr_ioa_cfg *ioa_cfg,
  5098. struct ipr_cmnd *ipr_cmd, struct ipr_resource_entry *res)
  5099. {
  5100. int i;
  5101. u16 data_len;
  5102. u32 ioasc, fd_ioasc;
  5103. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5104. __be32 *ioasa_data = (__be32 *)ioasa;
  5105. int error_index;
  5106. ioasc = be32_to_cpu(ioasa->hdr.ioasc) & IPR_IOASC_IOASC_MASK;
  5107. fd_ioasc = be32_to_cpu(ioasa->hdr.fd_ioasc) & IPR_IOASC_IOASC_MASK;
  5108. if (0 == ioasc)
  5109. return;
  5110. if (ioa_cfg->log_level < IPR_DEFAULT_LOG_LEVEL)
  5111. return;
  5112. if (ioasc == IPR_IOASC_BUS_WAS_RESET && fd_ioasc)
  5113. error_index = ipr_get_error(fd_ioasc);
  5114. else
  5115. error_index = ipr_get_error(ioasc);
  5116. if (ioa_cfg->log_level < IPR_MAX_LOG_LEVEL) {
  5117. /* Don't log an error if the IOA already logged one */
  5118. if (ioasa->hdr.ilid != 0)
  5119. return;
  5120. if (!ipr_is_gscsi(res))
  5121. return;
  5122. if (ipr_error_table[error_index].log_ioasa == 0)
  5123. return;
  5124. }
  5125. ipr_res_err(ioa_cfg, res, "%s\n", ipr_error_table[error_index].error);
  5126. data_len = be16_to_cpu(ioasa->hdr.ret_stat_len);
  5127. if (ioa_cfg->sis64 && sizeof(struct ipr_ioasa64) < data_len)
  5128. data_len = sizeof(struct ipr_ioasa64);
  5129. else if (!ioa_cfg->sis64 && sizeof(struct ipr_ioasa) < data_len)
  5130. data_len = sizeof(struct ipr_ioasa);
  5131. ipr_err("IOASA Dump:\n");
  5132. for (i = 0; i < data_len / 4; i += 4) {
  5133. ipr_err("%08X: %08X %08X %08X %08X\n", i*4,
  5134. be32_to_cpu(ioasa_data[i]),
  5135. be32_to_cpu(ioasa_data[i+1]),
  5136. be32_to_cpu(ioasa_data[i+2]),
  5137. be32_to_cpu(ioasa_data[i+3]));
  5138. }
  5139. }
  5140. /**
  5141. * ipr_gen_sense - Generate SCSI sense data from an IOASA
  5142. * @ioasa: IOASA
  5143. * @sense_buf: sense data buffer
  5144. *
  5145. * Return value:
  5146. * none
  5147. **/
  5148. static void ipr_gen_sense(struct ipr_cmnd *ipr_cmd)
  5149. {
  5150. u32 failing_lba;
  5151. u8 *sense_buf = ipr_cmd->scsi_cmd->sense_buffer;
  5152. struct ipr_resource_entry *res = ipr_cmd->scsi_cmd->device->hostdata;
  5153. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5154. u32 ioasc = be32_to_cpu(ioasa->hdr.ioasc);
  5155. memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
  5156. if (ioasc >= IPR_FIRST_DRIVER_IOASC)
  5157. return;
  5158. ipr_cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
  5159. if (ipr_is_vset_device(res) &&
  5160. ioasc == IPR_IOASC_MED_DO_NOT_REALLOC &&
  5161. ioasa->u.vset.failing_lba_hi != 0) {
  5162. sense_buf[0] = 0x72;
  5163. sense_buf[1] = IPR_IOASC_SENSE_KEY(ioasc);
  5164. sense_buf[2] = IPR_IOASC_SENSE_CODE(ioasc);
  5165. sense_buf[3] = IPR_IOASC_SENSE_QUAL(ioasc);
  5166. sense_buf[7] = 12;
  5167. sense_buf[8] = 0;
  5168. sense_buf[9] = 0x0A;
  5169. sense_buf[10] = 0x80;
  5170. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_hi);
  5171. sense_buf[12] = (failing_lba & 0xff000000) >> 24;
  5172. sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
  5173. sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
  5174. sense_buf[15] = failing_lba & 0x000000ff;
  5175. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5176. sense_buf[16] = (failing_lba & 0xff000000) >> 24;
  5177. sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
  5178. sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
  5179. sense_buf[19] = failing_lba & 0x000000ff;
  5180. } else {
  5181. sense_buf[0] = 0x70;
  5182. sense_buf[2] = IPR_IOASC_SENSE_KEY(ioasc);
  5183. sense_buf[12] = IPR_IOASC_SENSE_CODE(ioasc);
  5184. sense_buf[13] = IPR_IOASC_SENSE_QUAL(ioasc);
  5185. /* Illegal request */
  5186. if ((IPR_IOASC_SENSE_KEY(ioasc) == 0x05) &&
  5187. (be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_FIELD_POINTER_VALID)) {
  5188. sense_buf[7] = 10; /* additional length */
  5189. /* IOARCB was in error */
  5190. if (IPR_IOASC_SENSE_CODE(ioasc) == 0x24)
  5191. sense_buf[15] = 0xC0;
  5192. else /* Parameter data was invalid */
  5193. sense_buf[15] = 0x80;
  5194. sense_buf[16] =
  5195. ((IPR_FIELD_POINTER_MASK &
  5196. be32_to_cpu(ioasa->hdr.ioasc_specific)) >> 8) & 0xff;
  5197. sense_buf[17] =
  5198. (IPR_FIELD_POINTER_MASK &
  5199. be32_to_cpu(ioasa->hdr.ioasc_specific)) & 0xff;
  5200. } else {
  5201. if (ioasc == IPR_IOASC_MED_DO_NOT_REALLOC) {
  5202. if (ipr_is_vset_device(res))
  5203. failing_lba = be32_to_cpu(ioasa->u.vset.failing_lba_lo);
  5204. else
  5205. failing_lba = be32_to_cpu(ioasa->u.dasd.failing_lba);
  5206. sense_buf[0] |= 0x80; /* Or in the Valid bit */
  5207. sense_buf[3] = (failing_lba & 0xff000000) >> 24;
  5208. sense_buf[4] = (failing_lba & 0x00ff0000) >> 16;
  5209. sense_buf[5] = (failing_lba & 0x0000ff00) >> 8;
  5210. sense_buf[6] = failing_lba & 0x000000ff;
  5211. }
  5212. sense_buf[7] = 6; /* additional length */
  5213. }
  5214. }
  5215. }
  5216. /**
  5217. * ipr_get_autosense - Copy autosense data to sense buffer
  5218. * @ipr_cmd: ipr command struct
  5219. *
  5220. * This function copies the autosense buffer to the buffer
  5221. * in the scsi_cmd, if there is autosense available.
  5222. *
  5223. * Return value:
  5224. * 1 if autosense was available / 0 if not
  5225. **/
  5226. static int ipr_get_autosense(struct ipr_cmnd *ipr_cmd)
  5227. {
  5228. struct ipr_ioasa *ioasa = &ipr_cmd->s.ioasa;
  5229. struct ipr_ioasa64 *ioasa64 = &ipr_cmd->s.ioasa64;
  5230. if ((be32_to_cpu(ioasa->hdr.ioasc_specific) & IPR_AUTOSENSE_VALID) == 0)
  5231. return 0;
  5232. if (ipr_cmd->ioa_cfg->sis64)
  5233. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa64->auto_sense.data,
  5234. min_t(u16, be16_to_cpu(ioasa64->auto_sense.auto_sense_len),
  5235. SCSI_SENSE_BUFFERSIZE));
  5236. else
  5237. memcpy(ipr_cmd->scsi_cmd->sense_buffer, ioasa->auto_sense.data,
  5238. min_t(u16, be16_to_cpu(ioasa->auto_sense.auto_sense_len),
  5239. SCSI_SENSE_BUFFERSIZE));
  5240. return 1;
  5241. }
  5242. /**
  5243. * ipr_erp_start - Process an error response for a SCSI op
  5244. * @ioa_cfg: ioa config struct
  5245. * @ipr_cmd: ipr command struct
  5246. *
  5247. * This function determines whether or not to initiate ERP
  5248. * on the affected device.
  5249. *
  5250. * Return value:
  5251. * nothing
  5252. **/
  5253. static void ipr_erp_start(struct ipr_ioa_cfg *ioa_cfg,
  5254. struct ipr_cmnd *ipr_cmd)
  5255. {
  5256. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5257. struct ipr_resource_entry *res = scsi_cmd->device->hostdata;
  5258. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5259. u32 masked_ioasc = ioasc & IPR_IOASC_IOASC_MASK;
  5260. if (!res) {
  5261. ipr_scsi_eh_done(ipr_cmd);
  5262. return;
  5263. }
  5264. if (!ipr_is_gscsi(res) && masked_ioasc != IPR_IOASC_HW_DEV_BUS_STATUS)
  5265. ipr_gen_sense(ipr_cmd);
  5266. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5267. switch (masked_ioasc) {
  5268. case IPR_IOASC_ABORTED_CMD_TERM_BY_HOST:
  5269. if (ipr_is_naca_model(res))
  5270. scsi_cmd->result |= (DID_ABORT << 16);
  5271. else
  5272. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5273. break;
  5274. case IPR_IOASC_IR_RESOURCE_HANDLE:
  5275. case IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA:
  5276. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5277. break;
  5278. case IPR_IOASC_HW_SEL_TIMEOUT:
  5279. scsi_cmd->result |= (DID_NO_CONNECT << 16);
  5280. if (!ipr_is_naca_model(res))
  5281. res->needs_sync_complete = 1;
  5282. break;
  5283. case IPR_IOASC_SYNC_REQUIRED:
  5284. if (!res->in_erp)
  5285. res->needs_sync_complete = 1;
  5286. scsi_cmd->result |= (DID_IMM_RETRY << 16);
  5287. break;
  5288. case IPR_IOASC_MED_DO_NOT_REALLOC: /* prevent retries */
  5289. case IPR_IOASA_IR_DUAL_IOA_DISABLED:
  5290. scsi_cmd->result |= (DID_PASSTHROUGH << 16);
  5291. break;
  5292. case IPR_IOASC_BUS_WAS_RESET:
  5293. case IPR_IOASC_BUS_WAS_RESET_BY_OTHER:
  5294. /*
  5295. * Report the bus reset and ask for a retry. The device
  5296. * will give CC/UA the next command.
  5297. */
  5298. if (!res->resetting_device)
  5299. scsi_report_bus_reset(ioa_cfg->host, scsi_cmd->device->channel);
  5300. scsi_cmd->result |= (DID_ERROR << 16);
  5301. if (!ipr_is_naca_model(res))
  5302. res->needs_sync_complete = 1;
  5303. break;
  5304. case IPR_IOASC_HW_DEV_BUS_STATUS:
  5305. scsi_cmd->result |= IPR_IOASC_SENSE_STATUS(ioasc);
  5306. if (IPR_IOASC_SENSE_STATUS(ioasc) == SAM_STAT_CHECK_CONDITION) {
  5307. if (!ipr_get_autosense(ipr_cmd)) {
  5308. if (!ipr_is_naca_model(res)) {
  5309. ipr_erp_cancel_all(ipr_cmd);
  5310. return;
  5311. }
  5312. }
  5313. }
  5314. if (!ipr_is_naca_model(res))
  5315. res->needs_sync_complete = 1;
  5316. break;
  5317. case IPR_IOASC_NR_INIT_CMD_REQUIRED:
  5318. break;
  5319. default:
  5320. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5321. scsi_cmd->result |= (DID_ERROR << 16);
  5322. if (!ipr_is_vset_device(res) && !ipr_is_naca_model(res))
  5323. res->needs_sync_complete = 1;
  5324. break;
  5325. }
  5326. scsi_dma_unmap(ipr_cmd->scsi_cmd);
  5327. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5328. scsi_cmd->scsi_done(scsi_cmd);
  5329. }
  5330. /**
  5331. * ipr_scsi_done - mid-layer done function
  5332. * @ipr_cmd: ipr command struct
  5333. *
  5334. * This function is invoked by the interrupt handler for
  5335. * ops generated by the SCSI mid-layer
  5336. *
  5337. * Return value:
  5338. * none
  5339. **/
  5340. static void ipr_scsi_done(struct ipr_cmnd *ipr_cmd)
  5341. {
  5342. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5343. struct scsi_cmnd *scsi_cmd = ipr_cmd->scsi_cmd;
  5344. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5345. unsigned long hrrq_flags;
  5346. scsi_set_resid(scsi_cmd, be32_to_cpu(ipr_cmd->s.ioasa.hdr.residual_data_len));
  5347. if (likely(IPR_IOASC_SENSE_KEY(ioasc) == 0)) {
  5348. scsi_dma_unmap(scsi_cmd);
  5349. spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
  5350. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5351. scsi_cmd->scsi_done(scsi_cmd);
  5352. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
  5353. } else {
  5354. spin_lock_irqsave(ipr_cmd->hrrq->lock, hrrq_flags);
  5355. ipr_erp_start(ioa_cfg, ipr_cmd);
  5356. spin_unlock_irqrestore(ipr_cmd->hrrq->lock, hrrq_flags);
  5357. }
  5358. }
  5359. /**
  5360. * ipr_queuecommand - Queue a mid-layer request
  5361. * @shost: scsi host struct
  5362. * @scsi_cmd: scsi command struct
  5363. *
  5364. * This function queues a request generated by the mid-layer.
  5365. *
  5366. * Return value:
  5367. * 0 on success
  5368. * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
  5369. * SCSI_MLQUEUE_HOST_BUSY if host is busy
  5370. **/
  5371. static int ipr_queuecommand(struct Scsi_Host *shost,
  5372. struct scsi_cmnd *scsi_cmd)
  5373. {
  5374. struct ipr_ioa_cfg *ioa_cfg;
  5375. struct ipr_resource_entry *res;
  5376. struct ipr_ioarcb *ioarcb;
  5377. struct ipr_cmnd *ipr_cmd;
  5378. unsigned long hrrq_flags, lock_flags;
  5379. int rc;
  5380. struct ipr_hrr_queue *hrrq;
  5381. int hrrq_id;
  5382. ioa_cfg = (struct ipr_ioa_cfg *)shost->hostdata;
  5383. scsi_cmd->result = (DID_OK << 16);
  5384. res = scsi_cmd->device->hostdata;
  5385. if (ipr_is_gata(res) && res->sata_port) {
  5386. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  5387. rc = ata_sas_queuecmd(scsi_cmd, res->sata_port->ap);
  5388. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  5389. return rc;
  5390. }
  5391. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5392. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5393. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5394. /*
  5395. * We are currently blocking all devices due to a host reset
  5396. * We have told the host to stop giving us new requests, but
  5397. * ERP ops don't count. FIXME
  5398. */
  5399. if (unlikely(!hrrq->allow_cmds && !hrrq->ioa_is_dead && !hrrq->removing_ioa)) {
  5400. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5401. return SCSI_MLQUEUE_HOST_BUSY;
  5402. }
  5403. /*
  5404. * FIXME - Create scsi_set_host_offline interface
  5405. * and the ioa_is_dead check can be removed
  5406. */
  5407. if (unlikely(hrrq->ioa_is_dead || hrrq->removing_ioa || !res)) {
  5408. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5409. goto err_nodev;
  5410. }
  5411. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5412. if (ipr_cmd == NULL) {
  5413. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5414. return SCSI_MLQUEUE_HOST_BUSY;
  5415. }
  5416. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5417. ipr_init_ipr_cmnd(ipr_cmd, ipr_scsi_done);
  5418. ioarcb = &ipr_cmd->ioarcb;
  5419. memcpy(ioarcb->cmd_pkt.cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
  5420. ipr_cmd->scsi_cmd = scsi_cmd;
  5421. ipr_cmd->done = ipr_scsi_eh_done;
  5422. if (ipr_is_gscsi(res) || ipr_is_vset_device(res)) {
  5423. if (scsi_cmd->underflow == 0)
  5424. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5425. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5426. if (ipr_is_gscsi(res))
  5427. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_DELAY_AFTER_RST;
  5428. ioarcb->cmd_pkt.flags_lo |= IPR_FLAGS_LO_ALIGNED_BFR;
  5429. ioarcb->cmd_pkt.flags_lo |= ipr_get_task_attributes(scsi_cmd);
  5430. }
  5431. if (scsi_cmd->cmnd[0] >= 0xC0 &&
  5432. (!ipr_is_gscsi(res) || scsi_cmd->cmnd[0] == IPR_QUERY_RSRC_STATE)) {
  5433. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  5434. }
  5435. if (ioa_cfg->sis64)
  5436. rc = ipr_build_ioadl64(ioa_cfg, ipr_cmd);
  5437. else
  5438. rc = ipr_build_ioadl(ioa_cfg, ipr_cmd);
  5439. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5440. if (unlikely(rc || (!hrrq->allow_cmds && !hrrq->ioa_is_dead))) {
  5441. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5442. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5443. if (!rc)
  5444. scsi_dma_unmap(scsi_cmd);
  5445. return SCSI_MLQUEUE_HOST_BUSY;
  5446. }
  5447. if (unlikely(hrrq->ioa_is_dead)) {
  5448. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_free_q);
  5449. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5450. scsi_dma_unmap(scsi_cmd);
  5451. goto err_nodev;
  5452. }
  5453. ioarcb->res_handle = res->res_handle;
  5454. if (res->needs_sync_complete) {
  5455. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_SYNC_COMPLETE;
  5456. res->needs_sync_complete = 0;
  5457. }
  5458. list_add_tail(&ipr_cmd->queue, &hrrq->hrrq_pending_q);
  5459. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5460. ipr_send_command(ipr_cmd);
  5461. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5462. return 0;
  5463. err_nodev:
  5464. spin_lock_irqsave(hrrq->lock, hrrq_flags);
  5465. memset(scsi_cmd->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
  5466. scsi_cmd->result = (DID_NO_CONNECT << 16);
  5467. scsi_cmd->scsi_done(scsi_cmd);
  5468. spin_unlock_irqrestore(hrrq->lock, hrrq_flags);
  5469. return 0;
  5470. }
  5471. /**
  5472. * ipr_ioctl - IOCTL handler
  5473. * @sdev: scsi device struct
  5474. * @cmd: IOCTL cmd
  5475. * @arg: IOCTL arg
  5476. *
  5477. * Return value:
  5478. * 0 on success / other on failure
  5479. **/
  5480. static int ipr_ioctl(struct scsi_device *sdev, int cmd, void __user *arg)
  5481. {
  5482. struct ipr_resource_entry *res;
  5483. res = (struct ipr_resource_entry *)sdev->hostdata;
  5484. if (res && ipr_is_gata(res)) {
  5485. if (cmd == HDIO_GET_IDENTITY)
  5486. return -ENOTTY;
  5487. return ata_sas_scsi_ioctl(res->sata_port->ap, sdev, cmd, arg);
  5488. }
  5489. return -EINVAL;
  5490. }
  5491. /**
  5492. * ipr_info - Get information about the card/driver
  5493. * @scsi_host: scsi host struct
  5494. *
  5495. * Return value:
  5496. * pointer to buffer with description string
  5497. **/
  5498. static const char *ipr_ioa_info(struct Scsi_Host *host)
  5499. {
  5500. static char buffer[512];
  5501. struct ipr_ioa_cfg *ioa_cfg;
  5502. unsigned long lock_flags = 0;
  5503. ioa_cfg = (struct ipr_ioa_cfg *) host->hostdata;
  5504. spin_lock_irqsave(host->host_lock, lock_flags);
  5505. sprintf(buffer, "IBM %X Storage Adapter", ioa_cfg->type);
  5506. spin_unlock_irqrestore(host->host_lock, lock_flags);
  5507. return buffer;
  5508. }
  5509. static struct scsi_host_template driver_template = {
  5510. .module = THIS_MODULE,
  5511. .name = "IPR",
  5512. .info = ipr_ioa_info,
  5513. .ioctl = ipr_ioctl,
  5514. .queuecommand = ipr_queuecommand,
  5515. .eh_abort_handler = ipr_eh_abort,
  5516. .eh_device_reset_handler = ipr_eh_dev_reset,
  5517. .eh_host_reset_handler = ipr_eh_host_reset,
  5518. .slave_alloc = ipr_slave_alloc,
  5519. .slave_configure = ipr_slave_configure,
  5520. .slave_destroy = ipr_slave_destroy,
  5521. .target_alloc = ipr_target_alloc,
  5522. .target_destroy = ipr_target_destroy,
  5523. .change_queue_depth = ipr_change_queue_depth,
  5524. .change_queue_type = ipr_change_queue_type,
  5525. .bios_param = ipr_biosparam,
  5526. .can_queue = IPR_MAX_COMMANDS,
  5527. .this_id = -1,
  5528. .sg_tablesize = IPR_MAX_SGLIST,
  5529. .max_sectors = IPR_IOA_MAX_SECTORS,
  5530. .cmd_per_lun = IPR_MAX_CMD_PER_LUN,
  5531. .use_clustering = ENABLE_CLUSTERING,
  5532. .shost_attrs = ipr_ioa_attrs,
  5533. .sdev_attrs = ipr_dev_attrs,
  5534. .proc_name = IPR_NAME,
  5535. .no_write_same = 1,
  5536. };
  5537. /**
  5538. * ipr_ata_phy_reset - libata phy_reset handler
  5539. * @ap: ata port to reset
  5540. *
  5541. **/
  5542. static void ipr_ata_phy_reset(struct ata_port *ap)
  5543. {
  5544. unsigned long flags;
  5545. struct ipr_sata_port *sata_port = ap->private_data;
  5546. struct ipr_resource_entry *res = sata_port->res;
  5547. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5548. int rc;
  5549. ENTER;
  5550. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5551. while (ioa_cfg->in_reset_reload) {
  5552. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5553. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5554. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5555. }
  5556. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  5557. goto out_unlock;
  5558. rc = ipr_device_reset(ioa_cfg, res);
  5559. if (rc) {
  5560. ap->link.device[0].class = ATA_DEV_NONE;
  5561. goto out_unlock;
  5562. }
  5563. ap->link.device[0].class = res->ata_class;
  5564. if (ap->link.device[0].class == ATA_DEV_UNKNOWN)
  5565. ap->link.device[0].class = ATA_DEV_NONE;
  5566. out_unlock:
  5567. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5568. LEAVE;
  5569. }
  5570. /**
  5571. * ipr_ata_post_internal - Cleanup after an internal command
  5572. * @qc: ATA queued command
  5573. *
  5574. * Return value:
  5575. * none
  5576. **/
  5577. static void ipr_ata_post_internal(struct ata_queued_cmd *qc)
  5578. {
  5579. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5580. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5581. struct ipr_cmnd *ipr_cmd;
  5582. struct ipr_hrr_queue *hrrq;
  5583. unsigned long flags;
  5584. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5585. while (ioa_cfg->in_reset_reload) {
  5586. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5587. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  5588. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  5589. }
  5590. for_each_hrrq(hrrq, ioa_cfg) {
  5591. spin_lock(&hrrq->_lock);
  5592. list_for_each_entry(ipr_cmd, &hrrq->hrrq_pending_q, queue) {
  5593. if (ipr_cmd->qc == qc) {
  5594. ipr_device_reset(ioa_cfg, sata_port->res);
  5595. break;
  5596. }
  5597. }
  5598. spin_unlock(&hrrq->_lock);
  5599. }
  5600. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  5601. }
  5602. /**
  5603. * ipr_copy_sata_tf - Copy a SATA taskfile to an IOA data structure
  5604. * @regs: destination
  5605. * @tf: source ATA taskfile
  5606. *
  5607. * Return value:
  5608. * none
  5609. **/
  5610. static void ipr_copy_sata_tf(struct ipr_ioarcb_ata_regs *regs,
  5611. struct ata_taskfile *tf)
  5612. {
  5613. regs->feature = tf->feature;
  5614. regs->nsect = tf->nsect;
  5615. regs->lbal = tf->lbal;
  5616. regs->lbam = tf->lbam;
  5617. regs->lbah = tf->lbah;
  5618. regs->device = tf->device;
  5619. regs->command = tf->command;
  5620. regs->hob_feature = tf->hob_feature;
  5621. regs->hob_nsect = tf->hob_nsect;
  5622. regs->hob_lbal = tf->hob_lbal;
  5623. regs->hob_lbam = tf->hob_lbam;
  5624. regs->hob_lbah = tf->hob_lbah;
  5625. regs->ctl = tf->ctl;
  5626. }
  5627. /**
  5628. * ipr_sata_done - done function for SATA commands
  5629. * @ipr_cmd: ipr command struct
  5630. *
  5631. * This function is invoked by the interrupt handler for
  5632. * ops generated by the SCSI mid-layer to SATA devices
  5633. *
  5634. * Return value:
  5635. * none
  5636. **/
  5637. static void ipr_sata_done(struct ipr_cmnd *ipr_cmd)
  5638. {
  5639. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5640. struct ata_queued_cmd *qc = ipr_cmd->qc;
  5641. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5642. struct ipr_resource_entry *res = sata_port->res;
  5643. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  5644. spin_lock(&ipr_cmd->hrrq->_lock);
  5645. if (ipr_cmd->ioa_cfg->sis64)
  5646. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa64.u.gata,
  5647. sizeof(struct ipr_ioasa_gata));
  5648. else
  5649. memcpy(&sata_port->ioasa, &ipr_cmd->s.ioasa.u.gata,
  5650. sizeof(struct ipr_ioasa_gata));
  5651. ipr_dump_ioasa(ioa_cfg, ipr_cmd, res);
  5652. if (be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc_specific) & IPR_ATA_DEVICE_WAS_RESET)
  5653. scsi_report_device_reset(ioa_cfg->host, res->bus, res->target);
  5654. if (IPR_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
  5655. qc->err_mask |= __ac_err_mask(sata_port->ioasa.status);
  5656. else
  5657. qc->err_mask |= ac_err_mask(sata_port->ioasa.status);
  5658. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5659. spin_unlock(&ipr_cmd->hrrq->_lock);
  5660. ata_qc_complete(qc);
  5661. }
  5662. /**
  5663. * ipr_build_ata_ioadl64 - Build an ATA scatter/gather list
  5664. * @ipr_cmd: ipr command struct
  5665. * @qc: ATA queued command
  5666. *
  5667. **/
  5668. static void ipr_build_ata_ioadl64(struct ipr_cmnd *ipr_cmd,
  5669. struct ata_queued_cmd *qc)
  5670. {
  5671. u32 ioadl_flags = 0;
  5672. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5673. struct ipr_ioadl64_desc *ioadl64 = ipr_cmd->i.ata_ioadl.ioadl64;
  5674. struct ipr_ioadl64_desc *last_ioadl64 = NULL;
  5675. int len = qc->nbytes;
  5676. struct scatterlist *sg;
  5677. unsigned int si;
  5678. dma_addr_t dma_addr = ipr_cmd->dma_addr;
  5679. if (len == 0)
  5680. return;
  5681. if (qc->dma_dir == DMA_TO_DEVICE) {
  5682. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5683. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5684. } else if (qc->dma_dir == DMA_FROM_DEVICE)
  5685. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5686. ioarcb->data_transfer_length = cpu_to_be32(len);
  5687. ioarcb->ioadl_len =
  5688. cpu_to_be32(sizeof(struct ipr_ioadl64_desc) * ipr_cmd->dma_use_sg);
  5689. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  5690. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ata_ioadl.ioadl64));
  5691. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5692. ioadl64->flags = cpu_to_be32(ioadl_flags);
  5693. ioadl64->data_len = cpu_to_be32(sg_dma_len(sg));
  5694. ioadl64->address = cpu_to_be64(sg_dma_address(sg));
  5695. last_ioadl64 = ioadl64;
  5696. ioadl64++;
  5697. }
  5698. if (likely(last_ioadl64))
  5699. last_ioadl64->flags |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5700. }
  5701. /**
  5702. * ipr_build_ata_ioadl - Build an ATA scatter/gather list
  5703. * @ipr_cmd: ipr command struct
  5704. * @qc: ATA queued command
  5705. *
  5706. **/
  5707. static void ipr_build_ata_ioadl(struct ipr_cmnd *ipr_cmd,
  5708. struct ata_queued_cmd *qc)
  5709. {
  5710. u32 ioadl_flags = 0;
  5711. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  5712. struct ipr_ioadl_desc *ioadl = ipr_cmd->i.ioadl;
  5713. struct ipr_ioadl_desc *last_ioadl = NULL;
  5714. int len = qc->nbytes;
  5715. struct scatterlist *sg;
  5716. unsigned int si;
  5717. if (len == 0)
  5718. return;
  5719. if (qc->dma_dir == DMA_TO_DEVICE) {
  5720. ioadl_flags = IPR_IOADL_FLAGS_WRITE;
  5721. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  5722. ioarcb->data_transfer_length = cpu_to_be32(len);
  5723. ioarcb->ioadl_len =
  5724. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5725. } else if (qc->dma_dir == DMA_FROM_DEVICE) {
  5726. ioadl_flags = IPR_IOADL_FLAGS_READ;
  5727. ioarcb->read_data_transfer_length = cpu_to_be32(len);
  5728. ioarcb->read_ioadl_len =
  5729. cpu_to_be32(sizeof(struct ipr_ioadl_desc) * ipr_cmd->dma_use_sg);
  5730. }
  5731. for_each_sg(qc->sg, sg, qc->n_elem, si) {
  5732. ioadl->flags_and_data_len = cpu_to_be32(ioadl_flags | sg_dma_len(sg));
  5733. ioadl->address = cpu_to_be32(sg_dma_address(sg));
  5734. last_ioadl = ioadl;
  5735. ioadl++;
  5736. }
  5737. if (likely(last_ioadl))
  5738. last_ioadl->flags_and_data_len |= cpu_to_be32(IPR_IOADL_FLAGS_LAST);
  5739. }
  5740. /**
  5741. * ipr_qc_defer - Get a free ipr_cmd
  5742. * @qc: queued command
  5743. *
  5744. * Return value:
  5745. * 0 if success
  5746. **/
  5747. static int ipr_qc_defer(struct ata_queued_cmd *qc)
  5748. {
  5749. struct ata_port *ap = qc->ap;
  5750. struct ipr_sata_port *sata_port = ap->private_data;
  5751. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5752. struct ipr_cmnd *ipr_cmd;
  5753. struct ipr_hrr_queue *hrrq;
  5754. int hrrq_id;
  5755. hrrq_id = ipr_get_hrrq_index(ioa_cfg);
  5756. hrrq = &ioa_cfg->hrrq[hrrq_id];
  5757. qc->lldd_task = NULL;
  5758. spin_lock(&hrrq->_lock);
  5759. if (unlikely(hrrq->ioa_is_dead)) {
  5760. spin_unlock(&hrrq->_lock);
  5761. return 0;
  5762. }
  5763. if (unlikely(!hrrq->allow_cmds)) {
  5764. spin_unlock(&hrrq->_lock);
  5765. return ATA_DEFER_LINK;
  5766. }
  5767. ipr_cmd = __ipr_get_free_ipr_cmnd(hrrq);
  5768. if (ipr_cmd == NULL) {
  5769. spin_unlock(&hrrq->_lock);
  5770. return ATA_DEFER_LINK;
  5771. }
  5772. qc->lldd_task = ipr_cmd;
  5773. spin_unlock(&hrrq->_lock);
  5774. return 0;
  5775. }
  5776. /**
  5777. * ipr_qc_issue - Issue a SATA qc to a device
  5778. * @qc: queued command
  5779. *
  5780. * Return value:
  5781. * 0 if success
  5782. **/
  5783. static unsigned int ipr_qc_issue(struct ata_queued_cmd *qc)
  5784. {
  5785. struct ata_port *ap = qc->ap;
  5786. struct ipr_sata_port *sata_port = ap->private_data;
  5787. struct ipr_resource_entry *res = sata_port->res;
  5788. struct ipr_ioa_cfg *ioa_cfg = sata_port->ioa_cfg;
  5789. struct ipr_cmnd *ipr_cmd;
  5790. struct ipr_ioarcb *ioarcb;
  5791. struct ipr_ioarcb_ata_regs *regs;
  5792. if (qc->lldd_task == NULL)
  5793. ipr_qc_defer(qc);
  5794. ipr_cmd = qc->lldd_task;
  5795. if (ipr_cmd == NULL)
  5796. return AC_ERR_SYSTEM;
  5797. qc->lldd_task = NULL;
  5798. spin_lock(&ipr_cmd->hrrq->_lock);
  5799. if (unlikely(!ipr_cmd->hrrq->allow_cmds ||
  5800. ipr_cmd->hrrq->ioa_is_dead)) {
  5801. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5802. spin_unlock(&ipr_cmd->hrrq->_lock);
  5803. return AC_ERR_SYSTEM;
  5804. }
  5805. ipr_init_ipr_cmnd(ipr_cmd, ipr_lock_and_done);
  5806. ioarcb = &ipr_cmd->ioarcb;
  5807. if (ioa_cfg->sis64) {
  5808. regs = &ipr_cmd->i.ata_ioadl.regs;
  5809. ioarcb->add_cmd_parms_offset = cpu_to_be16(sizeof(*ioarcb));
  5810. } else
  5811. regs = &ioarcb->u.add_data.u.regs;
  5812. memset(regs, 0, sizeof(*regs));
  5813. ioarcb->add_cmd_parms_len = cpu_to_be16(sizeof(*regs));
  5814. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  5815. ipr_cmd->qc = qc;
  5816. ipr_cmd->done = ipr_sata_done;
  5817. ipr_cmd->ioarcb.res_handle = res->res_handle;
  5818. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_ATA_PASSTHRU;
  5819. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_LINK_DESC;
  5820. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_NO_ULEN_CHK;
  5821. ipr_cmd->dma_use_sg = qc->n_elem;
  5822. if (ioa_cfg->sis64)
  5823. ipr_build_ata_ioadl64(ipr_cmd, qc);
  5824. else
  5825. ipr_build_ata_ioadl(ipr_cmd, qc);
  5826. regs->flags |= IPR_ATA_FLAG_STATUS_ON_GOOD_COMPLETION;
  5827. ipr_copy_sata_tf(regs, &qc->tf);
  5828. memcpy(ioarcb->cmd_pkt.cdb, qc->cdb, IPR_MAX_CDB_LEN);
  5829. ipr_trc_hook(ipr_cmd, IPR_TRACE_START, IPR_GET_RES_PHYS_LOC(res));
  5830. switch (qc->tf.protocol) {
  5831. case ATA_PROT_NODATA:
  5832. case ATA_PROT_PIO:
  5833. break;
  5834. case ATA_PROT_DMA:
  5835. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5836. break;
  5837. case ATAPI_PROT_PIO:
  5838. case ATAPI_PROT_NODATA:
  5839. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5840. break;
  5841. case ATAPI_PROT_DMA:
  5842. regs->flags |= IPR_ATA_FLAG_PACKET_CMD;
  5843. regs->flags |= IPR_ATA_FLAG_XFER_TYPE_DMA;
  5844. break;
  5845. default:
  5846. WARN_ON(1);
  5847. spin_unlock(&ipr_cmd->hrrq->_lock);
  5848. return AC_ERR_INVALID;
  5849. }
  5850. ipr_send_command(ipr_cmd);
  5851. spin_unlock(&ipr_cmd->hrrq->_lock);
  5852. return 0;
  5853. }
  5854. /**
  5855. * ipr_qc_fill_rtf - Read result TF
  5856. * @qc: ATA queued command
  5857. *
  5858. * Return value:
  5859. * true
  5860. **/
  5861. static bool ipr_qc_fill_rtf(struct ata_queued_cmd *qc)
  5862. {
  5863. struct ipr_sata_port *sata_port = qc->ap->private_data;
  5864. struct ipr_ioasa_gata *g = &sata_port->ioasa;
  5865. struct ata_taskfile *tf = &qc->result_tf;
  5866. tf->feature = g->error;
  5867. tf->nsect = g->nsect;
  5868. tf->lbal = g->lbal;
  5869. tf->lbam = g->lbam;
  5870. tf->lbah = g->lbah;
  5871. tf->device = g->device;
  5872. tf->command = g->status;
  5873. tf->hob_nsect = g->hob_nsect;
  5874. tf->hob_lbal = g->hob_lbal;
  5875. tf->hob_lbam = g->hob_lbam;
  5876. tf->hob_lbah = g->hob_lbah;
  5877. return true;
  5878. }
  5879. static struct ata_port_operations ipr_sata_ops = {
  5880. .phy_reset = ipr_ata_phy_reset,
  5881. .hardreset = ipr_sata_reset,
  5882. .post_internal_cmd = ipr_ata_post_internal,
  5883. .qc_prep = ata_noop_qc_prep,
  5884. .qc_defer = ipr_qc_defer,
  5885. .qc_issue = ipr_qc_issue,
  5886. .qc_fill_rtf = ipr_qc_fill_rtf,
  5887. .port_start = ata_sas_port_start,
  5888. .port_stop = ata_sas_port_stop
  5889. };
  5890. static struct ata_port_info sata_port_info = {
  5891. .flags = ATA_FLAG_SATA | ATA_FLAG_PIO_DMA,
  5892. .pio_mask = ATA_PIO4_ONLY,
  5893. .mwdma_mask = ATA_MWDMA2,
  5894. .udma_mask = ATA_UDMA6,
  5895. .port_ops = &ipr_sata_ops
  5896. };
  5897. #ifdef CONFIG_PPC_PSERIES
  5898. static const u16 ipr_blocked_processors[] = {
  5899. PVR_NORTHSTAR,
  5900. PVR_PULSAR,
  5901. PVR_POWER4,
  5902. PVR_ICESTAR,
  5903. PVR_SSTAR,
  5904. PVR_POWER4p,
  5905. PVR_630,
  5906. PVR_630p
  5907. };
  5908. /**
  5909. * ipr_invalid_adapter - Determine if this adapter is supported on this hardware
  5910. * @ioa_cfg: ioa cfg struct
  5911. *
  5912. * Adapters that use Gemstone revision < 3.1 do not work reliably on
  5913. * certain pSeries hardware. This function determines if the given
  5914. * adapter is in one of these confgurations or not.
  5915. *
  5916. * Return value:
  5917. * 1 if adapter is not supported / 0 if adapter is supported
  5918. **/
  5919. static int ipr_invalid_adapter(struct ipr_ioa_cfg *ioa_cfg)
  5920. {
  5921. int i;
  5922. if ((ioa_cfg->type == 0x5702) && (ioa_cfg->pdev->revision < 4)) {
  5923. for (i = 0; i < ARRAY_SIZE(ipr_blocked_processors); i++) {
  5924. if (pvr_version_is(ipr_blocked_processors[i]))
  5925. return 1;
  5926. }
  5927. }
  5928. return 0;
  5929. }
  5930. #else
  5931. #define ipr_invalid_adapter(ioa_cfg) 0
  5932. #endif
  5933. /**
  5934. * ipr_ioa_bringdown_done - IOA bring down completion.
  5935. * @ipr_cmd: ipr command struct
  5936. *
  5937. * This function processes the completion of an adapter bring down.
  5938. * It wakes any reset sleepers.
  5939. *
  5940. * Return value:
  5941. * IPR_RC_JOB_RETURN
  5942. **/
  5943. static int ipr_ioa_bringdown_done(struct ipr_cmnd *ipr_cmd)
  5944. {
  5945. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5946. int i;
  5947. ENTER;
  5948. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  5949. ipr_trace;
  5950. spin_unlock_irq(ioa_cfg->host->host_lock);
  5951. scsi_unblock_requests(ioa_cfg->host);
  5952. spin_lock_irq(ioa_cfg->host->host_lock);
  5953. }
  5954. ioa_cfg->in_reset_reload = 0;
  5955. ioa_cfg->reset_retries = 0;
  5956. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  5957. spin_lock(&ioa_cfg->hrrq[i]._lock);
  5958. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  5959. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  5960. }
  5961. wmb();
  5962. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  5963. wake_up_all(&ioa_cfg->reset_wait_q);
  5964. LEAVE;
  5965. return IPR_RC_JOB_RETURN;
  5966. }
  5967. /**
  5968. * ipr_ioa_reset_done - IOA reset completion.
  5969. * @ipr_cmd: ipr command struct
  5970. *
  5971. * This function processes the completion of an adapter reset.
  5972. * It schedules any necessary mid-layer add/removes and
  5973. * wakes any reset sleepers.
  5974. *
  5975. * Return value:
  5976. * IPR_RC_JOB_RETURN
  5977. **/
  5978. static int ipr_ioa_reset_done(struct ipr_cmnd *ipr_cmd)
  5979. {
  5980. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  5981. struct ipr_resource_entry *res;
  5982. struct ipr_hostrcb *hostrcb, *temp;
  5983. int i = 0, j;
  5984. ENTER;
  5985. ioa_cfg->in_reset_reload = 0;
  5986. for (j = 0; j < ioa_cfg->hrrq_num; j++) {
  5987. spin_lock(&ioa_cfg->hrrq[j]._lock);
  5988. ioa_cfg->hrrq[j].allow_cmds = 1;
  5989. spin_unlock(&ioa_cfg->hrrq[j]._lock);
  5990. }
  5991. wmb();
  5992. ioa_cfg->reset_cmd = NULL;
  5993. ioa_cfg->doorbell |= IPR_RUNTIME_RESET;
  5994. list_for_each_entry(res, &ioa_cfg->used_res_q, queue) {
  5995. if (ioa_cfg->allow_ml_add_del && (res->add_to_ml || res->del_from_ml)) {
  5996. ipr_trace;
  5997. break;
  5998. }
  5999. }
  6000. schedule_work(&ioa_cfg->work_q);
  6001. list_for_each_entry_safe(hostrcb, temp, &ioa_cfg->hostrcb_free_q, queue) {
  6002. list_del(&hostrcb->queue);
  6003. if (i++ < IPR_NUM_LOG_HCAMS)
  6004. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_LOG_DATA, hostrcb);
  6005. else
  6006. ipr_send_hcam(ioa_cfg, IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE, hostrcb);
  6007. }
  6008. scsi_report_bus_reset(ioa_cfg->host, IPR_VSET_BUS);
  6009. dev_info(&ioa_cfg->pdev->dev, "IOA initialized.\n");
  6010. ioa_cfg->reset_retries = 0;
  6011. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6012. wake_up_all(&ioa_cfg->reset_wait_q);
  6013. spin_unlock(ioa_cfg->host->host_lock);
  6014. scsi_unblock_requests(ioa_cfg->host);
  6015. spin_lock(ioa_cfg->host->host_lock);
  6016. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds)
  6017. scsi_block_requests(ioa_cfg->host);
  6018. LEAVE;
  6019. return IPR_RC_JOB_RETURN;
  6020. }
  6021. /**
  6022. * ipr_set_sup_dev_dflt - Initialize a Set Supported Device buffer
  6023. * @supported_dev: supported device struct
  6024. * @vpids: vendor product id struct
  6025. *
  6026. * Return value:
  6027. * none
  6028. **/
  6029. static void ipr_set_sup_dev_dflt(struct ipr_supported_device *supported_dev,
  6030. struct ipr_std_inq_vpids *vpids)
  6031. {
  6032. memset(supported_dev, 0, sizeof(struct ipr_supported_device));
  6033. memcpy(&supported_dev->vpids, vpids, sizeof(struct ipr_std_inq_vpids));
  6034. supported_dev->num_records = 1;
  6035. supported_dev->data_length =
  6036. cpu_to_be16(sizeof(struct ipr_supported_device));
  6037. supported_dev->reserved = 0;
  6038. }
  6039. /**
  6040. * ipr_set_supported_devs - Send Set Supported Devices for a device
  6041. * @ipr_cmd: ipr command struct
  6042. *
  6043. * This function sends a Set Supported Devices to the adapter
  6044. *
  6045. * Return value:
  6046. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6047. **/
  6048. static int ipr_set_supported_devs(struct ipr_cmnd *ipr_cmd)
  6049. {
  6050. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6051. struct ipr_supported_device *supp_dev = &ioa_cfg->vpd_cbs->supp_dev;
  6052. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6053. struct ipr_resource_entry *res = ipr_cmd->u.res;
  6054. ipr_cmd->job_step = ipr_ioa_reset_done;
  6055. list_for_each_entry_continue(res, &ioa_cfg->used_res_q, queue) {
  6056. if (!ipr_is_scsi_disk(res))
  6057. continue;
  6058. ipr_cmd->u.res = res;
  6059. ipr_set_sup_dev_dflt(supp_dev, &res->std_inq_data.vpids);
  6060. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6061. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6062. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6063. ioarcb->cmd_pkt.cdb[0] = IPR_SET_SUPPORTED_DEVICES;
  6064. ioarcb->cmd_pkt.cdb[1] = IPR_SET_ALL_SUPPORTED_DEVICES;
  6065. ioarcb->cmd_pkt.cdb[7] = (sizeof(struct ipr_supported_device) >> 8) & 0xff;
  6066. ioarcb->cmd_pkt.cdb[8] = sizeof(struct ipr_supported_device) & 0xff;
  6067. ipr_init_ioadl(ipr_cmd,
  6068. ioa_cfg->vpd_cbs_dma +
  6069. offsetof(struct ipr_misc_cbs, supp_dev),
  6070. sizeof(struct ipr_supported_device),
  6071. IPR_IOADL_FLAGS_WRITE_LAST);
  6072. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6073. IPR_SET_SUP_DEVICE_TIMEOUT);
  6074. if (!ioa_cfg->sis64)
  6075. ipr_cmd->job_step = ipr_set_supported_devs;
  6076. LEAVE;
  6077. return IPR_RC_JOB_RETURN;
  6078. }
  6079. LEAVE;
  6080. return IPR_RC_JOB_CONTINUE;
  6081. }
  6082. /**
  6083. * ipr_get_mode_page - Locate specified mode page
  6084. * @mode_pages: mode page buffer
  6085. * @page_code: page code to find
  6086. * @len: minimum required length for mode page
  6087. *
  6088. * Return value:
  6089. * pointer to mode page / NULL on failure
  6090. **/
  6091. static void *ipr_get_mode_page(struct ipr_mode_pages *mode_pages,
  6092. u32 page_code, u32 len)
  6093. {
  6094. struct ipr_mode_page_hdr *mode_hdr;
  6095. u32 page_length;
  6096. u32 length;
  6097. if (!mode_pages || (mode_pages->hdr.length == 0))
  6098. return NULL;
  6099. length = (mode_pages->hdr.length + 1) - 4 - mode_pages->hdr.block_desc_len;
  6100. mode_hdr = (struct ipr_mode_page_hdr *)
  6101. (mode_pages->data + mode_pages->hdr.block_desc_len);
  6102. while (length) {
  6103. if (IPR_GET_MODE_PAGE_CODE(mode_hdr) == page_code) {
  6104. if (mode_hdr->page_length >= (len - sizeof(struct ipr_mode_page_hdr)))
  6105. return mode_hdr;
  6106. break;
  6107. } else {
  6108. page_length = (sizeof(struct ipr_mode_page_hdr) +
  6109. mode_hdr->page_length);
  6110. length -= page_length;
  6111. mode_hdr = (struct ipr_mode_page_hdr *)
  6112. ((unsigned long)mode_hdr + page_length);
  6113. }
  6114. }
  6115. return NULL;
  6116. }
  6117. /**
  6118. * ipr_check_term_power - Check for term power errors
  6119. * @ioa_cfg: ioa config struct
  6120. * @mode_pages: IOAFP mode pages buffer
  6121. *
  6122. * Check the IOAFP's mode page 28 for term power errors
  6123. *
  6124. * Return value:
  6125. * nothing
  6126. **/
  6127. static void ipr_check_term_power(struct ipr_ioa_cfg *ioa_cfg,
  6128. struct ipr_mode_pages *mode_pages)
  6129. {
  6130. int i;
  6131. int entry_length;
  6132. struct ipr_dev_bus_entry *bus;
  6133. struct ipr_mode_page28 *mode_page;
  6134. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6135. sizeof(struct ipr_mode_page28));
  6136. entry_length = mode_page->entry_length;
  6137. bus = mode_page->bus;
  6138. for (i = 0; i < mode_page->num_entries; i++) {
  6139. if (bus->flags & IPR_SCSI_ATTR_NO_TERM_PWR) {
  6140. dev_err(&ioa_cfg->pdev->dev,
  6141. "Term power is absent on scsi bus %d\n",
  6142. bus->res_addr.bus);
  6143. }
  6144. bus = (struct ipr_dev_bus_entry *)((char *)bus + entry_length);
  6145. }
  6146. }
  6147. /**
  6148. * ipr_scsi_bus_speed_limit - Limit the SCSI speed based on SES table
  6149. * @ioa_cfg: ioa config struct
  6150. *
  6151. * Looks through the config table checking for SES devices. If
  6152. * the SES device is in the SES table indicating a maximum SCSI
  6153. * bus speed, the speed is limited for the bus.
  6154. *
  6155. * Return value:
  6156. * none
  6157. **/
  6158. static void ipr_scsi_bus_speed_limit(struct ipr_ioa_cfg *ioa_cfg)
  6159. {
  6160. u32 max_xfer_rate;
  6161. int i;
  6162. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  6163. max_xfer_rate = ipr_get_max_scsi_speed(ioa_cfg, i,
  6164. ioa_cfg->bus_attr[i].bus_width);
  6165. if (max_xfer_rate < ioa_cfg->bus_attr[i].max_xfer_rate)
  6166. ioa_cfg->bus_attr[i].max_xfer_rate = max_xfer_rate;
  6167. }
  6168. }
  6169. /**
  6170. * ipr_modify_ioafp_mode_page_28 - Modify IOAFP Mode Page 28
  6171. * @ioa_cfg: ioa config struct
  6172. * @mode_pages: mode page 28 buffer
  6173. *
  6174. * Updates mode page 28 based on driver configuration
  6175. *
  6176. * Return value:
  6177. * none
  6178. **/
  6179. static void ipr_modify_ioafp_mode_page_28(struct ipr_ioa_cfg *ioa_cfg,
  6180. struct ipr_mode_pages *mode_pages)
  6181. {
  6182. int i, entry_length;
  6183. struct ipr_dev_bus_entry *bus;
  6184. struct ipr_bus_attributes *bus_attr;
  6185. struct ipr_mode_page28 *mode_page;
  6186. mode_page = ipr_get_mode_page(mode_pages, 0x28,
  6187. sizeof(struct ipr_mode_page28));
  6188. entry_length = mode_page->entry_length;
  6189. /* Loop for each device bus entry */
  6190. for (i = 0, bus = mode_page->bus;
  6191. i < mode_page->num_entries;
  6192. i++, bus = (struct ipr_dev_bus_entry *)((u8 *)bus + entry_length)) {
  6193. if (bus->res_addr.bus > IPR_MAX_NUM_BUSES) {
  6194. dev_err(&ioa_cfg->pdev->dev,
  6195. "Invalid resource address reported: 0x%08X\n",
  6196. IPR_GET_PHYS_LOC(bus->res_addr));
  6197. continue;
  6198. }
  6199. bus_attr = &ioa_cfg->bus_attr[i];
  6200. bus->extended_reset_delay = IPR_EXTENDED_RESET_DELAY;
  6201. bus->bus_width = bus_attr->bus_width;
  6202. bus->max_xfer_rate = cpu_to_be32(bus_attr->max_xfer_rate);
  6203. bus->flags &= ~IPR_SCSI_ATTR_QAS_MASK;
  6204. if (bus_attr->qas_enabled)
  6205. bus->flags |= IPR_SCSI_ATTR_ENABLE_QAS;
  6206. else
  6207. bus->flags |= IPR_SCSI_ATTR_DISABLE_QAS;
  6208. }
  6209. }
  6210. /**
  6211. * ipr_build_mode_select - Build a mode select command
  6212. * @ipr_cmd: ipr command struct
  6213. * @res_handle: resource handle to send command to
  6214. * @parm: Byte 2 of Mode Sense command
  6215. * @dma_addr: DMA buffer address
  6216. * @xfer_len: data transfer length
  6217. *
  6218. * Return value:
  6219. * none
  6220. **/
  6221. static void ipr_build_mode_select(struct ipr_cmnd *ipr_cmd,
  6222. __be32 res_handle, u8 parm,
  6223. dma_addr_t dma_addr, u8 xfer_len)
  6224. {
  6225. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6226. ioarcb->res_handle = res_handle;
  6227. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6228. ioarcb->cmd_pkt.flags_hi |= IPR_FLAGS_HI_WRITE_NOT_READ;
  6229. ioarcb->cmd_pkt.cdb[0] = MODE_SELECT;
  6230. ioarcb->cmd_pkt.cdb[1] = parm;
  6231. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6232. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_WRITE_LAST);
  6233. }
  6234. /**
  6235. * ipr_ioafp_mode_select_page28 - Issue Mode Select Page 28 to IOA
  6236. * @ipr_cmd: ipr command struct
  6237. *
  6238. * This function sets up the SCSI bus attributes and sends
  6239. * a Mode Select for Page 28 to activate them.
  6240. *
  6241. * Return value:
  6242. * IPR_RC_JOB_RETURN
  6243. **/
  6244. static int ipr_ioafp_mode_select_page28(struct ipr_cmnd *ipr_cmd)
  6245. {
  6246. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6247. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6248. int length;
  6249. ENTER;
  6250. ipr_scsi_bus_speed_limit(ioa_cfg);
  6251. ipr_check_term_power(ioa_cfg, mode_pages);
  6252. ipr_modify_ioafp_mode_page_28(ioa_cfg, mode_pages);
  6253. length = mode_pages->hdr.length + 1;
  6254. mode_pages->hdr.length = 0;
  6255. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6256. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6257. length);
  6258. ipr_cmd->job_step = ipr_set_supported_devs;
  6259. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6260. struct ipr_resource_entry, queue);
  6261. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6262. LEAVE;
  6263. return IPR_RC_JOB_RETURN;
  6264. }
  6265. /**
  6266. * ipr_build_mode_sense - Builds a mode sense command
  6267. * @ipr_cmd: ipr command struct
  6268. * @res: resource entry struct
  6269. * @parm: Byte 2 of mode sense command
  6270. * @dma_addr: DMA address of mode sense buffer
  6271. * @xfer_len: Size of DMA buffer
  6272. *
  6273. * Return value:
  6274. * none
  6275. **/
  6276. static void ipr_build_mode_sense(struct ipr_cmnd *ipr_cmd,
  6277. __be32 res_handle,
  6278. u8 parm, dma_addr_t dma_addr, u8 xfer_len)
  6279. {
  6280. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6281. ioarcb->res_handle = res_handle;
  6282. ioarcb->cmd_pkt.cdb[0] = MODE_SENSE;
  6283. ioarcb->cmd_pkt.cdb[2] = parm;
  6284. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6285. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6286. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6287. }
  6288. /**
  6289. * ipr_reset_cmd_failed - Handle failure of IOA reset command
  6290. * @ipr_cmd: ipr command struct
  6291. *
  6292. * This function handles the failure of an IOA bringup command.
  6293. *
  6294. * Return value:
  6295. * IPR_RC_JOB_RETURN
  6296. **/
  6297. static int ipr_reset_cmd_failed(struct ipr_cmnd *ipr_cmd)
  6298. {
  6299. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6300. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6301. dev_err(&ioa_cfg->pdev->dev,
  6302. "0x%02X failed with IOASC: 0x%08X\n",
  6303. ipr_cmd->ioarcb.cmd_pkt.cdb[0], ioasc);
  6304. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  6305. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  6306. return IPR_RC_JOB_RETURN;
  6307. }
  6308. /**
  6309. * ipr_reset_mode_sense_failed - Handle failure of IOAFP mode sense
  6310. * @ipr_cmd: ipr command struct
  6311. *
  6312. * This function handles the failure of a Mode Sense to the IOAFP.
  6313. * Some adapters do not handle all mode pages.
  6314. *
  6315. * Return value:
  6316. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6317. **/
  6318. static int ipr_reset_mode_sense_failed(struct ipr_cmnd *ipr_cmd)
  6319. {
  6320. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6321. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6322. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6323. ipr_cmd->job_step = ipr_set_supported_devs;
  6324. ipr_cmd->u.res = list_entry(ioa_cfg->used_res_q.next,
  6325. struct ipr_resource_entry, queue);
  6326. return IPR_RC_JOB_CONTINUE;
  6327. }
  6328. return ipr_reset_cmd_failed(ipr_cmd);
  6329. }
  6330. /**
  6331. * ipr_ioafp_mode_sense_page28 - Issue Mode Sense Page 28 to IOA
  6332. * @ipr_cmd: ipr command struct
  6333. *
  6334. * This function send a Page 28 mode sense to the IOA to
  6335. * retrieve SCSI bus attributes.
  6336. *
  6337. * Return value:
  6338. * IPR_RC_JOB_RETURN
  6339. **/
  6340. static int ipr_ioafp_mode_sense_page28(struct ipr_cmnd *ipr_cmd)
  6341. {
  6342. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6343. ENTER;
  6344. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6345. 0x28, ioa_cfg->vpd_cbs_dma +
  6346. offsetof(struct ipr_misc_cbs, mode_pages),
  6347. sizeof(struct ipr_mode_pages));
  6348. ipr_cmd->job_step = ipr_ioafp_mode_select_page28;
  6349. ipr_cmd->job_step_failed = ipr_reset_mode_sense_failed;
  6350. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6351. LEAVE;
  6352. return IPR_RC_JOB_RETURN;
  6353. }
  6354. /**
  6355. * ipr_ioafp_mode_select_page24 - Issue Mode Select to IOA
  6356. * @ipr_cmd: ipr command struct
  6357. *
  6358. * This function enables dual IOA RAID support if possible.
  6359. *
  6360. * Return value:
  6361. * IPR_RC_JOB_RETURN
  6362. **/
  6363. static int ipr_ioafp_mode_select_page24(struct ipr_cmnd *ipr_cmd)
  6364. {
  6365. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6366. struct ipr_mode_pages *mode_pages = &ioa_cfg->vpd_cbs->mode_pages;
  6367. struct ipr_mode_page24 *mode_page;
  6368. int length;
  6369. ENTER;
  6370. mode_page = ipr_get_mode_page(mode_pages, 0x24,
  6371. sizeof(struct ipr_mode_page24));
  6372. if (mode_page)
  6373. mode_page->flags |= IPR_ENABLE_DUAL_IOA_AF;
  6374. length = mode_pages->hdr.length + 1;
  6375. mode_pages->hdr.length = 0;
  6376. ipr_build_mode_select(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE), 0x11,
  6377. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, mode_pages),
  6378. length);
  6379. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6380. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6381. LEAVE;
  6382. return IPR_RC_JOB_RETURN;
  6383. }
  6384. /**
  6385. * ipr_reset_mode_sense_page24_failed - Handle failure of IOAFP mode sense
  6386. * @ipr_cmd: ipr command struct
  6387. *
  6388. * This function handles the failure of a Mode Sense to the IOAFP.
  6389. * Some adapters do not handle all mode pages.
  6390. *
  6391. * Return value:
  6392. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6393. **/
  6394. static int ipr_reset_mode_sense_page24_failed(struct ipr_cmnd *ipr_cmd)
  6395. {
  6396. u32 ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  6397. if (ioasc == IPR_IOASC_IR_INVALID_REQ_TYPE_OR_PKT) {
  6398. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6399. return IPR_RC_JOB_CONTINUE;
  6400. }
  6401. return ipr_reset_cmd_failed(ipr_cmd);
  6402. }
  6403. /**
  6404. * ipr_ioafp_mode_sense_page24 - Issue Page 24 Mode Sense to IOA
  6405. * @ipr_cmd: ipr command struct
  6406. *
  6407. * This function send a mode sense to the IOA to retrieve
  6408. * the IOA Advanced Function Control mode page.
  6409. *
  6410. * Return value:
  6411. * IPR_RC_JOB_RETURN
  6412. **/
  6413. static int ipr_ioafp_mode_sense_page24(struct ipr_cmnd *ipr_cmd)
  6414. {
  6415. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6416. ENTER;
  6417. ipr_build_mode_sense(ipr_cmd, cpu_to_be32(IPR_IOA_RES_HANDLE),
  6418. 0x24, ioa_cfg->vpd_cbs_dma +
  6419. offsetof(struct ipr_misc_cbs, mode_pages),
  6420. sizeof(struct ipr_mode_pages));
  6421. ipr_cmd->job_step = ipr_ioafp_mode_select_page24;
  6422. ipr_cmd->job_step_failed = ipr_reset_mode_sense_page24_failed;
  6423. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6424. LEAVE;
  6425. return IPR_RC_JOB_RETURN;
  6426. }
  6427. /**
  6428. * ipr_init_res_table - Initialize the resource table
  6429. * @ipr_cmd: ipr command struct
  6430. *
  6431. * This function looks through the existing resource table, comparing
  6432. * it with the config table. This function will take care of old/new
  6433. * devices and schedule adding/removing them from the mid-layer
  6434. * as appropriate.
  6435. *
  6436. * Return value:
  6437. * IPR_RC_JOB_CONTINUE
  6438. **/
  6439. static int ipr_init_res_table(struct ipr_cmnd *ipr_cmd)
  6440. {
  6441. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6442. struct ipr_resource_entry *res, *temp;
  6443. struct ipr_config_table_entry_wrapper cfgtew;
  6444. int entries, found, flag, i;
  6445. LIST_HEAD(old_res);
  6446. ENTER;
  6447. if (ioa_cfg->sis64)
  6448. flag = ioa_cfg->u.cfg_table64->hdr64.flags;
  6449. else
  6450. flag = ioa_cfg->u.cfg_table->hdr.flags;
  6451. if (flag & IPR_UCODE_DOWNLOAD_REQ)
  6452. dev_err(&ioa_cfg->pdev->dev, "Microcode download required\n");
  6453. list_for_each_entry_safe(res, temp, &ioa_cfg->used_res_q, queue)
  6454. list_move_tail(&res->queue, &old_res);
  6455. if (ioa_cfg->sis64)
  6456. entries = be16_to_cpu(ioa_cfg->u.cfg_table64->hdr64.num_entries);
  6457. else
  6458. entries = ioa_cfg->u.cfg_table->hdr.num_entries;
  6459. for (i = 0; i < entries; i++) {
  6460. if (ioa_cfg->sis64)
  6461. cfgtew.u.cfgte64 = &ioa_cfg->u.cfg_table64->dev[i];
  6462. else
  6463. cfgtew.u.cfgte = &ioa_cfg->u.cfg_table->dev[i];
  6464. found = 0;
  6465. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6466. if (ipr_is_same_device(res, &cfgtew)) {
  6467. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6468. found = 1;
  6469. break;
  6470. }
  6471. }
  6472. if (!found) {
  6473. if (list_empty(&ioa_cfg->free_res_q)) {
  6474. dev_err(&ioa_cfg->pdev->dev, "Too many devices attached\n");
  6475. break;
  6476. }
  6477. found = 1;
  6478. res = list_entry(ioa_cfg->free_res_q.next,
  6479. struct ipr_resource_entry, queue);
  6480. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6481. ipr_init_res_entry(res, &cfgtew);
  6482. res->add_to_ml = 1;
  6483. } else if (res->sdev && (ipr_is_vset_device(res) || ipr_is_scsi_disk(res)))
  6484. res->sdev->allow_restart = 1;
  6485. if (found)
  6486. ipr_update_res_entry(res, &cfgtew);
  6487. }
  6488. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6489. if (res->sdev) {
  6490. res->del_from_ml = 1;
  6491. res->res_handle = IPR_INVALID_RES_HANDLE;
  6492. list_move_tail(&res->queue, &ioa_cfg->used_res_q);
  6493. }
  6494. }
  6495. list_for_each_entry_safe(res, temp, &old_res, queue) {
  6496. ipr_clear_res_target(res);
  6497. list_move_tail(&res->queue, &ioa_cfg->free_res_q);
  6498. }
  6499. if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  6500. ipr_cmd->job_step = ipr_ioafp_mode_sense_page24;
  6501. else
  6502. ipr_cmd->job_step = ipr_ioafp_mode_sense_page28;
  6503. LEAVE;
  6504. return IPR_RC_JOB_CONTINUE;
  6505. }
  6506. /**
  6507. * ipr_ioafp_query_ioa_cfg - Send a Query IOA Config to the adapter.
  6508. * @ipr_cmd: ipr command struct
  6509. *
  6510. * This function sends a Query IOA Configuration command
  6511. * to the adapter to retrieve the IOA configuration table.
  6512. *
  6513. * Return value:
  6514. * IPR_RC_JOB_RETURN
  6515. **/
  6516. static int ipr_ioafp_query_ioa_cfg(struct ipr_cmnd *ipr_cmd)
  6517. {
  6518. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6519. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6520. struct ipr_inquiry_page3 *ucode_vpd = &ioa_cfg->vpd_cbs->page3_data;
  6521. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6522. ENTER;
  6523. if (cap->cap & IPR_CAP_DUAL_IOA_RAID)
  6524. ioa_cfg->dual_raid = 1;
  6525. dev_info(&ioa_cfg->pdev->dev, "Adapter firmware version: %02X%02X%02X%02X\n",
  6526. ucode_vpd->major_release, ucode_vpd->card_type,
  6527. ucode_vpd->minor_release[0], ucode_vpd->minor_release[1]);
  6528. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6529. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6530. ioarcb->cmd_pkt.cdb[0] = IPR_QUERY_IOA_CONFIG;
  6531. ioarcb->cmd_pkt.cdb[6] = (ioa_cfg->cfg_table_size >> 16) & 0xff;
  6532. ioarcb->cmd_pkt.cdb[7] = (ioa_cfg->cfg_table_size >> 8) & 0xff;
  6533. ioarcb->cmd_pkt.cdb[8] = ioa_cfg->cfg_table_size & 0xff;
  6534. ipr_init_ioadl(ipr_cmd, ioa_cfg->cfg_table_dma, ioa_cfg->cfg_table_size,
  6535. IPR_IOADL_FLAGS_READ_LAST);
  6536. ipr_cmd->job_step = ipr_init_res_table;
  6537. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6538. LEAVE;
  6539. return IPR_RC_JOB_RETURN;
  6540. }
  6541. /**
  6542. * ipr_ioafp_inquiry - Send an Inquiry to the adapter.
  6543. * @ipr_cmd: ipr command struct
  6544. *
  6545. * This utility function sends an inquiry to the adapter.
  6546. *
  6547. * Return value:
  6548. * none
  6549. **/
  6550. static void ipr_ioafp_inquiry(struct ipr_cmnd *ipr_cmd, u8 flags, u8 page,
  6551. dma_addr_t dma_addr, u8 xfer_len)
  6552. {
  6553. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6554. ENTER;
  6555. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  6556. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6557. ioarcb->cmd_pkt.cdb[0] = INQUIRY;
  6558. ioarcb->cmd_pkt.cdb[1] = flags;
  6559. ioarcb->cmd_pkt.cdb[2] = page;
  6560. ioarcb->cmd_pkt.cdb[4] = xfer_len;
  6561. ipr_init_ioadl(ipr_cmd, dma_addr, xfer_len, IPR_IOADL_FLAGS_READ_LAST);
  6562. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, IPR_INTERNAL_TIMEOUT);
  6563. LEAVE;
  6564. }
  6565. /**
  6566. * ipr_inquiry_page_supported - Is the given inquiry page supported
  6567. * @page0: inquiry page 0 buffer
  6568. * @page: page code.
  6569. *
  6570. * This function determines if the specified inquiry page is supported.
  6571. *
  6572. * Return value:
  6573. * 1 if page is supported / 0 if not
  6574. **/
  6575. static int ipr_inquiry_page_supported(struct ipr_inquiry_page0 *page0, u8 page)
  6576. {
  6577. int i;
  6578. for (i = 0; i < min_t(u8, page0->len, IPR_INQUIRY_PAGE0_ENTRIES); i++)
  6579. if (page0->page[i] == page)
  6580. return 1;
  6581. return 0;
  6582. }
  6583. /**
  6584. * ipr_ioafp_cap_inquiry - Send a Page 0xD0 Inquiry to the adapter.
  6585. * @ipr_cmd: ipr command struct
  6586. *
  6587. * This function sends a Page 0xD0 inquiry to the adapter
  6588. * to retrieve adapter capabilities.
  6589. *
  6590. * Return value:
  6591. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6592. **/
  6593. static int ipr_ioafp_cap_inquiry(struct ipr_cmnd *ipr_cmd)
  6594. {
  6595. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6596. struct ipr_inquiry_page0 *page0 = &ioa_cfg->vpd_cbs->page0_data;
  6597. struct ipr_inquiry_cap *cap = &ioa_cfg->vpd_cbs->cap;
  6598. ENTER;
  6599. ipr_cmd->job_step = ipr_ioafp_query_ioa_cfg;
  6600. memset(cap, 0, sizeof(*cap));
  6601. if (ipr_inquiry_page_supported(page0, 0xD0)) {
  6602. ipr_ioafp_inquiry(ipr_cmd, 1, 0xD0,
  6603. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, cap),
  6604. sizeof(struct ipr_inquiry_cap));
  6605. return IPR_RC_JOB_RETURN;
  6606. }
  6607. LEAVE;
  6608. return IPR_RC_JOB_CONTINUE;
  6609. }
  6610. /**
  6611. * ipr_ioafp_page3_inquiry - Send a Page 3 Inquiry to the adapter.
  6612. * @ipr_cmd: ipr command struct
  6613. *
  6614. * This function sends a Page 3 inquiry to the adapter
  6615. * to retrieve software VPD information.
  6616. *
  6617. * Return value:
  6618. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6619. **/
  6620. static int ipr_ioafp_page3_inquiry(struct ipr_cmnd *ipr_cmd)
  6621. {
  6622. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6623. ENTER;
  6624. ipr_cmd->job_step = ipr_ioafp_cap_inquiry;
  6625. ipr_ioafp_inquiry(ipr_cmd, 1, 3,
  6626. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page3_data),
  6627. sizeof(struct ipr_inquiry_page3));
  6628. LEAVE;
  6629. return IPR_RC_JOB_RETURN;
  6630. }
  6631. /**
  6632. * ipr_ioafp_page0_inquiry - Send a Page 0 Inquiry to the adapter.
  6633. * @ipr_cmd: ipr command struct
  6634. *
  6635. * This function sends a Page 0 inquiry to the adapter
  6636. * to retrieve supported inquiry pages.
  6637. *
  6638. * Return value:
  6639. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6640. **/
  6641. static int ipr_ioafp_page0_inquiry(struct ipr_cmnd *ipr_cmd)
  6642. {
  6643. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6644. char type[5];
  6645. ENTER;
  6646. /* Grab the type out of the VPD and store it away */
  6647. memcpy(type, ioa_cfg->vpd_cbs->ioa_vpd.std_inq_data.vpids.product_id, 4);
  6648. type[4] = '\0';
  6649. ioa_cfg->type = simple_strtoul((char *)type, NULL, 16);
  6650. ipr_cmd->job_step = ipr_ioafp_page3_inquiry;
  6651. ipr_ioafp_inquiry(ipr_cmd, 1, 0,
  6652. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, page0_data),
  6653. sizeof(struct ipr_inquiry_page0));
  6654. LEAVE;
  6655. return IPR_RC_JOB_RETURN;
  6656. }
  6657. /**
  6658. * ipr_ioafp_std_inquiry - Send a Standard Inquiry to the adapter.
  6659. * @ipr_cmd: ipr command struct
  6660. *
  6661. * This function sends a standard inquiry to the adapter.
  6662. *
  6663. * Return value:
  6664. * IPR_RC_JOB_RETURN
  6665. **/
  6666. static int ipr_ioafp_std_inquiry(struct ipr_cmnd *ipr_cmd)
  6667. {
  6668. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6669. ENTER;
  6670. ipr_cmd->job_step = ipr_ioafp_page0_inquiry;
  6671. ipr_ioafp_inquiry(ipr_cmd, 0, 0,
  6672. ioa_cfg->vpd_cbs_dma + offsetof(struct ipr_misc_cbs, ioa_vpd),
  6673. sizeof(struct ipr_ioa_vpd));
  6674. LEAVE;
  6675. return IPR_RC_JOB_RETURN;
  6676. }
  6677. /**
  6678. * ipr_ioafp_identify_hrrq - Send Identify Host RRQ.
  6679. * @ipr_cmd: ipr command struct
  6680. *
  6681. * This function send an Identify Host Request Response Queue
  6682. * command to establish the HRRQ with the adapter.
  6683. *
  6684. * Return value:
  6685. * IPR_RC_JOB_RETURN
  6686. **/
  6687. static int ipr_ioafp_identify_hrrq(struct ipr_cmnd *ipr_cmd)
  6688. {
  6689. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6690. struct ipr_ioarcb *ioarcb = &ipr_cmd->ioarcb;
  6691. struct ipr_hrr_queue *hrrq;
  6692. ENTER;
  6693. ipr_cmd->job_step = ipr_ioafp_std_inquiry;
  6694. dev_info(&ioa_cfg->pdev->dev, "Starting IOA initialization sequence.\n");
  6695. if (ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num) {
  6696. hrrq = &ioa_cfg->hrrq[ioa_cfg->identify_hrrq_index];
  6697. ioarcb->cmd_pkt.cdb[0] = IPR_ID_HOST_RR_Q;
  6698. ioarcb->res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  6699. ioarcb->cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  6700. if (ioa_cfg->sis64)
  6701. ioarcb->cmd_pkt.cdb[1] = 0x1;
  6702. if (ioa_cfg->nvectors == 1)
  6703. ioarcb->cmd_pkt.cdb[1] &= ~IPR_ID_HRRQ_SELE_ENABLE;
  6704. else
  6705. ioarcb->cmd_pkt.cdb[1] |= IPR_ID_HRRQ_SELE_ENABLE;
  6706. ioarcb->cmd_pkt.cdb[2] =
  6707. ((u64) hrrq->host_rrq_dma >> 24) & 0xff;
  6708. ioarcb->cmd_pkt.cdb[3] =
  6709. ((u64) hrrq->host_rrq_dma >> 16) & 0xff;
  6710. ioarcb->cmd_pkt.cdb[4] =
  6711. ((u64) hrrq->host_rrq_dma >> 8) & 0xff;
  6712. ioarcb->cmd_pkt.cdb[5] =
  6713. ((u64) hrrq->host_rrq_dma) & 0xff;
  6714. ioarcb->cmd_pkt.cdb[7] =
  6715. ((sizeof(u32) * hrrq->size) >> 8) & 0xff;
  6716. ioarcb->cmd_pkt.cdb[8] =
  6717. (sizeof(u32) * hrrq->size) & 0xff;
  6718. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6719. ioarcb->cmd_pkt.cdb[9] =
  6720. ioa_cfg->identify_hrrq_index;
  6721. if (ioa_cfg->sis64) {
  6722. ioarcb->cmd_pkt.cdb[10] =
  6723. ((u64) hrrq->host_rrq_dma >> 56) & 0xff;
  6724. ioarcb->cmd_pkt.cdb[11] =
  6725. ((u64) hrrq->host_rrq_dma >> 48) & 0xff;
  6726. ioarcb->cmd_pkt.cdb[12] =
  6727. ((u64) hrrq->host_rrq_dma >> 40) & 0xff;
  6728. ioarcb->cmd_pkt.cdb[13] =
  6729. ((u64) hrrq->host_rrq_dma >> 32) & 0xff;
  6730. }
  6731. if (ioarcb->cmd_pkt.cdb[1] & IPR_ID_HRRQ_SELE_ENABLE)
  6732. ioarcb->cmd_pkt.cdb[14] =
  6733. ioa_cfg->identify_hrrq_index;
  6734. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  6735. IPR_INTERNAL_TIMEOUT);
  6736. if (++ioa_cfg->identify_hrrq_index < ioa_cfg->hrrq_num)
  6737. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6738. LEAVE;
  6739. return IPR_RC_JOB_RETURN;
  6740. }
  6741. LEAVE;
  6742. return IPR_RC_JOB_CONTINUE;
  6743. }
  6744. /**
  6745. * ipr_reset_timer_done - Adapter reset timer function
  6746. * @ipr_cmd: ipr command struct
  6747. *
  6748. * Description: This function is used in adapter reset processing
  6749. * for timing events. If the reset_cmd pointer in the IOA
  6750. * config struct is not this adapter's we are doing nested
  6751. * resets and fail_all_ops will take care of freeing the
  6752. * command block.
  6753. *
  6754. * Return value:
  6755. * none
  6756. **/
  6757. static void ipr_reset_timer_done(struct ipr_cmnd *ipr_cmd)
  6758. {
  6759. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6760. unsigned long lock_flags = 0;
  6761. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  6762. if (ioa_cfg->reset_cmd == ipr_cmd) {
  6763. list_del(&ipr_cmd->queue);
  6764. ipr_cmd->done(ipr_cmd);
  6765. }
  6766. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  6767. }
  6768. /**
  6769. * ipr_reset_start_timer - Start a timer for adapter reset job
  6770. * @ipr_cmd: ipr command struct
  6771. * @timeout: timeout value
  6772. *
  6773. * Description: This function is used in adapter reset processing
  6774. * for timing events. If the reset_cmd pointer in the IOA
  6775. * config struct is not this adapter's we are doing nested
  6776. * resets and fail_all_ops will take care of freeing the
  6777. * command block.
  6778. *
  6779. * Return value:
  6780. * none
  6781. **/
  6782. static void ipr_reset_start_timer(struct ipr_cmnd *ipr_cmd,
  6783. unsigned long timeout)
  6784. {
  6785. ENTER;
  6786. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6787. ipr_cmd->done = ipr_reset_ioa_job;
  6788. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6789. ipr_cmd->timer.expires = jiffies + timeout;
  6790. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_reset_timer_done;
  6791. add_timer(&ipr_cmd->timer);
  6792. }
  6793. /**
  6794. * ipr_init_ioa_mem - Initialize ioa_cfg control block
  6795. * @ioa_cfg: ioa cfg struct
  6796. *
  6797. * Return value:
  6798. * nothing
  6799. **/
  6800. static void ipr_init_ioa_mem(struct ipr_ioa_cfg *ioa_cfg)
  6801. {
  6802. struct ipr_hrr_queue *hrrq;
  6803. for_each_hrrq(hrrq, ioa_cfg) {
  6804. spin_lock(&hrrq->_lock);
  6805. memset(hrrq->host_rrq, 0, sizeof(u32) * hrrq->size);
  6806. /* Initialize Host RRQ pointers */
  6807. hrrq->hrrq_start = hrrq->host_rrq;
  6808. hrrq->hrrq_end = &hrrq->host_rrq[hrrq->size - 1];
  6809. hrrq->hrrq_curr = hrrq->hrrq_start;
  6810. hrrq->toggle_bit = 1;
  6811. spin_unlock(&hrrq->_lock);
  6812. }
  6813. wmb();
  6814. ioa_cfg->identify_hrrq_index = 0;
  6815. if (ioa_cfg->hrrq_num == 1)
  6816. atomic_set(&ioa_cfg->hrrq_index, 0);
  6817. else
  6818. atomic_set(&ioa_cfg->hrrq_index, 1);
  6819. /* Zero out config table */
  6820. memset(ioa_cfg->u.cfg_table, 0, ioa_cfg->cfg_table_size);
  6821. }
  6822. /**
  6823. * ipr_reset_next_stage - Process IPL stage change based on feedback register.
  6824. * @ipr_cmd: ipr command struct
  6825. *
  6826. * Return value:
  6827. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  6828. **/
  6829. static int ipr_reset_next_stage(struct ipr_cmnd *ipr_cmd)
  6830. {
  6831. unsigned long stage, stage_time;
  6832. u32 feedback;
  6833. volatile u32 int_reg;
  6834. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6835. u64 maskval = 0;
  6836. feedback = readl(ioa_cfg->regs.init_feedback_reg);
  6837. stage = feedback & IPR_IPL_INIT_STAGE_MASK;
  6838. stage_time = feedback & IPR_IPL_INIT_STAGE_TIME_MASK;
  6839. ipr_dbg("IPL stage = 0x%lx, IPL stage time = %ld\n", stage, stage_time);
  6840. /* sanity check the stage_time value */
  6841. if (stage_time == 0)
  6842. stage_time = IPR_IPL_INIT_DEFAULT_STAGE_TIME;
  6843. else if (stage_time < IPR_IPL_INIT_MIN_STAGE_TIME)
  6844. stage_time = IPR_IPL_INIT_MIN_STAGE_TIME;
  6845. else if (stage_time > IPR_LONG_OPERATIONAL_TIMEOUT)
  6846. stage_time = IPR_LONG_OPERATIONAL_TIMEOUT;
  6847. if (stage == IPR_IPL_INIT_STAGE_UNKNOWN) {
  6848. writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
  6849. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6850. stage_time = ioa_cfg->transop_timeout;
  6851. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6852. } else if (stage == IPR_IPL_INIT_STAGE_TRANSOP) {
  6853. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6854. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6855. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6856. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6857. maskval = (maskval << 32) | IPR_PCII_IOA_TRANS_TO_OPER;
  6858. writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
  6859. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6860. return IPR_RC_JOB_CONTINUE;
  6861. }
  6862. }
  6863. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6864. ipr_cmd->timer.expires = jiffies + stage_time * HZ;
  6865. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6866. ipr_cmd->done = ipr_reset_ioa_job;
  6867. add_timer(&ipr_cmd->timer);
  6868. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6869. return IPR_RC_JOB_RETURN;
  6870. }
  6871. /**
  6872. * ipr_reset_enable_ioa - Enable the IOA following a reset.
  6873. * @ipr_cmd: ipr command struct
  6874. *
  6875. * This function reinitializes some control blocks and
  6876. * enables destructive diagnostics on the adapter.
  6877. *
  6878. * Return value:
  6879. * IPR_RC_JOB_RETURN
  6880. **/
  6881. static int ipr_reset_enable_ioa(struct ipr_cmnd *ipr_cmd)
  6882. {
  6883. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6884. volatile u32 int_reg;
  6885. volatile u64 maskval;
  6886. int i;
  6887. ENTER;
  6888. ipr_cmd->job_step = ipr_ioafp_identify_hrrq;
  6889. ipr_init_ioa_mem(ioa_cfg);
  6890. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  6891. spin_lock(&ioa_cfg->hrrq[i]._lock);
  6892. ioa_cfg->hrrq[i].allow_interrupts = 1;
  6893. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  6894. }
  6895. wmb();
  6896. if (ioa_cfg->sis64) {
  6897. /* Set the adapter to the correct endian mode. */
  6898. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  6899. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  6900. }
  6901. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg32);
  6902. if (int_reg & IPR_PCII_IOA_TRANS_TO_OPER) {
  6903. writel((IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED),
  6904. ioa_cfg->regs.clr_interrupt_mask_reg32);
  6905. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6906. return IPR_RC_JOB_CONTINUE;
  6907. }
  6908. /* Enable destructive diagnostics on IOA */
  6909. writel(ioa_cfg->doorbell, ioa_cfg->regs.set_uproc_interrupt_reg32);
  6910. if (ioa_cfg->sis64) {
  6911. maskval = IPR_PCII_IPL_STAGE_CHANGE;
  6912. maskval = (maskval << 32) | IPR_PCII_OPER_INTERRUPTS;
  6913. writeq(maskval, ioa_cfg->regs.clr_interrupt_mask_reg);
  6914. } else
  6915. writel(IPR_PCII_OPER_INTERRUPTS, ioa_cfg->regs.clr_interrupt_mask_reg32);
  6916. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  6917. dev_info(&ioa_cfg->pdev->dev, "Initializing IOA.\n");
  6918. if (ioa_cfg->sis64) {
  6919. ipr_cmd->job_step = ipr_reset_next_stage;
  6920. return IPR_RC_JOB_CONTINUE;
  6921. }
  6922. ipr_cmd->timer.data = (unsigned long) ipr_cmd;
  6923. ipr_cmd->timer.expires = jiffies + (ioa_cfg->transop_timeout * HZ);
  6924. ipr_cmd->timer.function = (void (*)(unsigned long))ipr_oper_timeout;
  6925. ipr_cmd->done = ipr_reset_ioa_job;
  6926. add_timer(&ipr_cmd->timer);
  6927. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  6928. LEAVE;
  6929. return IPR_RC_JOB_RETURN;
  6930. }
  6931. /**
  6932. * ipr_reset_wait_for_dump - Wait for a dump to timeout.
  6933. * @ipr_cmd: ipr command struct
  6934. *
  6935. * This function is invoked when an adapter dump has run out
  6936. * of processing time.
  6937. *
  6938. * Return value:
  6939. * IPR_RC_JOB_CONTINUE
  6940. **/
  6941. static int ipr_reset_wait_for_dump(struct ipr_cmnd *ipr_cmd)
  6942. {
  6943. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  6944. if (ioa_cfg->sdt_state == GET_DUMP)
  6945. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  6946. else if (ioa_cfg->sdt_state == READ_DUMP)
  6947. ioa_cfg->sdt_state = ABORT_DUMP;
  6948. ioa_cfg->dump_timeout = 1;
  6949. ipr_cmd->job_step = ipr_reset_alert;
  6950. return IPR_RC_JOB_CONTINUE;
  6951. }
  6952. /**
  6953. * ipr_unit_check_no_data - Log a unit check/no data error log
  6954. * @ioa_cfg: ioa config struct
  6955. *
  6956. * Logs an error indicating the adapter unit checked, but for some
  6957. * reason, we were unable to fetch the unit check buffer.
  6958. *
  6959. * Return value:
  6960. * nothing
  6961. **/
  6962. static void ipr_unit_check_no_data(struct ipr_ioa_cfg *ioa_cfg)
  6963. {
  6964. ioa_cfg->errors_logged++;
  6965. dev_err(&ioa_cfg->pdev->dev, "IOA unit check with no data\n");
  6966. }
  6967. /**
  6968. * ipr_get_unit_check_buffer - Get the unit check buffer from the IOA
  6969. * @ioa_cfg: ioa config struct
  6970. *
  6971. * Fetches the unit check buffer from the adapter by clocking the data
  6972. * through the mailbox register.
  6973. *
  6974. * Return value:
  6975. * nothing
  6976. **/
  6977. static void ipr_get_unit_check_buffer(struct ipr_ioa_cfg *ioa_cfg)
  6978. {
  6979. unsigned long mailbox;
  6980. struct ipr_hostrcb *hostrcb;
  6981. struct ipr_uc_sdt sdt;
  6982. int rc, length;
  6983. u32 ioasc;
  6984. mailbox = readl(ioa_cfg->ioa_mailbox);
  6985. if (!ioa_cfg->sis64 && !ipr_sdt_is_fmt2(mailbox)) {
  6986. ipr_unit_check_no_data(ioa_cfg);
  6987. return;
  6988. }
  6989. memset(&sdt, 0, sizeof(struct ipr_uc_sdt));
  6990. rc = ipr_get_ldump_data_section(ioa_cfg, mailbox, (__be32 *) &sdt,
  6991. (sizeof(struct ipr_uc_sdt)) / sizeof(__be32));
  6992. if (rc || !(sdt.entry[0].flags & IPR_SDT_VALID_ENTRY) ||
  6993. ((be32_to_cpu(sdt.hdr.state) != IPR_FMT3_SDT_READY_TO_USE) &&
  6994. (be32_to_cpu(sdt.hdr.state) != IPR_FMT2_SDT_READY_TO_USE))) {
  6995. ipr_unit_check_no_data(ioa_cfg);
  6996. return;
  6997. }
  6998. /* Find length of the first sdt entry (UC buffer) */
  6999. if (be32_to_cpu(sdt.hdr.state) == IPR_FMT3_SDT_READY_TO_USE)
  7000. length = be32_to_cpu(sdt.entry[0].end_token);
  7001. else
  7002. length = (be32_to_cpu(sdt.entry[0].end_token) -
  7003. be32_to_cpu(sdt.entry[0].start_token)) &
  7004. IPR_FMT2_MBX_ADDR_MASK;
  7005. hostrcb = list_entry(ioa_cfg->hostrcb_free_q.next,
  7006. struct ipr_hostrcb, queue);
  7007. list_del(&hostrcb->queue);
  7008. memset(&hostrcb->hcam, 0, sizeof(hostrcb->hcam));
  7009. rc = ipr_get_ldump_data_section(ioa_cfg,
  7010. be32_to_cpu(sdt.entry[0].start_token),
  7011. (__be32 *)&hostrcb->hcam,
  7012. min(length, (int)sizeof(hostrcb->hcam)) / sizeof(__be32));
  7013. if (!rc) {
  7014. ipr_handle_log_data(ioa_cfg, hostrcb);
  7015. ioasc = be32_to_cpu(hostrcb->hcam.u.error.fd_ioasc);
  7016. if (ioasc == IPR_IOASC_NR_IOA_RESET_REQUIRED &&
  7017. ioa_cfg->sdt_state == GET_DUMP)
  7018. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7019. } else
  7020. ipr_unit_check_no_data(ioa_cfg);
  7021. list_add_tail(&hostrcb->queue, &ioa_cfg->hostrcb_free_q);
  7022. }
  7023. /**
  7024. * ipr_reset_get_unit_check_job - Call to get the unit check buffer.
  7025. * @ipr_cmd: ipr command struct
  7026. *
  7027. * Description: This function will call to get the unit check buffer.
  7028. *
  7029. * Return value:
  7030. * IPR_RC_JOB_RETURN
  7031. **/
  7032. static int ipr_reset_get_unit_check_job(struct ipr_cmnd *ipr_cmd)
  7033. {
  7034. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7035. ENTER;
  7036. ioa_cfg->ioa_unit_checked = 0;
  7037. ipr_get_unit_check_buffer(ioa_cfg);
  7038. ipr_cmd->job_step = ipr_reset_alert;
  7039. ipr_reset_start_timer(ipr_cmd, 0);
  7040. LEAVE;
  7041. return IPR_RC_JOB_RETURN;
  7042. }
  7043. /**
  7044. * ipr_reset_restore_cfg_space - Restore PCI config space.
  7045. * @ipr_cmd: ipr command struct
  7046. *
  7047. * Description: This function restores the saved PCI config space of
  7048. * the adapter, fails all outstanding ops back to the callers, and
  7049. * fetches the dump/unit check if applicable to this reset.
  7050. *
  7051. * Return value:
  7052. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7053. **/
  7054. static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
  7055. {
  7056. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7057. u32 int_reg;
  7058. ENTER;
  7059. ioa_cfg->pdev->state_saved = true;
  7060. pci_restore_state(ioa_cfg->pdev);
  7061. if (ipr_set_pcix_cmd_reg(ioa_cfg)) {
  7062. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7063. return IPR_RC_JOB_CONTINUE;
  7064. }
  7065. ipr_fail_all_ops(ioa_cfg);
  7066. if (ioa_cfg->sis64) {
  7067. /* Set the adapter to the correct endian mode. */
  7068. writel(IPR_ENDIAN_SWAP_KEY, ioa_cfg->regs.endian_swap_reg);
  7069. int_reg = readl(ioa_cfg->regs.endian_swap_reg);
  7070. }
  7071. if (ioa_cfg->ioa_unit_checked) {
  7072. if (ioa_cfg->sis64) {
  7073. ipr_cmd->job_step = ipr_reset_get_unit_check_job;
  7074. ipr_reset_start_timer(ipr_cmd, IPR_DUMP_DELAY_TIMEOUT);
  7075. return IPR_RC_JOB_RETURN;
  7076. } else {
  7077. ioa_cfg->ioa_unit_checked = 0;
  7078. ipr_get_unit_check_buffer(ioa_cfg);
  7079. ipr_cmd->job_step = ipr_reset_alert;
  7080. ipr_reset_start_timer(ipr_cmd, 0);
  7081. return IPR_RC_JOB_RETURN;
  7082. }
  7083. }
  7084. if (ioa_cfg->in_ioa_bringdown) {
  7085. ipr_cmd->job_step = ipr_ioa_bringdown_done;
  7086. } else {
  7087. ipr_cmd->job_step = ipr_reset_enable_ioa;
  7088. if (GET_DUMP == ioa_cfg->sdt_state) {
  7089. ioa_cfg->sdt_state = READ_DUMP;
  7090. ioa_cfg->dump_timeout = 0;
  7091. if (ioa_cfg->sis64)
  7092. ipr_reset_start_timer(ipr_cmd, IPR_SIS64_DUMP_TIMEOUT);
  7093. else
  7094. ipr_reset_start_timer(ipr_cmd, IPR_SIS32_DUMP_TIMEOUT);
  7095. ipr_cmd->job_step = ipr_reset_wait_for_dump;
  7096. schedule_work(&ioa_cfg->work_q);
  7097. return IPR_RC_JOB_RETURN;
  7098. }
  7099. }
  7100. LEAVE;
  7101. return IPR_RC_JOB_CONTINUE;
  7102. }
  7103. /**
  7104. * ipr_reset_bist_done - BIST has completed on the adapter.
  7105. * @ipr_cmd: ipr command struct
  7106. *
  7107. * Description: Unblock config space and resume the reset process.
  7108. *
  7109. * Return value:
  7110. * IPR_RC_JOB_CONTINUE
  7111. **/
  7112. static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
  7113. {
  7114. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7115. ENTER;
  7116. if (ioa_cfg->cfg_locked)
  7117. pci_cfg_access_unlock(ioa_cfg->pdev);
  7118. ioa_cfg->cfg_locked = 0;
  7119. ipr_cmd->job_step = ipr_reset_restore_cfg_space;
  7120. LEAVE;
  7121. return IPR_RC_JOB_CONTINUE;
  7122. }
  7123. /**
  7124. * ipr_reset_start_bist - Run BIST on the adapter.
  7125. * @ipr_cmd: ipr command struct
  7126. *
  7127. * Description: This function runs BIST on the adapter, then delays 2 seconds.
  7128. *
  7129. * Return value:
  7130. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7131. **/
  7132. static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
  7133. {
  7134. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7135. int rc = PCIBIOS_SUCCESSFUL;
  7136. ENTER;
  7137. if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
  7138. writel(IPR_UPROCI_SIS64_START_BIST,
  7139. ioa_cfg->regs.set_uproc_interrupt_reg32);
  7140. else
  7141. rc = pci_write_config_byte(ioa_cfg->pdev, PCI_BIST, PCI_BIST_START);
  7142. if (rc == PCIBIOS_SUCCESSFUL) {
  7143. ipr_cmd->job_step = ipr_reset_bist_done;
  7144. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7145. rc = IPR_RC_JOB_RETURN;
  7146. } else {
  7147. if (ioa_cfg->cfg_locked)
  7148. pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
  7149. ioa_cfg->cfg_locked = 0;
  7150. ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
  7151. rc = IPR_RC_JOB_CONTINUE;
  7152. }
  7153. LEAVE;
  7154. return rc;
  7155. }
  7156. /**
  7157. * ipr_reset_slot_reset_done - Clear PCI reset to the adapter
  7158. * @ipr_cmd: ipr command struct
  7159. *
  7160. * Description: This clears PCI reset to the adapter and delays two seconds.
  7161. *
  7162. * Return value:
  7163. * IPR_RC_JOB_RETURN
  7164. **/
  7165. static int ipr_reset_slot_reset_done(struct ipr_cmnd *ipr_cmd)
  7166. {
  7167. ENTER;
  7168. pci_set_pcie_reset_state(ipr_cmd->ioa_cfg->pdev, pcie_deassert_reset);
  7169. ipr_cmd->job_step = ipr_reset_bist_done;
  7170. ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
  7171. LEAVE;
  7172. return IPR_RC_JOB_RETURN;
  7173. }
  7174. /**
  7175. * ipr_reset_slot_reset - Reset the PCI slot of the adapter.
  7176. * @ipr_cmd: ipr command struct
  7177. *
  7178. * Description: This asserts PCI reset to the adapter.
  7179. *
  7180. * Return value:
  7181. * IPR_RC_JOB_RETURN
  7182. **/
  7183. static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
  7184. {
  7185. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7186. struct pci_dev *pdev = ioa_cfg->pdev;
  7187. ENTER;
  7188. pci_set_pcie_reset_state(pdev, pcie_warm_reset);
  7189. ipr_cmd->job_step = ipr_reset_slot_reset_done;
  7190. ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
  7191. LEAVE;
  7192. return IPR_RC_JOB_RETURN;
  7193. }
  7194. /**
  7195. * ipr_reset_block_config_access_wait - Wait for permission to block config access
  7196. * @ipr_cmd: ipr command struct
  7197. *
  7198. * Description: This attempts to block config access to the IOA.
  7199. *
  7200. * Return value:
  7201. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7202. **/
  7203. static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
  7204. {
  7205. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7206. int rc = IPR_RC_JOB_CONTINUE;
  7207. if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
  7208. ioa_cfg->cfg_locked = 1;
  7209. ipr_cmd->job_step = ioa_cfg->reset;
  7210. } else {
  7211. if (ipr_cmd->u.time_left) {
  7212. rc = IPR_RC_JOB_RETURN;
  7213. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7214. ipr_reset_start_timer(ipr_cmd,
  7215. IPR_CHECK_FOR_RESET_TIMEOUT);
  7216. } else {
  7217. ipr_cmd->job_step = ioa_cfg->reset;
  7218. dev_err(&ioa_cfg->pdev->dev,
  7219. "Timed out waiting to lock config access. Resetting anyway.\n");
  7220. }
  7221. }
  7222. return rc;
  7223. }
  7224. /**
  7225. * ipr_reset_block_config_access - Block config access to the IOA
  7226. * @ipr_cmd: ipr command struct
  7227. *
  7228. * Description: This attempts to block config access to the IOA
  7229. *
  7230. * Return value:
  7231. * IPR_RC_JOB_CONTINUE
  7232. **/
  7233. static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
  7234. {
  7235. ipr_cmd->ioa_cfg->cfg_locked = 0;
  7236. ipr_cmd->job_step = ipr_reset_block_config_access_wait;
  7237. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7238. return IPR_RC_JOB_CONTINUE;
  7239. }
  7240. /**
  7241. * ipr_reset_allowed - Query whether or not IOA can be reset
  7242. * @ioa_cfg: ioa config struct
  7243. *
  7244. * Return value:
  7245. * 0 if reset not allowed / non-zero if reset is allowed
  7246. **/
  7247. static int ipr_reset_allowed(struct ipr_ioa_cfg *ioa_cfg)
  7248. {
  7249. volatile u32 temp_reg;
  7250. temp_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  7251. return ((temp_reg & IPR_PCII_CRITICAL_OPERATION) == 0);
  7252. }
  7253. /**
  7254. * ipr_reset_wait_to_start_bist - Wait for permission to reset IOA.
  7255. * @ipr_cmd: ipr command struct
  7256. *
  7257. * Description: This function waits for adapter permission to run BIST,
  7258. * then runs BIST. If the adapter does not give permission after a
  7259. * reasonable time, we will reset the adapter anyway. The impact of
  7260. * resetting the adapter without warning the adapter is the risk of
  7261. * losing the persistent error log on the adapter. If the adapter is
  7262. * reset while it is writing to the flash on the adapter, the flash
  7263. * segment will have bad ECC and be zeroed.
  7264. *
  7265. * Return value:
  7266. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7267. **/
  7268. static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
  7269. {
  7270. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7271. int rc = IPR_RC_JOB_RETURN;
  7272. if (!ipr_reset_allowed(ioa_cfg) && ipr_cmd->u.time_left) {
  7273. ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
  7274. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7275. } else {
  7276. ipr_cmd->job_step = ipr_reset_block_config_access;
  7277. rc = IPR_RC_JOB_CONTINUE;
  7278. }
  7279. return rc;
  7280. }
  7281. /**
  7282. * ipr_reset_alert - Alert the adapter of a pending reset
  7283. * @ipr_cmd: ipr command struct
  7284. *
  7285. * Description: This function alerts the adapter that it will be reset.
  7286. * If memory space is not currently enabled, proceed directly
  7287. * to running BIST on the adapter. The timer must always be started
  7288. * so we guarantee we do not run BIST from ipr_isr.
  7289. *
  7290. * Return value:
  7291. * IPR_RC_JOB_RETURN
  7292. **/
  7293. static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
  7294. {
  7295. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7296. u16 cmd_reg;
  7297. int rc;
  7298. ENTER;
  7299. rc = pci_read_config_word(ioa_cfg->pdev, PCI_COMMAND, &cmd_reg);
  7300. if ((rc == PCIBIOS_SUCCESSFUL) && (cmd_reg & PCI_COMMAND_MEMORY)) {
  7301. ipr_mask_and_clear_interrupts(ioa_cfg, ~0);
  7302. writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
  7303. ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
  7304. } else {
  7305. ipr_cmd->job_step = ipr_reset_block_config_access;
  7306. }
  7307. ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
  7308. ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
  7309. LEAVE;
  7310. return IPR_RC_JOB_RETURN;
  7311. }
  7312. /**
  7313. * ipr_reset_ucode_download_done - Microcode download completion
  7314. * @ipr_cmd: ipr command struct
  7315. *
  7316. * Description: This function unmaps the microcode download buffer.
  7317. *
  7318. * Return value:
  7319. * IPR_RC_JOB_CONTINUE
  7320. **/
  7321. static int ipr_reset_ucode_download_done(struct ipr_cmnd *ipr_cmd)
  7322. {
  7323. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7324. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7325. pci_unmap_sg(ioa_cfg->pdev, sglist->scatterlist,
  7326. sglist->num_sg, DMA_TO_DEVICE);
  7327. ipr_cmd->job_step = ipr_reset_alert;
  7328. return IPR_RC_JOB_CONTINUE;
  7329. }
  7330. /**
  7331. * ipr_reset_ucode_download - Download microcode to the adapter
  7332. * @ipr_cmd: ipr command struct
  7333. *
  7334. * Description: This function checks to see if it there is microcode
  7335. * to download to the adapter. If there is, a download is performed.
  7336. *
  7337. * Return value:
  7338. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7339. **/
  7340. static int ipr_reset_ucode_download(struct ipr_cmnd *ipr_cmd)
  7341. {
  7342. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7343. struct ipr_sglist *sglist = ioa_cfg->ucode_sglist;
  7344. ENTER;
  7345. ipr_cmd->job_step = ipr_reset_alert;
  7346. if (!sglist)
  7347. return IPR_RC_JOB_CONTINUE;
  7348. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7349. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_SCSICDB;
  7350. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = WRITE_BUFFER;
  7351. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_WR_BUF_DOWNLOAD_AND_SAVE;
  7352. ipr_cmd->ioarcb.cmd_pkt.cdb[6] = (sglist->buffer_len & 0xff0000) >> 16;
  7353. ipr_cmd->ioarcb.cmd_pkt.cdb[7] = (sglist->buffer_len & 0x00ff00) >> 8;
  7354. ipr_cmd->ioarcb.cmd_pkt.cdb[8] = sglist->buffer_len & 0x0000ff;
  7355. if (ioa_cfg->sis64)
  7356. ipr_build_ucode_ioadl64(ipr_cmd, sglist);
  7357. else
  7358. ipr_build_ucode_ioadl(ipr_cmd, sglist);
  7359. ipr_cmd->job_step = ipr_reset_ucode_download_done;
  7360. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout,
  7361. IPR_WRITE_BUFFER_TIMEOUT);
  7362. LEAVE;
  7363. return IPR_RC_JOB_RETURN;
  7364. }
  7365. /**
  7366. * ipr_reset_shutdown_ioa - Shutdown the adapter
  7367. * @ipr_cmd: ipr command struct
  7368. *
  7369. * Description: This function issues an adapter shutdown of the
  7370. * specified type to the specified adapter as part of the
  7371. * adapter reset job.
  7372. *
  7373. * Return value:
  7374. * IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
  7375. **/
  7376. static int ipr_reset_shutdown_ioa(struct ipr_cmnd *ipr_cmd)
  7377. {
  7378. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7379. enum ipr_shutdown_type shutdown_type = ipr_cmd->u.shutdown_type;
  7380. unsigned long timeout;
  7381. int rc = IPR_RC_JOB_CONTINUE;
  7382. ENTER;
  7383. if (shutdown_type != IPR_SHUTDOWN_NONE &&
  7384. !ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7385. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  7386. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  7387. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  7388. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = shutdown_type;
  7389. if (shutdown_type == IPR_SHUTDOWN_NORMAL)
  7390. timeout = IPR_SHUTDOWN_TIMEOUT;
  7391. else if (shutdown_type == IPR_SHUTDOWN_PREPARE_FOR_NORMAL)
  7392. timeout = IPR_INTERNAL_TIMEOUT;
  7393. else if (ioa_cfg->dual_raid && ipr_dual_ioa_raid)
  7394. timeout = IPR_DUAL_IOA_ABBR_SHUTDOWN_TO;
  7395. else
  7396. timeout = IPR_ABBREV_SHUTDOWN_TIMEOUT;
  7397. ipr_do_req(ipr_cmd, ipr_reset_ioa_job, ipr_timeout, timeout);
  7398. rc = IPR_RC_JOB_RETURN;
  7399. ipr_cmd->job_step = ipr_reset_ucode_download;
  7400. } else
  7401. ipr_cmd->job_step = ipr_reset_alert;
  7402. LEAVE;
  7403. return rc;
  7404. }
  7405. /**
  7406. * ipr_reset_ioa_job - Adapter reset job
  7407. * @ipr_cmd: ipr command struct
  7408. *
  7409. * Description: This function is the job router for the adapter reset job.
  7410. *
  7411. * Return value:
  7412. * none
  7413. **/
  7414. static void ipr_reset_ioa_job(struct ipr_cmnd *ipr_cmd)
  7415. {
  7416. u32 rc, ioasc;
  7417. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7418. do {
  7419. ioasc = be32_to_cpu(ipr_cmd->s.ioasa.hdr.ioasc);
  7420. if (ioa_cfg->reset_cmd != ipr_cmd) {
  7421. /*
  7422. * We are doing nested adapter resets and this is
  7423. * not the current reset job.
  7424. */
  7425. list_add_tail(&ipr_cmd->queue,
  7426. &ipr_cmd->hrrq->hrrq_free_q);
  7427. return;
  7428. }
  7429. if (IPR_IOASC_SENSE_KEY(ioasc)) {
  7430. rc = ipr_cmd->job_step_failed(ipr_cmd);
  7431. if (rc == IPR_RC_JOB_RETURN)
  7432. return;
  7433. }
  7434. ipr_reinit_ipr_cmnd(ipr_cmd);
  7435. ipr_cmd->job_step_failed = ipr_reset_cmd_failed;
  7436. rc = ipr_cmd->job_step(ipr_cmd);
  7437. } while (rc == IPR_RC_JOB_CONTINUE);
  7438. }
  7439. /**
  7440. * _ipr_initiate_ioa_reset - Initiate an adapter reset
  7441. * @ioa_cfg: ioa config struct
  7442. * @job_step: first job step of reset job
  7443. * @shutdown_type: shutdown type
  7444. *
  7445. * Description: This function will initiate the reset of the given adapter
  7446. * starting at the selected job step.
  7447. * If the caller needs to wait on the completion of the reset,
  7448. * the caller must sleep on the reset_wait_q.
  7449. *
  7450. * Return value:
  7451. * none
  7452. **/
  7453. static void _ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7454. int (*job_step) (struct ipr_cmnd *),
  7455. enum ipr_shutdown_type shutdown_type)
  7456. {
  7457. struct ipr_cmnd *ipr_cmd;
  7458. int i;
  7459. ioa_cfg->in_reset_reload = 1;
  7460. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7461. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7462. ioa_cfg->hrrq[i].allow_cmds = 0;
  7463. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7464. }
  7465. wmb();
  7466. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa)
  7467. scsi_block_requests(ioa_cfg->host);
  7468. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  7469. ioa_cfg->reset_cmd = ipr_cmd;
  7470. ipr_cmd->job_step = job_step;
  7471. ipr_cmd->u.shutdown_type = shutdown_type;
  7472. ipr_reset_ioa_job(ipr_cmd);
  7473. }
  7474. /**
  7475. * ipr_initiate_ioa_reset - Initiate an adapter reset
  7476. * @ioa_cfg: ioa config struct
  7477. * @shutdown_type: shutdown type
  7478. *
  7479. * Description: This function will initiate the reset of the given adapter.
  7480. * If the caller needs to wait on the completion of the reset,
  7481. * the caller must sleep on the reset_wait_q.
  7482. *
  7483. * Return value:
  7484. * none
  7485. **/
  7486. static void ipr_initiate_ioa_reset(struct ipr_ioa_cfg *ioa_cfg,
  7487. enum ipr_shutdown_type shutdown_type)
  7488. {
  7489. int i;
  7490. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead)
  7491. return;
  7492. if (ioa_cfg->in_reset_reload) {
  7493. if (ioa_cfg->sdt_state == GET_DUMP)
  7494. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  7495. else if (ioa_cfg->sdt_state == READ_DUMP)
  7496. ioa_cfg->sdt_state = ABORT_DUMP;
  7497. }
  7498. if (ioa_cfg->reset_retries++ >= IPR_NUM_RESET_RELOAD_RETRIES) {
  7499. dev_err(&ioa_cfg->pdev->dev,
  7500. "IOA taken offline - error recovery failed\n");
  7501. ioa_cfg->reset_retries = 0;
  7502. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7503. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7504. ioa_cfg->hrrq[i].ioa_is_dead = 1;
  7505. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7506. }
  7507. wmb();
  7508. if (ioa_cfg->in_ioa_bringdown) {
  7509. ioa_cfg->reset_cmd = NULL;
  7510. ioa_cfg->in_reset_reload = 0;
  7511. ipr_fail_all_ops(ioa_cfg);
  7512. wake_up_all(&ioa_cfg->reset_wait_q);
  7513. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].removing_ioa) {
  7514. spin_unlock_irq(ioa_cfg->host->host_lock);
  7515. scsi_unblock_requests(ioa_cfg->host);
  7516. spin_lock_irq(ioa_cfg->host->host_lock);
  7517. }
  7518. return;
  7519. } else {
  7520. ioa_cfg->in_ioa_bringdown = 1;
  7521. shutdown_type = IPR_SHUTDOWN_NONE;
  7522. }
  7523. }
  7524. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_shutdown_ioa,
  7525. shutdown_type);
  7526. }
  7527. /**
  7528. * ipr_reset_freeze - Hold off all I/O activity
  7529. * @ipr_cmd: ipr command struct
  7530. *
  7531. * Description: If the PCI slot is frozen, hold off all I/O
  7532. * activity; then, as soon as the slot is available again,
  7533. * initiate an adapter reset.
  7534. */
  7535. static int ipr_reset_freeze(struct ipr_cmnd *ipr_cmd)
  7536. {
  7537. struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
  7538. int i;
  7539. /* Disallow new interrupts, avoid loop */
  7540. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7541. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7542. ioa_cfg->hrrq[i].allow_interrupts = 0;
  7543. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7544. }
  7545. wmb();
  7546. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_pending_q);
  7547. ipr_cmd->done = ipr_reset_ioa_job;
  7548. return IPR_RC_JOB_RETURN;
  7549. }
  7550. /**
  7551. * ipr_pci_frozen - Called when slot has experienced a PCI bus error.
  7552. * @pdev: PCI device struct
  7553. *
  7554. * Description: This routine is called to tell us that the PCI bus
  7555. * is down. Can't do anything here, except put the device driver
  7556. * into a holding pattern, waiting for the PCI bus to come back.
  7557. */
  7558. static void ipr_pci_frozen(struct pci_dev *pdev)
  7559. {
  7560. unsigned long flags = 0;
  7561. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7562. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7563. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_freeze, IPR_SHUTDOWN_NONE);
  7564. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7565. }
  7566. /**
  7567. * ipr_pci_slot_reset - Called when PCI slot has been reset.
  7568. * @pdev: PCI device struct
  7569. *
  7570. * Description: This routine is called by the pci error recovery
  7571. * code after the PCI slot has been reset, just before we
  7572. * should resume normal operations.
  7573. */
  7574. static pci_ers_result_t ipr_pci_slot_reset(struct pci_dev *pdev)
  7575. {
  7576. unsigned long flags = 0;
  7577. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7578. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7579. if (ioa_cfg->needs_warm_reset)
  7580. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7581. else
  7582. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_restore_cfg_space,
  7583. IPR_SHUTDOWN_NONE);
  7584. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7585. return PCI_ERS_RESULT_RECOVERED;
  7586. }
  7587. /**
  7588. * ipr_pci_perm_failure - Called when PCI slot is dead for good.
  7589. * @pdev: PCI device struct
  7590. *
  7591. * Description: This routine is called when the PCI bus has
  7592. * permanently failed.
  7593. */
  7594. static void ipr_pci_perm_failure(struct pci_dev *pdev)
  7595. {
  7596. unsigned long flags = 0;
  7597. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  7598. int i;
  7599. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  7600. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  7601. ioa_cfg->sdt_state = ABORT_DUMP;
  7602. ioa_cfg->reset_retries = IPR_NUM_RESET_RELOAD_RETRIES - 1;
  7603. ioa_cfg->in_ioa_bringdown = 1;
  7604. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7605. spin_lock(&ioa_cfg->hrrq[i]._lock);
  7606. ioa_cfg->hrrq[i].allow_cmds = 0;
  7607. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  7608. }
  7609. wmb();
  7610. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7611. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  7612. }
  7613. /**
  7614. * ipr_pci_error_detected - Called when a PCI error is detected.
  7615. * @pdev: PCI device struct
  7616. * @state: PCI channel state
  7617. *
  7618. * Description: Called when a PCI error is detected.
  7619. *
  7620. * Return value:
  7621. * PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
  7622. */
  7623. static pci_ers_result_t ipr_pci_error_detected(struct pci_dev *pdev,
  7624. pci_channel_state_t state)
  7625. {
  7626. switch (state) {
  7627. case pci_channel_io_frozen:
  7628. ipr_pci_frozen(pdev);
  7629. return PCI_ERS_RESULT_NEED_RESET;
  7630. case pci_channel_io_perm_failure:
  7631. ipr_pci_perm_failure(pdev);
  7632. return PCI_ERS_RESULT_DISCONNECT;
  7633. break;
  7634. default:
  7635. break;
  7636. }
  7637. return PCI_ERS_RESULT_NEED_RESET;
  7638. }
  7639. /**
  7640. * ipr_probe_ioa_part2 - Initializes IOAs found in ipr_probe_ioa(..)
  7641. * @ioa_cfg: ioa cfg struct
  7642. *
  7643. * Description: This is the second phase of adapter intialization
  7644. * This function takes care of initilizing the adapter to the point
  7645. * where it can accept new commands.
  7646. * Return value:
  7647. * 0 on success / -EIO on failure
  7648. **/
  7649. static int ipr_probe_ioa_part2(struct ipr_ioa_cfg *ioa_cfg)
  7650. {
  7651. int rc = 0;
  7652. unsigned long host_lock_flags = 0;
  7653. ENTER;
  7654. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7655. dev_dbg(&ioa_cfg->pdev->dev, "ioa_cfg adx: 0x%p\n", ioa_cfg);
  7656. if (ioa_cfg->needs_hard_reset) {
  7657. ioa_cfg->needs_hard_reset = 0;
  7658. ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
  7659. } else
  7660. _ipr_initiate_ioa_reset(ioa_cfg, ipr_reset_enable_ioa,
  7661. IPR_SHUTDOWN_NONE);
  7662. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7663. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  7664. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  7665. if (ioa_cfg->hrrq[IPR_INIT_HRRQ].ioa_is_dead) {
  7666. rc = -EIO;
  7667. } else if (ipr_invalid_adapter(ioa_cfg)) {
  7668. if (!ipr_testmode)
  7669. rc = -EIO;
  7670. dev_err(&ioa_cfg->pdev->dev,
  7671. "Adapter not supported in this hardware configuration.\n");
  7672. }
  7673. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  7674. LEAVE;
  7675. return rc;
  7676. }
  7677. /**
  7678. * ipr_free_cmd_blks - Frees command blocks allocated for an adapter
  7679. * @ioa_cfg: ioa config struct
  7680. *
  7681. * Return value:
  7682. * none
  7683. **/
  7684. static void ipr_free_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7685. {
  7686. int i;
  7687. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7688. if (ioa_cfg->ipr_cmnd_list[i])
  7689. pci_pool_free(ioa_cfg->ipr_cmd_pool,
  7690. ioa_cfg->ipr_cmnd_list[i],
  7691. ioa_cfg->ipr_cmnd_list_dma[i]);
  7692. ioa_cfg->ipr_cmnd_list[i] = NULL;
  7693. }
  7694. if (ioa_cfg->ipr_cmd_pool)
  7695. pci_pool_destroy(ioa_cfg->ipr_cmd_pool);
  7696. kfree(ioa_cfg->ipr_cmnd_list);
  7697. kfree(ioa_cfg->ipr_cmnd_list_dma);
  7698. ioa_cfg->ipr_cmnd_list = NULL;
  7699. ioa_cfg->ipr_cmnd_list_dma = NULL;
  7700. ioa_cfg->ipr_cmd_pool = NULL;
  7701. }
  7702. /**
  7703. * ipr_free_mem - Frees memory allocated for an adapter
  7704. * @ioa_cfg: ioa cfg struct
  7705. *
  7706. * Return value:
  7707. * nothing
  7708. **/
  7709. static void ipr_free_mem(struct ipr_ioa_cfg *ioa_cfg)
  7710. {
  7711. int i;
  7712. kfree(ioa_cfg->res_entries);
  7713. pci_free_consistent(ioa_cfg->pdev, sizeof(struct ipr_misc_cbs),
  7714. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7715. ipr_free_cmd_blks(ioa_cfg);
  7716. for (i = 0; i < ioa_cfg->hrrq_num; i++)
  7717. pci_free_consistent(ioa_cfg->pdev,
  7718. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7719. ioa_cfg->hrrq[i].host_rrq,
  7720. ioa_cfg->hrrq[i].host_rrq_dma);
  7721. pci_free_consistent(ioa_cfg->pdev, ioa_cfg->cfg_table_size,
  7722. ioa_cfg->u.cfg_table,
  7723. ioa_cfg->cfg_table_dma);
  7724. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7725. pci_free_consistent(ioa_cfg->pdev,
  7726. sizeof(struct ipr_hostrcb),
  7727. ioa_cfg->hostrcb[i],
  7728. ioa_cfg->hostrcb_dma[i]);
  7729. }
  7730. ipr_free_dump(ioa_cfg);
  7731. kfree(ioa_cfg->trace);
  7732. }
  7733. /**
  7734. * ipr_free_all_resources - Free all allocated resources for an adapter.
  7735. * @ipr_cmd: ipr command struct
  7736. *
  7737. * This function frees all allocated resources for the
  7738. * specified adapter.
  7739. *
  7740. * Return value:
  7741. * none
  7742. **/
  7743. static void ipr_free_all_resources(struct ipr_ioa_cfg *ioa_cfg)
  7744. {
  7745. struct pci_dev *pdev = ioa_cfg->pdev;
  7746. ENTER;
  7747. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  7748. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  7749. int i;
  7750. for (i = 0; i < ioa_cfg->nvectors; i++)
  7751. free_irq(ioa_cfg->vectors_info[i].vec,
  7752. &ioa_cfg->hrrq[i]);
  7753. } else
  7754. free_irq(pdev->irq, &ioa_cfg->hrrq[0]);
  7755. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  7756. pci_disable_msi(pdev);
  7757. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  7758. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  7759. pci_disable_msix(pdev);
  7760. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  7761. }
  7762. iounmap(ioa_cfg->hdw_dma_regs);
  7763. pci_release_regions(pdev);
  7764. ipr_free_mem(ioa_cfg);
  7765. scsi_host_put(ioa_cfg->host);
  7766. pci_disable_device(pdev);
  7767. LEAVE;
  7768. }
  7769. /**
  7770. * ipr_alloc_cmd_blks - Allocate command blocks for an adapter
  7771. * @ioa_cfg: ioa config struct
  7772. *
  7773. * Return value:
  7774. * 0 on success / -ENOMEM on allocation failure
  7775. **/
  7776. static int ipr_alloc_cmd_blks(struct ipr_ioa_cfg *ioa_cfg)
  7777. {
  7778. struct ipr_cmnd *ipr_cmd;
  7779. struct ipr_ioarcb *ioarcb;
  7780. dma_addr_t dma_addr;
  7781. int i, entries_each_hrrq, hrrq_id = 0;
  7782. ioa_cfg->ipr_cmd_pool = pci_pool_create(IPR_NAME, ioa_cfg->pdev,
  7783. sizeof(struct ipr_cmnd), 512, 0);
  7784. if (!ioa_cfg->ipr_cmd_pool)
  7785. return -ENOMEM;
  7786. ioa_cfg->ipr_cmnd_list = kcalloc(IPR_NUM_CMD_BLKS, sizeof(struct ipr_cmnd *), GFP_KERNEL);
  7787. ioa_cfg->ipr_cmnd_list_dma = kcalloc(IPR_NUM_CMD_BLKS, sizeof(dma_addr_t), GFP_KERNEL);
  7788. if (!ioa_cfg->ipr_cmnd_list || !ioa_cfg->ipr_cmnd_list_dma) {
  7789. ipr_free_cmd_blks(ioa_cfg);
  7790. return -ENOMEM;
  7791. }
  7792. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7793. if (ioa_cfg->hrrq_num > 1) {
  7794. if (i == 0) {
  7795. entries_each_hrrq = IPR_NUM_INTERNAL_CMD_BLKS;
  7796. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7797. ioa_cfg->hrrq[i].max_cmd_id =
  7798. (entries_each_hrrq - 1);
  7799. } else {
  7800. entries_each_hrrq =
  7801. IPR_NUM_BASE_CMD_BLKS/
  7802. (ioa_cfg->hrrq_num - 1);
  7803. ioa_cfg->hrrq[i].min_cmd_id =
  7804. IPR_NUM_INTERNAL_CMD_BLKS +
  7805. (i - 1) * entries_each_hrrq;
  7806. ioa_cfg->hrrq[i].max_cmd_id =
  7807. (IPR_NUM_INTERNAL_CMD_BLKS +
  7808. i * entries_each_hrrq - 1);
  7809. }
  7810. } else {
  7811. entries_each_hrrq = IPR_NUM_CMD_BLKS;
  7812. ioa_cfg->hrrq[i].min_cmd_id = 0;
  7813. ioa_cfg->hrrq[i].max_cmd_id = (entries_each_hrrq - 1);
  7814. }
  7815. ioa_cfg->hrrq[i].size = entries_each_hrrq;
  7816. }
  7817. BUG_ON(ioa_cfg->hrrq_num == 0);
  7818. i = IPR_NUM_CMD_BLKS -
  7819. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id - 1;
  7820. if (i > 0) {
  7821. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].size += i;
  7822. ioa_cfg->hrrq[ioa_cfg->hrrq_num - 1].max_cmd_id += i;
  7823. }
  7824. for (i = 0; i < IPR_NUM_CMD_BLKS; i++) {
  7825. ipr_cmd = pci_pool_alloc(ioa_cfg->ipr_cmd_pool, GFP_KERNEL, &dma_addr);
  7826. if (!ipr_cmd) {
  7827. ipr_free_cmd_blks(ioa_cfg);
  7828. return -ENOMEM;
  7829. }
  7830. memset(ipr_cmd, 0, sizeof(*ipr_cmd));
  7831. ioa_cfg->ipr_cmnd_list[i] = ipr_cmd;
  7832. ioa_cfg->ipr_cmnd_list_dma[i] = dma_addr;
  7833. ioarcb = &ipr_cmd->ioarcb;
  7834. ipr_cmd->dma_addr = dma_addr;
  7835. if (ioa_cfg->sis64)
  7836. ioarcb->a.ioarcb_host_pci_addr64 = cpu_to_be64(dma_addr);
  7837. else
  7838. ioarcb->a.ioarcb_host_pci_addr = cpu_to_be32(dma_addr);
  7839. ioarcb->host_response_handle = cpu_to_be32(i << 2);
  7840. if (ioa_cfg->sis64) {
  7841. ioarcb->u.sis64_addr_data.data_ioadl_addr =
  7842. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, i.ioadl64));
  7843. ioarcb->u.sis64_addr_data.ioasa_host_pci_addr =
  7844. cpu_to_be64(dma_addr + offsetof(struct ipr_cmnd, s.ioasa64));
  7845. } else {
  7846. ioarcb->write_ioadl_addr =
  7847. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, i.ioadl));
  7848. ioarcb->read_ioadl_addr = ioarcb->write_ioadl_addr;
  7849. ioarcb->ioasa_host_pci_addr =
  7850. cpu_to_be32(dma_addr + offsetof(struct ipr_cmnd, s.ioasa));
  7851. }
  7852. ioarcb->ioasa_len = cpu_to_be16(sizeof(struct ipr_ioasa));
  7853. ipr_cmd->cmd_index = i;
  7854. ipr_cmd->ioa_cfg = ioa_cfg;
  7855. ipr_cmd->sense_buffer_dma = dma_addr +
  7856. offsetof(struct ipr_cmnd, sense_buffer);
  7857. ipr_cmd->ioarcb.cmd_pkt.hrrq_id = hrrq_id;
  7858. ipr_cmd->hrrq = &ioa_cfg->hrrq[hrrq_id];
  7859. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  7860. if (i >= ioa_cfg->hrrq[hrrq_id].max_cmd_id)
  7861. hrrq_id++;
  7862. }
  7863. return 0;
  7864. }
  7865. /**
  7866. * ipr_alloc_mem - Allocate memory for an adapter
  7867. * @ioa_cfg: ioa config struct
  7868. *
  7869. * Return value:
  7870. * 0 on success / non-zero for error
  7871. **/
  7872. static int ipr_alloc_mem(struct ipr_ioa_cfg *ioa_cfg)
  7873. {
  7874. struct pci_dev *pdev = ioa_cfg->pdev;
  7875. int i, rc = -ENOMEM;
  7876. ENTER;
  7877. ioa_cfg->res_entries = kzalloc(sizeof(struct ipr_resource_entry) *
  7878. ioa_cfg->max_devs_supported, GFP_KERNEL);
  7879. if (!ioa_cfg->res_entries)
  7880. goto out;
  7881. for (i = 0; i < ioa_cfg->max_devs_supported; i++) {
  7882. list_add_tail(&ioa_cfg->res_entries[i].queue, &ioa_cfg->free_res_q);
  7883. ioa_cfg->res_entries[i].ioa_cfg = ioa_cfg;
  7884. }
  7885. ioa_cfg->vpd_cbs = pci_alloc_consistent(ioa_cfg->pdev,
  7886. sizeof(struct ipr_misc_cbs),
  7887. &ioa_cfg->vpd_cbs_dma);
  7888. if (!ioa_cfg->vpd_cbs)
  7889. goto out_free_res_entries;
  7890. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7891. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_free_q);
  7892. INIT_LIST_HEAD(&ioa_cfg->hrrq[i].hrrq_pending_q);
  7893. spin_lock_init(&ioa_cfg->hrrq[i]._lock);
  7894. if (i == 0)
  7895. ioa_cfg->hrrq[i].lock = ioa_cfg->host->host_lock;
  7896. else
  7897. ioa_cfg->hrrq[i].lock = &ioa_cfg->hrrq[i]._lock;
  7898. }
  7899. if (ipr_alloc_cmd_blks(ioa_cfg))
  7900. goto out_free_vpd_cbs;
  7901. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7902. ioa_cfg->hrrq[i].host_rrq = pci_alloc_consistent(ioa_cfg->pdev,
  7903. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7904. &ioa_cfg->hrrq[i].host_rrq_dma);
  7905. if (!ioa_cfg->hrrq[i].host_rrq) {
  7906. while (--i > 0)
  7907. pci_free_consistent(pdev,
  7908. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7909. ioa_cfg->hrrq[i].host_rrq,
  7910. ioa_cfg->hrrq[i].host_rrq_dma);
  7911. goto out_ipr_free_cmd_blocks;
  7912. }
  7913. ioa_cfg->hrrq[i].ioa_cfg = ioa_cfg;
  7914. }
  7915. ioa_cfg->u.cfg_table = pci_alloc_consistent(ioa_cfg->pdev,
  7916. ioa_cfg->cfg_table_size,
  7917. &ioa_cfg->cfg_table_dma);
  7918. if (!ioa_cfg->u.cfg_table)
  7919. goto out_free_host_rrq;
  7920. for (i = 0; i < IPR_NUM_HCAMS; i++) {
  7921. ioa_cfg->hostrcb[i] = pci_alloc_consistent(ioa_cfg->pdev,
  7922. sizeof(struct ipr_hostrcb),
  7923. &ioa_cfg->hostrcb_dma[i]);
  7924. if (!ioa_cfg->hostrcb[i])
  7925. goto out_free_hostrcb_dma;
  7926. ioa_cfg->hostrcb[i]->hostrcb_dma =
  7927. ioa_cfg->hostrcb_dma[i] + offsetof(struct ipr_hostrcb, hcam);
  7928. ioa_cfg->hostrcb[i]->ioa_cfg = ioa_cfg;
  7929. list_add_tail(&ioa_cfg->hostrcb[i]->queue, &ioa_cfg->hostrcb_free_q);
  7930. }
  7931. ioa_cfg->trace = kzalloc(sizeof(struct ipr_trace_entry) *
  7932. IPR_NUM_TRACE_ENTRIES, GFP_KERNEL);
  7933. if (!ioa_cfg->trace)
  7934. goto out_free_hostrcb_dma;
  7935. rc = 0;
  7936. out:
  7937. LEAVE;
  7938. return rc;
  7939. out_free_hostrcb_dma:
  7940. while (i-- > 0) {
  7941. pci_free_consistent(pdev, sizeof(struct ipr_hostrcb),
  7942. ioa_cfg->hostrcb[i],
  7943. ioa_cfg->hostrcb_dma[i]);
  7944. }
  7945. pci_free_consistent(pdev, ioa_cfg->cfg_table_size,
  7946. ioa_cfg->u.cfg_table,
  7947. ioa_cfg->cfg_table_dma);
  7948. out_free_host_rrq:
  7949. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  7950. pci_free_consistent(pdev,
  7951. sizeof(u32) * ioa_cfg->hrrq[i].size,
  7952. ioa_cfg->hrrq[i].host_rrq,
  7953. ioa_cfg->hrrq[i].host_rrq_dma);
  7954. }
  7955. out_ipr_free_cmd_blocks:
  7956. ipr_free_cmd_blks(ioa_cfg);
  7957. out_free_vpd_cbs:
  7958. pci_free_consistent(pdev, sizeof(struct ipr_misc_cbs),
  7959. ioa_cfg->vpd_cbs, ioa_cfg->vpd_cbs_dma);
  7960. out_free_res_entries:
  7961. kfree(ioa_cfg->res_entries);
  7962. goto out;
  7963. }
  7964. /**
  7965. * ipr_initialize_bus_attr - Initialize SCSI bus attributes to default values
  7966. * @ioa_cfg: ioa config struct
  7967. *
  7968. * Return value:
  7969. * none
  7970. **/
  7971. static void ipr_initialize_bus_attr(struct ipr_ioa_cfg *ioa_cfg)
  7972. {
  7973. int i;
  7974. for (i = 0; i < IPR_MAX_NUM_BUSES; i++) {
  7975. ioa_cfg->bus_attr[i].bus = i;
  7976. ioa_cfg->bus_attr[i].qas_enabled = 0;
  7977. ioa_cfg->bus_attr[i].bus_width = IPR_DEFAULT_BUS_WIDTH;
  7978. if (ipr_max_speed < ARRAY_SIZE(ipr_max_bus_speeds))
  7979. ioa_cfg->bus_attr[i].max_xfer_rate = ipr_max_bus_speeds[ipr_max_speed];
  7980. else
  7981. ioa_cfg->bus_attr[i].max_xfer_rate = IPR_U160_SCSI_RATE;
  7982. }
  7983. }
  7984. /**
  7985. * ipr_init_ioa_cfg - Initialize IOA config struct
  7986. * @ioa_cfg: ioa config struct
  7987. * @host: scsi host struct
  7988. * @pdev: PCI dev struct
  7989. *
  7990. * Return value:
  7991. * none
  7992. **/
  7993. static void ipr_init_ioa_cfg(struct ipr_ioa_cfg *ioa_cfg,
  7994. struct Scsi_Host *host, struct pci_dev *pdev)
  7995. {
  7996. const struct ipr_interrupt_offsets *p;
  7997. struct ipr_interrupts *t;
  7998. void __iomem *base;
  7999. ioa_cfg->host = host;
  8000. ioa_cfg->pdev = pdev;
  8001. ioa_cfg->log_level = ipr_log_level;
  8002. ioa_cfg->doorbell = IPR_DOORBELL;
  8003. sprintf(ioa_cfg->eye_catcher, IPR_EYECATCHER);
  8004. sprintf(ioa_cfg->trace_start, IPR_TRACE_START_LABEL);
  8005. sprintf(ioa_cfg->cfg_table_start, IPR_CFG_TBL_START);
  8006. sprintf(ioa_cfg->resource_table_label, IPR_RES_TABLE_LABEL);
  8007. sprintf(ioa_cfg->ipr_hcam_label, IPR_HCAM_LABEL);
  8008. sprintf(ioa_cfg->ipr_cmd_label, IPR_CMD_LABEL);
  8009. INIT_LIST_HEAD(&ioa_cfg->hostrcb_free_q);
  8010. INIT_LIST_HEAD(&ioa_cfg->hostrcb_pending_q);
  8011. INIT_LIST_HEAD(&ioa_cfg->free_res_q);
  8012. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8013. INIT_WORK(&ioa_cfg->work_q, ipr_worker_thread);
  8014. init_waitqueue_head(&ioa_cfg->reset_wait_q);
  8015. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8016. ioa_cfg->sdt_state = INACTIVE;
  8017. ipr_initialize_bus_attr(ioa_cfg);
  8018. ioa_cfg->max_devs_supported = ipr_max_devs;
  8019. if (ioa_cfg->sis64) {
  8020. host->max_id = IPR_MAX_SIS64_TARGETS_PER_BUS;
  8021. host->max_lun = IPR_MAX_SIS64_LUNS_PER_TARGET;
  8022. if (ipr_max_devs > IPR_MAX_SIS64_DEVS)
  8023. ioa_cfg->max_devs_supported = IPR_MAX_SIS64_DEVS;
  8024. } else {
  8025. host->max_id = IPR_MAX_NUM_TARGETS_PER_BUS;
  8026. host->max_lun = IPR_MAX_NUM_LUNS_PER_TARGET;
  8027. if (ipr_max_devs > IPR_MAX_PHYSICAL_DEVS)
  8028. ioa_cfg->max_devs_supported = IPR_MAX_PHYSICAL_DEVS;
  8029. }
  8030. host->max_channel = IPR_MAX_BUS_TO_SCAN;
  8031. host->unique_id = host->host_no;
  8032. host->max_cmd_len = IPR_MAX_CDB_LEN;
  8033. host->can_queue = ioa_cfg->max_cmds;
  8034. pci_set_drvdata(pdev, ioa_cfg);
  8035. p = &ioa_cfg->chip_cfg->regs;
  8036. t = &ioa_cfg->regs;
  8037. base = ioa_cfg->hdw_dma_regs;
  8038. t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;
  8039. t->clr_interrupt_mask_reg = base + p->clr_interrupt_mask_reg;
  8040. t->clr_interrupt_mask_reg32 = base + p->clr_interrupt_mask_reg32;
  8041. t->sense_interrupt_mask_reg = base + p->sense_interrupt_mask_reg;
  8042. t->sense_interrupt_mask_reg32 = base + p->sense_interrupt_mask_reg32;
  8043. t->clr_interrupt_reg = base + p->clr_interrupt_reg;
  8044. t->clr_interrupt_reg32 = base + p->clr_interrupt_reg32;
  8045. t->sense_interrupt_reg = base + p->sense_interrupt_reg;
  8046. t->sense_interrupt_reg32 = base + p->sense_interrupt_reg32;
  8047. t->ioarrin_reg = base + p->ioarrin_reg;
  8048. t->sense_uproc_interrupt_reg = base + p->sense_uproc_interrupt_reg;
  8049. t->sense_uproc_interrupt_reg32 = base + p->sense_uproc_interrupt_reg32;
  8050. t->set_uproc_interrupt_reg = base + p->set_uproc_interrupt_reg;
  8051. t->set_uproc_interrupt_reg32 = base + p->set_uproc_interrupt_reg32;
  8052. t->clr_uproc_interrupt_reg = base + p->clr_uproc_interrupt_reg;
  8053. t->clr_uproc_interrupt_reg32 = base + p->clr_uproc_interrupt_reg32;
  8054. if (ioa_cfg->sis64) {
  8055. t->init_feedback_reg = base + p->init_feedback_reg;
  8056. t->dump_addr_reg = base + p->dump_addr_reg;
  8057. t->dump_data_reg = base + p->dump_data_reg;
  8058. t->endian_swap_reg = base + p->endian_swap_reg;
  8059. }
  8060. }
  8061. /**
  8062. * ipr_get_chip_info - Find adapter chip information
  8063. * @dev_id: PCI device id struct
  8064. *
  8065. * Return value:
  8066. * ptr to chip information on success / NULL on failure
  8067. **/
  8068. static const struct ipr_chip_t *
  8069. ipr_get_chip_info(const struct pci_device_id *dev_id)
  8070. {
  8071. int i;
  8072. for (i = 0; i < ARRAY_SIZE(ipr_chip); i++)
  8073. if (ipr_chip[i].vendor == dev_id->vendor &&
  8074. ipr_chip[i].device == dev_id->device)
  8075. return &ipr_chip[i];
  8076. return NULL;
  8077. }
  8078. static int ipr_enable_msix(struct ipr_ioa_cfg *ioa_cfg)
  8079. {
  8080. struct msix_entry entries[IPR_MAX_MSIX_VECTORS];
  8081. int i, err, vectors;
  8082. for (i = 0; i < ARRAY_SIZE(entries); ++i)
  8083. entries[i].entry = i;
  8084. vectors = ipr_number_of_msix;
  8085. while ((err = pci_enable_msix(ioa_cfg->pdev, entries, vectors)) > 0)
  8086. vectors = err;
  8087. if (err < 0) {
  8088. pci_disable_msix(ioa_cfg->pdev);
  8089. return err;
  8090. }
  8091. if (!err) {
  8092. for (i = 0; i < vectors; i++)
  8093. ioa_cfg->vectors_info[i].vec = entries[i].vector;
  8094. ioa_cfg->nvectors = vectors;
  8095. }
  8096. return err;
  8097. }
  8098. static int ipr_enable_msi(struct ipr_ioa_cfg *ioa_cfg)
  8099. {
  8100. int i, err, vectors;
  8101. vectors = ipr_number_of_msix;
  8102. while ((err = pci_enable_msi_block(ioa_cfg->pdev, vectors)) > 0)
  8103. vectors = err;
  8104. if (err < 0) {
  8105. pci_disable_msi(ioa_cfg->pdev);
  8106. return err;
  8107. }
  8108. if (!err) {
  8109. for (i = 0; i < vectors; i++)
  8110. ioa_cfg->vectors_info[i].vec = ioa_cfg->pdev->irq + i;
  8111. ioa_cfg->nvectors = vectors;
  8112. }
  8113. return err;
  8114. }
  8115. static void name_msi_vectors(struct ipr_ioa_cfg *ioa_cfg)
  8116. {
  8117. int vec_idx, n = sizeof(ioa_cfg->vectors_info[0].desc) - 1;
  8118. for (vec_idx = 0; vec_idx < ioa_cfg->nvectors; vec_idx++) {
  8119. snprintf(ioa_cfg->vectors_info[vec_idx].desc, n,
  8120. "host%d-%d", ioa_cfg->host->host_no, vec_idx);
  8121. ioa_cfg->vectors_info[vec_idx].
  8122. desc[strlen(ioa_cfg->vectors_info[vec_idx].desc)] = 0;
  8123. }
  8124. }
  8125. static int ipr_request_other_msi_irqs(struct ipr_ioa_cfg *ioa_cfg)
  8126. {
  8127. int i, rc;
  8128. for (i = 1; i < ioa_cfg->nvectors; i++) {
  8129. rc = request_irq(ioa_cfg->vectors_info[i].vec,
  8130. ipr_isr_mhrrq,
  8131. 0,
  8132. ioa_cfg->vectors_info[i].desc,
  8133. &ioa_cfg->hrrq[i]);
  8134. if (rc) {
  8135. while (--i >= 0)
  8136. free_irq(ioa_cfg->vectors_info[i].vec,
  8137. &ioa_cfg->hrrq[i]);
  8138. return rc;
  8139. }
  8140. }
  8141. return 0;
  8142. }
  8143. /**
  8144. * ipr_test_intr - Handle the interrupt generated in ipr_test_msi().
  8145. * @pdev: PCI device struct
  8146. *
  8147. * Description: Simply set the msi_received flag to 1 indicating that
  8148. * Message Signaled Interrupts are supported.
  8149. *
  8150. * Return value:
  8151. * 0 on success / non-zero on failure
  8152. **/
  8153. static irqreturn_t ipr_test_intr(int irq, void *devp)
  8154. {
  8155. struct ipr_ioa_cfg *ioa_cfg = (struct ipr_ioa_cfg *)devp;
  8156. unsigned long lock_flags = 0;
  8157. irqreturn_t rc = IRQ_HANDLED;
  8158. dev_info(&ioa_cfg->pdev->dev, "Received IRQ : %d\n", irq);
  8159. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8160. ioa_cfg->msi_received = 1;
  8161. wake_up(&ioa_cfg->msi_wait_q);
  8162. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8163. return rc;
  8164. }
  8165. /**
  8166. * ipr_test_msi - Test for Message Signaled Interrupt (MSI) support.
  8167. * @pdev: PCI device struct
  8168. *
  8169. * Description: The return value from pci_enable_msi() can not always be
  8170. * trusted. This routine sets up and initiates a test interrupt to determine
  8171. * if the interrupt is received via the ipr_test_intr() service routine.
  8172. * If the tests fails, the driver will fall back to LSI.
  8173. *
  8174. * Return value:
  8175. * 0 on success / non-zero on failure
  8176. **/
  8177. static int ipr_test_msi(struct ipr_ioa_cfg *ioa_cfg, struct pci_dev *pdev)
  8178. {
  8179. int rc;
  8180. volatile u32 int_reg;
  8181. unsigned long lock_flags = 0;
  8182. ENTER;
  8183. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8184. init_waitqueue_head(&ioa_cfg->msi_wait_q);
  8185. ioa_cfg->msi_received = 0;
  8186. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8187. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.clr_interrupt_mask_reg32);
  8188. int_reg = readl(ioa_cfg->regs.sense_interrupt_mask_reg);
  8189. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8190. if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8191. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8192. else
  8193. rc = request_irq(pdev->irq, ipr_test_intr, 0, IPR_NAME, ioa_cfg);
  8194. if (rc) {
  8195. dev_err(&pdev->dev, "Can not assign irq %d\n", pdev->irq);
  8196. return rc;
  8197. } else if (ipr_debug)
  8198. dev_info(&pdev->dev, "IRQ assigned: %d\n", pdev->irq);
  8199. writel(IPR_PCII_IO_DEBUG_ACKNOWLEDGE, ioa_cfg->regs.sense_interrupt_reg32);
  8200. int_reg = readl(ioa_cfg->regs.sense_interrupt_reg);
  8201. wait_event_timeout(ioa_cfg->msi_wait_q, ioa_cfg->msi_received, HZ);
  8202. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8203. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8204. if (!ioa_cfg->msi_received) {
  8205. /* MSI test failed */
  8206. dev_info(&pdev->dev, "MSI test failed. Falling back to LSI.\n");
  8207. rc = -EOPNOTSUPP;
  8208. } else if (ipr_debug)
  8209. dev_info(&pdev->dev, "MSI test succeeded.\n");
  8210. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8211. if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8212. free_irq(ioa_cfg->vectors_info[0].vec, ioa_cfg);
  8213. else
  8214. free_irq(pdev->irq, ioa_cfg);
  8215. LEAVE;
  8216. return rc;
  8217. }
  8218. /* ipr_probe_ioa - Allocates memory and does first stage of initialization
  8219. * @pdev: PCI device struct
  8220. * @dev_id: PCI device id struct
  8221. *
  8222. * Return value:
  8223. * 0 on success / non-zero on failure
  8224. **/
  8225. static int ipr_probe_ioa(struct pci_dev *pdev,
  8226. const struct pci_device_id *dev_id)
  8227. {
  8228. struct ipr_ioa_cfg *ioa_cfg;
  8229. struct Scsi_Host *host;
  8230. unsigned long ipr_regs_pci;
  8231. void __iomem *ipr_regs;
  8232. int rc = PCIBIOS_SUCCESSFUL;
  8233. volatile u32 mask, uproc, interrupts;
  8234. unsigned long lock_flags, driver_lock_flags;
  8235. ENTER;
  8236. if ((rc = pci_enable_device(pdev))) {
  8237. dev_err(&pdev->dev, "Cannot enable adapter\n");
  8238. goto out;
  8239. }
  8240. dev_info(&pdev->dev, "Found IOA with IRQ: %d\n", pdev->irq);
  8241. host = scsi_host_alloc(&driver_template, sizeof(*ioa_cfg));
  8242. if (!host) {
  8243. dev_err(&pdev->dev, "call to scsi_host_alloc failed!\n");
  8244. rc = -ENOMEM;
  8245. goto out_disable;
  8246. }
  8247. ioa_cfg = (struct ipr_ioa_cfg *)host->hostdata;
  8248. memset(ioa_cfg, 0, sizeof(struct ipr_ioa_cfg));
  8249. ata_host_init(&ioa_cfg->ata_host, &pdev->dev, &ipr_sata_ops);
  8250. ioa_cfg->ipr_chip = ipr_get_chip_info(dev_id);
  8251. if (!ioa_cfg->ipr_chip) {
  8252. dev_err(&pdev->dev, "Unknown adapter chipset 0x%04X 0x%04X\n",
  8253. dev_id->vendor, dev_id->device);
  8254. goto out_scsi_host_put;
  8255. }
  8256. /* set SIS 32 or SIS 64 */
  8257. ioa_cfg->sis64 = ioa_cfg->ipr_chip->sis_type == IPR_SIS64 ? 1 : 0;
  8258. ioa_cfg->chip_cfg = ioa_cfg->ipr_chip->cfg;
  8259. ioa_cfg->clear_isr = ioa_cfg->chip_cfg->clear_isr;
  8260. ioa_cfg->max_cmds = ioa_cfg->chip_cfg->max_cmds;
  8261. if (ipr_transop_timeout)
  8262. ioa_cfg->transop_timeout = ipr_transop_timeout;
  8263. else if (dev_id->driver_data & IPR_USE_LONG_TRANSOP_TIMEOUT)
  8264. ioa_cfg->transop_timeout = IPR_LONG_OPERATIONAL_TIMEOUT;
  8265. else
  8266. ioa_cfg->transop_timeout = IPR_OPERATIONAL_TIMEOUT;
  8267. ioa_cfg->revid = pdev->revision;
  8268. ipr_regs_pci = pci_resource_start(pdev, 0);
  8269. rc = pci_request_regions(pdev, IPR_NAME);
  8270. if (rc < 0) {
  8271. dev_err(&pdev->dev,
  8272. "Couldn't register memory range of registers\n");
  8273. goto out_scsi_host_put;
  8274. }
  8275. ipr_regs = pci_ioremap_bar(pdev, 0);
  8276. if (!ipr_regs) {
  8277. dev_err(&pdev->dev,
  8278. "Couldn't map memory range of registers\n");
  8279. rc = -ENOMEM;
  8280. goto out_release_regions;
  8281. }
  8282. ioa_cfg->hdw_dma_regs = ipr_regs;
  8283. ioa_cfg->hdw_dma_regs_pci = ipr_regs_pci;
  8284. ioa_cfg->ioa_mailbox = ioa_cfg->chip_cfg->mailbox + ipr_regs;
  8285. ipr_init_ioa_cfg(ioa_cfg, host, pdev);
  8286. pci_set_master(pdev);
  8287. if (ioa_cfg->sis64) {
  8288. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  8289. if (rc < 0) {
  8290. dev_dbg(&pdev->dev, "Failed to set 64 bit PCI DMA mask\n");
  8291. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  8292. }
  8293. } else
  8294. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  8295. if (rc < 0) {
  8296. dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
  8297. goto cleanup_nomem;
  8298. }
  8299. rc = pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
  8300. ioa_cfg->chip_cfg->cache_line_size);
  8301. if (rc != PCIBIOS_SUCCESSFUL) {
  8302. dev_err(&pdev->dev, "Write of cache line size failed\n");
  8303. rc = -EIO;
  8304. goto cleanup_nomem;
  8305. }
  8306. if (ipr_number_of_msix > IPR_MAX_MSIX_VECTORS) {
  8307. dev_err(&pdev->dev, "The max number of MSIX is %d\n",
  8308. IPR_MAX_MSIX_VECTORS);
  8309. ipr_number_of_msix = IPR_MAX_MSIX_VECTORS;
  8310. }
  8311. if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8312. ipr_enable_msix(ioa_cfg) == 0)
  8313. ioa_cfg->intr_flag = IPR_USE_MSIX;
  8314. else if (ioa_cfg->ipr_chip->intr_type == IPR_USE_MSI &&
  8315. ipr_enable_msi(ioa_cfg) == 0)
  8316. ioa_cfg->intr_flag = IPR_USE_MSI;
  8317. else {
  8318. ioa_cfg->intr_flag = IPR_USE_LSI;
  8319. ioa_cfg->nvectors = 1;
  8320. dev_info(&pdev->dev, "Cannot enable MSI.\n");
  8321. }
  8322. if (ioa_cfg->intr_flag == IPR_USE_MSI ||
  8323. ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8324. rc = ipr_test_msi(ioa_cfg, pdev);
  8325. if (rc == -EOPNOTSUPP) {
  8326. if (ioa_cfg->intr_flag == IPR_USE_MSI) {
  8327. ioa_cfg->intr_flag &= ~IPR_USE_MSI;
  8328. pci_disable_msi(pdev);
  8329. } else if (ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8330. ioa_cfg->intr_flag &= ~IPR_USE_MSIX;
  8331. pci_disable_msix(pdev);
  8332. }
  8333. ioa_cfg->intr_flag = IPR_USE_LSI;
  8334. ioa_cfg->nvectors = 1;
  8335. }
  8336. else if (rc)
  8337. goto out_msi_disable;
  8338. else {
  8339. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8340. dev_info(&pdev->dev,
  8341. "Request for %d MSIs succeeded with starting IRQ: %d\n",
  8342. ioa_cfg->nvectors, pdev->irq);
  8343. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8344. dev_info(&pdev->dev,
  8345. "Request for %d MSIXs succeeded.",
  8346. ioa_cfg->nvectors);
  8347. }
  8348. }
  8349. ioa_cfg->hrrq_num = min3(ioa_cfg->nvectors,
  8350. (unsigned int)num_online_cpus(),
  8351. (unsigned int)IPR_MAX_HRRQ_NUM);
  8352. /* Save away PCI config space for use following IOA reset */
  8353. rc = pci_save_state(pdev);
  8354. if (rc != PCIBIOS_SUCCESSFUL) {
  8355. dev_err(&pdev->dev, "Failed to save PCI config space\n");
  8356. rc = -EIO;
  8357. goto out_msi_disable;
  8358. }
  8359. if ((rc = ipr_save_pcix_cmd_reg(ioa_cfg)))
  8360. goto out_msi_disable;
  8361. if ((rc = ipr_set_pcix_cmd_reg(ioa_cfg)))
  8362. goto out_msi_disable;
  8363. if (ioa_cfg->sis64)
  8364. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr64)
  8365. + ((sizeof(struct ipr_config_table_entry64)
  8366. * ioa_cfg->max_devs_supported)));
  8367. else
  8368. ioa_cfg->cfg_table_size = (sizeof(struct ipr_config_table_hdr)
  8369. + ((sizeof(struct ipr_config_table_entry)
  8370. * ioa_cfg->max_devs_supported)));
  8371. rc = ipr_alloc_mem(ioa_cfg);
  8372. if (rc < 0) {
  8373. dev_err(&pdev->dev,
  8374. "Couldn't allocate enough memory for device driver!\n");
  8375. goto out_msi_disable;
  8376. }
  8377. /*
  8378. * If HRRQ updated interrupt is not masked, or reset alert is set,
  8379. * the card is in an unknown state and needs a hard reset
  8380. */
  8381. mask = readl(ioa_cfg->regs.sense_interrupt_mask_reg32);
  8382. interrupts = readl(ioa_cfg->regs.sense_interrupt_reg32);
  8383. uproc = readl(ioa_cfg->regs.sense_uproc_interrupt_reg32);
  8384. if ((mask & IPR_PCII_HRRQ_UPDATED) == 0 || (uproc & IPR_UPROCI_RESET_ALERT))
  8385. ioa_cfg->needs_hard_reset = 1;
  8386. if ((interrupts & IPR_PCII_ERROR_INTERRUPTS) || reset_devices)
  8387. ioa_cfg->needs_hard_reset = 1;
  8388. if (interrupts & IPR_PCII_IOA_UNIT_CHECKED)
  8389. ioa_cfg->ioa_unit_checked = 1;
  8390. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8391. ipr_mask_and_clear_interrupts(ioa_cfg, ~IPR_PCII_IOA_TRANS_TO_OPER);
  8392. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8393. if (ioa_cfg->intr_flag == IPR_USE_MSI
  8394. || ioa_cfg->intr_flag == IPR_USE_MSIX) {
  8395. name_msi_vectors(ioa_cfg);
  8396. rc = request_irq(ioa_cfg->vectors_info[0].vec, ipr_isr,
  8397. 0,
  8398. ioa_cfg->vectors_info[0].desc,
  8399. &ioa_cfg->hrrq[0]);
  8400. if (!rc)
  8401. rc = ipr_request_other_msi_irqs(ioa_cfg);
  8402. } else {
  8403. rc = request_irq(pdev->irq, ipr_isr,
  8404. IRQF_SHARED,
  8405. IPR_NAME, &ioa_cfg->hrrq[0]);
  8406. }
  8407. if (rc) {
  8408. dev_err(&pdev->dev, "Couldn't register IRQ %d! rc=%d\n",
  8409. pdev->irq, rc);
  8410. goto cleanup_nolog;
  8411. }
  8412. if ((dev_id->driver_data & IPR_USE_PCI_WARM_RESET) ||
  8413. (dev_id->device == PCI_DEVICE_ID_IBM_OBSIDIAN_E && !ioa_cfg->revid)) {
  8414. ioa_cfg->needs_warm_reset = 1;
  8415. ioa_cfg->reset = ipr_reset_slot_reset;
  8416. } else
  8417. ioa_cfg->reset = ipr_reset_start_bist;
  8418. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8419. list_add_tail(&ioa_cfg->queue, &ipr_ioa_head);
  8420. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8421. LEAVE;
  8422. out:
  8423. return rc;
  8424. cleanup_nolog:
  8425. ipr_free_mem(ioa_cfg);
  8426. out_msi_disable:
  8427. if (ioa_cfg->intr_flag == IPR_USE_MSI)
  8428. pci_disable_msi(pdev);
  8429. else if (ioa_cfg->intr_flag == IPR_USE_MSIX)
  8430. pci_disable_msix(pdev);
  8431. cleanup_nomem:
  8432. iounmap(ipr_regs);
  8433. out_release_regions:
  8434. pci_release_regions(pdev);
  8435. out_scsi_host_put:
  8436. scsi_host_put(host);
  8437. out_disable:
  8438. pci_disable_device(pdev);
  8439. goto out;
  8440. }
  8441. /**
  8442. * ipr_scan_vsets - Scans for VSET devices
  8443. * @ioa_cfg: ioa config struct
  8444. *
  8445. * Description: Since the VSET resources do not follow SAM in that we can have
  8446. * sparse LUNs with no LUN 0, we have to scan for these ourselves.
  8447. *
  8448. * Return value:
  8449. * none
  8450. **/
  8451. static void ipr_scan_vsets(struct ipr_ioa_cfg *ioa_cfg)
  8452. {
  8453. int target, lun;
  8454. for (target = 0; target < IPR_MAX_NUM_TARGETS_PER_BUS; target++)
  8455. for (lun = 0; lun < IPR_MAX_NUM_VSET_LUNS_PER_TARGET; lun++)
  8456. scsi_add_device(ioa_cfg->host, IPR_VSET_BUS, target, lun);
  8457. }
  8458. /**
  8459. * ipr_initiate_ioa_bringdown - Bring down an adapter
  8460. * @ioa_cfg: ioa config struct
  8461. * @shutdown_type: shutdown type
  8462. *
  8463. * Description: This function will initiate bringing down the adapter.
  8464. * This consists of issuing an IOA shutdown to the adapter
  8465. * to flush the cache, and running BIST.
  8466. * If the caller needs to wait on the completion of the reset,
  8467. * the caller must sleep on the reset_wait_q.
  8468. *
  8469. * Return value:
  8470. * none
  8471. **/
  8472. static void ipr_initiate_ioa_bringdown(struct ipr_ioa_cfg *ioa_cfg,
  8473. enum ipr_shutdown_type shutdown_type)
  8474. {
  8475. ENTER;
  8476. if (ioa_cfg->sdt_state == WAIT_FOR_DUMP)
  8477. ioa_cfg->sdt_state = ABORT_DUMP;
  8478. ioa_cfg->reset_retries = 0;
  8479. ioa_cfg->in_ioa_bringdown = 1;
  8480. ipr_initiate_ioa_reset(ioa_cfg, shutdown_type);
  8481. LEAVE;
  8482. }
  8483. /**
  8484. * __ipr_remove - Remove a single adapter
  8485. * @pdev: pci device struct
  8486. *
  8487. * Adapter hot plug remove entry point.
  8488. *
  8489. * Return value:
  8490. * none
  8491. **/
  8492. static void __ipr_remove(struct pci_dev *pdev)
  8493. {
  8494. unsigned long host_lock_flags = 0;
  8495. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8496. int i;
  8497. unsigned long driver_lock_flags;
  8498. ENTER;
  8499. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8500. while (ioa_cfg->in_reset_reload) {
  8501. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8502. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8503. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8504. }
  8505. for (i = 0; i < ioa_cfg->hrrq_num; i++) {
  8506. spin_lock(&ioa_cfg->hrrq[i]._lock);
  8507. ioa_cfg->hrrq[i].removing_ioa = 1;
  8508. spin_unlock(&ioa_cfg->hrrq[i]._lock);
  8509. }
  8510. wmb();
  8511. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8512. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8513. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8514. flush_work(&ioa_cfg->work_q);
  8515. INIT_LIST_HEAD(&ioa_cfg->used_res_q);
  8516. spin_lock_irqsave(ioa_cfg->host->host_lock, host_lock_flags);
  8517. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8518. list_del(&ioa_cfg->queue);
  8519. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8520. if (ioa_cfg->sdt_state == ABORT_DUMP)
  8521. ioa_cfg->sdt_state = WAIT_FOR_DUMP;
  8522. spin_unlock_irqrestore(ioa_cfg->host->host_lock, host_lock_flags);
  8523. ipr_free_all_resources(ioa_cfg);
  8524. LEAVE;
  8525. }
  8526. /**
  8527. * ipr_remove - IOA hot plug remove entry point
  8528. * @pdev: pci device struct
  8529. *
  8530. * Adapter hot plug remove entry point.
  8531. *
  8532. * Return value:
  8533. * none
  8534. **/
  8535. static void ipr_remove(struct pci_dev *pdev)
  8536. {
  8537. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8538. ENTER;
  8539. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8540. &ipr_trace_attr);
  8541. ipr_remove_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8542. &ipr_dump_attr);
  8543. scsi_remove_host(ioa_cfg->host);
  8544. __ipr_remove(pdev);
  8545. LEAVE;
  8546. }
  8547. /**
  8548. * ipr_probe - Adapter hot plug add entry point
  8549. *
  8550. * Return value:
  8551. * 0 on success / non-zero on failure
  8552. **/
  8553. static int ipr_probe(struct pci_dev *pdev, const struct pci_device_id *dev_id)
  8554. {
  8555. struct ipr_ioa_cfg *ioa_cfg;
  8556. int rc, i;
  8557. rc = ipr_probe_ioa(pdev, dev_id);
  8558. if (rc)
  8559. return rc;
  8560. ioa_cfg = pci_get_drvdata(pdev);
  8561. rc = ipr_probe_ioa_part2(ioa_cfg);
  8562. if (rc) {
  8563. __ipr_remove(pdev);
  8564. return rc;
  8565. }
  8566. rc = scsi_add_host(ioa_cfg->host, &pdev->dev);
  8567. if (rc) {
  8568. __ipr_remove(pdev);
  8569. return rc;
  8570. }
  8571. rc = ipr_create_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8572. &ipr_trace_attr);
  8573. if (rc) {
  8574. scsi_remove_host(ioa_cfg->host);
  8575. __ipr_remove(pdev);
  8576. return rc;
  8577. }
  8578. rc = ipr_create_dump_file(&ioa_cfg->host->shost_dev.kobj,
  8579. &ipr_dump_attr);
  8580. if (rc) {
  8581. ipr_remove_trace_file(&ioa_cfg->host->shost_dev.kobj,
  8582. &ipr_trace_attr);
  8583. scsi_remove_host(ioa_cfg->host);
  8584. __ipr_remove(pdev);
  8585. return rc;
  8586. }
  8587. scsi_scan_host(ioa_cfg->host);
  8588. ipr_scan_vsets(ioa_cfg);
  8589. scsi_add_device(ioa_cfg->host, IPR_IOA_BUS, IPR_IOA_TARGET, IPR_IOA_LUN);
  8590. ioa_cfg->allow_ml_add_del = 1;
  8591. ioa_cfg->host->max_channel = IPR_VSET_BUS;
  8592. ioa_cfg->iopoll_weight = ioa_cfg->chip_cfg->iopoll_weight;
  8593. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  8594. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  8595. for (i = 1; i < ioa_cfg->hrrq_num; i++) {
  8596. blk_iopoll_init(&ioa_cfg->hrrq[i].iopoll,
  8597. ioa_cfg->iopoll_weight, ipr_iopoll);
  8598. blk_iopoll_enable(&ioa_cfg->hrrq[i].iopoll);
  8599. }
  8600. }
  8601. schedule_work(&ioa_cfg->work_q);
  8602. return 0;
  8603. }
  8604. /**
  8605. * ipr_shutdown - Shutdown handler.
  8606. * @pdev: pci device struct
  8607. *
  8608. * This function is invoked upon system shutdown/reboot. It will issue
  8609. * an adapter shutdown to the adapter to flush the write cache.
  8610. *
  8611. * Return value:
  8612. * none
  8613. **/
  8614. static void ipr_shutdown(struct pci_dev *pdev)
  8615. {
  8616. struct ipr_ioa_cfg *ioa_cfg = pci_get_drvdata(pdev);
  8617. unsigned long lock_flags = 0;
  8618. int i;
  8619. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8620. if (blk_iopoll_enabled && ioa_cfg->iopoll_weight &&
  8621. ioa_cfg->sis64 && ioa_cfg->nvectors > 1) {
  8622. ioa_cfg->iopoll_weight = 0;
  8623. for (i = 1; i < ioa_cfg->hrrq_num; i++)
  8624. blk_iopoll_disable(&ioa_cfg->hrrq[i].iopoll);
  8625. }
  8626. while (ioa_cfg->in_reset_reload) {
  8627. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8628. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8629. spin_lock_irqsave(ioa_cfg->host->host_lock, lock_flags);
  8630. }
  8631. ipr_initiate_ioa_bringdown(ioa_cfg, IPR_SHUTDOWN_NORMAL);
  8632. spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
  8633. wait_event(ioa_cfg->reset_wait_q, !ioa_cfg->in_reset_reload);
  8634. }
  8635. static struct pci_device_id ipr_pci_table[] = {
  8636. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8637. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5702, 0, 0, 0 },
  8638. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8639. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_5703, 0, 0, 0 },
  8640. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8641. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573D, 0, 0, 0 },
  8642. { PCI_VENDOR_ID_MYLEX, PCI_DEVICE_ID_IBM_GEMSTONE,
  8643. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_573E, 0, 0, 0 },
  8644. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8645. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571B, 0, 0, 0 },
  8646. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8647. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572E, 0, 0, 0 },
  8648. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8649. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571A, 0, 0, 0 },
  8650. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CITRINE,
  8651. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575B, 0, 0,
  8652. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8653. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8654. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8655. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8656. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8657. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8658. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_OBSIDIAN,
  8659. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8660. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8661. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8662. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572A, 0, 0, 0 },
  8663. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8664. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572B, 0, 0,
  8665. IPR_USE_LONG_TRANSOP_TIMEOUT},
  8666. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN,
  8667. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_575C, 0, 0,
  8668. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8669. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8670. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574E, 0, 0,
  8671. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8672. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8673. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B3, 0, 0, 0 },
  8674. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8675. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CC, 0, 0, 0 },
  8676. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_OBSIDIAN_E,
  8677. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B7, 0, 0,
  8678. IPR_USE_LONG_TRANSOP_TIMEOUT | IPR_USE_PCI_WARM_RESET },
  8679. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_SNIPE,
  8680. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_2780, 0, 0, 0 },
  8681. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8682. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571E, 0, 0, 0 },
  8683. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8684. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_571F, 0, 0,
  8685. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8686. { PCI_VENDOR_ID_ADAPTEC2, PCI_DEVICE_ID_ADAPTEC2_SCAMP,
  8687. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_572F, 0, 0,
  8688. IPR_USE_LONG_TRANSOP_TIMEOUT },
  8689. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8690. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B5, 0, 0, 0 },
  8691. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8692. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_574D, 0, 0, 0 },
  8693. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8694. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B2, 0, 0, 0 },
  8695. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8696. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C0, 0, 0, 0 },
  8697. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8698. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C3, 0, 0, 0 },
  8699. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROC_FPGA_E2,
  8700. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C4, 0, 0, 0 },
  8701. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8702. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B4, 0, 0, 0 },
  8703. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8704. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57B1, 0, 0, 0 },
  8705. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8706. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C6, 0, 0, 0 },
  8707. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8708. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57C8, 0, 0, 0 },
  8709. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8710. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57CE, 0, 0, 0 },
  8711. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8712. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D5, 0, 0, 0 },
  8713. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8714. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D6, 0, 0, 0 },
  8715. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8716. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D7, 0, 0, 0 },
  8717. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8718. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D8, 0, 0, 0 },
  8719. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8720. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57D9, 0, 0, 0 },
  8721. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8722. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EB, 0, 0, 0 },
  8723. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8724. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EC, 0, 0, 0 },
  8725. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8726. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57ED, 0, 0, 0 },
  8727. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8728. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EE, 0, 0, 0 },
  8729. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8730. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57EF, 0, 0, 0 },
  8731. { PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CROCODILE,
  8732. PCI_VENDOR_ID_IBM, IPR_SUBS_DEV_ID_57F0, 0, 0, 0 },
  8733. { }
  8734. };
  8735. MODULE_DEVICE_TABLE(pci, ipr_pci_table);
  8736. static const struct pci_error_handlers ipr_err_handler = {
  8737. .error_detected = ipr_pci_error_detected,
  8738. .slot_reset = ipr_pci_slot_reset,
  8739. };
  8740. static struct pci_driver ipr_driver = {
  8741. .name = IPR_NAME,
  8742. .id_table = ipr_pci_table,
  8743. .probe = ipr_probe,
  8744. .remove = ipr_remove,
  8745. .shutdown = ipr_shutdown,
  8746. .err_handler = &ipr_err_handler,
  8747. };
  8748. /**
  8749. * ipr_halt_done - Shutdown prepare completion
  8750. *
  8751. * Return value:
  8752. * none
  8753. **/
  8754. static void ipr_halt_done(struct ipr_cmnd *ipr_cmd)
  8755. {
  8756. list_add_tail(&ipr_cmd->queue, &ipr_cmd->hrrq->hrrq_free_q);
  8757. }
  8758. /**
  8759. * ipr_halt - Issue shutdown prepare to all adapters
  8760. *
  8761. * Return value:
  8762. * NOTIFY_OK on success / NOTIFY_DONE on failure
  8763. **/
  8764. static int ipr_halt(struct notifier_block *nb, ulong event, void *buf)
  8765. {
  8766. struct ipr_cmnd *ipr_cmd;
  8767. struct ipr_ioa_cfg *ioa_cfg;
  8768. unsigned long flags = 0, driver_lock_flags;
  8769. if (event != SYS_RESTART && event != SYS_HALT && event != SYS_POWER_OFF)
  8770. return NOTIFY_DONE;
  8771. spin_lock_irqsave(&ipr_driver_lock, driver_lock_flags);
  8772. list_for_each_entry(ioa_cfg, &ipr_ioa_head, queue) {
  8773. spin_lock_irqsave(ioa_cfg->host->host_lock, flags);
  8774. if (!ioa_cfg->hrrq[IPR_INIT_HRRQ].allow_cmds) {
  8775. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8776. continue;
  8777. }
  8778. ipr_cmd = ipr_get_free_ipr_cmnd(ioa_cfg);
  8779. ipr_cmd->ioarcb.res_handle = cpu_to_be32(IPR_IOA_RES_HANDLE);
  8780. ipr_cmd->ioarcb.cmd_pkt.request_type = IPR_RQTYPE_IOACMD;
  8781. ipr_cmd->ioarcb.cmd_pkt.cdb[0] = IPR_IOA_SHUTDOWN;
  8782. ipr_cmd->ioarcb.cmd_pkt.cdb[1] = IPR_SHUTDOWN_PREPARE_FOR_NORMAL;
  8783. ipr_do_req(ipr_cmd, ipr_halt_done, ipr_timeout, IPR_DEVICE_RESET_TIMEOUT);
  8784. spin_unlock_irqrestore(ioa_cfg->host->host_lock, flags);
  8785. }
  8786. spin_unlock_irqrestore(&ipr_driver_lock, driver_lock_flags);
  8787. return NOTIFY_OK;
  8788. }
  8789. static struct notifier_block ipr_notifier = {
  8790. ipr_halt, NULL, 0
  8791. };
  8792. /**
  8793. * ipr_init - Module entry point
  8794. *
  8795. * Return value:
  8796. * 0 on success / negative value on failure
  8797. **/
  8798. static int __init ipr_init(void)
  8799. {
  8800. ipr_info("IBM Power RAID SCSI Device Driver version: %s %s\n",
  8801. IPR_DRIVER_VERSION, IPR_DRIVER_DATE);
  8802. register_reboot_notifier(&ipr_notifier);
  8803. return pci_register_driver(&ipr_driver);
  8804. }
  8805. /**
  8806. * ipr_exit - Module unload
  8807. *
  8808. * Module unload entry point.
  8809. *
  8810. * Return value:
  8811. * none
  8812. **/
  8813. static void __exit ipr_exit(void)
  8814. {
  8815. unregister_reboot_notifier(&ipr_notifier);
  8816. pci_unregister_driver(&ipr_driver);
  8817. }
  8818. module_init(ipr_init);
  8819. module_exit(ipr_exit);