hpsa.c 146 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/pci-aspm.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/delay.h>
  29. #include <linux/fs.h>
  30. #include <linux/timer.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/init.h>
  33. #include <linux/spinlock.h>
  34. #include <linux/compat.h>
  35. #include <linux/blktrace_api.h>
  36. #include <linux/uaccess.h>
  37. #include <linux/io.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/completion.h>
  40. #include <linux/moduleparam.h>
  41. #include <scsi/scsi.h>
  42. #include <scsi/scsi_cmnd.h>
  43. #include <scsi/scsi_device.h>
  44. #include <scsi/scsi_host.h>
  45. #include <scsi/scsi_tcq.h>
  46. #include <linux/cciss_ioctl.h>
  47. #include <linux/string.h>
  48. #include <linux/bitmap.h>
  49. #include <linux/atomic.h>
  50. #include <linux/kthread.h>
  51. #include <linux/jiffies.h>
  52. #include "hpsa_cmd.h"
  53. #include "hpsa.h"
  54. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  55. #define HPSA_DRIVER_VERSION "3.4.0-1"
  56. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  57. #define HPSA "hpsa"
  58. /* How long to wait (in milliseconds) for board to go into simple mode */
  59. #define MAX_CONFIG_WAIT 30000
  60. #define MAX_IOCTL_CONFIG_WAIT 1000
  61. /*define how many times we will try a command because of bus resets */
  62. #define MAX_CMD_RETRIES 3
  63. /* Embedded module documentation macros - see modules.h */
  64. MODULE_AUTHOR("Hewlett-Packard Company");
  65. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  66. HPSA_DRIVER_VERSION);
  67. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  68. MODULE_VERSION(HPSA_DRIVER_VERSION);
  69. MODULE_LICENSE("GPL");
  70. static int hpsa_allow_any;
  71. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  72. MODULE_PARM_DESC(hpsa_allow_any,
  73. "Allow hpsa driver to access unknown HP Smart Array hardware");
  74. static int hpsa_simple_mode;
  75. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(hpsa_simple_mode,
  77. "Use 'simple mode' rather than 'performant mode'");
  78. /* define the PCI info for the cards we can control */
  79. static const struct pci_device_id hpsa_pci_device_id[] = {
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351},
  90. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352},
  91. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353},
  92. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334D},
  93. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354},
  94. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355},
  95. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356},
  96. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921},
  97. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922},
  98. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923},
  99. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924},
  100. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925},
  101. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926},
  102. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928},
  103. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929},
  104. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD},
  105. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE},
  106. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF},
  107. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0},
  108. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1},
  109. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2},
  110. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3},
  111. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4},
  112. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5},
  113. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7},
  114. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8},
  115. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9},
  116. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  117. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  118. {0,}
  119. };
  120. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  121. /* board_id = Subsystem Device ID & Vendor ID
  122. * product = Marketing Name for the board
  123. * access = Address of the struct of function pointers
  124. */
  125. static struct board_type products[] = {
  126. {0x3241103C, "Smart Array P212", &SA5_access},
  127. {0x3243103C, "Smart Array P410", &SA5_access},
  128. {0x3245103C, "Smart Array P410i", &SA5_access},
  129. {0x3247103C, "Smart Array P411", &SA5_access},
  130. {0x3249103C, "Smart Array P812", &SA5_access},
  131. {0x324A103C, "Smart Array P712m", &SA5_access},
  132. {0x324B103C, "Smart Array P711m", &SA5_access},
  133. {0x3350103C, "Smart Array P222", &SA5_access},
  134. {0x3351103C, "Smart Array P420", &SA5_access},
  135. {0x3352103C, "Smart Array P421", &SA5_access},
  136. {0x3353103C, "Smart Array P822", &SA5_access},
  137. {0x334D103C, "Smart Array P822se", &SA5_access},
  138. {0x3354103C, "Smart Array P420i", &SA5_access},
  139. {0x3355103C, "Smart Array P220i", &SA5_access},
  140. {0x3356103C, "Smart Array P721m", &SA5_access},
  141. {0x1921103C, "Smart Array P830i", &SA5_access},
  142. {0x1922103C, "Smart Array P430", &SA5_access},
  143. {0x1923103C, "Smart Array P431", &SA5_access},
  144. {0x1924103C, "Smart Array P830", &SA5_access},
  145. {0x1926103C, "Smart Array P731m", &SA5_access},
  146. {0x1928103C, "Smart Array P230i", &SA5_access},
  147. {0x1929103C, "Smart Array P530", &SA5_access},
  148. {0x21BD103C, "Smart Array", &SA5_access},
  149. {0x21BE103C, "Smart Array", &SA5_access},
  150. {0x21BF103C, "Smart Array", &SA5_access},
  151. {0x21C0103C, "Smart Array", &SA5_access},
  152. {0x21C1103C, "Smart Array", &SA5_access},
  153. {0x21C2103C, "Smart Array", &SA5_access},
  154. {0x21C3103C, "Smart Array", &SA5_access},
  155. {0x21C4103C, "Smart Array", &SA5_access},
  156. {0x21C5103C, "Smart Array", &SA5_access},
  157. {0x21C7103C, "Smart Array", &SA5_access},
  158. {0x21C8103C, "Smart Array", &SA5_access},
  159. {0x21C9103C, "Smart Array", &SA5_access},
  160. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  161. };
  162. static int number_of_controllers;
  163. static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
  164. static spinlock_t lockup_detector_lock;
  165. static struct task_struct *hpsa_lockup_detector;
  166. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  167. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  168. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  169. static void start_io(struct ctlr_info *h);
  170. #ifdef CONFIG_COMPAT
  171. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  172. #endif
  173. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  174. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  175. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  176. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  177. static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  178. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  179. int cmd_type);
  180. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  181. static void hpsa_scan_start(struct Scsi_Host *);
  182. static int hpsa_scan_finished(struct Scsi_Host *sh,
  183. unsigned long elapsed_time);
  184. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  185. int qdepth, int reason);
  186. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  187. static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
  188. static int hpsa_slave_alloc(struct scsi_device *sdev);
  189. static void hpsa_slave_destroy(struct scsi_device *sdev);
  190. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  191. static int check_for_unit_attention(struct ctlr_info *h,
  192. struct CommandList *c);
  193. static void check_ioctl_unit_attention(struct ctlr_info *h,
  194. struct CommandList *c);
  195. /* performant mode helper functions */
  196. static void calc_bucket_map(int *bucket, int num_buckets,
  197. int nsgs, int *bucket_map);
  198. static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  199. static inline u32 next_command(struct ctlr_info *h, u8 q);
  200. static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
  201. u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  202. u64 *cfg_offset);
  203. static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  204. unsigned long *memory_bar);
  205. static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  206. static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
  207. int wait_for_ready);
  208. static inline void finish_cmd(struct CommandList *c);
  209. #define BOARD_NOT_READY 0
  210. #define BOARD_READY 1
  211. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  212. {
  213. unsigned long *priv = shost_priv(sdev->host);
  214. return (struct ctlr_info *) *priv;
  215. }
  216. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  217. {
  218. unsigned long *priv = shost_priv(sh);
  219. return (struct ctlr_info *) *priv;
  220. }
  221. static int check_for_unit_attention(struct ctlr_info *h,
  222. struct CommandList *c)
  223. {
  224. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  225. return 0;
  226. switch (c->err_info->SenseInfo[12]) {
  227. case STATE_CHANGED:
  228. dev_warn(&h->pdev->dev, HPSA "%d: a state change "
  229. "detected, command retried\n", h->ctlr);
  230. break;
  231. case LUN_FAILED:
  232. dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
  233. "detected, action required\n", h->ctlr);
  234. break;
  235. case REPORT_LUNS_CHANGED:
  236. dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
  237. "changed, action required\n", h->ctlr);
  238. /*
  239. * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
  240. * target (array) devices.
  241. */
  242. break;
  243. case POWER_OR_RESET:
  244. dev_warn(&h->pdev->dev, HPSA "%d: a power on "
  245. "or device reset detected\n", h->ctlr);
  246. break;
  247. case UNIT_ATTENTION_CLEARED:
  248. dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
  249. "cleared by another initiator\n", h->ctlr);
  250. break;
  251. default:
  252. dev_warn(&h->pdev->dev, HPSA "%d: unknown "
  253. "unit attention detected\n", h->ctlr);
  254. break;
  255. }
  256. return 1;
  257. }
  258. static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
  259. {
  260. if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
  261. (c->err_info->ScsiStatus != SAM_STAT_BUSY &&
  262. c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
  263. return 0;
  264. dev_warn(&h->pdev->dev, HPSA "device busy");
  265. return 1;
  266. }
  267. static ssize_t host_store_rescan(struct device *dev,
  268. struct device_attribute *attr,
  269. const char *buf, size_t count)
  270. {
  271. struct ctlr_info *h;
  272. struct Scsi_Host *shost = class_to_shost(dev);
  273. h = shost_to_hba(shost);
  274. hpsa_scan_start(h->scsi_host);
  275. return count;
  276. }
  277. static ssize_t host_show_firmware_revision(struct device *dev,
  278. struct device_attribute *attr, char *buf)
  279. {
  280. struct ctlr_info *h;
  281. struct Scsi_Host *shost = class_to_shost(dev);
  282. unsigned char *fwrev;
  283. h = shost_to_hba(shost);
  284. if (!h->hba_inquiry_data)
  285. return 0;
  286. fwrev = &h->hba_inquiry_data[32];
  287. return snprintf(buf, 20, "%c%c%c%c\n",
  288. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  289. }
  290. static ssize_t host_show_commands_outstanding(struct device *dev,
  291. struct device_attribute *attr, char *buf)
  292. {
  293. struct Scsi_Host *shost = class_to_shost(dev);
  294. struct ctlr_info *h = shost_to_hba(shost);
  295. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  296. }
  297. static ssize_t host_show_transport_mode(struct device *dev,
  298. struct device_attribute *attr, char *buf)
  299. {
  300. struct ctlr_info *h;
  301. struct Scsi_Host *shost = class_to_shost(dev);
  302. h = shost_to_hba(shost);
  303. return snprintf(buf, 20, "%s\n",
  304. h->transMethod & CFGTBL_Trans_Performant ?
  305. "performant" : "simple");
  306. }
  307. /* List of controllers which cannot be hard reset on kexec with reset_devices */
  308. static u32 unresettable_controller[] = {
  309. 0x324a103C, /* Smart Array P712m */
  310. 0x324b103C, /* SmartArray P711m */
  311. 0x3223103C, /* Smart Array P800 */
  312. 0x3234103C, /* Smart Array P400 */
  313. 0x3235103C, /* Smart Array P400i */
  314. 0x3211103C, /* Smart Array E200i */
  315. 0x3212103C, /* Smart Array E200 */
  316. 0x3213103C, /* Smart Array E200i */
  317. 0x3214103C, /* Smart Array E200i */
  318. 0x3215103C, /* Smart Array E200i */
  319. 0x3237103C, /* Smart Array E500 */
  320. 0x323D103C, /* Smart Array P700m */
  321. 0x40800E11, /* Smart Array 5i */
  322. 0x409C0E11, /* Smart Array 6400 */
  323. 0x409D0E11, /* Smart Array 6400 EM */
  324. 0x40700E11, /* Smart Array 5300 */
  325. 0x40820E11, /* Smart Array 532 */
  326. 0x40830E11, /* Smart Array 5312 */
  327. 0x409A0E11, /* Smart Array 641 */
  328. 0x409B0E11, /* Smart Array 642 */
  329. 0x40910E11, /* Smart Array 6i */
  330. };
  331. /* List of controllers which cannot even be soft reset */
  332. static u32 soft_unresettable_controller[] = {
  333. 0x40800E11, /* Smart Array 5i */
  334. 0x40700E11, /* Smart Array 5300 */
  335. 0x40820E11, /* Smart Array 532 */
  336. 0x40830E11, /* Smart Array 5312 */
  337. 0x409A0E11, /* Smart Array 641 */
  338. 0x409B0E11, /* Smart Array 642 */
  339. 0x40910E11, /* Smart Array 6i */
  340. /* Exclude 640x boards. These are two pci devices in one slot
  341. * which share a battery backed cache module. One controls the
  342. * cache, the other accesses the cache through the one that controls
  343. * it. If we reset the one controlling the cache, the other will
  344. * likely not be happy. Just forbid resetting this conjoined mess.
  345. * The 640x isn't really supported by hpsa anyway.
  346. */
  347. 0x409C0E11, /* Smart Array 6400 */
  348. 0x409D0E11, /* Smart Array 6400 EM */
  349. };
  350. static int ctlr_is_hard_resettable(u32 board_id)
  351. {
  352. int i;
  353. for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
  354. if (unresettable_controller[i] == board_id)
  355. return 0;
  356. return 1;
  357. }
  358. static int ctlr_is_soft_resettable(u32 board_id)
  359. {
  360. int i;
  361. for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
  362. if (soft_unresettable_controller[i] == board_id)
  363. return 0;
  364. return 1;
  365. }
  366. static int ctlr_is_resettable(u32 board_id)
  367. {
  368. return ctlr_is_hard_resettable(board_id) ||
  369. ctlr_is_soft_resettable(board_id);
  370. }
  371. static ssize_t host_show_resettable(struct device *dev,
  372. struct device_attribute *attr, char *buf)
  373. {
  374. struct ctlr_info *h;
  375. struct Scsi_Host *shost = class_to_shost(dev);
  376. h = shost_to_hba(shost);
  377. return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
  378. }
  379. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  380. {
  381. return (scsi3addr[3] & 0xC0) == 0x40;
  382. }
  383. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  384. "1(ADM)", "UNKNOWN"
  385. };
  386. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  387. static ssize_t raid_level_show(struct device *dev,
  388. struct device_attribute *attr, char *buf)
  389. {
  390. ssize_t l = 0;
  391. unsigned char rlevel;
  392. struct ctlr_info *h;
  393. struct scsi_device *sdev;
  394. struct hpsa_scsi_dev_t *hdev;
  395. unsigned long flags;
  396. sdev = to_scsi_device(dev);
  397. h = sdev_to_hba(sdev);
  398. spin_lock_irqsave(&h->lock, flags);
  399. hdev = sdev->hostdata;
  400. if (!hdev) {
  401. spin_unlock_irqrestore(&h->lock, flags);
  402. return -ENODEV;
  403. }
  404. /* Is this even a logical drive? */
  405. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  406. spin_unlock_irqrestore(&h->lock, flags);
  407. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  408. return l;
  409. }
  410. rlevel = hdev->raid_level;
  411. spin_unlock_irqrestore(&h->lock, flags);
  412. if (rlevel > RAID_UNKNOWN)
  413. rlevel = RAID_UNKNOWN;
  414. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  415. return l;
  416. }
  417. static ssize_t lunid_show(struct device *dev,
  418. struct device_attribute *attr, char *buf)
  419. {
  420. struct ctlr_info *h;
  421. struct scsi_device *sdev;
  422. struct hpsa_scsi_dev_t *hdev;
  423. unsigned long flags;
  424. unsigned char lunid[8];
  425. sdev = to_scsi_device(dev);
  426. h = sdev_to_hba(sdev);
  427. spin_lock_irqsave(&h->lock, flags);
  428. hdev = sdev->hostdata;
  429. if (!hdev) {
  430. spin_unlock_irqrestore(&h->lock, flags);
  431. return -ENODEV;
  432. }
  433. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  434. spin_unlock_irqrestore(&h->lock, flags);
  435. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  436. lunid[0], lunid[1], lunid[2], lunid[3],
  437. lunid[4], lunid[5], lunid[6], lunid[7]);
  438. }
  439. static ssize_t unique_id_show(struct device *dev,
  440. struct device_attribute *attr, char *buf)
  441. {
  442. struct ctlr_info *h;
  443. struct scsi_device *sdev;
  444. struct hpsa_scsi_dev_t *hdev;
  445. unsigned long flags;
  446. unsigned char sn[16];
  447. sdev = to_scsi_device(dev);
  448. h = sdev_to_hba(sdev);
  449. spin_lock_irqsave(&h->lock, flags);
  450. hdev = sdev->hostdata;
  451. if (!hdev) {
  452. spin_unlock_irqrestore(&h->lock, flags);
  453. return -ENODEV;
  454. }
  455. memcpy(sn, hdev->device_id, sizeof(sn));
  456. spin_unlock_irqrestore(&h->lock, flags);
  457. return snprintf(buf, 16 * 2 + 2,
  458. "%02X%02X%02X%02X%02X%02X%02X%02X"
  459. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  460. sn[0], sn[1], sn[2], sn[3],
  461. sn[4], sn[5], sn[6], sn[7],
  462. sn[8], sn[9], sn[10], sn[11],
  463. sn[12], sn[13], sn[14], sn[15]);
  464. }
  465. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  466. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  467. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  468. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  469. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  470. host_show_firmware_revision, NULL);
  471. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  472. host_show_commands_outstanding, NULL);
  473. static DEVICE_ATTR(transport_mode, S_IRUGO,
  474. host_show_transport_mode, NULL);
  475. static DEVICE_ATTR(resettable, S_IRUGO,
  476. host_show_resettable, NULL);
  477. static struct device_attribute *hpsa_sdev_attrs[] = {
  478. &dev_attr_raid_level,
  479. &dev_attr_lunid,
  480. &dev_attr_unique_id,
  481. NULL,
  482. };
  483. static struct device_attribute *hpsa_shost_attrs[] = {
  484. &dev_attr_rescan,
  485. &dev_attr_firmware_revision,
  486. &dev_attr_commands_outstanding,
  487. &dev_attr_transport_mode,
  488. &dev_attr_resettable,
  489. NULL,
  490. };
  491. static struct scsi_host_template hpsa_driver_template = {
  492. .module = THIS_MODULE,
  493. .name = HPSA,
  494. .proc_name = HPSA,
  495. .queuecommand = hpsa_scsi_queue_command,
  496. .scan_start = hpsa_scan_start,
  497. .scan_finished = hpsa_scan_finished,
  498. .change_queue_depth = hpsa_change_queue_depth,
  499. .this_id = -1,
  500. .use_clustering = ENABLE_CLUSTERING,
  501. .eh_abort_handler = hpsa_eh_abort_handler,
  502. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  503. .ioctl = hpsa_ioctl,
  504. .slave_alloc = hpsa_slave_alloc,
  505. .slave_destroy = hpsa_slave_destroy,
  506. #ifdef CONFIG_COMPAT
  507. .compat_ioctl = hpsa_compat_ioctl,
  508. #endif
  509. .sdev_attrs = hpsa_sdev_attrs,
  510. .shost_attrs = hpsa_shost_attrs,
  511. .max_sectors = 8192,
  512. .no_write_same = 1,
  513. };
  514. /* Enqueuing and dequeuing functions for cmdlists. */
  515. static inline void addQ(struct list_head *list, struct CommandList *c)
  516. {
  517. list_add_tail(&c->list, list);
  518. }
  519. static inline u32 next_command(struct ctlr_info *h, u8 q)
  520. {
  521. u32 a;
  522. struct reply_pool *rq = &h->reply_queue[q];
  523. unsigned long flags;
  524. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  525. return h->access.command_completed(h, q);
  526. if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
  527. a = rq->head[rq->current_entry];
  528. rq->current_entry++;
  529. spin_lock_irqsave(&h->lock, flags);
  530. h->commands_outstanding--;
  531. spin_unlock_irqrestore(&h->lock, flags);
  532. } else {
  533. a = FIFO_EMPTY;
  534. }
  535. /* Check for wraparound */
  536. if (rq->current_entry == h->max_commands) {
  537. rq->current_entry = 0;
  538. rq->wraparound ^= 1;
  539. }
  540. return a;
  541. }
  542. /* set_performant_mode: Modify the tag for cciss performant
  543. * set bit 0 for pull model, bits 3-1 for block fetch
  544. * register number
  545. */
  546. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  547. {
  548. if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
  549. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  550. if (likely(h->msix_vector))
  551. c->Header.ReplyQueue =
  552. raw_smp_processor_id() % h->nreply_queues;
  553. }
  554. }
  555. static int is_firmware_flash_cmd(u8 *cdb)
  556. {
  557. return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
  558. }
  559. /*
  560. * During firmware flash, the heartbeat register may not update as frequently
  561. * as it should. So we dial down lockup detection during firmware flash. and
  562. * dial it back up when firmware flash completes.
  563. */
  564. #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
  565. #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
  566. static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
  567. struct CommandList *c)
  568. {
  569. if (!is_firmware_flash_cmd(c->Request.CDB))
  570. return;
  571. atomic_inc(&h->firmware_flash_in_progress);
  572. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
  573. }
  574. static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
  575. struct CommandList *c)
  576. {
  577. if (is_firmware_flash_cmd(c->Request.CDB) &&
  578. atomic_dec_and_test(&h->firmware_flash_in_progress))
  579. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  580. }
  581. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  582. struct CommandList *c)
  583. {
  584. unsigned long flags;
  585. set_performant_mode(h, c);
  586. dial_down_lockup_detection_during_fw_flash(h, c);
  587. spin_lock_irqsave(&h->lock, flags);
  588. addQ(&h->reqQ, c);
  589. h->Qdepth++;
  590. spin_unlock_irqrestore(&h->lock, flags);
  591. start_io(h);
  592. }
  593. static inline void removeQ(struct CommandList *c)
  594. {
  595. if (WARN_ON(list_empty(&c->list)))
  596. return;
  597. list_del_init(&c->list);
  598. }
  599. static inline int is_hba_lunid(unsigned char scsi3addr[])
  600. {
  601. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  602. }
  603. static inline int is_scsi_rev_5(struct ctlr_info *h)
  604. {
  605. if (!h->hba_inquiry_data)
  606. return 0;
  607. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  608. return 1;
  609. return 0;
  610. }
  611. static int hpsa_find_target_lun(struct ctlr_info *h,
  612. unsigned char scsi3addr[], int bus, int *target, int *lun)
  613. {
  614. /* finds an unused bus, target, lun for a new physical device
  615. * assumes h->devlock is held
  616. */
  617. int i, found = 0;
  618. DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
  619. bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
  620. for (i = 0; i < h->ndevices; i++) {
  621. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  622. __set_bit(h->dev[i]->target, lun_taken);
  623. }
  624. i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
  625. if (i < HPSA_MAX_DEVICES) {
  626. /* *bus = 1; */
  627. *target = i;
  628. *lun = 0;
  629. found = 1;
  630. }
  631. return !found;
  632. }
  633. /* Add an entry into h->dev[] array. */
  634. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  635. struct hpsa_scsi_dev_t *device,
  636. struct hpsa_scsi_dev_t *added[], int *nadded)
  637. {
  638. /* assumes h->devlock is held */
  639. int n = h->ndevices;
  640. int i;
  641. unsigned char addr1[8], addr2[8];
  642. struct hpsa_scsi_dev_t *sd;
  643. if (n >= HPSA_MAX_DEVICES) {
  644. dev_err(&h->pdev->dev, "too many devices, some will be "
  645. "inaccessible.\n");
  646. return -1;
  647. }
  648. /* physical devices do not have lun or target assigned until now. */
  649. if (device->lun != -1)
  650. /* Logical device, lun is already assigned. */
  651. goto lun_assigned;
  652. /* If this device a non-zero lun of a multi-lun device
  653. * byte 4 of the 8-byte LUN addr will contain the logical
  654. * unit no, zero otherise.
  655. */
  656. if (device->scsi3addr[4] == 0) {
  657. /* This is not a non-zero lun of a multi-lun device */
  658. if (hpsa_find_target_lun(h, device->scsi3addr,
  659. device->bus, &device->target, &device->lun) != 0)
  660. return -1;
  661. goto lun_assigned;
  662. }
  663. /* This is a non-zero lun of a multi-lun device.
  664. * Search through our list and find the device which
  665. * has the same 8 byte LUN address, excepting byte 4.
  666. * Assign the same bus and target for this new LUN.
  667. * Use the logical unit number from the firmware.
  668. */
  669. memcpy(addr1, device->scsi3addr, 8);
  670. addr1[4] = 0;
  671. for (i = 0; i < n; i++) {
  672. sd = h->dev[i];
  673. memcpy(addr2, sd->scsi3addr, 8);
  674. addr2[4] = 0;
  675. /* differ only in byte 4? */
  676. if (memcmp(addr1, addr2, 8) == 0) {
  677. device->bus = sd->bus;
  678. device->target = sd->target;
  679. device->lun = device->scsi3addr[4];
  680. break;
  681. }
  682. }
  683. if (device->lun == -1) {
  684. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  685. " suspect firmware bug or unsupported hardware "
  686. "configuration.\n");
  687. return -1;
  688. }
  689. lun_assigned:
  690. h->dev[n] = device;
  691. h->ndevices++;
  692. added[*nadded] = device;
  693. (*nadded)++;
  694. /* initially, (before registering with scsi layer) we don't
  695. * know our hostno and we don't want to print anything first
  696. * time anyway (the scsi layer's inquiries will show that info)
  697. */
  698. /* if (hostno != -1) */
  699. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  700. scsi_device_type(device->devtype), hostno,
  701. device->bus, device->target, device->lun);
  702. return 0;
  703. }
  704. /* Update an entry in h->dev[] array. */
  705. static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
  706. int entry, struct hpsa_scsi_dev_t *new_entry)
  707. {
  708. /* assumes h->devlock is held */
  709. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  710. /* Raid level changed. */
  711. h->dev[entry]->raid_level = new_entry->raid_level;
  712. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
  713. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  714. new_entry->target, new_entry->lun);
  715. }
  716. /* Replace an entry from h->dev[] array. */
  717. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  718. int entry, struct hpsa_scsi_dev_t *new_entry,
  719. struct hpsa_scsi_dev_t *added[], int *nadded,
  720. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  721. {
  722. /* assumes h->devlock is held */
  723. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  724. removed[*nremoved] = h->dev[entry];
  725. (*nremoved)++;
  726. /*
  727. * New physical devices won't have target/lun assigned yet
  728. * so we need to preserve the values in the slot we are replacing.
  729. */
  730. if (new_entry->target == -1) {
  731. new_entry->target = h->dev[entry]->target;
  732. new_entry->lun = h->dev[entry]->lun;
  733. }
  734. h->dev[entry] = new_entry;
  735. added[*nadded] = new_entry;
  736. (*nadded)++;
  737. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  738. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  739. new_entry->target, new_entry->lun);
  740. }
  741. /* Remove an entry from h->dev[] array. */
  742. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  743. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  744. {
  745. /* assumes h->devlock is held */
  746. int i;
  747. struct hpsa_scsi_dev_t *sd;
  748. BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
  749. sd = h->dev[entry];
  750. removed[*nremoved] = h->dev[entry];
  751. (*nremoved)++;
  752. for (i = entry; i < h->ndevices-1; i++)
  753. h->dev[i] = h->dev[i+1];
  754. h->ndevices--;
  755. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  756. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  757. sd->lun);
  758. }
  759. #define SCSI3ADDR_EQ(a, b) ( \
  760. (a)[7] == (b)[7] && \
  761. (a)[6] == (b)[6] && \
  762. (a)[5] == (b)[5] && \
  763. (a)[4] == (b)[4] && \
  764. (a)[3] == (b)[3] && \
  765. (a)[2] == (b)[2] && \
  766. (a)[1] == (b)[1] && \
  767. (a)[0] == (b)[0])
  768. static void fixup_botched_add(struct ctlr_info *h,
  769. struct hpsa_scsi_dev_t *added)
  770. {
  771. /* called when scsi_add_device fails in order to re-adjust
  772. * h->dev[] to match the mid layer's view.
  773. */
  774. unsigned long flags;
  775. int i, j;
  776. spin_lock_irqsave(&h->lock, flags);
  777. for (i = 0; i < h->ndevices; i++) {
  778. if (h->dev[i] == added) {
  779. for (j = i; j < h->ndevices-1; j++)
  780. h->dev[j] = h->dev[j+1];
  781. h->ndevices--;
  782. break;
  783. }
  784. }
  785. spin_unlock_irqrestore(&h->lock, flags);
  786. kfree(added);
  787. }
  788. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  789. struct hpsa_scsi_dev_t *dev2)
  790. {
  791. /* we compare everything except lun and target as these
  792. * are not yet assigned. Compare parts likely
  793. * to differ first
  794. */
  795. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  796. sizeof(dev1->scsi3addr)) != 0)
  797. return 0;
  798. if (memcmp(dev1->device_id, dev2->device_id,
  799. sizeof(dev1->device_id)) != 0)
  800. return 0;
  801. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  802. return 0;
  803. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  804. return 0;
  805. if (dev1->devtype != dev2->devtype)
  806. return 0;
  807. if (dev1->bus != dev2->bus)
  808. return 0;
  809. return 1;
  810. }
  811. static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
  812. struct hpsa_scsi_dev_t *dev2)
  813. {
  814. /* Device attributes that can change, but don't mean
  815. * that the device is a different device, nor that the OS
  816. * needs to be told anything about the change.
  817. */
  818. if (dev1->raid_level != dev2->raid_level)
  819. return 1;
  820. return 0;
  821. }
  822. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  823. * and return needle location in *index. If scsi3addr matches, but not
  824. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  825. * location in *index.
  826. * In the case of a minor device attribute change, such as RAID level, just
  827. * return DEVICE_UPDATED, along with the updated device's location in index.
  828. * If needle not found, return DEVICE_NOT_FOUND.
  829. */
  830. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  831. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  832. int *index)
  833. {
  834. int i;
  835. #define DEVICE_NOT_FOUND 0
  836. #define DEVICE_CHANGED 1
  837. #define DEVICE_SAME 2
  838. #define DEVICE_UPDATED 3
  839. for (i = 0; i < haystack_size; i++) {
  840. if (haystack[i] == NULL) /* previously removed. */
  841. continue;
  842. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  843. *index = i;
  844. if (device_is_the_same(needle, haystack[i])) {
  845. if (device_updated(needle, haystack[i]))
  846. return DEVICE_UPDATED;
  847. return DEVICE_SAME;
  848. } else {
  849. return DEVICE_CHANGED;
  850. }
  851. }
  852. }
  853. *index = -1;
  854. return DEVICE_NOT_FOUND;
  855. }
  856. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  857. struct hpsa_scsi_dev_t *sd[], int nsds)
  858. {
  859. /* sd contains scsi3 addresses and devtypes, and inquiry
  860. * data. This function takes what's in sd to be the current
  861. * reality and updates h->dev[] to reflect that reality.
  862. */
  863. int i, entry, device_change, changes = 0;
  864. struct hpsa_scsi_dev_t *csd;
  865. unsigned long flags;
  866. struct hpsa_scsi_dev_t **added, **removed;
  867. int nadded, nremoved;
  868. struct Scsi_Host *sh = NULL;
  869. added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
  870. removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
  871. if (!added || !removed) {
  872. dev_warn(&h->pdev->dev, "out of memory in "
  873. "adjust_hpsa_scsi_table\n");
  874. goto free_and_out;
  875. }
  876. spin_lock_irqsave(&h->devlock, flags);
  877. /* find any devices in h->dev[] that are not in
  878. * sd[] and remove them from h->dev[], and for any
  879. * devices which have changed, remove the old device
  880. * info and add the new device info.
  881. * If minor device attributes change, just update
  882. * the existing device structure.
  883. */
  884. i = 0;
  885. nremoved = 0;
  886. nadded = 0;
  887. while (i < h->ndevices) {
  888. csd = h->dev[i];
  889. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  890. if (device_change == DEVICE_NOT_FOUND) {
  891. changes++;
  892. hpsa_scsi_remove_entry(h, hostno, i,
  893. removed, &nremoved);
  894. continue; /* remove ^^^, hence i not incremented */
  895. } else if (device_change == DEVICE_CHANGED) {
  896. changes++;
  897. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  898. added, &nadded, removed, &nremoved);
  899. /* Set it to NULL to prevent it from being freed
  900. * at the bottom of hpsa_update_scsi_devices()
  901. */
  902. sd[entry] = NULL;
  903. } else if (device_change == DEVICE_UPDATED) {
  904. hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
  905. }
  906. i++;
  907. }
  908. /* Now, make sure every device listed in sd[] is also
  909. * listed in h->dev[], adding them if they aren't found
  910. */
  911. for (i = 0; i < nsds; i++) {
  912. if (!sd[i]) /* if already added above. */
  913. continue;
  914. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  915. h->ndevices, &entry);
  916. if (device_change == DEVICE_NOT_FOUND) {
  917. changes++;
  918. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  919. added, &nadded) != 0)
  920. break;
  921. sd[i] = NULL; /* prevent from being freed later. */
  922. } else if (device_change == DEVICE_CHANGED) {
  923. /* should never happen... */
  924. changes++;
  925. dev_warn(&h->pdev->dev,
  926. "device unexpectedly changed.\n");
  927. /* but if it does happen, we just ignore that device */
  928. }
  929. }
  930. spin_unlock_irqrestore(&h->devlock, flags);
  931. /* Don't notify scsi mid layer of any changes the first time through
  932. * (or if there are no changes) scsi_scan_host will do it later the
  933. * first time through.
  934. */
  935. if (hostno == -1 || !changes)
  936. goto free_and_out;
  937. sh = h->scsi_host;
  938. /* Notify scsi mid layer of any removed devices */
  939. for (i = 0; i < nremoved; i++) {
  940. struct scsi_device *sdev =
  941. scsi_device_lookup(sh, removed[i]->bus,
  942. removed[i]->target, removed[i]->lun);
  943. if (sdev != NULL) {
  944. scsi_remove_device(sdev);
  945. scsi_device_put(sdev);
  946. } else {
  947. /* We don't expect to get here.
  948. * future cmds to this device will get selection
  949. * timeout as if the device was gone.
  950. */
  951. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  952. " for removal.", hostno, removed[i]->bus,
  953. removed[i]->target, removed[i]->lun);
  954. }
  955. kfree(removed[i]);
  956. removed[i] = NULL;
  957. }
  958. /* Notify scsi mid layer of any added devices */
  959. for (i = 0; i < nadded; i++) {
  960. if (scsi_add_device(sh, added[i]->bus,
  961. added[i]->target, added[i]->lun) == 0)
  962. continue;
  963. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  964. "device not added.\n", hostno, added[i]->bus,
  965. added[i]->target, added[i]->lun);
  966. /* now we have to remove it from h->dev,
  967. * since it didn't get added to scsi mid layer
  968. */
  969. fixup_botched_add(h, added[i]);
  970. }
  971. free_and_out:
  972. kfree(added);
  973. kfree(removed);
  974. }
  975. /*
  976. * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t *
  977. * Assume's h->devlock is held.
  978. */
  979. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  980. int bus, int target, int lun)
  981. {
  982. int i;
  983. struct hpsa_scsi_dev_t *sd;
  984. for (i = 0; i < h->ndevices; i++) {
  985. sd = h->dev[i];
  986. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  987. return sd;
  988. }
  989. return NULL;
  990. }
  991. /* link sdev->hostdata to our per-device structure. */
  992. static int hpsa_slave_alloc(struct scsi_device *sdev)
  993. {
  994. struct hpsa_scsi_dev_t *sd;
  995. unsigned long flags;
  996. struct ctlr_info *h;
  997. h = sdev_to_hba(sdev);
  998. spin_lock_irqsave(&h->devlock, flags);
  999. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  1000. sdev_id(sdev), sdev->lun);
  1001. if (sd != NULL)
  1002. sdev->hostdata = sd;
  1003. spin_unlock_irqrestore(&h->devlock, flags);
  1004. return 0;
  1005. }
  1006. static void hpsa_slave_destroy(struct scsi_device *sdev)
  1007. {
  1008. /* nothing to do. */
  1009. }
  1010. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  1011. {
  1012. int i;
  1013. if (!h->cmd_sg_list)
  1014. return;
  1015. for (i = 0; i < h->nr_cmds; i++) {
  1016. kfree(h->cmd_sg_list[i]);
  1017. h->cmd_sg_list[i] = NULL;
  1018. }
  1019. kfree(h->cmd_sg_list);
  1020. h->cmd_sg_list = NULL;
  1021. }
  1022. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  1023. {
  1024. int i;
  1025. if (h->chainsize <= 0)
  1026. return 0;
  1027. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  1028. GFP_KERNEL);
  1029. if (!h->cmd_sg_list)
  1030. return -ENOMEM;
  1031. for (i = 0; i < h->nr_cmds; i++) {
  1032. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  1033. h->chainsize, GFP_KERNEL);
  1034. if (!h->cmd_sg_list[i])
  1035. goto clean;
  1036. }
  1037. return 0;
  1038. clean:
  1039. hpsa_free_sg_chain_blocks(h);
  1040. return -ENOMEM;
  1041. }
  1042. static int hpsa_map_sg_chain_block(struct ctlr_info *h,
  1043. struct CommandList *c)
  1044. {
  1045. struct SGDescriptor *chain_sg, *chain_block;
  1046. u64 temp64;
  1047. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1048. chain_block = h->cmd_sg_list[c->cmdindex];
  1049. chain_sg->Ext = HPSA_SG_CHAIN;
  1050. chain_sg->Len = sizeof(*chain_sg) *
  1051. (c->Header.SGTotal - h->max_cmd_sg_entries);
  1052. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  1053. PCI_DMA_TODEVICE);
  1054. if (dma_mapping_error(&h->pdev->dev, temp64)) {
  1055. /* prevent subsequent unmapping */
  1056. chain_sg->Addr.lower = 0;
  1057. chain_sg->Addr.upper = 0;
  1058. return -1;
  1059. }
  1060. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  1061. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  1062. return 0;
  1063. }
  1064. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  1065. struct CommandList *c)
  1066. {
  1067. struct SGDescriptor *chain_sg;
  1068. union u64bit temp64;
  1069. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  1070. return;
  1071. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  1072. temp64.val32.lower = chain_sg->Addr.lower;
  1073. temp64.val32.upper = chain_sg->Addr.upper;
  1074. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  1075. }
  1076. static void complete_scsi_command(struct CommandList *cp)
  1077. {
  1078. struct scsi_cmnd *cmd;
  1079. struct ctlr_info *h;
  1080. struct ErrorInfo *ei;
  1081. unsigned char sense_key;
  1082. unsigned char asc; /* additional sense code */
  1083. unsigned char ascq; /* additional sense code qualifier */
  1084. unsigned long sense_data_size;
  1085. ei = cp->err_info;
  1086. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  1087. h = cp->h;
  1088. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  1089. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  1090. hpsa_unmap_sg_chain_block(h, cp);
  1091. cmd->result = (DID_OK << 16); /* host byte */
  1092. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  1093. cmd->result |= ei->ScsiStatus;
  1094. /* copy the sense data whether we need to or not. */
  1095. if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
  1096. sense_data_size = SCSI_SENSE_BUFFERSIZE;
  1097. else
  1098. sense_data_size = sizeof(ei->SenseInfo);
  1099. if (ei->SenseLen < sense_data_size)
  1100. sense_data_size = ei->SenseLen;
  1101. memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
  1102. scsi_set_resid(cmd, ei->ResidualCnt);
  1103. if (ei->CommandStatus == 0) {
  1104. cmd_free(h, cp);
  1105. cmd->scsi_done(cmd);
  1106. return;
  1107. }
  1108. /* an error has occurred */
  1109. switch (ei->CommandStatus) {
  1110. case CMD_TARGET_STATUS:
  1111. if (ei->ScsiStatus) {
  1112. /* Get sense key */
  1113. sense_key = 0xf & ei->SenseInfo[2];
  1114. /* Get additional sense code */
  1115. asc = ei->SenseInfo[12];
  1116. /* Get addition sense code qualifier */
  1117. ascq = ei->SenseInfo[13];
  1118. }
  1119. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  1120. if (check_for_unit_attention(h, cp)) {
  1121. cmd->result = DID_SOFT_ERROR << 16;
  1122. break;
  1123. }
  1124. if (sense_key == ILLEGAL_REQUEST) {
  1125. /*
  1126. * SCSI REPORT_LUNS is commonly unsupported on
  1127. * Smart Array. Suppress noisy complaint.
  1128. */
  1129. if (cp->Request.CDB[0] == REPORT_LUNS)
  1130. break;
  1131. /* If ASC/ASCQ indicate Logical Unit
  1132. * Not Supported condition,
  1133. */
  1134. if ((asc == 0x25) && (ascq == 0x0)) {
  1135. dev_warn(&h->pdev->dev, "cp %p "
  1136. "has check condition\n", cp);
  1137. break;
  1138. }
  1139. }
  1140. if (sense_key == NOT_READY) {
  1141. /* If Sense is Not Ready, Logical Unit
  1142. * Not ready, Manual Intervention
  1143. * required
  1144. */
  1145. if ((asc == 0x04) && (ascq == 0x03)) {
  1146. dev_warn(&h->pdev->dev, "cp %p "
  1147. "has check condition: unit "
  1148. "not ready, manual "
  1149. "intervention required\n", cp);
  1150. break;
  1151. }
  1152. }
  1153. if (sense_key == ABORTED_COMMAND) {
  1154. /* Aborted command is retryable */
  1155. dev_warn(&h->pdev->dev, "cp %p "
  1156. "has check condition: aborted command: "
  1157. "ASC: 0x%x, ASCQ: 0x%x\n",
  1158. cp, asc, ascq);
  1159. cmd->result = DID_SOFT_ERROR << 16;
  1160. break;
  1161. }
  1162. /* Must be some other type of check condition */
  1163. dev_dbg(&h->pdev->dev, "cp %p has check condition: "
  1164. "unknown type: "
  1165. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1166. "Returning result: 0x%x, "
  1167. "cmd=[%02x %02x %02x %02x %02x "
  1168. "%02x %02x %02x %02x %02x %02x "
  1169. "%02x %02x %02x %02x %02x]\n",
  1170. cp, sense_key, asc, ascq,
  1171. cmd->result,
  1172. cmd->cmnd[0], cmd->cmnd[1],
  1173. cmd->cmnd[2], cmd->cmnd[3],
  1174. cmd->cmnd[4], cmd->cmnd[5],
  1175. cmd->cmnd[6], cmd->cmnd[7],
  1176. cmd->cmnd[8], cmd->cmnd[9],
  1177. cmd->cmnd[10], cmd->cmnd[11],
  1178. cmd->cmnd[12], cmd->cmnd[13],
  1179. cmd->cmnd[14], cmd->cmnd[15]);
  1180. break;
  1181. }
  1182. /* Problem was not a check condition
  1183. * Pass it up to the upper layers...
  1184. */
  1185. if (ei->ScsiStatus) {
  1186. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  1187. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  1188. "Returning result: 0x%x\n",
  1189. cp, ei->ScsiStatus,
  1190. sense_key, asc, ascq,
  1191. cmd->result);
  1192. } else { /* scsi status is zero??? How??? */
  1193. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  1194. "Returning no connection.\n", cp),
  1195. /* Ordinarily, this case should never happen,
  1196. * but there is a bug in some released firmware
  1197. * revisions that allows it to happen if, for
  1198. * example, a 4100 backplane loses power and
  1199. * the tape drive is in it. We assume that
  1200. * it's a fatal error of some kind because we
  1201. * can't show that it wasn't. We will make it
  1202. * look like selection timeout since that is
  1203. * the most common reason for this to occur,
  1204. * and it's severe enough.
  1205. */
  1206. cmd->result = DID_NO_CONNECT << 16;
  1207. }
  1208. break;
  1209. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1210. break;
  1211. case CMD_DATA_OVERRUN:
  1212. dev_warn(&h->pdev->dev, "cp %p has"
  1213. " completed with data overrun "
  1214. "reported\n", cp);
  1215. break;
  1216. case CMD_INVALID: {
  1217. /* print_bytes(cp, sizeof(*cp), 1, 0);
  1218. print_cmd(cp); */
  1219. /* We get CMD_INVALID if you address a non-existent device
  1220. * instead of a selection timeout (no response). You will
  1221. * see this if you yank out a drive, then try to access it.
  1222. * This is kind of a shame because it means that any other
  1223. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1224. * missing target. */
  1225. cmd->result = DID_NO_CONNECT << 16;
  1226. }
  1227. break;
  1228. case CMD_PROTOCOL_ERR:
  1229. cmd->result = DID_ERROR << 16;
  1230. dev_warn(&h->pdev->dev, "cp %p has "
  1231. "protocol error\n", cp);
  1232. break;
  1233. case CMD_HARDWARE_ERR:
  1234. cmd->result = DID_ERROR << 16;
  1235. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1236. break;
  1237. case CMD_CONNECTION_LOST:
  1238. cmd->result = DID_ERROR << 16;
  1239. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1240. break;
  1241. case CMD_ABORTED:
  1242. cmd->result = DID_ABORT << 16;
  1243. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1244. cp, ei->ScsiStatus);
  1245. break;
  1246. case CMD_ABORT_FAILED:
  1247. cmd->result = DID_ERROR << 16;
  1248. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1249. break;
  1250. case CMD_UNSOLICITED_ABORT:
  1251. cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
  1252. dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
  1253. "abort\n", cp);
  1254. break;
  1255. case CMD_TIMEOUT:
  1256. cmd->result = DID_TIME_OUT << 16;
  1257. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1258. break;
  1259. case CMD_UNABORTABLE:
  1260. cmd->result = DID_ERROR << 16;
  1261. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1262. break;
  1263. default:
  1264. cmd->result = DID_ERROR << 16;
  1265. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1266. cp, ei->CommandStatus);
  1267. }
  1268. cmd_free(h, cp);
  1269. cmd->scsi_done(cmd);
  1270. }
  1271. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1272. struct CommandList *c, int sg_used, int data_direction)
  1273. {
  1274. int i;
  1275. union u64bit addr64;
  1276. for (i = 0; i < sg_used; i++) {
  1277. addr64.val32.lower = c->SG[i].Addr.lower;
  1278. addr64.val32.upper = c->SG[i].Addr.upper;
  1279. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1280. data_direction);
  1281. }
  1282. }
  1283. static int hpsa_map_one(struct pci_dev *pdev,
  1284. struct CommandList *cp,
  1285. unsigned char *buf,
  1286. size_t buflen,
  1287. int data_direction)
  1288. {
  1289. u64 addr64;
  1290. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1291. cp->Header.SGList = 0;
  1292. cp->Header.SGTotal = 0;
  1293. return 0;
  1294. }
  1295. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1296. if (dma_mapping_error(&pdev->dev, addr64)) {
  1297. /* Prevent subsequent unmap of something never mapped */
  1298. cp->Header.SGList = 0;
  1299. cp->Header.SGTotal = 0;
  1300. return -1;
  1301. }
  1302. cp->SG[0].Addr.lower =
  1303. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1304. cp->SG[0].Addr.upper =
  1305. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1306. cp->SG[0].Len = buflen;
  1307. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1308. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1309. return 0;
  1310. }
  1311. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1312. struct CommandList *c)
  1313. {
  1314. DECLARE_COMPLETION_ONSTACK(wait);
  1315. c->waiting = &wait;
  1316. enqueue_cmd_and_start_io(h, c);
  1317. wait_for_completion(&wait);
  1318. }
  1319. static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
  1320. struct CommandList *c)
  1321. {
  1322. unsigned long flags;
  1323. /* If controller lockup detected, fake a hardware error. */
  1324. spin_lock_irqsave(&h->lock, flags);
  1325. if (unlikely(h->lockup_detected)) {
  1326. spin_unlock_irqrestore(&h->lock, flags);
  1327. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  1328. } else {
  1329. spin_unlock_irqrestore(&h->lock, flags);
  1330. hpsa_scsi_do_simple_cmd_core(h, c);
  1331. }
  1332. }
  1333. #define MAX_DRIVER_CMD_RETRIES 25
  1334. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1335. struct CommandList *c, int data_direction)
  1336. {
  1337. int backoff_time = 10, retry_count = 0;
  1338. do {
  1339. memset(c->err_info, 0, sizeof(*c->err_info));
  1340. hpsa_scsi_do_simple_cmd_core(h, c);
  1341. retry_count++;
  1342. if (retry_count > 3) {
  1343. msleep(backoff_time);
  1344. if (backoff_time < 1000)
  1345. backoff_time *= 2;
  1346. }
  1347. } while ((check_for_unit_attention(h, c) ||
  1348. check_for_busy(h, c)) &&
  1349. retry_count <= MAX_DRIVER_CMD_RETRIES);
  1350. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1351. }
  1352. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1353. {
  1354. struct ErrorInfo *ei;
  1355. struct device *d = &cp->h->pdev->dev;
  1356. ei = cp->err_info;
  1357. switch (ei->CommandStatus) {
  1358. case CMD_TARGET_STATUS:
  1359. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1360. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1361. ei->ScsiStatus);
  1362. if (ei->ScsiStatus == 0)
  1363. dev_warn(d, "SCSI status is abnormally zero. "
  1364. "(probably indicates selection timeout "
  1365. "reported incorrectly due to a known "
  1366. "firmware bug, circa July, 2001.)\n");
  1367. break;
  1368. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1369. dev_info(d, "UNDERRUN\n");
  1370. break;
  1371. case CMD_DATA_OVERRUN:
  1372. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1373. break;
  1374. case CMD_INVALID: {
  1375. /* controller unfortunately reports SCSI passthru's
  1376. * to non-existent targets as invalid commands.
  1377. */
  1378. dev_warn(d, "cp %p is reported invalid (probably means "
  1379. "target device no longer present)\n", cp);
  1380. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1381. print_cmd(cp); */
  1382. }
  1383. break;
  1384. case CMD_PROTOCOL_ERR:
  1385. dev_warn(d, "cp %p has protocol error \n", cp);
  1386. break;
  1387. case CMD_HARDWARE_ERR:
  1388. /* cmd->result = DID_ERROR << 16; */
  1389. dev_warn(d, "cp %p had hardware error\n", cp);
  1390. break;
  1391. case CMD_CONNECTION_LOST:
  1392. dev_warn(d, "cp %p had connection lost\n", cp);
  1393. break;
  1394. case CMD_ABORTED:
  1395. dev_warn(d, "cp %p was aborted\n", cp);
  1396. break;
  1397. case CMD_ABORT_FAILED:
  1398. dev_warn(d, "cp %p reports abort failed\n", cp);
  1399. break;
  1400. case CMD_UNSOLICITED_ABORT:
  1401. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1402. break;
  1403. case CMD_TIMEOUT:
  1404. dev_warn(d, "cp %p timed out\n", cp);
  1405. break;
  1406. case CMD_UNABORTABLE:
  1407. dev_warn(d, "Command unabortable\n");
  1408. break;
  1409. default:
  1410. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1411. ei->CommandStatus);
  1412. }
  1413. }
  1414. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1415. unsigned char page, unsigned char *buf,
  1416. unsigned char bufsize)
  1417. {
  1418. int rc = IO_OK;
  1419. struct CommandList *c;
  1420. struct ErrorInfo *ei;
  1421. c = cmd_special_alloc(h);
  1422. if (c == NULL) { /* trouble... */
  1423. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1424. return -ENOMEM;
  1425. }
  1426. if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize,
  1427. page, scsi3addr, TYPE_CMD)) {
  1428. rc = -1;
  1429. goto out;
  1430. }
  1431. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1432. ei = c->err_info;
  1433. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1434. hpsa_scsi_interpret_error(c);
  1435. rc = -1;
  1436. }
  1437. out:
  1438. cmd_special_free(h, c);
  1439. return rc;
  1440. }
  1441. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1442. {
  1443. int rc = IO_OK;
  1444. struct CommandList *c;
  1445. struct ErrorInfo *ei;
  1446. c = cmd_special_alloc(h);
  1447. if (c == NULL) { /* trouble... */
  1448. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1449. return -ENOMEM;
  1450. }
  1451. /* fill_cmd can't fail here, no data buffer to map. */
  1452. (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h,
  1453. NULL, 0, 0, scsi3addr, TYPE_MSG);
  1454. hpsa_scsi_do_simple_cmd_core(h, c);
  1455. /* no unmap needed here because no data xfer. */
  1456. ei = c->err_info;
  1457. if (ei->CommandStatus != 0) {
  1458. hpsa_scsi_interpret_error(c);
  1459. rc = -1;
  1460. }
  1461. cmd_special_free(h, c);
  1462. return rc;
  1463. }
  1464. static void hpsa_get_raid_level(struct ctlr_info *h,
  1465. unsigned char *scsi3addr, unsigned char *raid_level)
  1466. {
  1467. int rc;
  1468. unsigned char *buf;
  1469. *raid_level = RAID_UNKNOWN;
  1470. buf = kzalloc(64, GFP_KERNEL);
  1471. if (!buf)
  1472. return;
  1473. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1474. if (rc == 0)
  1475. *raid_level = buf[8];
  1476. if (*raid_level > RAID_UNKNOWN)
  1477. *raid_level = RAID_UNKNOWN;
  1478. kfree(buf);
  1479. return;
  1480. }
  1481. /* Get the device id from inquiry page 0x83 */
  1482. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1483. unsigned char *device_id, int buflen)
  1484. {
  1485. int rc;
  1486. unsigned char *buf;
  1487. if (buflen > 16)
  1488. buflen = 16;
  1489. buf = kzalloc(64, GFP_KERNEL);
  1490. if (!buf)
  1491. return -1;
  1492. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1493. if (rc == 0)
  1494. memcpy(device_id, &buf[8], buflen);
  1495. kfree(buf);
  1496. return rc != 0;
  1497. }
  1498. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1499. struct ReportLUNdata *buf, int bufsize,
  1500. int extended_response)
  1501. {
  1502. int rc = IO_OK;
  1503. struct CommandList *c;
  1504. unsigned char scsi3addr[8];
  1505. struct ErrorInfo *ei;
  1506. c = cmd_special_alloc(h);
  1507. if (c == NULL) { /* trouble... */
  1508. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1509. return -1;
  1510. }
  1511. /* address the controller */
  1512. memset(scsi3addr, 0, sizeof(scsi3addr));
  1513. if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1514. buf, bufsize, 0, scsi3addr, TYPE_CMD)) {
  1515. rc = -1;
  1516. goto out;
  1517. }
  1518. if (extended_response)
  1519. c->Request.CDB[1] = extended_response;
  1520. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1521. ei = c->err_info;
  1522. if (ei->CommandStatus != 0 &&
  1523. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1524. hpsa_scsi_interpret_error(c);
  1525. rc = -1;
  1526. }
  1527. out:
  1528. cmd_special_free(h, c);
  1529. return rc;
  1530. }
  1531. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1532. struct ReportLUNdata *buf,
  1533. int bufsize, int extended_response)
  1534. {
  1535. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1536. }
  1537. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1538. struct ReportLUNdata *buf, int bufsize)
  1539. {
  1540. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1541. }
  1542. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1543. int bus, int target, int lun)
  1544. {
  1545. device->bus = bus;
  1546. device->target = target;
  1547. device->lun = lun;
  1548. }
  1549. static int hpsa_update_device_info(struct ctlr_info *h,
  1550. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
  1551. unsigned char *is_OBDR_device)
  1552. {
  1553. #define OBDR_SIG_OFFSET 43
  1554. #define OBDR_TAPE_SIG "$DR-10"
  1555. #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
  1556. #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
  1557. unsigned char *inq_buff;
  1558. unsigned char *obdr_sig;
  1559. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1560. if (!inq_buff)
  1561. goto bail_out;
  1562. /* Do an inquiry to the device to see what it is. */
  1563. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1564. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1565. /* Inquiry failed (msg printed already) */
  1566. dev_err(&h->pdev->dev,
  1567. "hpsa_update_device_info: inquiry failed\n");
  1568. goto bail_out;
  1569. }
  1570. this_device->devtype = (inq_buff[0] & 0x1f);
  1571. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1572. memcpy(this_device->vendor, &inq_buff[8],
  1573. sizeof(this_device->vendor));
  1574. memcpy(this_device->model, &inq_buff[16],
  1575. sizeof(this_device->model));
  1576. memset(this_device->device_id, 0,
  1577. sizeof(this_device->device_id));
  1578. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1579. sizeof(this_device->device_id));
  1580. if (this_device->devtype == TYPE_DISK &&
  1581. is_logical_dev_addr_mode(scsi3addr))
  1582. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1583. else
  1584. this_device->raid_level = RAID_UNKNOWN;
  1585. if (is_OBDR_device) {
  1586. /* See if this is a One-Button-Disaster-Recovery device
  1587. * by looking for "$DR-10" at offset 43 in inquiry data.
  1588. */
  1589. obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
  1590. *is_OBDR_device = (this_device->devtype == TYPE_ROM &&
  1591. strncmp(obdr_sig, OBDR_TAPE_SIG,
  1592. OBDR_SIG_LEN) == 0);
  1593. }
  1594. kfree(inq_buff);
  1595. return 0;
  1596. bail_out:
  1597. kfree(inq_buff);
  1598. return 1;
  1599. }
  1600. static unsigned char *ext_target_model[] = {
  1601. "MSA2012",
  1602. "MSA2024",
  1603. "MSA2312",
  1604. "MSA2324",
  1605. "P2000 G3 SAS",
  1606. NULL,
  1607. };
  1608. static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1609. {
  1610. int i;
  1611. for (i = 0; ext_target_model[i]; i++)
  1612. if (strncmp(device->model, ext_target_model[i],
  1613. strlen(ext_target_model[i])) == 0)
  1614. return 1;
  1615. return 0;
  1616. }
  1617. /* Helper function to assign bus, target, lun mapping of devices.
  1618. * Puts non-external target logical volumes on bus 0, external target logical
  1619. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1620. * Logical drive target and lun are assigned at this time, but
  1621. * physical device lun and target assignment are deferred (assigned
  1622. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1623. */
  1624. static void figure_bus_target_lun(struct ctlr_info *h,
  1625. u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
  1626. {
  1627. u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1628. if (!is_logical_dev_addr_mode(lunaddrbytes)) {
  1629. /* physical device, target and lun filled in later */
  1630. if (is_hba_lunid(lunaddrbytes))
  1631. hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
  1632. else
  1633. /* defer target, lun assignment for physical devices */
  1634. hpsa_set_bus_target_lun(device, 2, -1, -1);
  1635. return;
  1636. }
  1637. /* It's a logical device */
  1638. if (is_ext_target(h, device)) {
  1639. /* external target way, put logicals on bus 1
  1640. * and match target/lun numbers box
  1641. * reports, other smart array, bus 0, target 0, match lunid
  1642. */
  1643. hpsa_set_bus_target_lun(device,
  1644. 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
  1645. return;
  1646. }
  1647. hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
  1648. }
  1649. /*
  1650. * If there is no lun 0 on a target, linux won't find any devices.
  1651. * For the external targets (arrays), we have to manually detect the enclosure
  1652. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1653. * it for some reason. *tmpdevice is the target we're adding,
  1654. * this_device is a pointer into the current element of currentsd[]
  1655. * that we're building up in update_scsi_devices(), below.
  1656. * lunzerobits is a bitmap that tracks which targets already have a
  1657. * lun 0 assigned.
  1658. * Returns 1 if an enclosure was added, 0 if not.
  1659. */
  1660. static int add_ext_target_dev(struct ctlr_info *h,
  1661. struct hpsa_scsi_dev_t *tmpdevice,
  1662. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1663. unsigned long lunzerobits[], int *n_ext_target_devs)
  1664. {
  1665. unsigned char scsi3addr[8];
  1666. if (test_bit(tmpdevice->target, lunzerobits))
  1667. return 0; /* There is already a lun 0 on this target. */
  1668. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1669. return 0; /* It's the logical targets that may lack lun 0. */
  1670. if (!is_ext_target(h, tmpdevice))
  1671. return 0; /* Only external target devices have this problem. */
  1672. if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
  1673. return 0;
  1674. memset(scsi3addr, 0, 8);
  1675. scsi3addr[3] = tmpdevice->target;
  1676. if (is_hba_lunid(scsi3addr))
  1677. return 0; /* Don't add the RAID controller here. */
  1678. if (is_scsi_rev_5(h))
  1679. return 0; /* p1210m doesn't need to do this. */
  1680. if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
  1681. dev_warn(&h->pdev->dev, "Maximum number of external "
  1682. "target devices exceeded. Check your hardware "
  1683. "configuration.");
  1684. return 0;
  1685. }
  1686. if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
  1687. return 0;
  1688. (*n_ext_target_devs)++;
  1689. hpsa_set_bus_target_lun(this_device,
  1690. tmpdevice->bus, tmpdevice->target, 0);
  1691. set_bit(tmpdevice->target, lunzerobits);
  1692. return 1;
  1693. }
  1694. /*
  1695. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1696. * logdev. The number of luns in physdev and logdev are returned in
  1697. * *nphysicals and *nlogicals, respectively.
  1698. * Returns 0 on success, -1 otherwise.
  1699. */
  1700. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1701. int reportlunsize,
  1702. struct ReportLUNdata *physdev, u32 *nphysicals,
  1703. struct ReportLUNdata *logdev, u32 *nlogicals)
  1704. {
  1705. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1706. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1707. return -1;
  1708. }
  1709. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1710. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1711. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1712. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1713. *nphysicals - HPSA_MAX_PHYS_LUN);
  1714. *nphysicals = HPSA_MAX_PHYS_LUN;
  1715. }
  1716. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1717. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1718. return -1;
  1719. }
  1720. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1721. /* Reject Logicals in excess of our max capability. */
  1722. if (*nlogicals > HPSA_MAX_LUN) {
  1723. dev_warn(&h->pdev->dev,
  1724. "maximum logical LUNs (%d) exceeded. "
  1725. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1726. *nlogicals - HPSA_MAX_LUN);
  1727. *nlogicals = HPSA_MAX_LUN;
  1728. }
  1729. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1730. dev_warn(&h->pdev->dev,
  1731. "maximum logical + physical LUNs (%d) exceeded. "
  1732. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1733. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1734. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1735. }
  1736. return 0;
  1737. }
  1738. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1739. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1740. struct ReportLUNdata *logdev_list)
  1741. {
  1742. /* Helper function, figure out where the LUN ID info is coming from
  1743. * given index i, lists of physical and logical devices, where in
  1744. * the list the raid controller is supposed to appear (first or last)
  1745. */
  1746. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1747. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1748. if (i == raid_ctlr_position)
  1749. return RAID_CTLR_LUNID;
  1750. if (i < logicals_start)
  1751. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1752. if (i < last_device)
  1753. return &logdev_list->LUN[i - nphysicals -
  1754. (raid_ctlr_position == 0)][0];
  1755. BUG();
  1756. return NULL;
  1757. }
  1758. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1759. {
  1760. /* the idea here is we could get notified
  1761. * that some devices have changed, so we do a report
  1762. * physical luns and report logical luns cmd, and adjust
  1763. * our list of devices accordingly.
  1764. *
  1765. * The scsi3addr's of devices won't change so long as the
  1766. * adapter is not reset. That means we can rescan and
  1767. * tell which devices we already know about, vs. new
  1768. * devices, vs. disappearing devices.
  1769. */
  1770. struct ReportLUNdata *physdev_list = NULL;
  1771. struct ReportLUNdata *logdev_list = NULL;
  1772. u32 nphysicals = 0;
  1773. u32 nlogicals = 0;
  1774. u32 ndev_allocated = 0;
  1775. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1776. int ncurrent = 0;
  1777. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1778. int i, n_ext_target_devs, ndevs_to_allocate;
  1779. int raid_ctlr_position;
  1780. DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
  1781. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
  1782. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1783. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1784. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1785. if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
  1786. dev_err(&h->pdev->dev, "out of memory\n");
  1787. goto out;
  1788. }
  1789. memset(lunzerobits, 0, sizeof(lunzerobits));
  1790. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1791. logdev_list, &nlogicals))
  1792. goto out;
  1793. /* We might see up to the maximum number of logical and physical disks
  1794. * plus external target devices, and a device for the local RAID
  1795. * controller.
  1796. */
  1797. ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
  1798. /* Allocate the per device structures */
  1799. for (i = 0; i < ndevs_to_allocate; i++) {
  1800. if (i >= HPSA_MAX_DEVICES) {
  1801. dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
  1802. " %d devices ignored.\n", HPSA_MAX_DEVICES,
  1803. ndevs_to_allocate - HPSA_MAX_DEVICES);
  1804. break;
  1805. }
  1806. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1807. if (!currentsd[i]) {
  1808. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1809. __FILE__, __LINE__);
  1810. goto out;
  1811. }
  1812. ndev_allocated++;
  1813. }
  1814. if (unlikely(is_scsi_rev_5(h)))
  1815. raid_ctlr_position = 0;
  1816. else
  1817. raid_ctlr_position = nphysicals + nlogicals;
  1818. /* adjust our table of devices */
  1819. n_ext_target_devs = 0;
  1820. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1821. u8 *lunaddrbytes, is_OBDR = 0;
  1822. /* Figure out where the LUN ID info is coming from */
  1823. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1824. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1825. /* skip masked physical devices. */
  1826. if (lunaddrbytes[3] & 0xC0 &&
  1827. i < nphysicals + (raid_ctlr_position == 0))
  1828. continue;
  1829. /* Get device type, vendor, model, device id */
  1830. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
  1831. &is_OBDR))
  1832. continue; /* skip it if we can't talk to it. */
  1833. figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
  1834. this_device = currentsd[ncurrent];
  1835. /*
  1836. * For external target devices, we have to insert a LUN 0 which
  1837. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1838. * is nonetheless an enclosure device there. We have to
  1839. * present that otherwise linux won't find anything if
  1840. * there is no lun 0.
  1841. */
  1842. if (add_ext_target_dev(h, tmpdevice, this_device,
  1843. lunaddrbytes, lunzerobits,
  1844. &n_ext_target_devs)) {
  1845. ncurrent++;
  1846. this_device = currentsd[ncurrent];
  1847. }
  1848. *this_device = *tmpdevice;
  1849. switch (this_device->devtype) {
  1850. case TYPE_ROM:
  1851. /* We don't *really* support actual CD-ROM devices,
  1852. * just "One Button Disaster Recovery" tape drive
  1853. * which temporarily pretends to be a CD-ROM drive.
  1854. * So we check that the device is really an OBDR tape
  1855. * device by checking for "$DR-10" in bytes 43-48 of
  1856. * the inquiry data.
  1857. */
  1858. if (is_OBDR)
  1859. ncurrent++;
  1860. break;
  1861. case TYPE_DISK:
  1862. if (i < nphysicals)
  1863. break;
  1864. ncurrent++;
  1865. break;
  1866. case TYPE_TAPE:
  1867. case TYPE_MEDIUM_CHANGER:
  1868. ncurrent++;
  1869. break;
  1870. case TYPE_RAID:
  1871. /* Only present the Smartarray HBA as a RAID controller.
  1872. * If it's a RAID controller other than the HBA itself
  1873. * (an external RAID controller, MSA500 or similar)
  1874. * don't present it.
  1875. */
  1876. if (!is_hba_lunid(lunaddrbytes))
  1877. break;
  1878. ncurrent++;
  1879. break;
  1880. default:
  1881. break;
  1882. }
  1883. if (ncurrent >= HPSA_MAX_DEVICES)
  1884. break;
  1885. }
  1886. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1887. out:
  1888. kfree(tmpdevice);
  1889. for (i = 0; i < ndev_allocated; i++)
  1890. kfree(currentsd[i]);
  1891. kfree(currentsd);
  1892. kfree(physdev_list);
  1893. kfree(logdev_list);
  1894. }
  1895. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1896. * dma mapping and fills in the scatter gather entries of the
  1897. * hpsa command, cp.
  1898. */
  1899. static int hpsa_scatter_gather(struct ctlr_info *h,
  1900. struct CommandList *cp,
  1901. struct scsi_cmnd *cmd)
  1902. {
  1903. unsigned int len;
  1904. struct scatterlist *sg;
  1905. u64 addr64;
  1906. int use_sg, i, sg_index, chained;
  1907. struct SGDescriptor *curr_sg;
  1908. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1909. use_sg = scsi_dma_map(cmd);
  1910. if (use_sg < 0)
  1911. return use_sg;
  1912. if (!use_sg)
  1913. goto sglist_finished;
  1914. curr_sg = cp->SG;
  1915. chained = 0;
  1916. sg_index = 0;
  1917. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1918. if (i == h->max_cmd_sg_entries - 1 &&
  1919. use_sg > h->max_cmd_sg_entries) {
  1920. chained = 1;
  1921. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1922. sg_index = 0;
  1923. }
  1924. addr64 = (u64) sg_dma_address(sg);
  1925. len = sg_dma_len(sg);
  1926. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1927. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1928. curr_sg->Len = len;
  1929. curr_sg->Ext = 0; /* we are not chaining */
  1930. curr_sg++;
  1931. }
  1932. if (use_sg + chained > h->maxSG)
  1933. h->maxSG = use_sg + chained;
  1934. if (chained) {
  1935. cp->Header.SGList = h->max_cmd_sg_entries;
  1936. cp->Header.SGTotal = (u16) (use_sg + 1);
  1937. if (hpsa_map_sg_chain_block(h, cp)) {
  1938. scsi_dma_unmap(cmd);
  1939. return -1;
  1940. }
  1941. return 0;
  1942. }
  1943. sglist_finished:
  1944. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1945. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1946. return 0;
  1947. }
  1948. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1949. void (*done)(struct scsi_cmnd *))
  1950. {
  1951. struct ctlr_info *h;
  1952. struct hpsa_scsi_dev_t *dev;
  1953. unsigned char scsi3addr[8];
  1954. struct CommandList *c;
  1955. unsigned long flags;
  1956. /* Get the ptr to our adapter structure out of cmd->host. */
  1957. h = sdev_to_hba(cmd->device);
  1958. dev = cmd->device->hostdata;
  1959. if (!dev) {
  1960. cmd->result = DID_NO_CONNECT << 16;
  1961. done(cmd);
  1962. return 0;
  1963. }
  1964. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1965. spin_lock_irqsave(&h->lock, flags);
  1966. if (unlikely(h->lockup_detected)) {
  1967. spin_unlock_irqrestore(&h->lock, flags);
  1968. cmd->result = DID_ERROR << 16;
  1969. done(cmd);
  1970. return 0;
  1971. }
  1972. spin_unlock_irqrestore(&h->lock, flags);
  1973. c = cmd_alloc(h);
  1974. if (c == NULL) { /* trouble... */
  1975. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1976. return SCSI_MLQUEUE_HOST_BUSY;
  1977. }
  1978. /* Fill in the command list header */
  1979. cmd->scsi_done = done; /* save this for use by completion code */
  1980. /* save c in case we have to abort it */
  1981. cmd->host_scribble = (unsigned char *) c;
  1982. c->cmd_type = CMD_SCSI;
  1983. c->scsi_cmd = cmd;
  1984. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1985. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1986. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1987. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1988. /* Fill in the request block... */
  1989. c->Request.Timeout = 0;
  1990. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1991. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1992. c->Request.CDBLen = cmd->cmd_len;
  1993. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1994. c->Request.Type.Type = TYPE_CMD;
  1995. c->Request.Type.Attribute = ATTR_SIMPLE;
  1996. switch (cmd->sc_data_direction) {
  1997. case DMA_TO_DEVICE:
  1998. c->Request.Type.Direction = XFER_WRITE;
  1999. break;
  2000. case DMA_FROM_DEVICE:
  2001. c->Request.Type.Direction = XFER_READ;
  2002. break;
  2003. case DMA_NONE:
  2004. c->Request.Type.Direction = XFER_NONE;
  2005. break;
  2006. case DMA_BIDIRECTIONAL:
  2007. /* This can happen if a buggy application does a scsi passthru
  2008. * and sets both inlen and outlen to non-zero. ( see
  2009. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  2010. */
  2011. c->Request.Type.Direction = XFER_RSVD;
  2012. /* This is technically wrong, and hpsa controllers should
  2013. * reject it with CMD_INVALID, which is the most correct
  2014. * response, but non-fibre backends appear to let it
  2015. * slide by, and give the same results as if this field
  2016. * were set correctly. Either way is acceptable for
  2017. * our purposes here.
  2018. */
  2019. break;
  2020. default:
  2021. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  2022. cmd->sc_data_direction);
  2023. BUG();
  2024. break;
  2025. }
  2026. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  2027. cmd_free(h, c);
  2028. return SCSI_MLQUEUE_HOST_BUSY;
  2029. }
  2030. enqueue_cmd_and_start_io(h, c);
  2031. /* the cmd'll come back via intr handler in complete_scsi_command() */
  2032. return 0;
  2033. }
  2034. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  2035. static void hpsa_scan_start(struct Scsi_Host *sh)
  2036. {
  2037. struct ctlr_info *h = shost_to_hba(sh);
  2038. unsigned long flags;
  2039. /* wait until any scan already in progress is finished. */
  2040. while (1) {
  2041. spin_lock_irqsave(&h->scan_lock, flags);
  2042. if (h->scan_finished)
  2043. break;
  2044. spin_unlock_irqrestore(&h->scan_lock, flags);
  2045. wait_event(h->scan_wait_queue, h->scan_finished);
  2046. /* Note: We don't need to worry about a race between this
  2047. * thread and driver unload because the midlayer will
  2048. * have incremented the reference count, so unload won't
  2049. * happen if we're in here.
  2050. */
  2051. }
  2052. h->scan_finished = 0; /* mark scan as in progress */
  2053. spin_unlock_irqrestore(&h->scan_lock, flags);
  2054. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  2055. spin_lock_irqsave(&h->scan_lock, flags);
  2056. h->scan_finished = 1; /* mark scan as finished. */
  2057. wake_up_all(&h->scan_wait_queue);
  2058. spin_unlock_irqrestore(&h->scan_lock, flags);
  2059. }
  2060. static int hpsa_scan_finished(struct Scsi_Host *sh,
  2061. unsigned long elapsed_time)
  2062. {
  2063. struct ctlr_info *h = shost_to_hba(sh);
  2064. unsigned long flags;
  2065. int finished;
  2066. spin_lock_irqsave(&h->scan_lock, flags);
  2067. finished = h->scan_finished;
  2068. spin_unlock_irqrestore(&h->scan_lock, flags);
  2069. return finished;
  2070. }
  2071. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  2072. int qdepth, int reason)
  2073. {
  2074. struct ctlr_info *h = sdev_to_hba(sdev);
  2075. if (reason != SCSI_QDEPTH_DEFAULT)
  2076. return -ENOTSUPP;
  2077. if (qdepth < 1)
  2078. qdepth = 1;
  2079. else
  2080. if (qdepth > h->nr_cmds)
  2081. qdepth = h->nr_cmds;
  2082. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  2083. return sdev->queue_depth;
  2084. }
  2085. static void hpsa_unregister_scsi(struct ctlr_info *h)
  2086. {
  2087. /* we are being forcibly unloaded, and may not refuse. */
  2088. scsi_remove_host(h->scsi_host);
  2089. scsi_host_put(h->scsi_host);
  2090. h->scsi_host = NULL;
  2091. }
  2092. static int hpsa_register_scsi(struct ctlr_info *h)
  2093. {
  2094. struct Scsi_Host *sh;
  2095. int error;
  2096. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  2097. if (sh == NULL)
  2098. goto fail;
  2099. sh->io_port = 0;
  2100. sh->n_io_port = 0;
  2101. sh->this_id = -1;
  2102. sh->max_channel = 3;
  2103. sh->max_cmd_len = MAX_COMMAND_SIZE;
  2104. sh->max_lun = HPSA_MAX_LUN;
  2105. sh->max_id = HPSA_MAX_LUN;
  2106. sh->can_queue = h->nr_cmds;
  2107. sh->cmd_per_lun = h->nr_cmds;
  2108. sh->sg_tablesize = h->maxsgentries;
  2109. h->scsi_host = sh;
  2110. sh->hostdata[0] = (unsigned long) h;
  2111. sh->irq = h->intr[h->intr_mode];
  2112. sh->unique_id = sh->irq;
  2113. error = scsi_add_host(sh, &h->pdev->dev);
  2114. if (error)
  2115. goto fail_host_put;
  2116. scsi_scan_host(sh);
  2117. return 0;
  2118. fail_host_put:
  2119. dev_err(&h->pdev->dev, "%s: scsi_add_host"
  2120. " failed for controller %d\n", __func__, h->ctlr);
  2121. scsi_host_put(sh);
  2122. return error;
  2123. fail:
  2124. dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
  2125. " failed for controller %d\n", __func__, h->ctlr);
  2126. return -ENOMEM;
  2127. }
  2128. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  2129. unsigned char lunaddr[])
  2130. {
  2131. int rc = 0;
  2132. int count = 0;
  2133. int waittime = 1; /* seconds */
  2134. struct CommandList *c;
  2135. c = cmd_special_alloc(h);
  2136. if (!c) {
  2137. dev_warn(&h->pdev->dev, "out of memory in "
  2138. "wait_for_device_to_become_ready.\n");
  2139. return IO_ERROR;
  2140. }
  2141. /* Send test unit ready until device ready, or give up. */
  2142. while (count < HPSA_TUR_RETRY_LIMIT) {
  2143. /* Wait for a bit. do this first, because if we send
  2144. * the TUR right away, the reset will just abort it.
  2145. */
  2146. msleep(1000 * waittime);
  2147. count++;
  2148. /* Increase wait time with each try, up to a point. */
  2149. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  2150. waittime = waittime * 2;
  2151. /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */
  2152. (void) fill_cmd(c, TEST_UNIT_READY, h,
  2153. NULL, 0, 0, lunaddr, TYPE_CMD);
  2154. hpsa_scsi_do_simple_cmd_core(h, c);
  2155. /* no unmap needed here because no data xfer. */
  2156. if (c->err_info->CommandStatus == CMD_SUCCESS)
  2157. break;
  2158. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2159. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  2160. (c->err_info->SenseInfo[2] == NO_SENSE ||
  2161. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  2162. break;
  2163. dev_warn(&h->pdev->dev, "waiting %d secs "
  2164. "for device to become ready.\n", waittime);
  2165. rc = 1; /* device not ready. */
  2166. }
  2167. if (rc)
  2168. dev_warn(&h->pdev->dev, "giving up on device.\n");
  2169. else
  2170. dev_warn(&h->pdev->dev, "device is ready.\n");
  2171. cmd_special_free(h, c);
  2172. return rc;
  2173. }
  2174. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  2175. * complaining. Doing a host- or bus-reset can't do anything good here.
  2176. */
  2177. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  2178. {
  2179. int rc;
  2180. struct ctlr_info *h;
  2181. struct hpsa_scsi_dev_t *dev;
  2182. /* find the controller to which the command to be aborted was sent */
  2183. h = sdev_to_hba(scsicmd->device);
  2184. if (h == NULL) /* paranoia */
  2185. return FAILED;
  2186. dev = scsicmd->device->hostdata;
  2187. if (!dev) {
  2188. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  2189. "device lookup failed.\n");
  2190. return FAILED;
  2191. }
  2192. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  2193. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2194. /* send a reset to the SCSI LUN which the command was sent to */
  2195. rc = hpsa_send_reset(h, dev->scsi3addr);
  2196. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  2197. return SUCCESS;
  2198. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  2199. return FAILED;
  2200. }
  2201. static void swizzle_abort_tag(u8 *tag)
  2202. {
  2203. u8 original_tag[8];
  2204. memcpy(original_tag, tag, 8);
  2205. tag[0] = original_tag[3];
  2206. tag[1] = original_tag[2];
  2207. tag[2] = original_tag[1];
  2208. tag[3] = original_tag[0];
  2209. tag[4] = original_tag[7];
  2210. tag[5] = original_tag[6];
  2211. tag[6] = original_tag[5];
  2212. tag[7] = original_tag[4];
  2213. }
  2214. static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
  2215. struct CommandList *abort, int swizzle)
  2216. {
  2217. int rc = IO_OK;
  2218. struct CommandList *c;
  2219. struct ErrorInfo *ei;
  2220. c = cmd_special_alloc(h);
  2221. if (c == NULL) { /* trouble... */
  2222. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  2223. return -ENOMEM;
  2224. }
  2225. /* fill_cmd can't fail here, no buffer to map */
  2226. (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort,
  2227. 0, 0, scsi3addr, TYPE_MSG);
  2228. if (swizzle)
  2229. swizzle_abort_tag(&c->Request.CDB[4]);
  2230. hpsa_scsi_do_simple_cmd_core(h, c);
  2231. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
  2232. __func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
  2233. /* no unmap needed here because no data xfer. */
  2234. ei = c->err_info;
  2235. switch (ei->CommandStatus) {
  2236. case CMD_SUCCESS:
  2237. break;
  2238. case CMD_UNABORTABLE: /* Very common, don't make noise. */
  2239. rc = -1;
  2240. break;
  2241. default:
  2242. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
  2243. __func__, abort->Header.Tag.upper,
  2244. abort->Header.Tag.lower);
  2245. hpsa_scsi_interpret_error(c);
  2246. rc = -1;
  2247. break;
  2248. }
  2249. cmd_special_free(h, c);
  2250. dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
  2251. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2252. return rc;
  2253. }
  2254. /*
  2255. * hpsa_find_cmd_in_queue
  2256. *
  2257. * Used to determine whether a command (find) is still present
  2258. * in queue_head. Optionally excludes the last element of queue_head.
  2259. *
  2260. * This is used to avoid unnecessary aborts. Commands in h->reqQ have
  2261. * not yet been submitted, and so can be aborted by the driver without
  2262. * sending an abort to the hardware.
  2263. *
  2264. * Returns pointer to command if found in queue, NULL otherwise.
  2265. */
  2266. static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
  2267. struct scsi_cmnd *find, struct list_head *queue_head)
  2268. {
  2269. unsigned long flags;
  2270. struct CommandList *c = NULL; /* ptr into cmpQ */
  2271. if (!find)
  2272. return 0;
  2273. spin_lock_irqsave(&h->lock, flags);
  2274. list_for_each_entry(c, queue_head, list) {
  2275. if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
  2276. continue;
  2277. if (c->scsi_cmd == find) {
  2278. spin_unlock_irqrestore(&h->lock, flags);
  2279. return c;
  2280. }
  2281. }
  2282. spin_unlock_irqrestore(&h->lock, flags);
  2283. return NULL;
  2284. }
  2285. static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
  2286. u8 *tag, struct list_head *queue_head)
  2287. {
  2288. unsigned long flags;
  2289. struct CommandList *c;
  2290. spin_lock_irqsave(&h->lock, flags);
  2291. list_for_each_entry(c, queue_head, list) {
  2292. if (memcmp(&c->Header.Tag, tag, 8) != 0)
  2293. continue;
  2294. spin_unlock_irqrestore(&h->lock, flags);
  2295. return c;
  2296. }
  2297. spin_unlock_irqrestore(&h->lock, flags);
  2298. return NULL;
  2299. }
  2300. /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to
  2301. * tell which kind we're dealing with, so we send the abort both ways. There
  2302. * shouldn't be any collisions between swizzled and unswizzled tags due to the
  2303. * way we construct our tags but we check anyway in case the assumptions which
  2304. * make this true someday become false.
  2305. */
  2306. static int hpsa_send_abort_both_ways(struct ctlr_info *h,
  2307. unsigned char *scsi3addr, struct CommandList *abort)
  2308. {
  2309. u8 swizzled_tag[8];
  2310. struct CommandList *c;
  2311. int rc = 0, rc2 = 0;
  2312. /* we do not expect to find the swizzled tag in our queue, but
  2313. * check anyway just to be sure the assumptions which make this
  2314. * the case haven't become wrong.
  2315. */
  2316. memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
  2317. swizzle_abort_tag(swizzled_tag);
  2318. c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
  2319. if (c != NULL) {
  2320. dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
  2321. return hpsa_send_abort(h, scsi3addr, abort, 0);
  2322. }
  2323. rc = hpsa_send_abort(h, scsi3addr, abort, 0);
  2324. /* if the command is still in our queue, we can't conclude that it was
  2325. * aborted (it might have just completed normally) but in any case
  2326. * we don't need to try to abort it another way.
  2327. */
  2328. c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
  2329. if (c)
  2330. rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
  2331. return rc && rc2;
  2332. }
  2333. /* Send an abort for the specified command.
  2334. * If the device and controller support it,
  2335. * send a task abort request.
  2336. */
  2337. static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
  2338. {
  2339. int i, rc;
  2340. struct ctlr_info *h;
  2341. struct hpsa_scsi_dev_t *dev;
  2342. struct CommandList *abort; /* pointer to command to be aborted */
  2343. struct CommandList *found;
  2344. struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */
  2345. char msg[256]; /* For debug messaging. */
  2346. int ml = 0;
  2347. /* Find the controller of the command to be aborted */
  2348. h = sdev_to_hba(sc->device);
  2349. if (WARN(h == NULL,
  2350. "ABORT REQUEST FAILED, Controller lookup failed.\n"))
  2351. return FAILED;
  2352. /* Check that controller supports some kind of task abort */
  2353. if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
  2354. !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
  2355. return FAILED;
  2356. memset(msg, 0, sizeof(msg));
  2357. ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
  2358. h->scsi_host->host_no, sc->device->channel,
  2359. sc->device->id, sc->device->lun);
  2360. /* Find the device of the command to be aborted */
  2361. dev = sc->device->hostdata;
  2362. if (!dev) {
  2363. dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
  2364. msg);
  2365. return FAILED;
  2366. }
  2367. /* Get SCSI command to be aborted */
  2368. abort = (struct CommandList *) sc->host_scribble;
  2369. if (abort == NULL) {
  2370. dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
  2371. msg);
  2372. return FAILED;
  2373. }
  2374. ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
  2375. abort->Header.Tag.upper, abort->Header.Tag.lower);
  2376. as = (struct scsi_cmnd *) abort->scsi_cmd;
  2377. if (as != NULL)
  2378. ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
  2379. as->cmnd[0], as->serial_number);
  2380. dev_dbg(&h->pdev->dev, "%s\n", msg);
  2381. dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
  2382. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  2383. /* Search reqQ to See if command is queued but not submitted,
  2384. * if so, complete the command with aborted status and remove
  2385. * it from the reqQ.
  2386. */
  2387. found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
  2388. if (found) {
  2389. found->err_info->CommandStatus = CMD_ABORTED;
  2390. finish_cmd(found);
  2391. dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
  2392. msg);
  2393. return SUCCESS;
  2394. }
  2395. /* not in reqQ, if also not in cmpQ, must have already completed */
  2396. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2397. if (!found) {
  2398. dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
  2399. msg);
  2400. return SUCCESS;
  2401. }
  2402. /*
  2403. * Command is in flight, or possibly already completed
  2404. * by the firmware (but not to the scsi mid layer) but we can't
  2405. * distinguish which. Send the abort down.
  2406. */
  2407. rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
  2408. if (rc != 0) {
  2409. dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
  2410. dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
  2411. h->scsi_host->host_no,
  2412. dev->bus, dev->target, dev->lun);
  2413. return FAILED;
  2414. }
  2415. dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
  2416. /* If the abort(s) above completed and actually aborted the
  2417. * command, then the command to be aborted should already be
  2418. * completed. If not, wait around a bit more to see if they
  2419. * manage to complete normally.
  2420. */
  2421. #define ABORT_COMPLETE_WAIT_SECS 30
  2422. for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
  2423. found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
  2424. if (!found)
  2425. return SUCCESS;
  2426. msleep(100);
  2427. }
  2428. dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
  2429. msg, ABORT_COMPLETE_WAIT_SECS);
  2430. return FAILED;
  2431. }
  2432. /*
  2433. * For operations that cannot sleep, a command block is allocated at init,
  2434. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  2435. * which ones are free or in use. Lock must be held when calling this.
  2436. * cmd_free() is the complement.
  2437. */
  2438. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  2439. {
  2440. struct CommandList *c;
  2441. int i;
  2442. union u64bit temp64;
  2443. dma_addr_t cmd_dma_handle, err_dma_handle;
  2444. unsigned long flags;
  2445. spin_lock_irqsave(&h->lock, flags);
  2446. do {
  2447. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  2448. if (i == h->nr_cmds) {
  2449. spin_unlock_irqrestore(&h->lock, flags);
  2450. return NULL;
  2451. }
  2452. } while (test_and_set_bit
  2453. (i & (BITS_PER_LONG - 1),
  2454. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  2455. spin_unlock_irqrestore(&h->lock, flags);
  2456. c = h->cmd_pool + i;
  2457. memset(c, 0, sizeof(*c));
  2458. cmd_dma_handle = h->cmd_pool_dhandle
  2459. + i * sizeof(*c);
  2460. c->err_info = h->errinfo_pool + i;
  2461. memset(c->err_info, 0, sizeof(*c->err_info));
  2462. err_dma_handle = h->errinfo_pool_dhandle
  2463. + i * sizeof(*c->err_info);
  2464. c->cmdindex = i;
  2465. INIT_LIST_HEAD(&c->list);
  2466. c->busaddr = (u32) cmd_dma_handle;
  2467. temp64.val = (u64) err_dma_handle;
  2468. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2469. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2470. c->ErrDesc.Len = sizeof(*c->err_info);
  2471. c->h = h;
  2472. return c;
  2473. }
  2474. /* For operations that can wait for kmalloc to possibly sleep,
  2475. * this routine can be called. Lock need not be held to call
  2476. * cmd_special_alloc. cmd_special_free() is the complement.
  2477. */
  2478. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2479. {
  2480. struct CommandList *c;
  2481. union u64bit temp64;
  2482. dma_addr_t cmd_dma_handle, err_dma_handle;
  2483. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2484. if (c == NULL)
  2485. return NULL;
  2486. memset(c, 0, sizeof(*c));
  2487. c->cmdindex = -1;
  2488. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2489. &err_dma_handle);
  2490. if (c->err_info == NULL) {
  2491. pci_free_consistent(h->pdev,
  2492. sizeof(*c), c, cmd_dma_handle);
  2493. return NULL;
  2494. }
  2495. memset(c->err_info, 0, sizeof(*c->err_info));
  2496. INIT_LIST_HEAD(&c->list);
  2497. c->busaddr = (u32) cmd_dma_handle;
  2498. temp64.val = (u64) err_dma_handle;
  2499. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2500. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2501. c->ErrDesc.Len = sizeof(*c->err_info);
  2502. c->h = h;
  2503. return c;
  2504. }
  2505. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2506. {
  2507. int i;
  2508. unsigned long flags;
  2509. i = c - h->cmd_pool;
  2510. spin_lock_irqsave(&h->lock, flags);
  2511. clear_bit(i & (BITS_PER_LONG - 1),
  2512. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2513. spin_unlock_irqrestore(&h->lock, flags);
  2514. }
  2515. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2516. {
  2517. union u64bit temp64;
  2518. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2519. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2520. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2521. c->err_info, (dma_addr_t) temp64.val);
  2522. pci_free_consistent(h->pdev, sizeof(*c),
  2523. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2524. }
  2525. #ifdef CONFIG_COMPAT
  2526. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2527. {
  2528. IOCTL32_Command_struct __user *arg32 =
  2529. (IOCTL32_Command_struct __user *) arg;
  2530. IOCTL_Command_struct arg64;
  2531. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2532. int err;
  2533. u32 cp;
  2534. memset(&arg64, 0, sizeof(arg64));
  2535. err = 0;
  2536. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2537. sizeof(arg64.LUN_info));
  2538. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2539. sizeof(arg64.Request));
  2540. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2541. sizeof(arg64.error_info));
  2542. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2543. err |= get_user(cp, &arg32->buf);
  2544. arg64.buf = compat_ptr(cp);
  2545. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2546. if (err)
  2547. return -EFAULT;
  2548. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2549. if (err)
  2550. return err;
  2551. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2552. sizeof(arg32->error_info));
  2553. if (err)
  2554. return -EFAULT;
  2555. return err;
  2556. }
  2557. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2558. int cmd, void *arg)
  2559. {
  2560. BIG_IOCTL32_Command_struct __user *arg32 =
  2561. (BIG_IOCTL32_Command_struct __user *) arg;
  2562. BIG_IOCTL_Command_struct arg64;
  2563. BIG_IOCTL_Command_struct __user *p =
  2564. compat_alloc_user_space(sizeof(arg64));
  2565. int err;
  2566. u32 cp;
  2567. memset(&arg64, 0, sizeof(arg64));
  2568. err = 0;
  2569. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2570. sizeof(arg64.LUN_info));
  2571. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2572. sizeof(arg64.Request));
  2573. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2574. sizeof(arg64.error_info));
  2575. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2576. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2577. err |= get_user(cp, &arg32->buf);
  2578. arg64.buf = compat_ptr(cp);
  2579. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2580. if (err)
  2581. return -EFAULT;
  2582. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2583. if (err)
  2584. return err;
  2585. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2586. sizeof(arg32->error_info));
  2587. if (err)
  2588. return -EFAULT;
  2589. return err;
  2590. }
  2591. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2592. {
  2593. switch (cmd) {
  2594. case CCISS_GETPCIINFO:
  2595. case CCISS_GETINTINFO:
  2596. case CCISS_SETINTINFO:
  2597. case CCISS_GETNODENAME:
  2598. case CCISS_SETNODENAME:
  2599. case CCISS_GETHEARTBEAT:
  2600. case CCISS_GETBUSTYPES:
  2601. case CCISS_GETFIRMVER:
  2602. case CCISS_GETDRIVVER:
  2603. case CCISS_REVALIDVOLS:
  2604. case CCISS_DEREGDISK:
  2605. case CCISS_REGNEWDISK:
  2606. case CCISS_REGNEWD:
  2607. case CCISS_RESCANDISK:
  2608. case CCISS_GETLUNINFO:
  2609. return hpsa_ioctl(dev, cmd, arg);
  2610. case CCISS_PASSTHRU32:
  2611. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2612. case CCISS_BIG_PASSTHRU32:
  2613. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2614. default:
  2615. return -ENOIOCTLCMD;
  2616. }
  2617. }
  2618. #endif
  2619. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2620. {
  2621. struct hpsa_pci_info pciinfo;
  2622. if (!argp)
  2623. return -EINVAL;
  2624. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2625. pciinfo.bus = h->pdev->bus->number;
  2626. pciinfo.dev_fn = h->pdev->devfn;
  2627. pciinfo.board_id = h->board_id;
  2628. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2629. return -EFAULT;
  2630. return 0;
  2631. }
  2632. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2633. {
  2634. DriverVer_type DriverVer;
  2635. unsigned char vmaj, vmin, vsubmin;
  2636. int rc;
  2637. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2638. &vmaj, &vmin, &vsubmin);
  2639. if (rc != 3) {
  2640. dev_info(&h->pdev->dev, "driver version string '%s' "
  2641. "unrecognized.", HPSA_DRIVER_VERSION);
  2642. vmaj = 0;
  2643. vmin = 0;
  2644. vsubmin = 0;
  2645. }
  2646. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2647. if (!argp)
  2648. return -EINVAL;
  2649. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2650. return -EFAULT;
  2651. return 0;
  2652. }
  2653. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2654. {
  2655. IOCTL_Command_struct iocommand;
  2656. struct CommandList *c;
  2657. char *buff = NULL;
  2658. union u64bit temp64;
  2659. int rc = 0;
  2660. if (!argp)
  2661. return -EINVAL;
  2662. if (!capable(CAP_SYS_RAWIO))
  2663. return -EPERM;
  2664. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2665. return -EFAULT;
  2666. if ((iocommand.buf_size < 1) &&
  2667. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2668. return -EINVAL;
  2669. }
  2670. if (iocommand.buf_size > 0) {
  2671. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2672. if (buff == NULL)
  2673. return -EFAULT;
  2674. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2675. /* Copy the data into the buffer we created */
  2676. if (copy_from_user(buff, iocommand.buf,
  2677. iocommand.buf_size)) {
  2678. rc = -EFAULT;
  2679. goto out_kfree;
  2680. }
  2681. } else {
  2682. memset(buff, 0, iocommand.buf_size);
  2683. }
  2684. }
  2685. c = cmd_special_alloc(h);
  2686. if (c == NULL) {
  2687. rc = -ENOMEM;
  2688. goto out_kfree;
  2689. }
  2690. /* Fill in the command type */
  2691. c->cmd_type = CMD_IOCTL_PEND;
  2692. /* Fill in Command Header */
  2693. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2694. if (iocommand.buf_size > 0) { /* buffer to fill */
  2695. c->Header.SGList = 1;
  2696. c->Header.SGTotal = 1;
  2697. } else { /* no buffers to fill */
  2698. c->Header.SGList = 0;
  2699. c->Header.SGTotal = 0;
  2700. }
  2701. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2702. /* use the kernel address the cmd block for tag */
  2703. c->Header.Tag.lower = c->busaddr;
  2704. /* Fill in Request block */
  2705. memcpy(&c->Request, &iocommand.Request,
  2706. sizeof(c->Request));
  2707. /* Fill in the scatter gather information */
  2708. if (iocommand.buf_size > 0) {
  2709. temp64.val = pci_map_single(h->pdev, buff,
  2710. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2711. if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
  2712. c->SG[0].Addr.lower = 0;
  2713. c->SG[0].Addr.upper = 0;
  2714. c->SG[0].Len = 0;
  2715. rc = -ENOMEM;
  2716. goto out;
  2717. }
  2718. c->SG[0].Addr.lower = temp64.val32.lower;
  2719. c->SG[0].Addr.upper = temp64.val32.upper;
  2720. c->SG[0].Len = iocommand.buf_size;
  2721. c->SG[0].Ext = 0; /* we are not chaining*/
  2722. }
  2723. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2724. if (iocommand.buf_size > 0)
  2725. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2726. check_ioctl_unit_attention(h, c);
  2727. /* Copy the error information out */
  2728. memcpy(&iocommand.error_info, c->err_info,
  2729. sizeof(iocommand.error_info));
  2730. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2731. rc = -EFAULT;
  2732. goto out;
  2733. }
  2734. if (iocommand.Request.Type.Direction == XFER_READ &&
  2735. iocommand.buf_size > 0) {
  2736. /* Copy the data out of the buffer we created */
  2737. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2738. rc = -EFAULT;
  2739. goto out;
  2740. }
  2741. }
  2742. out:
  2743. cmd_special_free(h, c);
  2744. out_kfree:
  2745. kfree(buff);
  2746. return rc;
  2747. }
  2748. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2749. {
  2750. BIG_IOCTL_Command_struct *ioc;
  2751. struct CommandList *c;
  2752. unsigned char **buff = NULL;
  2753. int *buff_size = NULL;
  2754. union u64bit temp64;
  2755. BYTE sg_used = 0;
  2756. int status = 0;
  2757. int i;
  2758. u32 left;
  2759. u32 sz;
  2760. BYTE __user *data_ptr;
  2761. if (!argp)
  2762. return -EINVAL;
  2763. if (!capable(CAP_SYS_RAWIO))
  2764. return -EPERM;
  2765. ioc = (BIG_IOCTL_Command_struct *)
  2766. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2767. if (!ioc) {
  2768. status = -ENOMEM;
  2769. goto cleanup1;
  2770. }
  2771. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2772. status = -EFAULT;
  2773. goto cleanup1;
  2774. }
  2775. if ((ioc->buf_size < 1) &&
  2776. (ioc->Request.Type.Direction != XFER_NONE)) {
  2777. status = -EINVAL;
  2778. goto cleanup1;
  2779. }
  2780. /* Check kmalloc limits using all SGs */
  2781. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2782. status = -EINVAL;
  2783. goto cleanup1;
  2784. }
  2785. if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
  2786. status = -EINVAL;
  2787. goto cleanup1;
  2788. }
  2789. buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
  2790. if (!buff) {
  2791. status = -ENOMEM;
  2792. goto cleanup1;
  2793. }
  2794. buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
  2795. if (!buff_size) {
  2796. status = -ENOMEM;
  2797. goto cleanup1;
  2798. }
  2799. left = ioc->buf_size;
  2800. data_ptr = ioc->buf;
  2801. while (left) {
  2802. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2803. buff_size[sg_used] = sz;
  2804. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2805. if (buff[sg_used] == NULL) {
  2806. status = -ENOMEM;
  2807. goto cleanup1;
  2808. }
  2809. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2810. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2811. status = -ENOMEM;
  2812. goto cleanup1;
  2813. }
  2814. } else
  2815. memset(buff[sg_used], 0, sz);
  2816. left -= sz;
  2817. data_ptr += sz;
  2818. sg_used++;
  2819. }
  2820. c = cmd_special_alloc(h);
  2821. if (c == NULL) {
  2822. status = -ENOMEM;
  2823. goto cleanup1;
  2824. }
  2825. c->cmd_type = CMD_IOCTL_PEND;
  2826. c->Header.ReplyQueue = 0;
  2827. c->Header.SGList = c->Header.SGTotal = sg_used;
  2828. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2829. c->Header.Tag.lower = c->busaddr;
  2830. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2831. if (ioc->buf_size > 0) {
  2832. int i;
  2833. for (i = 0; i < sg_used; i++) {
  2834. temp64.val = pci_map_single(h->pdev, buff[i],
  2835. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2836. if (dma_mapping_error(&h->pdev->dev, temp64.val)) {
  2837. c->SG[i].Addr.lower = 0;
  2838. c->SG[i].Addr.upper = 0;
  2839. c->SG[i].Len = 0;
  2840. hpsa_pci_unmap(h->pdev, c, i,
  2841. PCI_DMA_BIDIRECTIONAL);
  2842. status = -ENOMEM;
  2843. goto cleanup1;
  2844. }
  2845. c->SG[i].Addr.lower = temp64.val32.lower;
  2846. c->SG[i].Addr.upper = temp64.val32.upper;
  2847. c->SG[i].Len = buff_size[i];
  2848. /* we are not chaining */
  2849. c->SG[i].Ext = 0;
  2850. }
  2851. }
  2852. hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
  2853. if (sg_used)
  2854. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2855. check_ioctl_unit_attention(h, c);
  2856. /* Copy the error information out */
  2857. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2858. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2859. cmd_special_free(h, c);
  2860. status = -EFAULT;
  2861. goto cleanup1;
  2862. }
  2863. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2864. /* Copy the data out of the buffer we created */
  2865. BYTE __user *ptr = ioc->buf;
  2866. for (i = 0; i < sg_used; i++) {
  2867. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2868. cmd_special_free(h, c);
  2869. status = -EFAULT;
  2870. goto cleanup1;
  2871. }
  2872. ptr += buff_size[i];
  2873. }
  2874. }
  2875. cmd_special_free(h, c);
  2876. status = 0;
  2877. cleanup1:
  2878. if (buff) {
  2879. for (i = 0; i < sg_used; i++)
  2880. kfree(buff[i]);
  2881. kfree(buff);
  2882. }
  2883. kfree(buff_size);
  2884. kfree(ioc);
  2885. return status;
  2886. }
  2887. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2888. struct CommandList *c)
  2889. {
  2890. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2891. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2892. (void) check_for_unit_attention(h, c);
  2893. }
  2894. /*
  2895. * ioctl
  2896. */
  2897. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2898. {
  2899. struct ctlr_info *h;
  2900. void __user *argp = (void __user *)arg;
  2901. h = sdev_to_hba(dev);
  2902. switch (cmd) {
  2903. case CCISS_DEREGDISK:
  2904. case CCISS_REGNEWDISK:
  2905. case CCISS_REGNEWD:
  2906. hpsa_scan_start(h->scsi_host);
  2907. return 0;
  2908. case CCISS_GETPCIINFO:
  2909. return hpsa_getpciinfo_ioctl(h, argp);
  2910. case CCISS_GETDRIVVER:
  2911. return hpsa_getdrivver_ioctl(h, argp);
  2912. case CCISS_PASSTHRU:
  2913. return hpsa_passthru_ioctl(h, argp);
  2914. case CCISS_BIG_PASSTHRU:
  2915. return hpsa_big_passthru_ioctl(h, argp);
  2916. default:
  2917. return -ENOTTY;
  2918. }
  2919. }
  2920. static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
  2921. u8 reset_type)
  2922. {
  2923. struct CommandList *c;
  2924. c = cmd_alloc(h);
  2925. if (!c)
  2926. return -ENOMEM;
  2927. /* fill_cmd can't fail here, no data buffer to map */
  2928. (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
  2929. RAID_CTLR_LUNID, TYPE_MSG);
  2930. c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
  2931. c->waiting = NULL;
  2932. enqueue_cmd_and_start_io(h, c);
  2933. /* Don't wait for completion, the reset won't complete. Don't free
  2934. * the command either. This is the last command we will send before
  2935. * re-initializing everything, so it doesn't matter and won't leak.
  2936. */
  2937. return 0;
  2938. }
  2939. static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2940. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2941. int cmd_type)
  2942. {
  2943. int pci_dir = XFER_NONE;
  2944. struct CommandList *a; /* for commands to be aborted */
  2945. c->cmd_type = CMD_IOCTL_PEND;
  2946. c->Header.ReplyQueue = 0;
  2947. if (buff != NULL && size > 0) {
  2948. c->Header.SGList = 1;
  2949. c->Header.SGTotal = 1;
  2950. } else {
  2951. c->Header.SGList = 0;
  2952. c->Header.SGTotal = 0;
  2953. }
  2954. c->Header.Tag.lower = c->busaddr;
  2955. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2956. c->Request.Type.Type = cmd_type;
  2957. if (cmd_type == TYPE_CMD) {
  2958. switch (cmd) {
  2959. case HPSA_INQUIRY:
  2960. /* are we trying to read a vital product page */
  2961. if (page_code != 0) {
  2962. c->Request.CDB[1] = 0x01;
  2963. c->Request.CDB[2] = page_code;
  2964. }
  2965. c->Request.CDBLen = 6;
  2966. c->Request.Type.Attribute = ATTR_SIMPLE;
  2967. c->Request.Type.Direction = XFER_READ;
  2968. c->Request.Timeout = 0;
  2969. c->Request.CDB[0] = HPSA_INQUIRY;
  2970. c->Request.CDB[4] = size & 0xFF;
  2971. break;
  2972. case HPSA_REPORT_LOG:
  2973. case HPSA_REPORT_PHYS:
  2974. /* Talking to controller so It's a physical command
  2975. mode = 00 target = 0. Nothing to write.
  2976. */
  2977. c->Request.CDBLen = 12;
  2978. c->Request.Type.Attribute = ATTR_SIMPLE;
  2979. c->Request.Type.Direction = XFER_READ;
  2980. c->Request.Timeout = 0;
  2981. c->Request.CDB[0] = cmd;
  2982. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2983. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2984. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2985. c->Request.CDB[9] = size & 0xFF;
  2986. break;
  2987. case HPSA_CACHE_FLUSH:
  2988. c->Request.CDBLen = 12;
  2989. c->Request.Type.Attribute = ATTR_SIMPLE;
  2990. c->Request.Type.Direction = XFER_WRITE;
  2991. c->Request.Timeout = 0;
  2992. c->Request.CDB[0] = BMIC_WRITE;
  2993. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2994. c->Request.CDB[7] = (size >> 8) & 0xFF;
  2995. c->Request.CDB[8] = size & 0xFF;
  2996. break;
  2997. case TEST_UNIT_READY:
  2998. c->Request.CDBLen = 6;
  2999. c->Request.Type.Attribute = ATTR_SIMPLE;
  3000. c->Request.Type.Direction = XFER_NONE;
  3001. c->Request.Timeout = 0;
  3002. break;
  3003. default:
  3004. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  3005. BUG();
  3006. return -1;
  3007. }
  3008. } else if (cmd_type == TYPE_MSG) {
  3009. switch (cmd) {
  3010. case HPSA_DEVICE_RESET_MSG:
  3011. c->Request.CDBLen = 16;
  3012. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  3013. c->Request.Type.Attribute = ATTR_SIMPLE;
  3014. c->Request.Type.Direction = XFER_NONE;
  3015. c->Request.Timeout = 0; /* Don't time out */
  3016. memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
  3017. c->Request.CDB[0] = cmd;
  3018. c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
  3019. /* If bytes 4-7 are zero, it means reset the */
  3020. /* LunID device */
  3021. c->Request.CDB[4] = 0x00;
  3022. c->Request.CDB[5] = 0x00;
  3023. c->Request.CDB[6] = 0x00;
  3024. c->Request.CDB[7] = 0x00;
  3025. break;
  3026. case HPSA_ABORT_MSG:
  3027. a = buff; /* point to command to be aborted */
  3028. dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
  3029. a->Header.Tag.upper, a->Header.Tag.lower,
  3030. c->Header.Tag.upper, c->Header.Tag.lower);
  3031. c->Request.CDBLen = 16;
  3032. c->Request.Type.Type = TYPE_MSG;
  3033. c->Request.Type.Attribute = ATTR_SIMPLE;
  3034. c->Request.Type.Direction = XFER_WRITE;
  3035. c->Request.Timeout = 0; /* Don't time out */
  3036. c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
  3037. c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
  3038. c->Request.CDB[2] = 0x00; /* reserved */
  3039. c->Request.CDB[3] = 0x00; /* reserved */
  3040. /* Tag to abort goes in CDB[4]-CDB[11] */
  3041. c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
  3042. c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
  3043. c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
  3044. c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
  3045. c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
  3046. c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
  3047. c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
  3048. c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
  3049. c->Request.CDB[12] = 0x00; /* reserved */
  3050. c->Request.CDB[13] = 0x00; /* reserved */
  3051. c->Request.CDB[14] = 0x00; /* reserved */
  3052. c->Request.CDB[15] = 0x00; /* reserved */
  3053. break;
  3054. default:
  3055. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  3056. cmd);
  3057. BUG();
  3058. }
  3059. } else {
  3060. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  3061. BUG();
  3062. }
  3063. switch (c->Request.Type.Direction) {
  3064. case XFER_READ:
  3065. pci_dir = PCI_DMA_FROMDEVICE;
  3066. break;
  3067. case XFER_WRITE:
  3068. pci_dir = PCI_DMA_TODEVICE;
  3069. break;
  3070. case XFER_NONE:
  3071. pci_dir = PCI_DMA_NONE;
  3072. break;
  3073. default:
  3074. pci_dir = PCI_DMA_BIDIRECTIONAL;
  3075. }
  3076. if (hpsa_map_one(h->pdev, c, buff, size, pci_dir))
  3077. return -1;
  3078. return 0;
  3079. }
  3080. /*
  3081. * Map (physical) PCI mem into (virtual) kernel space
  3082. */
  3083. static void __iomem *remap_pci_mem(ulong base, ulong size)
  3084. {
  3085. ulong page_base = ((ulong) base) & PAGE_MASK;
  3086. ulong page_offs = ((ulong) base) - page_base;
  3087. void __iomem *page_remapped = ioremap_nocache(page_base,
  3088. page_offs + size);
  3089. return page_remapped ? (page_remapped + page_offs) : NULL;
  3090. }
  3091. /* Takes cmds off the submission queue and sends them to the hardware,
  3092. * then puts them on the queue of cmds waiting for completion.
  3093. */
  3094. static void start_io(struct ctlr_info *h)
  3095. {
  3096. struct CommandList *c;
  3097. unsigned long flags;
  3098. spin_lock_irqsave(&h->lock, flags);
  3099. while (!list_empty(&h->reqQ)) {
  3100. c = list_entry(h->reqQ.next, struct CommandList, list);
  3101. /* can't do anything if fifo is full */
  3102. if ((h->access.fifo_full(h))) {
  3103. dev_warn(&h->pdev->dev, "fifo full\n");
  3104. break;
  3105. }
  3106. /* Get the first entry from the Request Q */
  3107. removeQ(c);
  3108. h->Qdepth--;
  3109. /* Put job onto the completed Q */
  3110. addQ(&h->cmpQ, c);
  3111. /* Must increment commands_outstanding before unlocking
  3112. * and submitting to avoid race checking for fifo full
  3113. * condition.
  3114. */
  3115. h->commands_outstanding++;
  3116. if (h->commands_outstanding > h->max_outstanding)
  3117. h->max_outstanding = h->commands_outstanding;
  3118. /* Tell the controller execute command */
  3119. spin_unlock_irqrestore(&h->lock, flags);
  3120. h->access.submit_command(h, c);
  3121. spin_lock_irqsave(&h->lock, flags);
  3122. }
  3123. spin_unlock_irqrestore(&h->lock, flags);
  3124. }
  3125. static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
  3126. {
  3127. return h->access.command_completed(h, q);
  3128. }
  3129. static inline bool interrupt_pending(struct ctlr_info *h)
  3130. {
  3131. return h->access.intr_pending(h);
  3132. }
  3133. static inline long interrupt_not_for_us(struct ctlr_info *h)
  3134. {
  3135. return (h->access.intr_pending(h) == 0) ||
  3136. (h->interrupts_enabled == 0);
  3137. }
  3138. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  3139. u32 raw_tag)
  3140. {
  3141. if (unlikely(tag_index >= h->nr_cmds)) {
  3142. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  3143. return 1;
  3144. }
  3145. return 0;
  3146. }
  3147. static inline void finish_cmd(struct CommandList *c)
  3148. {
  3149. unsigned long flags;
  3150. spin_lock_irqsave(&c->h->lock, flags);
  3151. removeQ(c);
  3152. spin_unlock_irqrestore(&c->h->lock, flags);
  3153. dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
  3154. if (likely(c->cmd_type == CMD_SCSI))
  3155. complete_scsi_command(c);
  3156. else if (c->cmd_type == CMD_IOCTL_PEND)
  3157. complete(c->waiting);
  3158. }
  3159. static inline u32 hpsa_tag_contains_index(u32 tag)
  3160. {
  3161. return tag & DIRECT_LOOKUP_BIT;
  3162. }
  3163. static inline u32 hpsa_tag_to_index(u32 tag)
  3164. {
  3165. return tag >> DIRECT_LOOKUP_SHIFT;
  3166. }
  3167. static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
  3168. {
  3169. #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
  3170. #define HPSA_SIMPLE_ERROR_BITS 0x03
  3171. if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
  3172. return tag & ~HPSA_SIMPLE_ERROR_BITS;
  3173. return tag & ~HPSA_PERF_ERROR_BITS;
  3174. }
  3175. /* process completion of an indexed ("direct lookup") command */
  3176. static inline void process_indexed_cmd(struct ctlr_info *h,
  3177. u32 raw_tag)
  3178. {
  3179. u32 tag_index;
  3180. struct CommandList *c;
  3181. tag_index = hpsa_tag_to_index(raw_tag);
  3182. if (!bad_tag(h, tag_index, raw_tag)) {
  3183. c = h->cmd_pool + tag_index;
  3184. finish_cmd(c);
  3185. }
  3186. }
  3187. /* process completion of a non-indexed command */
  3188. static inline void process_nonindexed_cmd(struct ctlr_info *h,
  3189. u32 raw_tag)
  3190. {
  3191. u32 tag;
  3192. struct CommandList *c = NULL;
  3193. unsigned long flags;
  3194. tag = hpsa_tag_discard_error_bits(h, raw_tag);
  3195. spin_lock_irqsave(&h->lock, flags);
  3196. list_for_each_entry(c, &h->cmpQ, list) {
  3197. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  3198. spin_unlock_irqrestore(&h->lock, flags);
  3199. finish_cmd(c);
  3200. return;
  3201. }
  3202. }
  3203. spin_unlock_irqrestore(&h->lock, flags);
  3204. bad_tag(h, h->nr_cmds + 1, raw_tag);
  3205. }
  3206. /* Some controllers, like p400, will give us one interrupt
  3207. * after a soft reset, even if we turned interrupts off.
  3208. * Only need to check for this in the hpsa_xxx_discard_completions
  3209. * functions.
  3210. */
  3211. static int ignore_bogus_interrupt(struct ctlr_info *h)
  3212. {
  3213. if (likely(!reset_devices))
  3214. return 0;
  3215. if (likely(h->interrupts_enabled))
  3216. return 0;
  3217. dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
  3218. "(known firmware bug.) Ignoring.\n");
  3219. return 1;
  3220. }
  3221. /*
  3222. * Convert &h->q[x] (passed to interrupt handlers) back to h.
  3223. * Relies on (h-q[x] == x) being true for x such that
  3224. * 0 <= x < MAX_REPLY_QUEUES.
  3225. */
  3226. static struct ctlr_info *queue_to_hba(u8 *queue)
  3227. {
  3228. return container_of((queue - *queue), struct ctlr_info, q[0]);
  3229. }
  3230. static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
  3231. {
  3232. struct ctlr_info *h = queue_to_hba(queue);
  3233. u8 q = *(u8 *) queue;
  3234. u32 raw_tag;
  3235. if (ignore_bogus_interrupt(h))
  3236. return IRQ_NONE;
  3237. if (interrupt_not_for_us(h))
  3238. return IRQ_NONE;
  3239. h->last_intr_timestamp = get_jiffies_64();
  3240. while (interrupt_pending(h)) {
  3241. raw_tag = get_next_completion(h, q);
  3242. while (raw_tag != FIFO_EMPTY)
  3243. raw_tag = next_command(h, q);
  3244. }
  3245. return IRQ_HANDLED;
  3246. }
  3247. static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
  3248. {
  3249. struct ctlr_info *h = queue_to_hba(queue);
  3250. u32 raw_tag;
  3251. u8 q = *(u8 *) queue;
  3252. if (ignore_bogus_interrupt(h))
  3253. return IRQ_NONE;
  3254. h->last_intr_timestamp = get_jiffies_64();
  3255. raw_tag = get_next_completion(h, q);
  3256. while (raw_tag != FIFO_EMPTY)
  3257. raw_tag = next_command(h, q);
  3258. return IRQ_HANDLED;
  3259. }
  3260. static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
  3261. {
  3262. struct ctlr_info *h = queue_to_hba((u8 *) queue);
  3263. u32 raw_tag;
  3264. u8 q = *(u8 *) queue;
  3265. if (interrupt_not_for_us(h))
  3266. return IRQ_NONE;
  3267. h->last_intr_timestamp = get_jiffies_64();
  3268. while (interrupt_pending(h)) {
  3269. raw_tag = get_next_completion(h, q);
  3270. while (raw_tag != FIFO_EMPTY) {
  3271. if (likely(hpsa_tag_contains_index(raw_tag)))
  3272. process_indexed_cmd(h, raw_tag);
  3273. else
  3274. process_nonindexed_cmd(h, raw_tag);
  3275. raw_tag = next_command(h, q);
  3276. }
  3277. }
  3278. return IRQ_HANDLED;
  3279. }
  3280. static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
  3281. {
  3282. struct ctlr_info *h = queue_to_hba(queue);
  3283. u32 raw_tag;
  3284. u8 q = *(u8 *) queue;
  3285. h->last_intr_timestamp = get_jiffies_64();
  3286. raw_tag = get_next_completion(h, q);
  3287. while (raw_tag != FIFO_EMPTY) {
  3288. if (likely(hpsa_tag_contains_index(raw_tag)))
  3289. process_indexed_cmd(h, raw_tag);
  3290. else
  3291. process_nonindexed_cmd(h, raw_tag);
  3292. raw_tag = next_command(h, q);
  3293. }
  3294. return IRQ_HANDLED;
  3295. }
  3296. /* Send a message CDB to the firmware. Careful, this only works
  3297. * in simple mode, not performant mode due to the tag lookup.
  3298. * We only ever use this immediately after a controller reset.
  3299. */
  3300. static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  3301. unsigned char type)
  3302. {
  3303. struct Command {
  3304. struct CommandListHeader CommandHeader;
  3305. struct RequestBlock Request;
  3306. struct ErrDescriptor ErrorDescriptor;
  3307. };
  3308. struct Command *cmd;
  3309. static const size_t cmd_sz = sizeof(*cmd) +
  3310. sizeof(cmd->ErrorDescriptor);
  3311. dma_addr_t paddr64;
  3312. uint32_t paddr32, tag;
  3313. void __iomem *vaddr;
  3314. int i, err;
  3315. vaddr = pci_ioremap_bar(pdev, 0);
  3316. if (vaddr == NULL)
  3317. return -ENOMEM;
  3318. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  3319. * CCISS commands, so they must be allocated from the lower 4GiB of
  3320. * memory.
  3321. */
  3322. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3323. if (err) {
  3324. iounmap(vaddr);
  3325. return -ENOMEM;
  3326. }
  3327. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  3328. if (cmd == NULL) {
  3329. iounmap(vaddr);
  3330. return -ENOMEM;
  3331. }
  3332. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  3333. * although there's no guarantee, we assume that the address is at
  3334. * least 4-byte aligned (most likely, it's page-aligned).
  3335. */
  3336. paddr32 = paddr64;
  3337. cmd->CommandHeader.ReplyQueue = 0;
  3338. cmd->CommandHeader.SGList = 0;
  3339. cmd->CommandHeader.SGTotal = 0;
  3340. cmd->CommandHeader.Tag.lower = paddr32;
  3341. cmd->CommandHeader.Tag.upper = 0;
  3342. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  3343. cmd->Request.CDBLen = 16;
  3344. cmd->Request.Type.Type = TYPE_MSG;
  3345. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  3346. cmd->Request.Type.Direction = XFER_NONE;
  3347. cmd->Request.Timeout = 0; /* Don't time out */
  3348. cmd->Request.CDB[0] = opcode;
  3349. cmd->Request.CDB[1] = type;
  3350. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  3351. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  3352. cmd->ErrorDescriptor.Addr.upper = 0;
  3353. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  3354. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  3355. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  3356. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  3357. if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
  3358. break;
  3359. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  3360. }
  3361. iounmap(vaddr);
  3362. /* we leak the DMA buffer here ... no choice since the controller could
  3363. * still complete the command.
  3364. */
  3365. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  3366. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  3367. opcode, type);
  3368. return -ETIMEDOUT;
  3369. }
  3370. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  3371. if (tag & HPSA_ERROR_BIT) {
  3372. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  3373. opcode, type);
  3374. return -EIO;
  3375. }
  3376. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  3377. opcode, type);
  3378. return 0;
  3379. }
  3380. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  3381. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  3382. void * __iomem vaddr, u32 use_doorbell)
  3383. {
  3384. u16 pmcsr;
  3385. int pos;
  3386. if (use_doorbell) {
  3387. /* For everything after the P600, the PCI power state method
  3388. * of resetting the controller doesn't work, so we have this
  3389. * other way using the doorbell register.
  3390. */
  3391. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  3392. writel(use_doorbell, vaddr + SA5_DOORBELL);
  3393. } else { /* Try to do it the PCI power state way */
  3394. /* Quoting from the Open CISS Specification: "The Power
  3395. * Management Control/Status Register (CSR) controls the power
  3396. * state of the device. The normal operating state is D0,
  3397. * CSR=00h. The software off state is D3, CSR=03h. To reset
  3398. * the controller, place the interface device in D3 then to D0,
  3399. * this causes a secondary PCI reset which will reset the
  3400. * controller." */
  3401. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  3402. if (pos == 0) {
  3403. dev_err(&pdev->dev,
  3404. "hpsa_reset_controller: "
  3405. "PCI PM not supported\n");
  3406. return -ENODEV;
  3407. }
  3408. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  3409. /* enter the D3hot power management state */
  3410. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  3411. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3412. pmcsr |= PCI_D3hot;
  3413. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3414. msleep(500);
  3415. /* enter the D0 power management state */
  3416. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  3417. pmcsr |= PCI_D0;
  3418. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  3419. /*
  3420. * The P600 requires a small delay when changing states.
  3421. * Otherwise we may think the board did not reset and we bail.
  3422. * This for kdump only and is particular to the P600.
  3423. */
  3424. msleep(500);
  3425. }
  3426. return 0;
  3427. }
  3428. static void init_driver_version(char *driver_version, int len)
  3429. {
  3430. memset(driver_version, 0, len);
  3431. strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
  3432. }
  3433. static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
  3434. {
  3435. char *driver_version;
  3436. int i, size = sizeof(cfgtable->driver_version);
  3437. driver_version = kmalloc(size, GFP_KERNEL);
  3438. if (!driver_version)
  3439. return -ENOMEM;
  3440. init_driver_version(driver_version, size);
  3441. for (i = 0; i < size; i++)
  3442. writeb(driver_version[i], &cfgtable->driver_version[i]);
  3443. kfree(driver_version);
  3444. return 0;
  3445. }
  3446. static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
  3447. unsigned char *driver_ver)
  3448. {
  3449. int i;
  3450. for (i = 0; i < sizeof(cfgtable->driver_version); i++)
  3451. driver_ver[i] = readb(&cfgtable->driver_version[i]);
  3452. }
  3453. static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
  3454. {
  3455. char *driver_ver, *old_driver_ver;
  3456. int rc, size = sizeof(cfgtable->driver_version);
  3457. old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
  3458. if (!old_driver_ver)
  3459. return -ENOMEM;
  3460. driver_ver = old_driver_ver + size;
  3461. /* After a reset, the 32 bytes of "driver version" in the cfgtable
  3462. * should have been changed, otherwise we know the reset failed.
  3463. */
  3464. init_driver_version(old_driver_ver, size);
  3465. read_driver_ver_from_cfgtable(cfgtable, driver_ver);
  3466. rc = !memcmp(driver_ver, old_driver_ver, size);
  3467. kfree(old_driver_ver);
  3468. return rc;
  3469. }
  3470. /* This does a hard reset of the controller using PCI power management
  3471. * states or the using the doorbell register.
  3472. */
  3473. static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  3474. {
  3475. u64 cfg_offset;
  3476. u32 cfg_base_addr;
  3477. u64 cfg_base_addr_index;
  3478. void __iomem *vaddr;
  3479. unsigned long paddr;
  3480. u32 misc_fw_support;
  3481. int rc;
  3482. struct CfgTable __iomem *cfgtable;
  3483. u32 use_doorbell;
  3484. u32 board_id;
  3485. u16 command_register;
  3486. /* For controllers as old as the P600, this is very nearly
  3487. * the same thing as
  3488. *
  3489. * pci_save_state(pci_dev);
  3490. * pci_set_power_state(pci_dev, PCI_D3hot);
  3491. * pci_set_power_state(pci_dev, PCI_D0);
  3492. * pci_restore_state(pci_dev);
  3493. *
  3494. * For controllers newer than the P600, the pci power state
  3495. * method of resetting doesn't work so we have another way
  3496. * using the doorbell register.
  3497. */
  3498. rc = hpsa_lookup_board_id(pdev, &board_id);
  3499. if (rc < 0 || !ctlr_is_resettable(board_id)) {
  3500. dev_warn(&pdev->dev, "Not resetting device.\n");
  3501. return -ENODEV;
  3502. }
  3503. /* if controller is soft- but not hard resettable... */
  3504. if (!ctlr_is_hard_resettable(board_id))
  3505. return -ENOTSUPP; /* try soft reset later. */
  3506. /* Save the PCI command register */
  3507. pci_read_config_word(pdev, 4, &command_register);
  3508. /* Turn the board off. This is so that later pci_restore_state()
  3509. * won't turn the board on before the rest of config space is ready.
  3510. */
  3511. pci_disable_device(pdev);
  3512. pci_save_state(pdev);
  3513. /* find the first memory BAR, so we can find the cfg table */
  3514. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  3515. if (rc)
  3516. return rc;
  3517. vaddr = remap_pci_mem(paddr, 0x250);
  3518. if (!vaddr)
  3519. return -ENOMEM;
  3520. /* find cfgtable in order to check if reset via doorbell is supported */
  3521. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  3522. &cfg_base_addr_index, &cfg_offset);
  3523. if (rc)
  3524. goto unmap_vaddr;
  3525. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  3526. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  3527. if (!cfgtable) {
  3528. rc = -ENOMEM;
  3529. goto unmap_vaddr;
  3530. }
  3531. rc = write_driver_ver_to_cfgtable(cfgtable);
  3532. if (rc)
  3533. goto unmap_vaddr;
  3534. /* If reset via doorbell register is supported, use that.
  3535. * There are two such methods. Favor the newest method.
  3536. */
  3537. misc_fw_support = readl(&cfgtable->misc_fw_support);
  3538. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
  3539. if (use_doorbell) {
  3540. use_doorbell = DOORBELL_CTLR_RESET2;
  3541. } else {
  3542. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  3543. if (use_doorbell) {
  3544. dev_warn(&pdev->dev, "Soft reset not supported. "
  3545. "Firmware update is required.\n");
  3546. rc = -ENOTSUPP; /* try soft reset */
  3547. goto unmap_cfgtable;
  3548. }
  3549. }
  3550. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  3551. if (rc)
  3552. goto unmap_cfgtable;
  3553. pci_restore_state(pdev);
  3554. rc = pci_enable_device(pdev);
  3555. if (rc) {
  3556. dev_warn(&pdev->dev, "failed to enable device.\n");
  3557. goto unmap_cfgtable;
  3558. }
  3559. pci_write_config_word(pdev, 4, command_register);
  3560. /* Some devices (notably the HP Smart Array 5i Controller)
  3561. need a little pause here */
  3562. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  3563. /* Wait for board to become not ready, then ready. */
  3564. dev_info(&pdev->dev, "Waiting for board to reset.\n");
  3565. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  3566. if (rc) {
  3567. dev_warn(&pdev->dev,
  3568. "failed waiting for board to reset."
  3569. " Will try soft reset.\n");
  3570. rc = -ENOTSUPP; /* Not expected, but try soft reset later */
  3571. goto unmap_cfgtable;
  3572. }
  3573. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  3574. if (rc) {
  3575. dev_warn(&pdev->dev,
  3576. "failed waiting for board to become ready "
  3577. "after hard reset\n");
  3578. goto unmap_cfgtable;
  3579. }
  3580. rc = controller_reset_failed(vaddr);
  3581. if (rc < 0)
  3582. goto unmap_cfgtable;
  3583. if (rc) {
  3584. dev_warn(&pdev->dev, "Unable to successfully reset "
  3585. "controller. Will try soft reset.\n");
  3586. rc = -ENOTSUPP;
  3587. } else {
  3588. dev_info(&pdev->dev, "board ready after hard reset.\n");
  3589. }
  3590. unmap_cfgtable:
  3591. iounmap(cfgtable);
  3592. unmap_vaddr:
  3593. iounmap(vaddr);
  3594. return rc;
  3595. }
  3596. /*
  3597. * We cannot read the structure directly, for portability we must use
  3598. * the io functions.
  3599. * This is for debug only.
  3600. */
  3601. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  3602. {
  3603. #ifdef HPSA_DEBUG
  3604. int i;
  3605. char temp_name[17];
  3606. dev_info(dev, "Controller Configuration information\n");
  3607. dev_info(dev, "------------------------------------\n");
  3608. for (i = 0; i < 4; i++)
  3609. temp_name[i] = readb(&(tb->Signature[i]));
  3610. temp_name[4] = '\0';
  3611. dev_info(dev, " Signature = %s\n", temp_name);
  3612. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  3613. dev_info(dev, " Transport methods supported = 0x%x\n",
  3614. readl(&(tb->TransportSupport)));
  3615. dev_info(dev, " Transport methods active = 0x%x\n",
  3616. readl(&(tb->TransportActive)));
  3617. dev_info(dev, " Requested transport Method = 0x%x\n",
  3618. readl(&(tb->HostWrite.TransportRequest)));
  3619. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  3620. readl(&(tb->HostWrite.CoalIntDelay)));
  3621. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  3622. readl(&(tb->HostWrite.CoalIntCount)));
  3623. dev_info(dev, " Max outstanding commands = 0x%d\n",
  3624. readl(&(tb->CmdsOutMax)));
  3625. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  3626. for (i = 0; i < 16; i++)
  3627. temp_name[i] = readb(&(tb->ServerName[i]));
  3628. temp_name[16] = '\0';
  3629. dev_info(dev, " Server Name = %s\n", temp_name);
  3630. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  3631. readl(&(tb->HeartBeat)));
  3632. #endif /* HPSA_DEBUG */
  3633. }
  3634. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  3635. {
  3636. int i, offset, mem_type, bar_type;
  3637. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  3638. return 0;
  3639. offset = 0;
  3640. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  3641. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  3642. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  3643. offset += 4;
  3644. else {
  3645. mem_type = pci_resource_flags(pdev, i) &
  3646. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  3647. switch (mem_type) {
  3648. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  3649. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  3650. offset += 4; /* 32 bit */
  3651. break;
  3652. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  3653. offset += 8;
  3654. break;
  3655. default: /* reserved in PCI 2.2 */
  3656. dev_warn(&pdev->dev,
  3657. "base address is invalid\n");
  3658. return -1;
  3659. break;
  3660. }
  3661. }
  3662. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  3663. return i + 1;
  3664. }
  3665. return -1;
  3666. }
  3667. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  3668. * controllers that are capable. If not, we use IO-APIC mode.
  3669. */
  3670. static void hpsa_interrupt_mode(struct ctlr_info *h)
  3671. {
  3672. #ifdef CONFIG_PCI_MSI
  3673. int err, i;
  3674. struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
  3675. for (i = 0; i < MAX_REPLY_QUEUES; i++) {
  3676. hpsa_msix_entries[i].vector = 0;
  3677. hpsa_msix_entries[i].entry = i;
  3678. }
  3679. /* Some boards advertise MSI but don't really support it */
  3680. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  3681. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  3682. goto default_int_mode;
  3683. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  3684. dev_info(&h->pdev->dev, "MSIX\n");
  3685. err = pci_enable_msix(h->pdev, hpsa_msix_entries,
  3686. MAX_REPLY_QUEUES);
  3687. if (!err) {
  3688. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  3689. h->intr[i] = hpsa_msix_entries[i].vector;
  3690. h->msix_vector = 1;
  3691. return;
  3692. }
  3693. if (err > 0) {
  3694. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3695. "available\n", err);
  3696. goto default_int_mode;
  3697. } else {
  3698. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3699. err);
  3700. goto default_int_mode;
  3701. }
  3702. }
  3703. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3704. dev_info(&h->pdev->dev, "MSI\n");
  3705. if (!pci_enable_msi(h->pdev))
  3706. h->msi_vector = 1;
  3707. else
  3708. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3709. }
  3710. default_int_mode:
  3711. #endif /* CONFIG_PCI_MSI */
  3712. /* if we get here we're going to use the default interrupt mode */
  3713. h->intr[h->intr_mode] = h->pdev->irq;
  3714. }
  3715. static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3716. {
  3717. int i;
  3718. u32 subsystem_vendor_id, subsystem_device_id;
  3719. subsystem_vendor_id = pdev->subsystem_vendor;
  3720. subsystem_device_id = pdev->subsystem_device;
  3721. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3722. subsystem_vendor_id;
  3723. for (i = 0; i < ARRAY_SIZE(products); i++)
  3724. if (*board_id == products[i].board_id)
  3725. return i;
  3726. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3727. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3728. !hpsa_allow_any) {
  3729. dev_warn(&pdev->dev, "unrecognized board ID: "
  3730. "0x%08x, ignoring.\n", *board_id);
  3731. return -ENODEV;
  3732. }
  3733. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3734. }
  3735. static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3736. unsigned long *memory_bar)
  3737. {
  3738. int i;
  3739. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3740. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3741. /* addressing mode bits already removed */
  3742. *memory_bar = pci_resource_start(pdev, i);
  3743. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3744. *memory_bar);
  3745. return 0;
  3746. }
  3747. dev_warn(&pdev->dev, "no memory BAR found\n");
  3748. return -ENODEV;
  3749. }
  3750. static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
  3751. int wait_for_ready)
  3752. {
  3753. int i, iterations;
  3754. u32 scratchpad;
  3755. if (wait_for_ready)
  3756. iterations = HPSA_BOARD_READY_ITERATIONS;
  3757. else
  3758. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3759. for (i = 0; i < iterations; i++) {
  3760. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3761. if (wait_for_ready) {
  3762. if (scratchpad == HPSA_FIRMWARE_READY)
  3763. return 0;
  3764. } else {
  3765. if (scratchpad != HPSA_FIRMWARE_READY)
  3766. return 0;
  3767. }
  3768. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3769. }
  3770. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3771. return -ENODEV;
  3772. }
  3773. static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
  3774. u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3775. u64 *cfg_offset)
  3776. {
  3777. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3778. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3779. *cfg_base_addr &= (u32) 0x0000ffff;
  3780. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3781. if (*cfg_base_addr_index == -1) {
  3782. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3783. return -ENODEV;
  3784. }
  3785. return 0;
  3786. }
  3787. static int hpsa_find_cfgtables(struct ctlr_info *h)
  3788. {
  3789. u64 cfg_offset;
  3790. u32 cfg_base_addr;
  3791. u64 cfg_base_addr_index;
  3792. u32 trans_offset;
  3793. int rc;
  3794. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3795. &cfg_base_addr_index, &cfg_offset);
  3796. if (rc)
  3797. return rc;
  3798. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3799. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3800. if (!h->cfgtable)
  3801. return -ENOMEM;
  3802. rc = write_driver_ver_to_cfgtable(h->cfgtable);
  3803. if (rc)
  3804. return rc;
  3805. /* Find performant mode table. */
  3806. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3807. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3808. cfg_base_addr_index)+cfg_offset+trans_offset,
  3809. sizeof(*h->transtable));
  3810. if (!h->transtable)
  3811. return -ENOMEM;
  3812. return 0;
  3813. }
  3814. static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3815. {
  3816. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3817. /* Limit commands in memory limited kdump scenario. */
  3818. if (reset_devices && h->max_commands > 32)
  3819. h->max_commands = 32;
  3820. if (h->max_commands < 16) {
  3821. dev_warn(&h->pdev->dev, "Controller reports "
  3822. "max supported commands of %d, an obvious lie. "
  3823. "Using 16. Ensure that firmware is up to date.\n",
  3824. h->max_commands);
  3825. h->max_commands = 16;
  3826. }
  3827. }
  3828. /* Interrogate the hardware for some limits:
  3829. * max commands, max SG elements without chaining, and with chaining,
  3830. * SG chain block size, etc.
  3831. */
  3832. static void hpsa_find_board_params(struct ctlr_info *h)
  3833. {
  3834. hpsa_get_max_perf_mode_cmds(h);
  3835. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3836. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3837. /*
  3838. * Limit in-command s/g elements to 32 save dma'able memory.
  3839. * Howvever spec says if 0, use 31
  3840. */
  3841. h->max_cmd_sg_entries = 31;
  3842. if (h->maxsgentries > 512) {
  3843. h->max_cmd_sg_entries = 32;
  3844. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3845. h->maxsgentries--; /* save one for chain pointer */
  3846. } else {
  3847. h->maxsgentries = 31; /* default to traditional values */
  3848. h->chainsize = 0;
  3849. }
  3850. /* Find out what task management functions are supported and cache */
  3851. h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
  3852. }
  3853. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3854. {
  3855. if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
  3856. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3857. return false;
  3858. }
  3859. return true;
  3860. }
  3861. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3862. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3863. {
  3864. #ifdef CONFIG_X86
  3865. u32 prefetch;
  3866. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3867. prefetch |= 0x100;
  3868. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3869. #endif
  3870. }
  3871. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3872. * in a prefetch beyond physical memory.
  3873. */
  3874. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3875. {
  3876. u32 dma_prefetch;
  3877. if (h->board_id != 0x3225103C)
  3878. return;
  3879. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3880. dma_prefetch |= 0x8000;
  3881. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3882. }
  3883. static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3884. {
  3885. int i;
  3886. u32 doorbell_value;
  3887. unsigned long flags;
  3888. /* under certain very rare conditions, this can take awhile.
  3889. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3890. * as we enter this code.)
  3891. */
  3892. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3893. spin_lock_irqsave(&h->lock, flags);
  3894. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3895. spin_unlock_irqrestore(&h->lock, flags);
  3896. if (!(doorbell_value & CFGTBL_ChangeReq))
  3897. break;
  3898. /* delay and try again */
  3899. usleep_range(10000, 20000);
  3900. }
  3901. }
  3902. static int hpsa_enter_simple_mode(struct ctlr_info *h)
  3903. {
  3904. u32 trans_support;
  3905. trans_support = readl(&(h->cfgtable->TransportSupport));
  3906. if (!(trans_support & SIMPLE_MODE))
  3907. return -ENOTSUPP;
  3908. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3909. /* Update the field, and then ring the doorbell */
  3910. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3911. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3912. hpsa_wait_for_mode_change_ack(h);
  3913. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3914. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3915. dev_warn(&h->pdev->dev,
  3916. "unable to get board into simple mode\n");
  3917. return -ENODEV;
  3918. }
  3919. h->transMethod = CFGTBL_Trans_Simple;
  3920. return 0;
  3921. }
  3922. static int hpsa_pci_init(struct ctlr_info *h)
  3923. {
  3924. int prod_index, err;
  3925. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3926. if (prod_index < 0)
  3927. return -ENODEV;
  3928. h->product_name = products[prod_index].product_name;
  3929. h->access = *(products[prod_index].access);
  3930. pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
  3931. PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
  3932. err = pci_enable_device(h->pdev);
  3933. if (err) {
  3934. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3935. return err;
  3936. }
  3937. /* Enable bus mastering (pci_disable_device may disable this) */
  3938. pci_set_master(h->pdev);
  3939. err = pci_request_regions(h->pdev, HPSA);
  3940. if (err) {
  3941. dev_err(&h->pdev->dev,
  3942. "cannot obtain PCI resources, aborting\n");
  3943. return err;
  3944. }
  3945. hpsa_interrupt_mode(h);
  3946. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3947. if (err)
  3948. goto err_out_free_res;
  3949. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3950. if (!h->vaddr) {
  3951. err = -ENOMEM;
  3952. goto err_out_free_res;
  3953. }
  3954. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3955. if (err)
  3956. goto err_out_free_res;
  3957. err = hpsa_find_cfgtables(h);
  3958. if (err)
  3959. goto err_out_free_res;
  3960. hpsa_find_board_params(h);
  3961. if (!hpsa_CISS_signature_present(h)) {
  3962. err = -ENODEV;
  3963. goto err_out_free_res;
  3964. }
  3965. hpsa_enable_scsi_prefetch(h);
  3966. hpsa_p600_dma_prefetch_quirk(h);
  3967. err = hpsa_enter_simple_mode(h);
  3968. if (err)
  3969. goto err_out_free_res;
  3970. return 0;
  3971. err_out_free_res:
  3972. if (h->transtable)
  3973. iounmap(h->transtable);
  3974. if (h->cfgtable)
  3975. iounmap(h->cfgtable);
  3976. if (h->vaddr)
  3977. iounmap(h->vaddr);
  3978. pci_disable_device(h->pdev);
  3979. pci_release_regions(h->pdev);
  3980. return err;
  3981. }
  3982. static void hpsa_hba_inquiry(struct ctlr_info *h)
  3983. {
  3984. int rc;
  3985. #define HBA_INQUIRY_BYTE_COUNT 64
  3986. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3987. if (!h->hba_inquiry_data)
  3988. return;
  3989. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3990. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3991. if (rc != 0) {
  3992. kfree(h->hba_inquiry_data);
  3993. h->hba_inquiry_data = NULL;
  3994. }
  3995. }
  3996. static int hpsa_init_reset_devices(struct pci_dev *pdev)
  3997. {
  3998. int rc, i;
  3999. if (!reset_devices)
  4000. return 0;
  4001. /* Reset the controller with a PCI power-cycle or via doorbell */
  4002. rc = hpsa_kdump_hard_reset_controller(pdev);
  4003. /* -ENOTSUPP here means we cannot reset the controller
  4004. * but it's already (and still) up and running in
  4005. * "performant mode". Or, it might be 640x, which can't reset
  4006. * due to concerns about shared bbwc between 6402/6404 pair.
  4007. */
  4008. if (rc == -ENOTSUPP)
  4009. return rc; /* just try to do the kdump anyhow. */
  4010. if (rc)
  4011. return -ENODEV;
  4012. /* Now try to get the controller to respond to a no-op */
  4013. dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
  4014. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  4015. if (hpsa_noop(pdev) == 0)
  4016. break;
  4017. else
  4018. dev_warn(&pdev->dev, "no-op failed%s\n",
  4019. (i < 11 ? "; re-trying" : ""));
  4020. }
  4021. return 0;
  4022. }
  4023. static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
  4024. {
  4025. h->cmd_pool_bits = kzalloc(
  4026. DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
  4027. sizeof(unsigned long), GFP_KERNEL);
  4028. h->cmd_pool = pci_alloc_consistent(h->pdev,
  4029. h->nr_cmds * sizeof(*h->cmd_pool),
  4030. &(h->cmd_pool_dhandle));
  4031. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  4032. h->nr_cmds * sizeof(*h->errinfo_pool),
  4033. &(h->errinfo_pool_dhandle));
  4034. if ((h->cmd_pool_bits == NULL)
  4035. || (h->cmd_pool == NULL)
  4036. || (h->errinfo_pool == NULL)) {
  4037. dev_err(&h->pdev->dev, "out of memory in %s", __func__);
  4038. return -ENOMEM;
  4039. }
  4040. return 0;
  4041. }
  4042. static void hpsa_free_cmd_pool(struct ctlr_info *h)
  4043. {
  4044. kfree(h->cmd_pool_bits);
  4045. if (h->cmd_pool)
  4046. pci_free_consistent(h->pdev,
  4047. h->nr_cmds * sizeof(struct CommandList),
  4048. h->cmd_pool, h->cmd_pool_dhandle);
  4049. if (h->errinfo_pool)
  4050. pci_free_consistent(h->pdev,
  4051. h->nr_cmds * sizeof(struct ErrorInfo),
  4052. h->errinfo_pool,
  4053. h->errinfo_pool_dhandle);
  4054. }
  4055. static int hpsa_request_irq(struct ctlr_info *h,
  4056. irqreturn_t (*msixhandler)(int, void *),
  4057. irqreturn_t (*intxhandler)(int, void *))
  4058. {
  4059. int rc, i;
  4060. /*
  4061. * initialize h->q[x] = x so that interrupt handlers know which
  4062. * queue to process.
  4063. */
  4064. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4065. h->q[i] = (u8) i;
  4066. if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
  4067. /* If performant mode and MSI-X, use multiple reply queues */
  4068. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4069. rc = request_irq(h->intr[i], msixhandler,
  4070. 0, h->devname,
  4071. &h->q[i]);
  4072. } else {
  4073. /* Use single reply pool */
  4074. if (h->msix_vector || h->msi_vector) {
  4075. rc = request_irq(h->intr[h->intr_mode],
  4076. msixhandler, 0, h->devname,
  4077. &h->q[h->intr_mode]);
  4078. } else {
  4079. rc = request_irq(h->intr[h->intr_mode],
  4080. intxhandler, IRQF_SHARED, h->devname,
  4081. &h->q[h->intr_mode]);
  4082. }
  4083. }
  4084. if (rc) {
  4085. dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
  4086. h->intr[h->intr_mode], h->devname);
  4087. return -ENODEV;
  4088. }
  4089. return 0;
  4090. }
  4091. static int hpsa_kdump_soft_reset(struct ctlr_info *h)
  4092. {
  4093. if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
  4094. HPSA_RESET_TYPE_CONTROLLER)) {
  4095. dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
  4096. return -EIO;
  4097. }
  4098. dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
  4099. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
  4100. dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
  4101. return -1;
  4102. }
  4103. dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
  4104. if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
  4105. dev_warn(&h->pdev->dev, "Board failed to become ready "
  4106. "after soft reset.\n");
  4107. return -1;
  4108. }
  4109. return 0;
  4110. }
  4111. static void free_irqs(struct ctlr_info *h)
  4112. {
  4113. int i;
  4114. if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
  4115. /* Single reply queue, only one irq to free */
  4116. i = h->intr_mode;
  4117. free_irq(h->intr[i], &h->q[i]);
  4118. return;
  4119. }
  4120. for (i = 0; i < MAX_REPLY_QUEUES; i++)
  4121. free_irq(h->intr[i], &h->q[i]);
  4122. }
  4123. static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
  4124. {
  4125. free_irqs(h);
  4126. #ifdef CONFIG_PCI_MSI
  4127. if (h->msix_vector) {
  4128. if (h->pdev->msix_enabled)
  4129. pci_disable_msix(h->pdev);
  4130. } else if (h->msi_vector) {
  4131. if (h->pdev->msi_enabled)
  4132. pci_disable_msi(h->pdev);
  4133. }
  4134. #endif /* CONFIG_PCI_MSI */
  4135. }
  4136. static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
  4137. {
  4138. hpsa_free_irqs_and_disable_msix(h);
  4139. hpsa_free_sg_chain_blocks(h);
  4140. hpsa_free_cmd_pool(h);
  4141. kfree(h->blockFetchTable);
  4142. pci_free_consistent(h->pdev, h->reply_pool_size,
  4143. h->reply_pool, h->reply_pool_dhandle);
  4144. if (h->vaddr)
  4145. iounmap(h->vaddr);
  4146. if (h->transtable)
  4147. iounmap(h->transtable);
  4148. if (h->cfgtable)
  4149. iounmap(h->cfgtable);
  4150. pci_release_regions(h->pdev);
  4151. kfree(h);
  4152. }
  4153. static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
  4154. {
  4155. assert_spin_locked(&lockup_detector_lock);
  4156. if (!hpsa_lockup_detector)
  4157. return;
  4158. if (h->lockup_detected)
  4159. return; /* already stopped the lockup detector */
  4160. list_del(&h->lockup_list);
  4161. }
  4162. /* Called when controller lockup detected. */
  4163. static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
  4164. {
  4165. struct CommandList *c = NULL;
  4166. assert_spin_locked(&h->lock);
  4167. /* Mark all outstanding commands as failed and complete them. */
  4168. while (!list_empty(list)) {
  4169. c = list_entry(list->next, struct CommandList, list);
  4170. c->err_info->CommandStatus = CMD_HARDWARE_ERR;
  4171. finish_cmd(c);
  4172. }
  4173. }
  4174. static void controller_lockup_detected(struct ctlr_info *h)
  4175. {
  4176. unsigned long flags;
  4177. assert_spin_locked(&lockup_detector_lock);
  4178. remove_ctlr_from_lockup_detector_list(h);
  4179. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4180. spin_lock_irqsave(&h->lock, flags);
  4181. h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
  4182. spin_unlock_irqrestore(&h->lock, flags);
  4183. dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
  4184. h->lockup_detected);
  4185. pci_disable_device(h->pdev);
  4186. spin_lock_irqsave(&h->lock, flags);
  4187. fail_all_cmds_on_list(h, &h->cmpQ);
  4188. fail_all_cmds_on_list(h, &h->reqQ);
  4189. spin_unlock_irqrestore(&h->lock, flags);
  4190. }
  4191. static void detect_controller_lockup(struct ctlr_info *h)
  4192. {
  4193. u64 now;
  4194. u32 heartbeat;
  4195. unsigned long flags;
  4196. assert_spin_locked(&lockup_detector_lock);
  4197. now = get_jiffies_64();
  4198. /* If we've received an interrupt recently, we're ok. */
  4199. if (time_after64(h->last_intr_timestamp +
  4200. (h->heartbeat_sample_interval), now))
  4201. return;
  4202. /*
  4203. * If we've already checked the heartbeat recently, we're ok.
  4204. * This could happen if someone sends us a signal. We
  4205. * otherwise don't care about signals in this thread.
  4206. */
  4207. if (time_after64(h->last_heartbeat_timestamp +
  4208. (h->heartbeat_sample_interval), now))
  4209. return;
  4210. /* If heartbeat has not changed since we last looked, we're not ok. */
  4211. spin_lock_irqsave(&h->lock, flags);
  4212. heartbeat = readl(&h->cfgtable->HeartBeat);
  4213. spin_unlock_irqrestore(&h->lock, flags);
  4214. if (h->last_heartbeat == heartbeat) {
  4215. controller_lockup_detected(h);
  4216. return;
  4217. }
  4218. /* We're ok. */
  4219. h->last_heartbeat = heartbeat;
  4220. h->last_heartbeat_timestamp = now;
  4221. }
  4222. static int detect_controller_lockup_thread(void *notused)
  4223. {
  4224. struct ctlr_info *h;
  4225. unsigned long flags;
  4226. while (1) {
  4227. struct list_head *this, *tmp;
  4228. schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
  4229. if (kthread_should_stop())
  4230. break;
  4231. spin_lock_irqsave(&lockup_detector_lock, flags);
  4232. list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
  4233. h = list_entry(this, struct ctlr_info, lockup_list);
  4234. detect_controller_lockup(h);
  4235. }
  4236. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4237. }
  4238. return 0;
  4239. }
  4240. static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
  4241. {
  4242. unsigned long flags;
  4243. h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
  4244. spin_lock_irqsave(&lockup_detector_lock, flags);
  4245. list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
  4246. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4247. }
  4248. static void start_controller_lockup_detector(struct ctlr_info *h)
  4249. {
  4250. /* Start the lockup detector thread if not already started */
  4251. if (!hpsa_lockup_detector) {
  4252. spin_lock_init(&lockup_detector_lock);
  4253. hpsa_lockup_detector =
  4254. kthread_run(detect_controller_lockup_thread,
  4255. NULL, HPSA);
  4256. }
  4257. if (!hpsa_lockup_detector) {
  4258. dev_warn(&h->pdev->dev,
  4259. "Could not start lockup detector thread\n");
  4260. return;
  4261. }
  4262. add_ctlr_to_lockup_detector_list(h);
  4263. }
  4264. static void stop_controller_lockup_detector(struct ctlr_info *h)
  4265. {
  4266. unsigned long flags;
  4267. spin_lock_irqsave(&lockup_detector_lock, flags);
  4268. remove_ctlr_from_lockup_detector_list(h);
  4269. /* If the list of ctlr's to monitor is empty, stop the thread */
  4270. if (list_empty(&hpsa_ctlr_list)) {
  4271. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4272. kthread_stop(hpsa_lockup_detector);
  4273. spin_lock_irqsave(&lockup_detector_lock, flags);
  4274. hpsa_lockup_detector = NULL;
  4275. }
  4276. spin_unlock_irqrestore(&lockup_detector_lock, flags);
  4277. }
  4278. static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  4279. {
  4280. int dac, rc;
  4281. struct ctlr_info *h;
  4282. int try_soft_reset = 0;
  4283. unsigned long flags;
  4284. if (number_of_controllers == 0)
  4285. printk(KERN_INFO DRIVER_NAME "\n");
  4286. rc = hpsa_init_reset_devices(pdev);
  4287. if (rc) {
  4288. if (rc != -ENOTSUPP)
  4289. return rc;
  4290. /* If the reset fails in a particular way (it has no way to do
  4291. * a proper hard reset, so returns -ENOTSUPP) we can try to do
  4292. * a soft reset once we get the controller configured up to the
  4293. * point that it can accept a command.
  4294. */
  4295. try_soft_reset = 1;
  4296. rc = 0;
  4297. }
  4298. reinit_after_soft_reset:
  4299. /* Command structures must be aligned on a 32-byte boundary because
  4300. * the 5 lower bits of the address are used by the hardware. and by
  4301. * the driver. See comments in hpsa.h for more info.
  4302. */
  4303. #define COMMANDLIST_ALIGNMENT 32
  4304. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  4305. h = kzalloc(sizeof(*h), GFP_KERNEL);
  4306. if (!h)
  4307. return -ENOMEM;
  4308. h->pdev = pdev;
  4309. h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
  4310. INIT_LIST_HEAD(&h->cmpQ);
  4311. INIT_LIST_HEAD(&h->reqQ);
  4312. spin_lock_init(&h->lock);
  4313. spin_lock_init(&h->scan_lock);
  4314. rc = hpsa_pci_init(h);
  4315. if (rc != 0)
  4316. goto clean1;
  4317. sprintf(h->devname, HPSA "%d", number_of_controllers);
  4318. h->ctlr = number_of_controllers;
  4319. number_of_controllers++;
  4320. /* configure PCI DMA stuff */
  4321. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  4322. if (rc == 0) {
  4323. dac = 1;
  4324. } else {
  4325. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  4326. if (rc == 0) {
  4327. dac = 0;
  4328. } else {
  4329. dev_err(&pdev->dev, "no suitable DMA available\n");
  4330. goto clean1;
  4331. }
  4332. }
  4333. /* make sure the board interrupts are off */
  4334. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4335. if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
  4336. goto clean2;
  4337. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  4338. h->devname, pdev->device,
  4339. h->intr[h->intr_mode], dac ? "" : " not");
  4340. if (hpsa_allocate_cmd_pool(h))
  4341. goto clean4;
  4342. if (hpsa_allocate_sg_chain_blocks(h))
  4343. goto clean4;
  4344. init_waitqueue_head(&h->scan_wait_queue);
  4345. h->scan_finished = 1; /* no scan currently in progress */
  4346. pci_set_drvdata(pdev, h);
  4347. h->ndevices = 0;
  4348. h->scsi_host = NULL;
  4349. spin_lock_init(&h->devlock);
  4350. hpsa_put_ctlr_into_performant_mode(h);
  4351. /* At this point, the controller is ready to take commands.
  4352. * Now, if reset_devices and the hard reset didn't work, try
  4353. * the soft reset and see if that works.
  4354. */
  4355. if (try_soft_reset) {
  4356. /* This is kind of gross. We may or may not get a completion
  4357. * from the soft reset command, and if we do, then the value
  4358. * from the fifo may or may not be valid. So, we wait 10 secs
  4359. * after the reset throwing away any completions we get during
  4360. * that time. Unregister the interrupt handler and register
  4361. * fake ones to scoop up any residual completions.
  4362. */
  4363. spin_lock_irqsave(&h->lock, flags);
  4364. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4365. spin_unlock_irqrestore(&h->lock, flags);
  4366. free_irqs(h);
  4367. rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
  4368. hpsa_intx_discard_completions);
  4369. if (rc) {
  4370. dev_warn(&h->pdev->dev, "Failed to request_irq after "
  4371. "soft reset.\n");
  4372. goto clean4;
  4373. }
  4374. rc = hpsa_kdump_soft_reset(h);
  4375. if (rc)
  4376. /* Neither hard nor soft reset worked, we're hosed. */
  4377. goto clean4;
  4378. dev_info(&h->pdev->dev, "Board READY.\n");
  4379. dev_info(&h->pdev->dev,
  4380. "Waiting for stale completions to drain.\n");
  4381. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4382. msleep(10000);
  4383. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4384. rc = controller_reset_failed(h->cfgtable);
  4385. if (rc)
  4386. dev_info(&h->pdev->dev,
  4387. "Soft reset appears to have failed.\n");
  4388. /* since the controller's reset, we have to go back and re-init
  4389. * everything. Easiest to just forget what we've done and do it
  4390. * all over again.
  4391. */
  4392. hpsa_undo_allocations_after_kdump_soft_reset(h);
  4393. try_soft_reset = 0;
  4394. if (rc)
  4395. /* don't go to clean4, we already unallocated */
  4396. return -ENODEV;
  4397. goto reinit_after_soft_reset;
  4398. }
  4399. /* Turn the interrupts on so we can service requests */
  4400. h->access.set_intr_mask(h, HPSA_INTR_ON);
  4401. hpsa_hba_inquiry(h);
  4402. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  4403. start_controller_lockup_detector(h);
  4404. return 1;
  4405. clean4:
  4406. hpsa_free_sg_chain_blocks(h);
  4407. hpsa_free_cmd_pool(h);
  4408. free_irqs(h);
  4409. clean2:
  4410. clean1:
  4411. kfree(h);
  4412. return rc;
  4413. }
  4414. static void hpsa_flush_cache(struct ctlr_info *h)
  4415. {
  4416. char *flush_buf;
  4417. struct CommandList *c;
  4418. flush_buf = kzalloc(4, GFP_KERNEL);
  4419. if (!flush_buf)
  4420. return;
  4421. c = cmd_special_alloc(h);
  4422. if (!c) {
  4423. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  4424. goto out_of_memory;
  4425. }
  4426. if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  4427. RAID_CTLR_LUNID, TYPE_CMD)) {
  4428. goto out;
  4429. }
  4430. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  4431. if (c->err_info->CommandStatus != 0)
  4432. out:
  4433. dev_warn(&h->pdev->dev,
  4434. "error flushing cache on controller\n");
  4435. cmd_special_free(h, c);
  4436. out_of_memory:
  4437. kfree(flush_buf);
  4438. }
  4439. static void hpsa_shutdown(struct pci_dev *pdev)
  4440. {
  4441. struct ctlr_info *h;
  4442. h = pci_get_drvdata(pdev);
  4443. /* Turn board interrupts off and send the flush cache command
  4444. * sendcmd will turn off interrupt, and send the flush...
  4445. * To write all data in the battery backed cache to disks
  4446. */
  4447. hpsa_flush_cache(h);
  4448. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  4449. hpsa_free_irqs_and_disable_msix(h);
  4450. }
  4451. static void hpsa_free_device_info(struct ctlr_info *h)
  4452. {
  4453. int i;
  4454. for (i = 0; i < h->ndevices; i++)
  4455. kfree(h->dev[i]);
  4456. }
  4457. static void hpsa_remove_one(struct pci_dev *pdev)
  4458. {
  4459. struct ctlr_info *h;
  4460. if (pci_get_drvdata(pdev) == NULL) {
  4461. dev_err(&pdev->dev, "unable to remove device\n");
  4462. return;
  4463. }
  4464. h = pci_get_drvdata(pdev);
  4465. stop_controller_lockup_detector(h);
  4466. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  4467. hpsa_shutdown(pdev);
  4468. iounmap(h->vaddr);
  4469. iounmap(h->transtable);
  4470. iounmap(h->cfgtable);
  4471. hpsa_free_device_info(h);
  4472. hpsa_free_sg_chain_blocks(h);
  4473. pci_free_consistent(h->pdev,
  4474. h->nr_cmds * sizeof(struct CommandList),
  4475. h->cmd_pool, h->cmd_pool_dhandle);
  4476. pci_free_consistent(h->pdev,
  4477. h->nr_cmds * sizeof(struct ErrorInfo),
  4478. h->errinfo_pool, h->errinfo_pool_dhandle);
  4479. pci_free_consistent(h->pdev, h->reply_pool_size,
  4480. h->reply_pool, h->reply_pool_dhandle);
  4481. kfree(h->cmd_pool_bits);
  4482. kfree(h->blockFetchTable);
  4483. kfree(h->hba_inquiry_data);
  4484. pci_disable_device(pdev);
  4485. pci_release_regions(pdev);
  4486. kfree(h);
  4487. }
  4488. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  4489. __attribute__((unused)) pm_message_t state)
  4490. {
  4491. return -ENOSYS;
  4492. }
  4493. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  4494. {
  4495. return -ENOSYS;
  4496. }
  4497. static struct pci_driver hpsa_pci_driver = {
  4498. .name = HPSA,
  4499. .probe = hpsa_init_one,
  4500. .remove = hpsa_remove_one,
  4501. .id_table = hpsa_pci_device_id, /* id_table */
  4502. .shutdown = hpsa_shutdown,
  4503. .suspend = hpsa_suspend,
  4504. .resume = hpsa_resume,
  4505. };
  4506. /* Fill in bucket_map[], given nsgs (the max number of
  4507. * scatter gather elements supported) and bucket[],
  4508. * which is an array of 8 integers. The bucket[] array
  4509. * contains 8 different DMA transfer sizes (in 16
  4510. * byte increments) which the controller uses to fetch
  4511. * commands. This function fills in bucket_map[], which
  4512. * maps a given number of scatter gather elements to one of
  4513. * the 8 DMA transfer sizes. The point of it is to allow the
  4514. * controller to only do as much DMA as needed to fetch the
  4515. * command, with the DMA transfer size encoded in the lower
  4516. * bits of the command address.
  4517. */
  4518. static void calc_bucket_map(int bucket[], int num_buckets,
  4519. int nsgs, int *bucket_map)
  4520. {
  4521. int i, j, b, size;
  4522. /* even a command with 0 SGs requires 4 blocks */
  4523. #define MINIMUM_TRANSFER_BLOCKS 4
  4524. #define NUM_BUCKETS 8
  4525. /* Note, bucket_map must have nsgs+1 entries. */
  4526. for (i = 0; i <= nsgs; i++) {
  4527. /* Compute size of a command with i SG entries */
  4528. size = i + MINIMUM_TRANSFER_BLOCKS;
  4529. b = num_buckets; /* Assume the biggest bucket */
  4530. /* Find the bucket that is just big enough */
  4531. for (j = 0; j < 8; j++) {
  4532. if (bucket[j] >= size) {
  4533. b = j;
  4534. break;
  4535. }
  4536. }
  4537. /* for a command with i SG entries, use bucket b. */
  4538. bucket_map[i] = b;
  4539. }
  4540. }
  4541. static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
  4542. {
  4543. int i;
  4544. unsigned long register_value;
  4545. /* This is a bit complicated. There are 8 registers on
  4546. * the controller which we write to to tell it 8 different
  4547. * sizes of commands which there may be. It's a way of
  4548. * reducing the DMA done to fetch each command. Encoded into
  4549. * each command's tag are 3 bits which communicate to the controller
  4550. * which of the eight sizes that command fits within. The size of
  4551. * each command depends on how many scatter gather entries there are.
  4552. * Each SG entry requires 16 bytes. The eight registers are programmed
  4553. * with the number of 16-byte blocks a command of that size requires.
  4554. * The smallest command possible requires 5 such 16 byte blocks.
  4555. * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
  4556. * blocks. Note, this only extends to the SG entries contained
  4557. * within the command block, and does not extend to chained blocks
  4558. * of SG elements. bft[] contains the eight values we write to
  4559. * the registers. They are not evenly distributed, but have more
  4560. * sizes for small commands, and fewer sizes for larger commands.
  4561. */
  4562. int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
  4563. BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
  4564. /* 5 = 1 s/g entry or 4k
  4565. * 6 = 2 s/g entry or 8k
  4566. * 8 = 4 s/g entry or 16k
  4567. * 10 = 6 s/g entry or 24k
  4568. */
  4569. /* Controller spec: zero out this buffer. */
  4570. memset(h->reply_pool, 0, h->reply_pool_size);
  4571. bft[7] = SG_ENTRIES_IN_CMD + 4;
  4572. calc_bucket_map(bft, ARRAY_SIZE(bft),
  4573. SG_ENTRIES_IN_CMD, h->blockFetchTable);
  4574. for (i = 0; i < 8; i++)
  4575. writel(bft[i], &h->transtable->BlockFetch[i]);
  4576. /* size of controller ring buffer */
  4577. writel(h->max_commands, &h->transtable->RepQSize);
  4578. writel(h->nreply_queues, &h->transtable->RepQCount);
  4579. writel(0, &h->transtable->RepQCtrAddrLow32);
  4580. writel(0, &h->transtable->RepQCtrAddrHigh32);
  4581. for (i = 0; i < h->nreply_queues; i++) {
  4582. writel(0, &h->transtable->RepQAddr[i].upper);
  4583. writel(h->reply_pool_dhandle +
  4584. (h->max_commands * sizeof(u64) * i),
  4585. &h->transtable->RepQAddr[i].lower);
  4586. }
  4587. writel(CFGTBL_Trans_Performant | use_short_tags |
  4588. CFGTBL_Trans_enable_directed_msix,
  4589. &(h->cfgtable->HostWrite.TransportRequest));
  4590. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  4591. hpsa_wait_for_mode_change_ack(h);
  4592. register_value = readl(&(h->cfgtable->TransportActive));
  4593. if (!(register_value & CFGTBL_Trans_Performant)) {
  4594. dev_warn(&h->pdev->dev, "unable to get board into"
  4595. " performant mode\n");
  4596. return;
  4597. }
  4598. /* Change the access methods to the performant access methods */
  4599. h->access = SA5_performant_access;
  4600. h->transMethod = CFGTBL_Trans_Performant;
  4601. }
  4602. static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  4603. {
  4604. u32 trans_support;
  4605. int i;
  4606. if (hpsa_simple_mode)
  4607. return;
  4608. trans_support = readl(&(h->cfgtable->TransportSupport));
  4609. if (!(trans_support & PERFORMANT_MODE))
  4610. return;
  4611. h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
  4612. hpsa_get_max_perf_mode_cmds(h);
  4613. /* Performant mode ring buffer and supporting data structures */
  4614. h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
  4615. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  4616. &(h->reply_pool_dhandle));
  4617. for (i = 0; i < h->nreply_queues; i++) {
  4618. h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
  4619. h->reply_queue[i].size = h->max_commands;
  4620. h->reply_queue[i].wraparound = 1; /* spec: init to 1 */
  4621. h->reply_queue[i].current_entry = 0;
  4622. }
  4623. /* Need a block fetch table for performant mode */
  4624. h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
  4625. sizeof(u32)), GFP_KERNEL);
  4626. if ((h->reply_pool == NULL)
  4627. || (h->blockFetchTable == NULL))
  4628. goto clean_up;
  4629. hpsa_enter_performant_mode(h,
  4630. trans_support & CFGTBL_Trans_use_short_tags);
  4631. return;
  4632. clean_up:
  4633. if (h->reply_pool)
  4634. pci_free_consistent(h->pdev, h->reply_pool_size,
  4635. h->reply_pool, h->reply_pool_dhandle);
  4636. kfree(h->blockFetchTable);
  4637. }
  4638. /*
  4639. * This is it. Register the PCI driver information for the cards we control
  4640. * the OS will call our registered routines when it finds one of our cards.
  4641. */
  4642. static int __init hpsa_init(void)
  4643. {
  4644. return pci_register_driver(&hpsa_pci_driver);
  4645. }
  4646. static void __exit hpsa_cleanup(void)
  4647. {
  4648. pci_unregister_driver(&hpsa_pci_driver);
  4649. }
  4650. module_init(hpsa_init);
  4651. module_exit(hpsa_cleanup);