src.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833
  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc.
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000-2010 Adaptec, Inc.
  9. * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2, or (at your option)
  14. * any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; see the file COPYING. If not, write to
  23. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Module Name:
  26. * src.c
  27. *
  28. * Abstract: Hardware Device Interface for PMC SRC based controllers
  29. *
  30. */
  31. #include <linux/kernel.h>
  32. #include <linux/init.h>
  33. #include <linux/types.h>
  34. #include <linux/pci.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/slab.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/delay.h>
  39. #include <linux/completion.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <scsi/scsi_host.h>
  43. #include "aacraid.h"
  44. static irqreturn_t aac_src_intr_message(int irq, void *dev_id)
  45. {
  46. struct aac_dev *dev = dev_id;
  47. unsigned long bellbits, bellbits_shifted;
  48. int our_interrupt = 0;
  49. int isFastResponse;
  50. u32 index, handle;
  51. bellbits = src_readl(dev, MUnit.ODR_R);
  52. if (bellbits & PmDoorBellResponseSent) {
  53. bellbits = PmDoorBellResponseSent;
  54. /* handle async. status */
  55. src_writel(dev, MUnit.ODR_C, bellbits);
  56. src_readl(dev, MUnit.ODR_C);
  57. our_interrupt = 1;
  58. index = dev->host_rrq_idx;
  59. for (;;) {
  60. isFastResponse = 0;
  61. /* remove toggle bit (31) */
  62. handle = le32_to_cpu(dev->host_rrq[index]) & 0x7fffffff;
  63. /* check fast response bit (30) */
  64. if (handle & 0x40000000)
  65. isFastResponse = 1;
  66. handle &= 0x0000ffff;
  67. if (handle == 0)
  68. break;
  69. aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL);
  70. dev->host_rrq[index++] = 0;
  71. if (index == dev->scsi_host_ptr->can_queue +
  72. AAC_NUM_MGT_FIB)
  73. index = 0;
  74. dev->host_rrq_idx = index;
  75. }
  76. } else {
  77. bellbits_shifted = (bellbits >> SRC_ODR_SHIFT);
  78. if (bellbits_shifted & DoorBellAifPending) {
  79. src_writel(dev, MUnit.ODR_C, bellbits);
  80. src_readl(dev, MUnit.ODR_C);
  81. our_interrupt = 1;
  82. /* handle AIF */
  83. aac_intr_normal(dev, 0, 2, 0, NULL);
  84. } else if (bellbits_shifted & OUTBOUNDDOORBELL_0) {
  85. unsigned long sflags;
  86. struct list_head *entry;
  87. int send_it = 0;
  88. extern int aac_sync_mode;
  89. src_writel(dev, MUnit.ODR_C, bellbits);
  90. src_readl(dev, MUnit.ODR_C);
  91. if (!aac_sync_mode) {
  92. src_writel(dev, MUnit.ODR_C, bellbits);
  93. src_readl(dev, MUnit.ODR_C);
  94. our_interrupt = 1;
  95. }
  96. if (dev->sync_fib) {
  97. our_interrupt = 1;
  98. if (dev->sync_fib->callback)
  99. dev->sync_fib->callback(dev->sync_fib->callback_data,
  100. dev->sync_fib);
  101. spin_lock_irqsave(&dev->sync_fib->event_lock, sflags);
  102. if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) {
  103. dev->management_fib_count--;
  104. up(&dev->sync_fib->event_wait);
  105. }
  106. spin_unlock_irqrestore(&dev->sync_fib->event_lock, sflags);
  107. spin_lock_irqsave(&dev->sync_lock, sflags);
  108. if (!list_empty(&dev->sync_fib_list)) {
  109. entry = dev->sync_fib_list.next;
  110. dev->sync_fib = list_entry(entry, struct fib, fiblink);
  111. list_del(entry);
  112. send_it = 1;
  113. } else {
  114. dev->sync_fib = NULL;
  115. }
  116. spin_unlock_irqrestore(&dev->sync_lock, sflags);
  117. if (send_it) {
  118. aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB,
  119. (u32)dev->sync_fib->hw_fib_pa, 0, 0, 0, 0, 0,
  120. NULL, NULL, NULL, NULL, NULL);
  121. }
  122. }
  123. }
  124. }
  125. if (our_interrupt) {
  126. return IRQ_HANDLED;
  127. }
  128. return IRQ_NONE;
  129. }
  130. /**
  131. * aac_src_disable_interrupt - Disable interrupts
  132. * @dev: Adapter
  133. */
  134. static void aac_src_disable_interrupt(struct aac_dev *dev)
  135. {
  136. src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
  137. }
  138. /**
  139. * aac_src_enable_interrupt_message - Enable interrupts
  140. * @dev: Adapter
  141. */
  142. static void aac_src_enable_interrupt_message(struct aac_dev *dev)
  143. {
  144. src_writel(dev, MUnit.OIMR, dev->OIMR = 0xfffffff8);
  145. }
  146. /**
  147. * src_sync_cmd - send a command and wait
  148. * @dev: Adapter
  149. * @command: Command to execute
  150. * @p1: first parameter
  151. * @ret: adapter status
  152. *
  153. * This routine will send a synchronous command to the adapter and wait
  154. * for its completion.
  155. */
  156. static int src_sync_cmd(struct aac_dev *dev, u32 command,
  157. u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
  158. u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
  159. {
  160. unsigned long start;
  161. int ok;
  162. /*
  163. * Write the command into Mailbox 0
  164. */
  165. writel(command, &dev->IndexRegs->Mailbox[0]);
  166. /*
  167. * Write the parameters into Mailboxes 1 - 6
  168. */
  169. writel(p1, &dev->IndexRegs->Mailbox[1]);
  170. writel(p2, &dev->IndexRegs->Mailbox[2]);
  171. writel(p3, &dev->IndexRegs->Mailbox[3]);
  172. writel(p4, &dev->IndexRegs->Mailbox[4]);
  173. /*
  174. * Clear the synch command doorbell to start on a clean slate.
  175. */
  176. src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
  177. /*
  178. * Disable doorbell interrupts
  179. */
  180. src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff);
  181. /*
  182. * Force the completion of the mask register write before issuing
  183. * the interrupt.
  184. */
  185. src_readl(dev, MUnit.OIMR);
  186. /*
  187. * Signal that there is a new synch command
  188. */
  189. src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT);
  190. if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) {
  191. ok = 0;
  192. start = jiffies;
  193. /*
  194. * Wait up to 5 minutes
  195. */
  196. while (time_before(jiffies, start+300*HZ)) {
  197. udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
  198. /*
  199. * Mon960 will set doorbell0 bit when it has completed the command.
  200. */
  201. if ((src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT) & OUTBOUNDDOORBELL_0) {
  202. /*
  203. * Clear the doorbell.
  204. */
  205. src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
  206. ok = 1;
  207. break;
  208. }
  209. /*
  210. * Yield the processor in case we are slow
  211. */
  212. msleep(1);
  213. }
  214. if (unlikely(ok != 1)) {
  215. /*
  216. * Restore interrupt mask even though we timed out
  217. */
  218. aac_adapter_enable_int(dev);
  219. return -ETIMEDOUT;
  220. }
  221. /*
  222. * Pull the synch status from Mailbox 0.
  223. */
  224. if (status)
  225. *status = readl(&dev->IndexRegs->Mailbox[0]);
  226. if (r1)
  227. *r1 = readl(&dev->IndexRegs->Mailbox[1]);
  228. if (r2)
  229. *r2 = readl(&dev->IndexRegs->Mailbox[2]);
  230. if (r3)
  231. *r3 = readl(&dev->IndexRegs->Mailbox[3]);
  232. if (r4)
  233. *r4 = readl(&dev->IndexRegs->Mailbox[4]);
  234. /*
  235. * Clear the synch command doorbell.
  236. */
  237. src_writel(dev, MUnit.ODR_C, OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT);
  238. }
  239. /*
  240. * Restore interrupt mask
  241. */
  242. aac_adapter_enable_int(dev);
  243. return 0;
  244. }
  245. /**
  246. * aac_src_interrupt_adapter - interrupt adapter
  247. * @dev: Adapter
  248. *
  249. * Send an interrupt to the i960 and breakpoint it.
  250. */
  251. static void aac_src_interrupt_adapter(struct aac_dev *dev)
  252. {
  253. src_sync_cmd(dev, BREAKPOINT_REQUEST,
  254. 0, 0, 0, 0, 0, 0,
  255. NULL, NULL, NULL, NULL, NULL);
  256. }
  257. /**
  258. * aac_src_notify_adapter - send an event to the adapter
  259. * @dev: Adapter
  260. * @event: Event to send
  261. *
  262. * Notify the i960 that something it probably cares about has
  263. * happened.
  264. */
  265. static void aac_src_notify_adapter(struct aac_dev *dev, u32 event)
  266. {
  267. switch (event) {
  268. case AdapNormCmdQue:
  269. src_writel(dev, MUnit.ODR_C,
  270. INBOUNDDOORBELL_1 << SRC_ODR_SHIFT);
  271. break;
  272. case HostNormRespNotFull:
  273. src_writel(dev, MUnit.ODR_C,
  274. INBOUNDDOORBELL_4 << SRC_ODR_SHIFT);
  275. break;
  276. case AdapNormRespQue:
  277. src_writel(dev, MUnit.ODR_C,
  278. INBOUNDDOORBELL_2 << SRC_ODR_SHIFT);
  279. break;
  280. case HostNormCmdNotFull:
  281. src_writel(dev, MUnit.ODR_C,
  282. INBOUNDDOORBELL_3 << SRC_ODR_SHIFT);
  283. break;
  284. case FastIo:
  285. src_writel(dev, MUnit.ODR_C,
  286. INBOUNDDOORBELL_6 << SRC_ODR_SHIFT);
  287. break;
  288. case AdapPrintfDone:
  289. src_writel(dev, MUnit.ODR_C,
  290. INBOUNDDOORBELL_5 << SRC_ODR_SHIFT);
  291. break;
  292. default:
  293. BUG();
  294. break;
  295. }
  296. }
  297. /**
  298. * aac_src_start_adapter - activate adapter
  299. * @dev: Adapter
  300. *
  301. * Start up processing on an i960 based AAC adapter
  302. */
  303. static void aac_src_start_adapter(struct aac_dev *dev)
  304. {
  305. struct aac_init *init;
  306. /* reset host_rrq_idx first */
  307. dev->host_rrq_idx = 0;
  308. init = dev->init;
  309. init->HostElapsedSeconds = cpu_to_le32(get_seconds());
  310. /* We can only use a 32 bit address here */
  311. src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
  312. 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  313. }
  314. /**
  315. * aac_src_check_health
  316. * @dev: device to check if healthy
  317. *
  318. * Will attempt to determine if the specified adapter is alive and
  319. * capable of handling requests, returning 0 if alive.
  320. */
  321. static int aac_src_check_health(struct aac_dev *dev)
  322. {
  323. u32 status = src_readl(dev, MUnit.OMR);
  324. /*
  325. * Check to see if the board failed any self tests.
  326. */
  327. if (unlikely(status & SELF_TEST_FAILED))
  328. return -1;
  329. /*
  330. * Check to see if the board panic'd.
  331. */
  332. if (unlikely(status & KERNEL_PANIC))
  333. return (status >> 16) & 0xFF;
  334. /*
  335. * Wait for the adapter to be up and running.
  336. */
  337. if (unlikely(!(status & KERNEL_UP_AND_RUNNING)))
  338. return -3;
  339. /*
  340. * Everything is OK
  341. */
  342. return 0;
  343. }
  344. /**
  345. * aac_src_deliver_message
  346. * @fib: fib to issue
  347. *
  348. * Will send a fib, returning 0 if successful.
  349. */
  350. static int aac_src_deliver_message(struct fib *fib)
  351. {
  352. struct aac_dev *dev = fib->dev;
  353. struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue];
  354. unsigned long qflags;
  355. u32 fibsize;
  356. dma_addr_t address;
  357. struct aac_fib_xporthdr *pFibX;
  358. u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size);
  359. spin_lock_irqsave(q->lock, qflags);
  360. q->numpending++;
  361. spin_unlock_irqrestore(q->lock, qflags);
  362. if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
  363. /* Calculate the amount to the fibsize bits */
  364. fibsize = (hdr_size + 127) / 128 - 1;
  365. if (fibsize > (ALIGN32 - 1))
  366. return -EMSGSIZE;
  367. /* New FIB header, 32-bit */
  368. address = fib->hw_fib_pa;
  369. fib->hw_fib_va->header.StructType = FIB_MAGIC2;
  370. fib->hw_fib_va->header.SenderFibAddress = (u32)address;
  371. fib->hw_fib_va->header.u.TimeStamp = 0;
  372. BUG_ON(upper_32_bits(address) != 0L);
  373. address |= fibsize;
  374. } else {
  375. /* Calculate the amount to the fibsize bits */
  376. fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1;
  377. if (fibsize > (ALIGN32 - 1))
  378. return -EMSGSIZE;
  379. /* Fill XPORT header */
  380. pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr);
  381. pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle);
  382. pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa);
  383. pFibX->Size = cpu_to_le32(hdr_size);
  384. /*
  385. * The xport header has been 32-byte aligned for us so that fibsize
  386. * can be masked out of this address by hardware. -- BenC
  387. */
  388. address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr);
  389. if (address & (ALIGN32 - 1))
  390. return -EINVAL;
  391. address |= fibsize;
  392. }
  393. src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff);
  394. src_writel(dev, MUnit.IQ_L, address & 0xffffffff);
  395. return 0;
  396. }
  397. /**
  398. * aac_src_ioremap
  399. * @size: mapping resize request
  400. *
  401. */
  402. static int aac_src_ioremap(struct aac_dev *dev, u32 size)
  403. {
  404. if (!size) {
  405. iounmap(dev->regs.src.bar1);
  406. dev->regs.src.bar1 = NULL;
  407. iounmap(dev->regs.src.bar0);
  408. dev->base = dev->regs.src.bar0 = NULL;
  409. return 0;
  410. }
  411. dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2),
  412. AAC_MIN_SRC_BAR1_SIZE);
  413. dev->base = NULL;
  414. if (dev->regs.src.bar1 == NULL)
  415. return -1;
  416. dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
  417. if (dev->base == NULL) {
  418. iounmap(dev->regs.src.bar1);
  419. dev->regs.src.bar1 = NULL;
  420. return -1;
  421. }
  422. dev->IndexRegs = &((struct src_registers __iomem *)
  423. dev->base)->u.tupelo.IndexRegs;
  424. return 0;
  425. }
  426. /**
  427. * aac_srcv_ioremap
  428. * @size: mapping resize request
  429. *
  430. */
  431. static int aac_srcv_ioremap(struct aac_dev *dev, u32 size)
  432. {
  433. if (!size) {
  434. iounmap(dev->regs.src.bar0);
  435. dev->base = dev->regs.src.bar0 = NULL;
  436. return 0;
  437. }
  438. dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size);
  439. if (dev->base == NULL)
  440. return -1;
  441. dev->IndexRegs = &((struct src_registers __iomem *)
  442. dev->base)->u.denali.IndexRegs;
  443. return 0;
  444. }
  445. static int aac_src_restart_adapter(struct aac_dev *dev, int bled)
  446. {
  447. u32 var, reset_mask;
  448. if (bled >= 0) {
  449. if (bled)
  450. printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n",
  451. dev->name, dev->id, bled);
  452. bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS,
  453. 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL);
  454. if (bled || (var != 0x00000001))
  455. return -EINVAL;
  456. if (dev->supplement_adapter_info.SupportedOptions2 &
  457. AAC_OPTION_DOORBELL_RESET) {
  458. src_writel(dev, MUnit.IDR, reset_mask);
  459. msleep(5000); /* Delay 5 seconds */
  460. }
  461. }
  462. if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC)
  463. return -ENODEV;
  464. if (startup_timeout < 300)
  465. startup_timeout = 300;
  466. return 0;
  467. }
  468. /**
  469. * aac_src_select_comm - Select communications method
  470. * @dev: Adapter
  471. * @comm: communications method
  472. */
  473. int aac_src_select_comm(struct aac_dev *dev, int comm)
  474. {
  475. switch (comm) {
  476. case AAC_COMM_MESSAGE:
  477. dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message;
  478. dev->a_ops.adapter_intr = aac_src_intr_message;
  479. dev->a_ops.adapter_deliver = aac_src_deliver_message;
  480. break;
  481. default:
  482. return 1;
  483. }
  484. return 0;
  485. }
  486. /**
  487. * aac_src_init - initialize an Cardinal Frey Bar card
  488. * @dev: device to configure
  489. *
  490. */
  491. int aac_src_init(struct aac_dev *dev)
  492. {
  493. unsigned long start;
  494. unsigned long status;
  495. int restart = 0;
  496. int instance = dev->id;
  497. const char *name = dev->name;
  498. dev->a_ops.adapter_ioremap = aac_src_ioremap;
  499. dev->a_ops.adapter_comm = aac_src_select_comm;
  500. dev->base_size = AAC_MIN_SRC_BAR0_SIZE;
  501. if (aac_adapter_ioremap(dev, dev->base_size)) {
  502. printk(KERN_WARNING "%s: unable to map adapter.\n", name);
  503. goto error_iounmap;
  504. }
  505. /* Failure to reset here is an option ... */
  506. dev->a_ops.adapter_sync_cmd = src_sync_cmd;
  507. dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
  508. if ((aac_reset_devices || reset_devices) &&
  509. !aac_src_restart_adapter(dev, 0))
  510. ++restart;
  511. /*
  512. * Check to see if the board panic'd while booting.
  513. */
  514. status = src_readl(dev, MUnit.OMR);
  515. if (status & KERNEL_PANIC) {
  516. if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
  517. goto error_iounmap;
  518. ++restart;
  519. }
  520. /*
  521. * Check to see if the board failed any self tests.
  522. */
  523. status = src_readl(dev, MUnit.OMR);
  524. if (status & SELF_TEST_FAILED) {
  525. printk(KERN_ERR "%s%d: adapter self-test failed.\n",
  526. dev->name, instance);
  527. goto error_iounmap;
  528. }
  529. /*
  530. * Check to see if the monitor panic'd while booting.
  531. */
  532. if (status & MONITOR_PANIC) {
  533. printk(KERN_ERR "%s%d: adapter monitor panic.\n",
  534. dev->name, instance);
  535. goto error_iounmap;
  536. }
  537. start = jiffies;
  538. /*
  539. * Wait for the adapter to be up and running. Wait up to 3 minutes
  540. */
  541. while (!((status = src_readl(dev, MUnit.OMR)) &
  542. KERNEL_UP_AND_RUNNING)) {
  543. if ((restart &&
  544. (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
  545. time_after(jiffies, start+HZ*startup_timeout)) {
  546. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  547. dev->name, instance, status);
  548. goto error_iounmap;
  549. }
  550. if (!restart &&
  551. ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
  552. time_after(jiffies, start + HZ *
  553. ((startup_timeout > 60)
  554. ? (startup_timeout - 60)
  555. : (startup_timeout / 2))))) {
  556. if (likely(!aac_src_restart_adapter(dev,
  557. aac_src_check_health(dev))))
  558. start = jiffies;
  559. ++restart;
  560. }
  561. msleep(1);
  562. }
  563. if (restart && aac_commit)
  564. aac_commit = 1;
  565. /*
  566. * Fill in the common function dispatch table.
  567. */
  568. dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
  569. dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
  570. dev->a_ops.adapter_notify = aac_src_notify_adapter;
  571. dev->a_ops.adapter_sync_cmd = src_sync_cmd;
  572. dev->a_ops.adapter_check_health = aac_src_check_health;
  573. dev->a_ops.adapter_restart = aac_src_restart_adapter;
  574. /*
  575. * First clear out all interrupts. Then enable the one's that we
  576. * can handle.
  577. */
  578. aac_adapter_comm(dev, AAC_COMM_MESSAGE);
  579. aac_adapter_disable_int(dev);
  580. src_writel(dev, MUnit.ODR_C, 0xffffffff);
  581. aac_adapter_enable_int(dev);
  582. if (aac_init_adapter(dev) == NULL)
  583. goto error_iounmap;
  584. if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1)
  585. goto error_iounmap;
  586. dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
  587. if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
  588. IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
  589. if (dev->msi)
  590. pci_disable_msi(dev->pdev);
  591. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  592. name, instance);
  593. goto error_iounmap;
  594. }
  595. dev->dbg_base = pci_resource_start(dev->pdev, 2);
  596. dev->dbg_base_mapped = dev->regs.src.bar1;
  597. dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE;
  598. aac_adapter_enable_int(dev);
  599. if (!dev->sync_mode) {
  600. /*
  601. * Tell the adapter that all is configured, and it can
  602. * start accepting requests
  603. */
  604. aac_src_start_adapter(dev);
  605. }
  606. return 0;
  607. error_iounmap:
  608. return -1;
  609. }
  610. /**
  611. * aac_srcv_init - initialize an SRCv card
  612. * @dev: device to configure
  613. *
  614. */
  615. int aac_srcv_init(struct aac_dev *dev)
  616. {
  617. unsigned long start;
  618. unsigned long status;
  619. int restart = 0;
  620. int instance = dev->id;
  621. const char *name = dev->name;
  622. dev->a_ops.adapter_ioremap = aac_srcv_ioremap;
  623. dev->a_ops.adapter_comm = aac_src_select_comm;
  624. dev->base_size = AAC_MIN_SRCV_BAR0_SIZE;
  625. if (aac_adapter_ioremap(dev, dev->base_size)) {
  626. printk(KERN_WARNING "%s: unable to map adapter.\n", name);
  627. goto error_iounmap;
  628. }
  629. /* Failure to reset here is an option ... */
  630. dev->a_ops.adapter_sync_cmd = src_sync_cmd;
  631. dev->a_ops.adapter_enable_int = aac_src_disable_interrupt;
  632. if ((aac_reset_devices || reset_devices) &&
  633. !aac_src_restart_adapter(dev, 0))
  634. ++restart;
  635. /*
  636. * Check to see if flash update is running.
  637. * Wait for the adapter to be up and running. Wait up to 5 minutes
  638. */
  639. status = src_readl(dev, MUnit.OMR);
  640. if (status & FLASH_UPD_PENDING) {
  641. start = jiffies;
  642. do {
  643. status = src_readl(dev, MUnit.OMR);
  644. if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) {
  645. printk(KERN_ERR "%s%d: adapter flash update failed.\n",
  646. dev->name, instance);
  647. goto error_iounmap;
  648. }
  649. } while (!(status & FLASH_UPD_SUCCESS) &&
  650. !(status & FLASH_UPD_FAILED));
  651. /* Delay 10 seconds.
  652. * Because right now FW is doing a soft reset,
  653. * do not read scratch pad register at this time
  654. */
  655. ssleep(10);
  656. }
  657. /*
  658. * Check to see if the board panic'd while booting.
  659. */
  660. status = src_readl(dev, MUnit.OMR);
  661. if (status & KERNEL_PANIC) {
  662. if (aac_src_restart_adapter(dev, aac_src_check_health(dev)))
  663. goto error_iounmap;
  664. ++restart;
  665. }
  666. /*
  667. * Check to see if the board failed any self tests.
  668. */
  669. status = src_readl(dev, MUnit.OMR);
  670. if (status & SELF_TEST_FAILED) {
  671. printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
  672. goto error_iounmap;
  673. }
  674. /*
  675. * Check to see if the monitor panic'd while booting.
  676. */
  677. if (status & MONITOR_PANIC) {
  678. printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
  679. goto error_iounmap;
  680. }
  681. start = jiffies;
  682. /*
  683. * Wait for the adapter to be up and running. Wait up to 3 minutes
  684. */
  685. while (!((status = src_readl(dev, MUnit.OMR)) &
  686. KERNEL_UP_AND_RUNNING) ||
  687. status == 0xffffffff) {
  688. if ((restart &&
  689. (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) ||
  690. time_after(jiffies, start+HZ*startup_timeout)) {
  691. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  692. dev->name, instance, status);
  693. goto error_iounmap;
  694. }
  695. if (!restart &&
  696. ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) ||
  697. time_after(jiffies, start + HZ *
  698. ((startup_timeout > 60)
  699. ? (startup_timeout - 60)
  700. : (startup_timeout / 2))))) {
  701. if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev))))
  702. start = jiffies;
  703. ++restart;
  704. }
  705. msleep(1);
  706. }
  707. if (restart && aac_commit)
  708. aac_commit = 1;
  709. /*
  710. * Fill in the common function dispatch table.
  711. */
  712. dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter;
  713. dev->a_ops.adapter_disable_int = aac_src_disable_interrupt;
  714. dev->a_ops.adapter_notify = aac_src_notify_adapter;
  715. dev->a_ops.adapter_sync_cmd = src_sync_cmd;
  716. dev->a_ops.adapter_check_health = aac_src_check_health;
  717. dev->a_ops.adapter_restart = aac_src_restart_adapter;
  718. /*
  719. * First clear out all interrupts. Then enable the one's that we
  720. * can handle.
  721. */
  722. aac_adapter_comm(dev, AAC_COMM_MESSAGE);
  723. aac_adapter_disable_int(dev);
  724. src_writel(dev, MUnit.ODR_C, 0xffffffff);
  725. aac_adapter_enable_int(dev);
  726. if (aac_init_adapter(dev) == NULL)
  727. goto error_iounmap;
  728. if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2)
  729. goto error_iounmap;
  730. dev->msi = aac_msi && !pci_enable_msi(dev->pdev);
  731. if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr,
  732. IRQF_SHARED|IRQF_DISABLED, "aacraid", dev) < 0) {
  733. if (dev->msi)
  734. pci_disable_msi(dev->pdev);
  735. printk(KERN_ERR "%s%d: Interrupt unavailable.\n",
  736. name, instance);
  737. goto error_iounmap;
  738. }
  739. dev->dbg_base = dev->base_start;
  740. dev->dbg_base_mapped = dev->base;
  741. dev->dbg_size = dev->base_size;
  742. aac_adapter_enable_int(dev);
  743. if (!dev->sync_mode) {
  744. /*
  745. * Tell the adapter that all is configured, and it can
  746. * start accepting requests
  747. */
  748. aac_src_start_adapter(dev);
  749. }
  750. return 0;
  751. error_iounmap:
  752. return -1;
  753. }