xen.c 14 KB

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  1. /*
  2. * Xen PCI - handle PCI (INTx) and MSI infrastructure calls for PV, HVM and
  3. * initial domain support. We also handle the DSDT _PRT callbacks for GSI's
  4. * used in HVM and initial domain mode (PV does not parse ACPI, so it has no
  5. * concept of GSIs). Under PV we hook under the pnbbios API for IRQs and
  6. * 0xcf8 PCI configuration read/write.
  7. *
  8. * Author: Ryan Wilson <hap9@epoch.ncsc.mil>
  9. * Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
  10. * Stefano Stabellini <stefano.stabellini@eu.citrix.com>
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/pci.h>
  15. #include <linux/acpi.h>
  16. #include <linux/io.h>
  17. #include <asm/io_apic.h>
  18. #include <asm/pci_x86.h>
  19. #include <asm/xen/hypervisor.h>
  20. #include <xen/features.h>
  21. #include <xen/events.h>
  22. #include <asm/xen/pci.h>
  23. static int xen_pcifront_enable_irq(struct pci_dev *dev)
  24. {
  25. int rc;
  26. int share = 1;
  27. int pirq;
  28. u8 gsi;
  29. rc = pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &gsi);
  30. if (rc < 0) {
  31. dev_warn(&dev->dev, "Xen PCI: failed to read interrupt line: %d\n",
  32. rc);
  33. return rc;
  34. }
  35. /* In PV DomU the Xen PCI backend puts the PIRQ in the interrupt line.*/
  36. pirq = gsi;
  37. if (gsi < NR_IRQS_LEGACY)
  38. share = 0;
  39. rc = xen_bind_pirq_gsi_to_irq(gsi, pirq, share, "pcifront");
  40. if (rc < 0) {
  41. dev_warn(&dev->dev, "Xen PCI: failed to bind GSI%d (PIRQ%d) to IRQ: %d\n",
  42. gsi, pirq, rc);
  43. return rc;
  44. }
  45. dev->irq = rc;
  46. dev_info(&dev->dev, "Xen PCI mapped GSI%d to IRQ%d\n", gsi, dev->irq);
  47. return 0;
  48. }
  49. #ifdef CONFIG_ACPI
  50. static int xen_register_pirq(u32 gsi, int gsi_override, int triggering,
  51. bool set_pirq)
  52. {
  53. int rc, pirq = -1, irq = -1;
  54. struct physdev_map_pirq map_irq;
  55. int shareable = 0;
  56. char *name;
  57. irq = xen_irq_from_gsi(gsi);
  58. if (irq > 0)
  59. return irq;
  60. if (set_pirq)
  61. pirq = gsi;
  62. map_irq.domid = DOMID_SELF;
  63. map_irq.type = MAP_PIRQ_TYPE_GSI;
  64. map_irq.index = gsi;
  65. map_irq.pirq = pirq;
  66. rc = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq, &map_irq);
  67. if (rc) {
  68. printk(KERN_WARNING "xen map irq failed %d\n", rc);
  69. return -1;
  70. }
  71. if (triggering == ACPI_EDGE_SENSITIVE) {
  72. shareable = 0;
  73. name = "ioapic-edge";
  74. } else {
  75. shareable = 1;
  76. name = "ioapic-level";
  77. }
  78. if (gsi_override >= 0)
  79. gsi = gsi_override;
  80. irq = xen_bind_pirq_gsi_to_irq(gsi, map_irq.pirq, shareable, name);
  81. if (irq < 0)
  82. goto out;
  83. printk(KERN_DEBUG "xen: --> pirq=%d -> irq=%d (gsi=%d)\n", map_irq.pirq, irq, gsi);
  84. out:
  85. return irq;
  86. }
  87. static int acpi_register_gsi_xen_hvm(struct device *dev, u32 gsi,
  88. int trigger, int polarity)
  89. {
  90. if (!xen_hvm_domain())
  91. return -1;
  92. return xen_register_pirq(gsi, -1 /* no GSI override */, trigger,
  93. false /* no mapping of GSI to PIRQ */);
  94. }
  95. #ifdef CONFIG_XEN_DOM0
  96. static int xen_register_gsi(u32 gsi, int gsi_override, int triggering, int polarity)
  97. {
  98. int rc, irq;
  99. struct physdev_setup_gsi setup_gsi;
  100. if (!xen_pv_domain())
  101. return -1;
  102. printk(KERN_DEBUG "xen: registering gsi %u triggering %d polarity %d\n",
  103. gsi, triggering, polarity);
  104. irq = xen_register_pirq(gsi, gsi_override, triggering, true);
  105. setup_gsi.gsi = gsi;
  106. setup_gsi.triggering = (triggering == ACPI_EDGE_SENSITIVE ? 0 : 1);
  107. setup_gsi.polarity = (polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
  108. rc = HYPERVISOR_physdev_op(PHYSDEVOP_setup_gsi, &setup_gsi);
  109. if (rc == -EEXIST)
  110. printk(KERN_INFO "Already setup the GSI :%d\n", gsi);
  111. else if (rc) {
  112. printk(KERN_ERR "Failed to setup GSI :%d, err_code:%d\n",
  113. gsi, rc);
  114. }
  115. return irq;
  116. }
  117. static int acpi_register_gsi_xen(struct device *dev, u32 gsi,
  118. int trigger, int polarity)
  119. {
  120. return xen_register_gsi(gsi, -1 /* no GSI override */, trigger, polarity);
  121. }
  122. #endif
  123. #endif
  124. #if defined(CONFIG_PCI_MSI)
  125. #include <linux/msi.h>
  126. #include <asm/msidef.h>
  127. struct xen_pci_frontend_ops *xen_pci_frontend;
  128. EXPORT_SYMBOL_GPL(xen_pci_frontend);
  129. static int xen_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  130. {
  131. int irq, ret, i;
  132. struct msi_desc *msidesc;
  133. int *v;
  134. if (type == PCI_CAP_ID_MSI && nvec > 1)
  135. return 1;
  136. v = kzalloc(sizeof(int) * max(1, nvec), GFP_KERNEL);
  137. if (!v)
  138. return -ENOMEM;
  139. if (type == PCI_CAP_ID_MSIX)
  140. ret = xen_pci_frontend_enable_msix(dev, v, nvec);
  141. else
  142. ret = xen_pci_frontend_enable_msi(dev, v);
  143. if (ret)
  144. goto error;
  145. i = 0;
  146. list_for_each_entry(msidesc, &dev->msi_list, list) {
  147. irq = xen_bind_pirq_msi_to_irq(dev, msidesc, v[i],
  148. (type == PCI_CAP_ID_MSIX) ?
  149. "pcifront-msi-x" :
  150. "pcifront-msi",
  151. DOMID_SELF);
  152. if (irq < 0) {
  153. ret = irq;
  154. goto free;
  155. }
  156. i++;
  157. }
  158. kfree(v);
  159. return 0;
  160. error:
  161. dev_err(&dev->dev, "Xen PCI frontend has not registered MSI/MSI-X support!\n");
  162. free:
  163. kfree(v);
  164. return ret;
  165. }
  166. #define XEN_PIRQ_MSI_DATA (MSI_DATA_TRIGGER_EDGE | \
  167. MSI_DATA_LEVEL_ASSERT | (3 << 8) | MSI_DATA_VECTOR(0))
  168. static void xen_msi_compose_msg(struct pci_dev *pdev, unsigned int pirq,
  169. struct msi_msg *msg)
  170. {
  171. /* We set vector == 0 to tell the hypervisor we don't care about it,
  172. * but we want a pirq setup instead.
  173. * We use the dest_id field to pass the pirq that we want. */
  174. msg->address_hi = MSI_ADDR_BASE_HI | MSI_ADDR_EXT_DEST_ID(pirq);
  175. msg->address_lo =
  176. MSI_ADDR_BASE_LO |
  177. MSI_ADDR_DEST_MODE_PHYSICAL |
  178. MSI_ADDR_REDIRECTION_CPU |
  179. MSI_ADDR_DEST_ID(pirq);
  180. msg->data = XEN_PIRQ_MSI_DATA;
  181. }
  182. static int xen_hvm_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  183. {
  184. int irq, pirq;
  185. struct msi_desc *msidesc;
  186. struct msi_msg msg;
  187. if (type == PCI_CAP_ID_MSI && nvec > 1)
  188. return 1;
  189. list_for_each_entry(msidesc, &dev->msi_list, list) {
  190. __read_msi_msg(msidesc, &msg);
  191. pirq = MSI_ADDR_EXT_DEST_ID(msg.address_hi) |
  192. ((msg.address_lo >> MSI_ADDR_DEST_ID_SHIFT) & 0xff);
  193. if (msg.data != XEN_PIRQ_MSI_DATA ||
  194. xen_irq_from_pirq(pirq) < 0) {
  195. pirq = xen_allocate_pirq_msi(dev, msidesc);
  196. if (pirq < 0) {
  197. irq = -ENODEV;
  198. goto error;
  199. }
  200. xen_msi_compose_msg(dev, pirq, &msg);
  201. __write_msi_msg(msidesc, &msg);
  202. dev_dbg(&dev->dev, "xen: msi bound to pirq=%d\n", pirq);
  203. } else {
  204. dev_dbg(&dev->dev,
  205. "xen: msi already bound to pirq=%d\n", pirq);
  206. }
  207. irq = xen_bind_pirq_msi_to_irq(dev, msidesc, pirq,
  208. (type == PCI_CAP_ID_MSIX) ?
  209. "msi-x" : "msi",
  210. DOMID_SELF);
  211. if (irq < 0)
  212. goto error;
  213. dev_dbg(&dev->dev,
  214. "xen: msi --> pirq=%d --> irq=%d\n", pirq, irq);
  215. }
  216. return 0;
  217. error:
  218. dev_err(&dev->dev,
  219. "Xen PCI frontend has not registered MSI/MSI-X support!\n");
  220. return irq;
  221. }
  222. #ifdef CONFIG_XEN_DOM0
  223. static bool __read_mostly pci_seg_supported = true;
  224. static int xen_initdom_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
  225. {
  226. int ret = 0;
  227. struct msi_desc *msidesc;
  228. if (type == PCI_CAP_ID_MSI && nvec > 1)
  229. return 1;
  230. list_for_each_entry(msidesc, &dev->msi_list, list) {
  231. struct physdev_map_pirq map_irq;
  232. domid_t domid;
  233. domid = ret = xen_find_device_domain_owner(dev);
  234. /* N.B. Casting int's -ENODEV to uint16_t results in 0xFFED,
  235. * hence check ret value for < 0. */
  236. if (ret < 0)
  237. domid = DOMID_SELF;
  238. memset(&map_irq, 0, sizeof(map_irq));
  239. map_irq.domid = domid;
  240. map_irq.type = MAP_PIRQ_TYPE_MSI_SEG;
  241. map_irq.index = -1;
  242. map_irq.pirq = -1;
  243. map_irq.bus = dev->bus->number |
  244. (pci_domain_nr(dev->bus) << 16);
  245. map_irq.devfn = dev->devfn;
  246. if (type == PCI_CAP_ID_MSIX) {
  247. int pos;
  248. u32 table_offset, bir;
  249. pos = dev->msix_cap;
  250. pci_read_config_dword(dev, pos + PCI_MSIX_TABLE,
  251. &table_offset);
  252. bir = (u8)(table_offset & PCI_MSIX_TABLE_BIR);
  253. map_irq.table_base = pci_resource_start(dev, bir);
  254. map_irq.entry_nr = msidesc->msi_attrib.entry_nr;
  255. }
  256. ret = -EINVAL;
  257. if (pci_seg_supported)
  258. ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
  259. &map_irq);
  260. if (ret == -EINVAL && !pci_domain_nr(dev->bus)) {
  261. map_irq.type = MAP_PIRQ_TYPE_MSI;
  262. map_irq.index = -1;
  263. map_irq.pirq = -1;
  264. map_irq.bus = dev->bus->number;
  265. ret = HYPERVISOR_physdev_op(PHYSDEVOP_map_pirq,
  266. &map_irq);
  267. if (ret != -EINVAL)
  268. pci_seg_supported = false;
  269. }
  270. if (ret) {
  271. dev_warn(&dev->dev, "xen map irq failed %d for %d domain\n",
  272. ret, domid);
  273. goto out;
  274. }
  275. ret = xen_bind_pirq_msi_to_irq(dev, msidesc,
  276. map_irq.pirq,
  277. (type == PCI_CAP_ID_MSIX) ?
  278. "msi-x" : "msi",
  279. domid);
  280. if (ret < 0)
  281. goto out;
  282. }
  283. ret = 0;
  284. out:
  285. return ret;
  286. }
  287. static void xen_initdom_restore_msi_irqs(struct pci_dev *dev, int irq)
  288. {
  289. int ret = 0;
  290. if (pci_seg_supported) {
  291. struct physdev_pci_device restore_ext;
  292. restore_ext.seg = pci_domain_nr(dev->bus);
  293. restore_ext.bus = dev->bus->number;
  294. restore_ext.devfn = dev->devfn;
  295. ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi_ext,
  296. &restore_ext);
  297. if (ret == -ENOSYS)
  298. pci_seg_supported = false;
  299. WARN(ret && ret != -ENOSYS, "restore_msi_ext -> %d\n", ret);
  300. }
  301. if (!pci_seg_supported) {
  302. struct physdev_restore_msi restore;
  303. restore.bus = dev->bus->number;
  304. restore.devfn = dev->devfn;
  305. ret = HYPERVISOR_physdev_op(PHYSDEVOP_restore_msi, &restore);
  306. WARN(ret && ret != -ENOSYS, "restore_msi -> %d\n", ret);
  307. }
  308. }
  309. #endif
  310. static void xen_teardown_msi_irqs(struct pci_dev *dev)
  311. {
  312. struct msi_desc *msidesc;
  313. msidesc = list_entry(dev->msi_list.next, struct msi_desc, list);
  314. if (msidesc->msi_attrib.is_msix)
  315. xen_pci_frontend_disable_msix(dev);
  316. else
  317. xen_pci_frontend_disable_msi(dev);
  318. /* Free the IRQ's and the msidesc using the generic code. */
  319. default_teardown_msi_irqs(dev);
  320. }
  321. static void xen_teardown_msi_irq(unsigned int irq)
  322. {
  323. xen_destroy_irq(irq);
  324. }
  325. static u32 xen_nop_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
  326. {
  327. return 0;
  328. }
  329. static u32 xen_nop_msix_mask_irq(struct msi_desc *desc, u32 flag)
  330. {
  331. return 0;
  332. }
  333. #endif
  334. int __init pci_xen_init(void)
  335. {
  336. if (!xen_pv_domain() || xen_initial_domain())
  337. return -ENODEV;
  338. printk(KERN_INFO "PCI: setting up Xen PCI frontend stub\n");
  339. pcibios_set_cache_line_size();
  340. pcibios_enable_irq = xen_pcifront_enable_irq;
  341. pcibios_disable_irq = NULL;
  342. #ifdef CONFIG_ACPI
  343. /* Keep ACPI out of the picture */
  344. acpi_noirq = 1;
  345. #endif
  346. #ifdef CONFIG_PCI_MSI
  347. x86_msi.setup_msi_irqs = xen_setup_msi_irqs;
  348. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  349. x86_msi.teardown_msi_irqs = xen_teardown_msi_irqs;
  350. x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
  351. x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
  352. #endif
  353. return 0;
  354. }
  355. int __init pci_xen_hvm_init(void)
  356. {
  357. if (!xen_have_vector_callback || !xen_feature(XENFEAT_hvm_pirqs))
  358. return 0;
  359. #ifdef CONFIG_ACPI
  360. /*
  361. * We don't want to change the actual ACPI delivery model,
  362. * just how GSIs get registered.
  363. */
  364. __acpi_register_gsi = acpi_register_gsi_xen_hvm;
  365. #endif
  366. #ifdef CONFIG_PCI_MSI
  367. x86_msi.setup_msi_irqs = xen_hvm_setup_msi_irqs;
  368. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  369. #endif
  370. return 0;
  371. }
  372. #ifdef CONFIG_XEN_DOM0
  373. static __init void xen_setup_acpi_sci(void)
  374. {
  375. int rc;
  376. int trigger, polarity;
  377. int gsi = acpi_sci_override_gsi;
  378. int irq = -1;
  379. int gsi_override = -1;
  380. if (!gsi)
  381. return;
  382. rc = acpi_get_override_irq(gsi, &trigger, &polarity);
  383. if (rc) {
  384. printk(KERN_WARNING "xen: acpi_get_override_irq failed for acpi"
  385. " sci, rc=%d\n", rc);
  386. return;
  387. }
  388. trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
  389. polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
  390. printk(KERN_INFO "xen: sci override: global_irq=%d trigger=%d "
  391. "polarity=%d\n", gsi, trigger, polarity);
  392. /* Before we bind the GSI to a Linux IRQ, check whether
  393. * we need to override it with bus_irq (IRQ) value. Usually for
  394. * IRQs below IRQ_LEGACY_IRQ this holds IRQ == GSI, as so:
  395. * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 low level)
  396. * but there are oddballs where the IRQ != GSI:
  397. * ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 20 low level)
  398. * which ends up being: gsi_to_irq[9] == 20
  399. * (which is what acpi_gsi_to_irq ends up calling when starting the
  400. * the ACPI interpreter and keels over since IRQ 9 has not been
  401. * setup as we had setup IRQ 20 for it).
  402. */
  403. if (acpi_gsi_to_irq(gsi, &irq) == 0) {
  404. /* Use the provided value if it's valid. */
  405. if (irq >= 0)
  406. gsi_override = irq;
  407. }
  408. gsi = xen_register_gsi(gsi, gsi_override, trigger, polarity);
  409. printk(KERN_INFO "xen: acpi sci %d\n", gsi);
  410. return;
  411. }
  412. int __init pci_xen_initial_domain(void)
  413. {
  414. int irq;
  415. #ifdef CONFIG_PCI_MSI
  416. x86_msi.setup_msi_irqs = xen_initdom_setup_msi_irqs;
  417. x86_msi.teardown_msi_irq = xen_teardown_msi_irq;
  418. x86_msi.restore_msi_irqs = xen_initdom_restore_msi_irqs;
  419. x86_msi.msi_mask_irq = xen_nop_msi_mask_irq;
  420. x86_msi.msix_mask_irq = xen_nop_msix_mask_irq;
  421. #endif
  422. xen_setup_acpi_sci();
  423. __acpi_register_gsi = acpi_register_gsi_xen;
  424. /* Pre-allocate legacy irqs */
  425. for (irq = 0; irq < NR_IRQS_LEGACY; irq++) {
  426. int trigger, polarity;
  427. if (acpi_get_override_irq(irq, &trigger, &polarity) == -1)
  428. continue;
  429. xen_register_pirq(irq, -1 /* no GSI override */,
  430. trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE,
  431. true /* Map GSI to PIRQ */);
  432. }
  433. if (0 == nr_ioapics) {
  434. for (irq = 0; irq < NR_IRQS_LEGACY; irq++)
  435. xen_bind_pirq_gsi_to_irq(irq, irq, 0, "xt-pic");
  436. }
  437. return 0;
  438. }
  439. struct xen_device_domain_owner {
  440. domid_t domain;
  441. struct pci_dev *dev;
  442. struct list_head list;
  443. };
  444. static DEFINE_SPINLOCK(dev_domain_list_spinlock);
  445. static struct list_head dev_domain_list = LIST_HEAD_INIT(dev_domain_list);
  446. static struct xen_device_domain_owner *find_device(struct pci_dev *dev)
  447. {
  448. struct xen_device_domain_owner *owner;
  449. list_for_each_entry(owner, &dev_domain_list, list) {
  450. if (owner->dev == dev)
  451. return owner;
  452. }
  453. return NULL;
  454. }
  455. int xen_find_device_domain_owner(struct pci_dev *dev)
  456. {
  457. struct xen_device_domain_owner *owner;
  458. int domain = -ENODEV;
  459. spin_lock(&dev_domain_list_spinlock);
  460. owner = find_device(dev);
  461. if (owner)
  462. domain = owner->domain;
  463. spin_unlock(&dev_domain_list_spinlock);
  464. return domain;
  465. }
  466. EXPORT_SYMBOL_GPL(xen_find_device_domain_owner);
  467. int xen_register_device_domain_owner(struct pci_dev *dev, uint16_t domain)
  468. {
  469. struct xen_device_domain_owner *owner;
  470. owner = kzalloc(sizeof(struct xen_device_domain_owner), GFP_KERNEL);
  471. if (!owner)
  472. return -ENODEV;
  473. spin_lock(&dev_domain_list_spinlock);
  474. if (find_device(dev)) {
  475. spin_unlock(&dev_domain_list_spinlock);
  476. kfree(owner);
  477. return -EEXIST;
  478. }
  479. owner->domain = domain;
  480. owner->dev = dev;
  481. list_add_tail(&owner->list, &dev_domain_list);
  482. spin_unlock(&dev_domain_list_spinlock);
  483. return 0;
  484. }
  485. EXPORT_SYMBOL_GPL(xen_register_device_domain_owner);
  486. int xen_unregister_device_domain_owner(struct pci_dev *dev)
  487. {
  488. struct xen_device_domain_owner *owner;
  489. spin_lock(&dev_domain_list_spinlock);
  490. owner = find_device(dev);
  491. if (!owner) {
  492. spin_unlock(&dev_domain_list_spinlock);
  493. return -ENODEV;
  494. }
  495. list_del(&owner->list);
  496. spin_unlock(&dev_domain_list_spinlock);
  497. kfree(owner);
  498. return 0;
  499. }
  500. EXPORT_SYMBOL_GPL(xen_unregister_device_domain_owner);
  501. #endif