setup.c 20 KB

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  1. /*
  2. * 64-bit pSeries and RS/6000 setup code.
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #include <linux/cpu.h>
  18. #include <linux/errno.h>
  19. #include <linux/sched.h>
  20. #include <linux/kernel.h>
  21. #include <linux/mm.h>
  22. #include <linux/stddef.h>
  23. #include <linux/unistd.h>
  24. #include <linux/user.h>
  25. #include <linux/tty.h>
  26. #include <linux/major.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/reboot.h>
  29. #include <linux/init.h>
  30. #include <linux/ioport.h>
  31. #include <linux/console.h>
  32. #include <linux/pci.h>
  33. #include <linux/utsname.h>
  34. #include <linux/adb.h>
  35. #include <linux/export.h>
  36. #include <linux/delay.h>
  37. #include <linux/irq.h>
  38. #include <linux/seq_file.h>
  39. #include <linux/root_dev.h>
  40. #include <linux/cpuidle.h>
  41. #include <linux/of.h>
  42. #include <linux/kexec.h>
  43. #include <asm/mmu.h>
  44. #include <asm/processor.h>
  45. #include <asm/io.h>
  46. #include <asm/pgtable.h>
  47. #include <asm/prom.h>
  48. #include <asm/rtas.h>
  49. #include <asm/pci-bridge.h>
  50. #include <asm/iommu.h>
  51. #include <asm/dma.h>
  52. #include <asm/machdep.h>
  53. #include <asm/irq.h>
  54. #include <asm/time.h>
  55. #include <asm/nvram.h>
  56. #include <asm/pmc.h>
  57. #include <asm/mpic.h>
  58. #include <asm/xics.h>
  59. #include <asm/ppc-pci.h>
  60. #include <asm/i8259.h>
  61. #include <asm/udbg.h>
  62. #include <asm/smp.h>
  63. #include <asm/firmware.h>
  64. #include <asm/eeh.h>
  65. #include <asm/reg.h>
  66. #include <asm/plpar_wrappers.h>
  67. #include "pseries.h"
  68. int CMO_PrPSP = -1;
  69. int CMO_SecPSP = -1;
  70. unsigned long CMO_PageSize = (ASM_CONST(1) << IOMMU_PAGE_SHIFT);
  71. EXPORT_SYMBOL(CMO_PageSize);
  72. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  73. static struct device_node *pSeries_mpic_node;
  74. static void pSeries_show_cpuinfo(struct seq_file *m)
  75. {
  76. struct device_node *root;
  77. const char *model = "";
  78. root = of_find_node_by_path("/");
  79. if (root)
  80. model = of_get_property(root, "model", NULL);
  81. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  82. of_node_put(root);
  83. }
  84. /* Initialize firmware assisted non-maskable interrupts if
  85. * the firmware supports this feature.
  86. */
  87. static void __init fwnmi_init(void)
  88. {
  89. unsigned long system_reset_addr, machine_check_addr;
  90. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  91. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  92. return;
  93. /* If the kernel's not linked at zero we point the firmware at low
  94. * addresses anyway, and use a trampoline to get to the real code. */
  95. system_reset_addr = __pa(system_reset_fwnmi) - PHYSICAL_START;
  96. machine_check_addr = __pa(machine_check_fwnmi) - PHYSICAL_START;
  97. if (0 == rtas_call(ibm_nmi_register, 2, 1, NULL, system_reset_addr,
  98. machine_check_addr))
  99. fwnmi_active = 1;
  100. }
  101. static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
  102. {
  103. struct irq_chip *chip = irq_desc_get_chip(desc);
  104. unsigned int cascade_irq = i8259_irq();
  105. if (cascade_irq != NO_IRQ)
  106. generic_handle_irq(cascade_irq);
  107. chip->irq_eoi(&desc->irq_data);
  108. }
  109. static void __init pseries_setup_i8259_cascade(void)
  110. {
  111. struct device_node *np, *old, *found = NULL;
  112. unsigned int cascade;
  113. const u32 *addrp;
  114. unsigned long intack = 0;
  115. int naddr;
  116. for_each_node_by_type(np, "interrupt-controller") {
  117. if (of_device_is_compatible(np, "chrp,iic")) {
  118. found = np;
  119. break;
  120. }
  121. }
  122. if (found == NULL) {
  123. printk(KERN_DEBUG "pic: no ISA interrupt controller\n");
  124. return;
  125. }
  126. cascade = irq_of_parse_and_map(found, 0);
  127. if (cascade == NO_IRQ) {
  128. printk(KERN_ERR "pic: failed to map cascade interrupt");
  129. return;
  130. }
  131. pr_debug("pic: cascade mapped to irq %d\n", cascade);
  132. for (old = of_node_get(found); old != NULL ; old = np) {
  133. np = of_get_parent(old);
  134. of_node_put(old);
  135. if (np == NULL)
  136. break;
  137. if (strcmp(np->name, "pci") != 0)
  138. continue;
  139. addrp = of_get_property(np, "8259-interrupt-acknowledge", NULL);
  140. if (addrp == NULL)
  141. continue;
  142. naddr = of_n_addr_cells(np);
  143. intack = addrp[naddr-1];
  144. if (naddr > 1)
  145. intack |= ((unsigned long)addrp[naddr-2]) << 32;
  146. }
  147. if (intack)
  148. printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
  149. i8259_init(found, intack);
  150. of_node_put(found);
  151. irq_set_chained_handler(cascade, pseries_8259_cascade);
  152. }
  153. static void __init pseries_mpic_init_IRQ(void)
  154. {
  155. struct device_node *np;
  156. const unsigned int *opprop;
  157. unsigned long openpic_addr = 0;
  158. int naddr, n, i, opplen;
  159. struct mpic *mpic;
  160. np = of_find_node_by_path("/");
  161. naddr = of_n_addr_cells(np);
  162. opprop = of_get_property(np, "platform-open-pic", &opplen);
  163. if (opprop != NULL) {
  164. openpic_addr = of_read_number(opprop, naddr);
  165. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  166. }
  167. of_node_put(np);
  168. BUG_ON(openpic_addr == 0);
  169. /* Setup the openpic driver */
  170. mpic = mpic_alloc(pSeries_mpic_node, openpic_addr,
  171. MPIC_NO_RESET, 16, 0, " MPIC ");
  172. BUG_ON(mpic == NULL);
  173. /* Add ISUs */
  174. opplen /= sizeof(u32);
  175. for (n = 0, i = naddr; i < opplen; i += naddr, n++) {
  176. unsigned long isuaddr = of_read_number(opprop + i, naddr);
  177. mpic_assign_isu(mpic, n, isuaddr);
  178. }
  179. /* Setup top-level get_irq */
  180. ppc_md.get_irq = mpic_get_irq;
  181. /* All ISUs are setup, complete initialization */
  182. mpic_init(mpic);
  183. /* Look for cascade */
  184. pseries_setup_i8259_cascade();
  185. }
  186. static void __init pseries_xics_init_IRQ(void)
  187. {
  188. xics_init();
  189. pseries_setup_i8259_cascade();
  190. }
  191. static void pseries_lpar_enable_pmcs(void)
  192. {
  193. unsigned long set, reset;
  194. set = 1UL << 63;
  195. reset = 0;
  196. plpar_hcall_norets(H_PERFMON, set, reset);
  197. }
  198. static void __init pseries_discover_pic(void)
  199. {
  200. struct device_node *np;
  201. const char *typep;
  202. for (np = NULL; (np = of_find_node_by_name(np,
  203. "interrupt-controller"));) {
  204. typep = of_get_property(np, "compatible", NULL);
  205. if (strstr(typep, "open-pic")) {
  206. pSeries_mpic_node = of_node_get(np);
  207. ppc_md.init_IRQ = pseries_mpic_init_IRQ;
  208. setup_kexec_cpu_down_mpic();
  209. smp_init_pseries_mpic();
  210. return;
  211. } else if (strstr(typep, "ppc-xicp")) {
  212. ppc_md.init_IRQ = pseries_xics_init_IRQ;
  213. setup_kexec_cpu_down_xics();
  214. smp_init_pseries_xics();
  215. return;
  216. }
  217. }
  218. printk(KERN_ERR "pSeries_discover_pic: failed to recognize"
  219. " interrupt-controller\n");
  220. }
  221. static int pci_dn_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node)
  222. {
  223. struct device_node *np = node;
  224. struct pci_dn *pci = NULL;
  225. int err = NOTIFY_OK;
  226. switch (action) {
  227. case OF_RECONFIG_ATTACH_NODE:
  228. pci = np->parent->data;
  229. if (pci) {
  230. update_dn_pci_info(np, pci->phb);
  231. /* Create EEH device for the OF node */
  232. eeh_dev_init(np, pci->phb);
  233. }
  234. break;
  235. default:
  236. err = NOTIFY_DONE;
  237. break;
  238. }
  239. return err;
  240. }
  241. static struct notifier_block pci_dn_reconfig_nb = {
  242. .notifier_call = pci_dn_reconfig_notifier,
  243. };
  244. struct kmem_cache *dtl_cache;
  245. #ifdef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE
  246. /*
  247. * Allocate space for the dispatch trace log for all possible cpus
  248. * and register the buffers with the hypervisor. This is used for
  249. * computing time stolen by the hypervisor.
  250. */
  251. static int alloc_dispatch_logs(void)
  252. {
  253. int cpu, ret;
  254. struct paca_struct *pp;
  255. struct dtl_entry *dtl;
  256. if (!firmware_has_feature(FW_FEATURE_SPLPAR))
  257. return 0;
  258. if (!dtl_cache)
  259. return 0;
  260. for_each_possible_cpu(cpu) {
  261. pp = &paca[cpu];
  262. dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
  263. if (!dtl) {
  264. pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
  265. cpu);
  266. pr_warn("Stolen time statistics will be unreliable\n");
  267. break;
  268. }
  269. pp->dtl_ridx = 0;
  270. pp->dispatch_log = dtl;
  271. pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
  272. pp->dtl_curr = dtl;
  273. }
  274. /* Register the DTL for the current (boot) cpu */
  275. dtl = get_paca()->dispatch_log;
  276. get_paca()->dtl_ridx = 0;
  277. get_paca()->dtl_curr = dtl;
  278. get_paca()->lppaca_ptr->dtl_idx = 0;
  279. /* hypervisor reads buffer length from this field */
  280. dtl->enqueue_to_dispatch_time = cpu_to_be32(DISPATCH_LOG_BYTES);
  281. ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
  282. if (ret)
  283. pr_err("WARNING: DTL registration of cpu %d (hw %d) failed "
  284. "with %d\n", smp_processor_id(),
  285. hard_smp_processor_id(), ret);
  286. get_paca()->lppaca_ptr->dtl_enable_mask = 2;
  287. return 0;
  288. }
  289. #else /* !CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
  290. static inline int alloc_dispatch_logs(void)
  291. {
  292. return 0;
  293. }
  294. #endif /* CONFIG_VIRT_CPU_ACCOUNTING_NATIVE */
  295. static int alloc_dispatch_log_kmem_cache(void)
  296. {
  297. dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
  298. DISPATCH_LOG_BYTES, 0, NULL);
  299. if (!dtl_cache) {
  300. pr_warn("Failed to create dispatch trace log buffer cache\n");
  301. pr_warn("Stolen time statistics will be unreliable\n");
  302. return 0;
  303. }
  304. return alloc_dispatch_logs();
  305. }
  306. early_initcall(alloc_dispatch_log_kmem_cache);
  307. static void pseries_lpar_idle(void)
  308. {
  309. /* This would call on the cpuidle framework, and the back-end pseries
  310. * driver to go to idle states
  311. */
  312. if (cpuidle_idle_call()) {
  313. /* On error, execute default handler
  314. * to go into low thread priority and possibly
  315. * low power mode by cedeing processor to hypervisor
  316. */
  317. /* Indicate to hypervisor that we are idle. */
  318. get_lppaca()->idle = 1;
  319. /*
  320. * Yield the processor to the hypervisor. We return if
  321. * an external interrupt occurs (which are driven prior
  322. * to returning here) or if a prod occurs from another
  323. * processor. When returning here, external interrupts
  324. * are enabled.
  325. */
  326. cede_processor();
  327. get_lppaca()->idle = 0;
  328. }
  329. }
  330. /*
  331. * Enable relocation on during exceptions. This has partition wide scope and
  332. * may take a while to complete, if it takes longer than one second we will
  333. * just give up rather than wasting any more time on this - if that turns out
  334. * to ever be a problem in practice we can move this into a kernel thread to
  335. * finish off the process later in boot.
  336. */
  337. long pSeries_enable_reloc_on_exc(void)
  338. {
  339. long rc;
  340. unsigned int delay, total_delay = 0;
  341. while (1) {
  342. rc = enable_reloc_on_exceptions();
  343. if (!H_IS_LONG_BUSY(rc))
  344. return rc;
  345. delay = get_longbusy_msecs(rc);
  346. total_delay += delay;
  347. if (total_delay > 1000) {
  348. pr_warn("Warning: Giving up waiting to enable "
  349. "relocation on exceptions (%u msec)!\n",
  350. total_delay);
  351. return rc;
  352. }
  353. mdelay(delay);
  354. }
  355. }
  356. EXPORT_SYMBOL(pSeries_enable_reloc_on_exc);
  357. long pSeries_disable_reloc_on_exc(void)
  358. {
  359. long rc;
  360. while (1) {
  361. rc = disable_reloc_on_exceptions();
  362. if (!H_IS_LONG_BUSY(rc))
  363. return rc;
  364. mdelay(get_longbusy_msecs(rc));
  365. }
  366. }
  367. EXPORT_SYMBOL(pSeries_disable_reloc_on_exc);
  368. #ifdef CONFIG_KEXEC
  369. static void pSeries_machine_kexec(struct kimage *image)
  370. {
  371. long rc;
  372. if (firmware_has_feature(FW_FEATURE_SET_MODE) &&
  373. (image->type != KEXEC_TYPE_CRASH)) {
  374. rc = pSeries_disable_reloc_on_exc();
  375. if (rc != H_SUCCESS)
  376. pr_warning("Warning: Failed to disable relocation on "
  377. "exceptions: %ld\n", rc);
  378. }
  379. default_machine_kexec(image);
  380. }
  381. #endif
  382. #ifdef __LITTLE_ENDIAN__
  383. long pseries_big_endian_exceptions(void)
  384. {
  385. long rc;
  386. while (1) {
  387. rc = enable_big_endian_exceptions();
  388. if (!H_IS_LONG_BUSY(rc))
  389. return rc;
  390. mdelay(get_longbusy_msecs(rc));
  391. }
  392. }
  393. static long pseries_little_endian_exceptions(void)
  394. {
  395. long rc;
  396. while (1) {
  397. rc = enable_little_endian_exceptions();
  398. if (!H_IS_LONG_BUSY(rc))
  399. return rc;
  400. mdelay(get_longbusy_msecs(rc));
  401. }
  402. }
  403. #endif
  404. static void __init pSeries_setup_arch(void)
  405. {
  406. panic_timeout = 10;
  407. /* Discover PIC type and setup ppc_md accordingly */
  408. pseries_discover_pic();
  409. /* openpic global configuration register (64-bit format). */
  410. /* openpic Interrupt Source Unit pointer (64-bit format). */
  411. /* python0 facility area (mmio) (64-bit format) REAL address. */
  412. /* init to some ~sane value until calibrate_delay() runs */
  413. loops_per_jiffy = 50000000;
  414. fwnmi_init();
  415. /* By default, only probe PCI (can be overriden by rtas_pci) */
  416. pci_add_flags(PCI_PROBE_ONLY);
  417. /* Find and initialize PCI host bridges */
  418. init_pci_config_tokens();
  419. find_and_init_phbs();
  420. of_reconfig_notifier_register(&pci_dn_reconfig_nb);
  421. pSeries_nvram_init();
  422. if (firmware_has_feature(FW_FEATURE_LPAR)) {
  423. vpa_init(boot_cpuid);
  424. ppc_md.power_save = pseries_lpar_idle;
  425. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  426. } else {
  427. /* No special idle routine */
  428. ppc_md.enable_pmcs = power4_enable_pmcs;
  429. }
  430. ppc_md.pcibios_root_bridge_prepare = pseries_root_bridge_prepare;
  431. if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
  432. long rc;
  433. if ((rc = pSeries_enable_reloc_on_exc()) != H_SUCCESS) {
  434. pr_warn("Unable to enable relocation on exceptions: "
  435. "%ld\n", rc);
  436. }
  437. }
  438. }
  439. static int __init pSeries_init_panel(void)
  440. {
  441. /* Manually leave the kernel version on the panel. */
  442. ppc_md.progress("Linux ppc64\n", 0);
  443. ppc_md.progress(init_utsname()->version, 0);
  444. return 0;
  445. }
  446. machine_arch_initcall(pseries, pSeries_init_panel);
  447. static int pseries_set_dabr(unsigned long dabr, unsigned long dabrx)
  448. {
  449. return plpar_hcall_norets(H_SET_DABR, dabr);
  450. }
  451. static int pseries_set_xdabr(unsigned long dabr, unsigned long dabrx)
  452. {
  453. /* Have to set at least one bit in the DABRX according to PAPR */
  454. if (dabrx == 0 && dabr == 0)
  455. dabrx = DABRX_USER;
  456. /* PAPR says we can only set kernel and user bits */
  457. dabrx &= DABRX_KERNEL | DABRX_USER;
  458. return plpar_hcall_norets(H_SET_XDABR, dabr, dabrx);
  459. }
  460. static int pseries_set_dawr(unsigned long dawr, unsigned long dawrx)
  461. {
  462. /* PAPR says we can't set HYP */
  463. dawrx &= ~DAWRX_HYP;
  464. return plapr_set_watchpoint0(dawr, dawrx);
  465. }
  466. #define CMO_CHARACTERISTICS_TOKEN 44
  467. #define CMO_MAXLENGTH 1026
  468. void pSeries_coalesce_init(void)
  469. {
  470. struct hvcall_mpp_x_data mpp_x_data;
  471. if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
  472. powerpc_firmware_features |= FW_FEATURE_XCMO;
  473. else
  474. powerpc_firmware_features &= ~FW_FEATURE_XCMO;
  475. }
  476. /**
  477. * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
  478. * handle that here. (Stolen from parse_system_parameter_string)
  479. */
  480. void pSeries_cmo_feature_init(void)
  481. {
  482. char *ptr, *key, *value, *end;
  483. int call_status;
  484. int page_order = IOMMU_PAGE_SHIFT;
  485. pr_debug(" -> fw_cmo_feature_init()\n");
  486. spin_lock(&rtas_data_buf_lock);
  487. memset(rtas_data_buf, 0, RTAS_DATA_BUF_SIZE);
  488. call_status = rtas_call(rtas_token("ibm,get-system-parameter"), 3, 1,
  489. NULL,
  490. CMO_CHARACTERISTICS_TOKEN,
  491. __pa(rtas_data_buf),
  492. RTAS_DATA_BUF_SIZE);
  493. if (call_status != 0) {
  494. spin_unlock(&rtas_data_buf_lock);
  495. pr_debug("CMO not available\n");
  496. pr_debug(" <- fw_cmo_feature_init()\n");
  497. return;
  498. }
  499. end = rtas_data_buf + CMO_MAXLENGTH - 2;
  500. ptr = rtas_data_buf + 2; /* step over strlen value */
  501. key = value = ptr;
  502. while (*ptr && (ptr <= end)) {
  503. /* Separate the key and value by replacing '=' with '\0' and
  504. * point the value at the string after the '='
  505. */
  506. if (ptr[0] == '=') {
  507. ptr[0] = '\0';
  508. value = ptr + 1;
  509. } else if (ptr[0] == '\0' || ptr[0] == ',') {
  510. /* Terminate the string containing the key/value pair */
  511. ptr[0] = '\0';
  512. if (key == value) {
  513. pr_debug("Malformed key/value pair\n");
  514. /* Never found a '=', end processing */
  515. break;
  516. }
  517. if (0 == strcmp(key, "CMOPageSize"))
  518. page_order = simple_strtol(value, NULL, 10);
  519. else if (0 == strcmp(key, "PrPSP"))
  520. CMO_PrPSP = simple_strtol(value, NULL, 10);
  521. else if (0 == strcmp(key, "SecPSP"))
  522. CMO_SecPSP = simple_strtol(value, NULL, 10);
  523. value = key = ptr + 1;
  524. }
  525. ptr++;
  526. }
  527. /* Page size is returned as the power of 2 of the page size,
  528. * convert to the page size in bytes before returning
  529. */
  530. CMO_PageSize = 1 << page_order;
  531. pr_debug("CMO_PageSize = %lu\n", CMO_PageSize);
  532. if (CMO_PrPSP != -1 || CMO_SecPSP != -1) {
  533. pr_info("CMO enabled\n");
  534. pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
  535. CMO_SecPSP);
  536. powerpc_firmware_features |= FW_FEATURE_CMO;
  537. pSeries_coalesce_init();
  538. } else
  539. pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
  540. CMO_SecPSP);
  541. spin_unlock(&rtas_data_buf_lock);
  542. pr_debug(" <- fw_cmo_feature_init()\n");
  543. }
  544. /*
  545. * Early initialization. Relocation is on but do not reference unbolted pages
  546. */
  547. static void __init pSeries_init_early(void)
  548. {
  549. pr_debug(" -> pSeries_init_early()\n");
  550. #ifdef CONFIG_HVC_CONSOLE
  551. if (firmware_has_feature(FW_FEATURE_LPAR))
  552. hvc_vio_init_early();
  553. #endif
  554. if (firmware_has_feature(FW_FEATURE_XDABR))
  555. ppc_md.set_dabr = pseries_set_xdabr;
  556. else if (firmware_has_feature(FW_FEATURE_DABR))
  557. ppc_md.set_dabr = pseries_set_dabr;
  558. if (firmware_has_feature(FW_FEATURE_SET_MODE))
  559. ppc_md.set_dawr = pseries_set_dawr;
  560. pSeries_cmo_feature_init();
  561. iommu_init_early_pSeries();
  562. pr_debug(" <- pSeries_init_early()\n");
  563. }
  564. /*
  565. * Called very early, MMU is off, device-tree isn't unflattened
  566. */
  567. static int __init pseries_probe_fw_features(unsigned long node,
  568. const char *uname, int depth,
  569. void *data)
  570. {
  571. const char *prop;
  572. unsigned long len;
  573. static int hypertas_found;
  574. static int vec5_found;
  575. if (depth != 1)
  576. return 0;
  577. if (!strcmp(uname, "rtas") || !strcmp(uname, "rtas@0")) {
  578. prop = of_get_flat_dt_prop(node, "ibm,hypertas-functions",
  579. &len);
  580. if (prop) {
  581. powerpc_firmware_features |= FW_FEATURE_LPAR;
  582. fw_hypertas_feature_init(prop, len);
  583. }
  584. hypertas_found = 1;
  585. }
  586. if (!strcmp(uname, "chosen")) {
  587. prop = of_get_flat_dt_prop(node, "ibm,architecture-vec-5",
  588. &len);
  589. if (prop)
  590. fw_vec5_feature_init(prop, len);
  591. vec5_found = 1;
  592. }
  593. return hypertas_found && vec5_found;
  594. }
  595. static int __init pSeries_probe(void)
  596. {
  597. unsigned long root = of_get_flat_dt_root();
  598. char *dtype = of_get_flat_dt_prop(root, "device_type", NULL);
  599. if (dtype == NULL)
  600. return 0;
  601. if (strcmp(dtype, "chrp"))
  602. return 0;
  603. /* Cell blades firmware claims to be chrp while it's not. Until this
  604. * is fixed, we need to avoid those here.
  605. */
  606. if (of_flat_dt_is_compatible(root, "IBM,CPBW-1.0") ||
  607. of_flat_dt_is_compatible(root, "IBM,CBEA"))
  608. return 0;
  609. pr_debug("pSeries detected, looking for LPAR capability...\n");
  610. /* Now try to figure out if we are running on LPAR */
  611. of_scan_flat_dt(pseries_probe_fw_features, NULL);
  612. #ifdef __LITTLE_ENDIAN__
  613. if (firmware_has_feature(FW_FEATURE_SET_MODE)) {
  614. long rc;
  615. /*
  616. * Tell the hypervisor that we want our exceptions to
  617. * be taken in little endian mode. If this fails we don't
  618. * want to use BUG() because it will trigger an exception.
  619. */
  620. rc = pseries_little_endian_exceptions();
  621. if (rc) {
  622. ppc_md.progress("H_SET_MODE LE exception fail", 0);
  623. panic("Could not enable little endian exceptions");
  624. }
  625. }
  626. #endif
  627. if (firmware_has_feature(FW_FEATURE_LPAR))
  628. hpte_init_lpar();
  629. else
  630. hpte_init_native();
  631. pr_debug("Machine is%s LPAR !\n",
  632. (powerpc_firmware_features & FW_FEATURE_LPAR) ? "" : " not");
  633. return 1;
  634. }
  635. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  636. {
  637. if (firmware_has_feature(FW_FEATURE_LPAR))
  638. return PCI_PROBE_DEVTREE;
  639. return PCI_PROBE_NORMAL;
  640. }
  641. /**
  642. * pSeries_power_off - tell firmware about how to power off the system.
  643. *
  644. * This function calls either the power-off rtas token in normal cases
  645. * or the ibm,power-off-ups token (if present & requested) in case of
  646. * a power failure. If power-off token is used, power on will only be
  647. * possible with power button press. If ibm,power-off-ups token is used
  648. * it will allow auto poweron after power is restored.
  649. */
  650. static void pSeries_power_off(void)
  651. {
  652. int rc;
  653. int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
  654. if (rtas_flash_term_hook)
  655. rtas_flash_term_hook(SYS_POWER_OFF);
  656. if (rtas_poweron_auto == 0 ||
  657. rtas_poweroff_ups_token == RTAS_UNKNOWN_SERVICE) {
  658. rc = rtas_call(rtas_token("power-off"), 2, 1, NULL, -1, -1);
  659. printk(KERN_INFO "RTAS power-off returned %d\n", rc);
  660. } else {
  661. rc = rtas_call(rtas_poweroff_ups_token, 0, 1, NULL);
  662. printk(KERN_INFO "RTAS ibm,power-off-ups returned %d\n", rc);
  663. }
  664. for (;;);
  665. }
  666. #ifndef CONFIG_PCI
  667. void pSeries_final_fixup(void) { }
  668. #endif
  669. define_machine(pseries) {
  670. .name = "pSeries",
  671. .probe = pSeries_probe,
  672. .setup_arch = pSeries_setup_arch,
  673. .init_early = pSeries_init_early,
  674. .show_cpuinfo = pSeries_show_cpuinfo,
  675. .log_error = pSeries_log_error,
  676. .pcibios_fixup = pSeries_final_fixup,
  677. .pci_probe_mode = pSeries_pci_probe_mode,
  678. .restart = rtas_restart,
  679. .power_off = pSeries_power_off,
  680. .halt = rtas_halt,
  681. .panic = rtas_os_term,
  682. .get_boot_time = rtas_get_boot_time,
  683. .get_rtc_time = rtas_get_rtc_time,
  684. .set_rtc_time = rtas_set_rtc_time,
  685. .calibrate_decr = generic_calibrate_decr,
  686. .progress = rtas_progress,
  687. .system_reset_exception = pSeries_system_reset_exception,
  688. .machine_check_exception = pSeries_machine_check_exception,
  689. #ifdef CONFIG_KEXEC
  690. .machine_kexec = pSeries_machine_kexec,
  691. #endif
  692. };