eeh_pseries.c 20 KB

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  1. /*
  2. * The file intends to implement the platform dependent EEH operations on pseries.
  3. * Actually, the pseries platform is built based on RTAS heavily. That means the
  4. * pseries platform dependent EEH operations will be built on RTAS calls. The functions
  5. * are devired from arch/powerpc/platforms/pseries/eeh.c and necessary cleanup has
  6. * been done.
  7. *
  8. * Copyright Benjamin Herrenschmidt & Gavin Shan, IBM Corporation 2011.
  9. * Copyright IBM Corporation 2001, 2005, 2006
  10. * Copyright Dave Engebretsen & Todd Inglett 2001
  11. * Copyright Linas Vepstas 2005, 2006
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  26. */
  27. #include <linux/atomic.h>
  28. #include <linux/delay.h>
  29. #include <linux/export.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/of.h>
  33. #include <linux/pci.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/rbtree.h>
  36. #include <linux/sched.h>
  37. #include <linux/seq_file.h>
  38. #include <linux/spinlock.h>
  39. #include <asm/eeh.h>
  40. #include <asm/eeh_event.h>
  41. #include <asm/io.h>
  42. #include <asm/machdep.h>
  43. #include <asm/ppc-pci.h>
  44. #include <asm/rtas.h>
  45. /* RTAS tokens */
  46. static int ibm_set_eeh_option;
  47. static int ibm_set_slot_reset;
  48. static int ibm_read_slot_reset_state;
  49. static int ibm_read_slot_reset_state2;
  50. static int ibm_slot_error_detail;
  51. static int ibm_get_config_addr_info;
  52. static int ibm_get_config_addr_info2;
  53. static int ibm_configure_bridge;
  54. static int ibm_configure_pe;
  55. /*
  56. * Buffer for reporting slot-error-detail rtas calls. Its here
  57. * in BSS, and not dynamically alloced, so that it ends up in
  58. * RMO where RTAS can access it.
  59. */
  60. static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
  61. static DEFINE_SPINLOCK(slot_errbuf_lock);
  62. static int eeh_error_buf_size;
  63. /**
  64. * pseries_eeh_init - EEH platform dependent initialization
  65. *
  66. * EEH platform dependent initialization on pseries.
  67. */
  68. static int pseries_eeh_init(void)
  69. {
  70. /* figure out EEH RTAS function call tokens */
  71. ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
  72. ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
  73. ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
  74. ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
  75. ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
  76. ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
  77. ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
  78. ibm_configure_pe = rtas_token("ibm,configure-pe");
  79. ibm_configure_bridge = rtas_token("ibm,configure-bridge");
  80. /*
  81. * Necessary sanity check. We needn't check "get-config-addr-info"
  82. * and its variant since the old firmware probably support address
  83. * of domain/bus/slot/function for EEH RTAS operations.
  84. */
  85. if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) {
  86. pr_warning("%s: RTAS service <ibm,set-eeh-option> invalid\n",
  87. __func__);
  88. return -EINVAL;
  89. } else if (ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE) {
  90. pr_warning("%s: RTAS service <ibm,set-slot-reset> invalid\n",
  91. __func__);
  92. return -EINVAL;
  93. } else if (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
  94. ibm_read_slot_reset_state == RTAS_UNKNOWN_SERVICE) {
  95. pr_warning("%s: RTAS service <ibm,read-slot-reset-state2> and "
  96. "<ibm,read-slot-reset-state> invalid\n",
  97. __func__);
  98. return -EINVAL;
  99. } else if (ibm_slot_error_detail == RTAS_UNKNOWN_SERVICE) {
  100. pr_warning("%s: RTAS service <ibm,slot-error-detail> invalid\n",
  101. __func__);
  102. return -EINVAL;
  103. } else if (ibm_configure_pe == RTAS_UNKNOWN_SERVICE &&
  104. ibm_configure_bridge == RTAS_UNKNOWN_SERVICE) {
  105. pr_warning("%s: RTAS service <ibm,configure-pe> and "
  106. "<ibm,configure-bridge> invalid\n",
  107. __func__);
  108. return -EINVAL;
  109. }
  110. /* Initialize error log lock and size */
  111. spin_lock_init(&slot_errbuf_lock);
  112. eeh_error_buf_size = rtas_token("rtas-error-log-max");
  113. if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
  114. pr_warning("%s: unknown EEH error log size\n",
  115. __func__);
  116. eeh_error_buf_size = 1024;
  117. } else if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
  118. pr_warning("%s: EEH error log size %d exceeds the maximal %d\n",
  119. __func__, eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
  120. eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
  121. }
  122. /* Set EEH probe mode */
  123. eeh_probe_mode_set(EEH_PROBE_MODE_DEVTREE);
  124. return 0;
  125. }
  126. static int pseries_eeh_cap_start(struct device_node *dn)
  127. {
  128. struct pci_dn *pdn = PCI_DN(dn);
  129. u32 status;
  130. if (!pdn)
  131. return 0;
  132. rtas_read_config(pdn, PCI_STATUS, 2, &status);
  133. if (!(status & PCI_STATUS_CAP_LIST))
  134. return 0;
  135. return PCI_CAPABILITY_LIST;
  136. }
  137. static int pseries_eeh_find_cap(struct device_node *dn, int cap)
  138. {
  139. struct pci_dn *pdn = PCI_DN(dn);
  140. int pos = pseries_eeh_cap_start(dn);
  141. int cnt = 48; /* Maximal number of capabilities */
  142. u32 id;
  143. if (!pos)
  144. return 0;
  145. while (cnt--) {
  146. rtas_read_config(pdn, pos, 1, &pos);
  147. if (pos < 0x40)
  148. break;
  149. pos &= ~3;
  150. rtas_read_config(pdn, pos + PCI_CAP_LIST_ID, 1, &id);
  151. if (id == 0xff)
  152. break;
  153. if (id == cap)
  154. return pos;
  155. pos += PCI_CAP_LIST_NEXT;
  156. }
  157. return 0;
  158. }
  159. /**
  160. * pseries_eeh_of_probe - EEH probe on the given device
  161. * @dn: OF node
  162. * @flag: Unused
  163. *
  164. * When EEH module is installed during system boot, all PCI devices
  165. * are checked one by one to see if it supports EEH. The function
  166. * is introduced for the purpose.
  167. */
  168. static void *pseries_eeh_of_probe(struct device_node *dn, void *flag)
  169. {
  170. struct eeh_dev *edev;
  171. struct eeh_pe pe;
  172. struct pci_dn *pdn = PCI_DN(dn);
  173. const __be32 *classp, *vendorp, *devicep;
  174. u32 class_code;
  175. const __be32 *regs;
  176. u32 pcie_flags;
  177. int enable = 0;
  178. int ret;
  179. /* Retrieve OF node and eeh device */
  180. edev = of_node_to_eeh_dev(dn);
  181. if (edev->pe || !of_device_is_available(dn))
  182. return NULL;
  183. /* Retrieve class/vendor/device IDs */
  184. classp = of_get_property(dn, "class-code", NULL);
  185. vendorp = of_get_property(dn, "vendor-id", NULL);
  186. devicep = of_get_property(dn, "device-id", NULL);
  187. /* Skip for bad OF node or PCI-ISA bridge */
  188. if (!classp || !vendorp || !devicep)
  189. return NULL;
  190. if (dn->type && !strcmp(dn->type, "isa"))
  191. return NULL;
  192. class_code = of_read_number(classp, 1);
  193. /*
  194. * Update class code and mode of eeh device. We need
  195. * correctly reflects that current device is root port
  196. * or PCIe switch downstream port.
  197. */
  198. edev->class_code = class_code;
  199. edev->pcie_cap = pseries_eeh_find_cap(dn, PCI_CAP_ID_EXP);
  200. edev->mode &= 0xFFFFFF00;
  201. if ((edev->class_code >> 8) == PCI_CLASS_BRIDGE_PCI) {
  202. edev->mode |= EEH_DEV_BRIDGE;
  203. if (edev->pcie_cap) {
  204. rtas_read_config(pdn, edev->pcie_cap + PCI_EXP_FLAGS,
  205. 2, &pcie_flags);
  206. pcie_flags = (pcie_flags & PCI_EXP_FLAGS_TYPE) >> 4;
  207. if (pcie_flags == PCI_EXP_TYPE_ROOT_PORT)
  208. edev->mode |= EEH_DEV_ROOT_PORT;
  209. else if (pcie_flags == PCI_EXP_TYPE_DOWNSTREAM)
  210. edev->mode |= EEH_DEV_DS_PORT;
  211. }
  212. }
  213. /* Retrieve the device address */
  214. regs = of_get_property(dn, "reg", NULL);
  215. if (!regs) {
  216. pr_warning("%s: OF node property %s::reg not found\n",
  217. __func__, dn->full_name);
  218. return NULL;
  219. }
  220. /* Initialize the fake PE */
  221. memset(&pe, 0, sizeof(struct eeh_pe));
  222. pe.phb = edev->phb;
  223. pe.config_addr = of_read_number(regs, 1);
  224. /* Enable EEH on the device */
  225. ret = eeh_ops->set_option(&pe, EEH_OPT_ENABLE);
  226. if (!ret) {
  227. edev->config_addr = of_read_number(regs, 1);
  228. /* Retrieve PE address */
  229. edev->pe_config_addr = eeh_ops->get_pe_addr(&pe);
  230. pe.addr = edev->pe_config_addr;
  231. /* Some older systems (Power4) allow the ibm,set-eeh-option
  232. * call to succeed even on nodes where EEH is not supported.
  233. * Verify support explicitly.
  234. */
  235. ret = eeh_ops->get_state(&pe, NULL);
  236. if (ret > 0 && ret != EEH_STATE_NOT_SUPPORT)
  237. enable = 1;
  238. if (enable) {
  239. eeh_subsystem_enabled = 1;
  240. eeh_add_to_parent_pe(edev);
  241. pr_debug("%s: EEH enabled on %s PHB#%d-PE#%x, config addr#%x\n",
  242. __func__, dn->full_name, pe.phb->global_number,
  243. pe.addr, pe.config_addr);
  244. } else if (dn->parent && of_node_to_eeh_dev(dn->parent) &&
  245. (of_node_to_eeh_dev(dn->parent))->pe) {
  246. /* This device doesn't support EEH, but it may have an
  247. * EEH parent, in which case we mark it as supported.
  248. */
  249. edev->config_addr = of_node_to_eeh_dev(dn->parent)->config_addr;
  250. edev->pe_config_addr = of_node_to_eeh_dev(dn->parent)->pe_config_addr;
  251. eeh_add_to_parent_pe(edev);
  252. }
  253. }
  254. /* Save memory bars */
  255. eeh_save_bars(edev);
  256. return NULL;
  257. }
  258. /**
  259. * pseries_eeh_set_option - Initialize EEH or MMIO/DMA reenable
  260. * @pe: EEH PE
  261. * @option: operation to be issued
  262. *
  263. * The function is used to control the EEH functionality globally.
  264. * Currently, following options are support according to PAPR:
  265. * Enable EEH, Disable EEH, Enable MMIO and Enable DMA
  266. */
  267. static int pseries_eeh_set_option(struct eeh_pe *pe, int option)
  268. {
  269. int ret = 0;
  270. int config_addr;
  271. /*
  272. * When we're enabling or disabling EEH functioality on
  273. * the particular PE, the PE config address is possibly
  274. * unavailable. Therefore, we have to figure it out from
  275. * the FDT node.
  276. */
  277. switch (option) {
  278. case EEH_OPT_DISABLE:
  279. case EEH_OPT_ENABLE:
  280. case EEH_OPT_THAW_MMIO:
  281. case EEH_OPT_THAW_DMA:
  282. config_addr = pe->config_addr;
  283. if (pe->addr)
  284. config_addr = pe->addr;
  285. break;
  286. default:
  287. pr_err("%s: Invalid option %d\n",
  288. __func__, option);
  289. return -EINVAL;
  290. }
  291. ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
  292. config_addr, BUID_HI(pe->phb->buid),
  293. BUID_LO(pe->phb->buid), option);
  294. return ret;
  295. }
  296. /**
  297. * pseries_eeh_get_pe_addr - Retrieve PE address
  298. * @pe: EEH PE
  299. *
  300. * Retrieve the assocated PE address. Actually, there're 2 RTAS
  301. * function calls dedicated for the purpose. We need implement
  302. * it through the new function and then the old one. Besides,
  303. * you should make sure the config address is figured out from
  304. * FDT node before calling the function.
  305. *
  306. * It's notable that zero'ed return value means invalid PE config
  307. * address.
  308. */
  309. static int pseries_eeh_get_pe_addr(struct eeh_pe *pe)
  310. {
  311. int ret = 0;
  312. int rets[3];
  313. if (ibm_get_config_addr_info2 != RTAS_UNKNOWN_SERVICE) {
  314. /*
  315. * First of all, we need to make sure there has one PE
  316. * associated with the device. Otherwise, PE address is
  317. * meaningless.
  318. */
  319. ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
  320. pe->config_addr, BUID_HI(pe->phb->buid),
  321. BUID_LO(pe->phb->buid), 1);
  322. if (ret || (rets[0] == 0))
  323. return 0;
  324. /* Retrieve the associated PE config address */
  325. ret = rtas_call(ibm_get_config_addr_info2, 4, 2, rets,
  326. pe->config_addr, BUID_HI(pe->phb->buid),
  327. BUID_LO(pe->phb->buid), 0);
  328. if (ret) {
  329. pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n",
  330. __func__, pe->phb->global_number, pe->config_addr);
  331. return 0;
  332. }
  333. return rets[0];
  334. }
  335. if (ibm_get_config_addr_info != RTAS_UNKNOWN_SERVICE) {
  336. ret = rtas_call(ibm_get_config_addr_info, 4, 2, rets,
  337. pe->config_addr, BUID_HI(pe->phb->buid),
  338. BUID_LO(pe->phb->buid), 0);
  339. if (ret) {
  340. pr_warning("%s: Failed to get address for PHB#%d-PE#%x\n",
  341. __func__, pe->phb->global_number, pe->config_addr);
  342. return 0;
  343. }
  344. return rets[0];
  345. }
  346. return ret;
  347. }
  348. /**
  349. * pseries_eeh_get_state - Retrieve PE state
  350. * @pe: EEH PE
  351. * @state: return value
  352. *
  353. * Retrieve the state of the specified PE. On RTAS compliant
  354. * pseries platform, there already has one dedicated RTAS function
  355. * for the purpose. It's notable that the associated PE config address
  356. * might be ready when calling the function. Therefore, endeavour to
  357. * use the PE config address if possible. Further more, there're 2
  358. * RTAS calls for the purpose, we need to try the new one and back
  359. * to the old one if the new one couldn't work properly.
  360. */
  361. static int pseries_eeh_get_state(struct eeh_pe *pe, int *state)
  362. {
  363. int config_addr;
  364. int ret;
  365. int rets[4];
  366. int result;
  367. /* Figure out PE config address if possible */
  368. config_addr = pe->config_addr;
  369. if (pe->addr)
  370. config_addr = pe->addr;
  371. if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
  372. ret = rtas_call(ibm_read_slot_reset_state2, 3, 4, rets,
  373. config_addr, BUID_HI(pe->phb->buid),
  374. BUID_LO(pe->phb->buid));
  375. } else if (ibm_read_slot_reset_state != RTAS_UNKNOWN_SERVICE) {
  376. /* Fake PE unavailable info */
  377. rets[2] = 0;
  378. ret = rtas_call(ibm_read_slot_reset_state, 3, 3, rets,
  379. config_addr, BUID_HI(pe->phb->buid),
  380. BUID_LO(pe->phb->buid));
  381. } else {
  382. return EEH_STATE_NOT_SUPPORT;
  383. }
  384. if (ret)
  385. return ret;
  386. /* Parse the result out */
  387. result = 0;
  388. if (rets[1]) {
  389. switch(rets[0]) {
  390. case 0:
  391. result &= ~EEH_STATE_RESET_ACTIVE;
  392. result |= EEH_STATE_MMIO_ACTIVE;
  393. result |= EEH_STATE_DMA_ACTIVE;
  394. break;
  395. case 1:
  396. result |= EEH_STATE_RESET_ACTIVE;
  397. result |= EEH_STATE_MMIO_ACTIVE;
  398. result |= EEH_STATE_DMA_ACTIVE;
  399. break;
  400. case 2:
  401. result &= ~EEH_STATE_RESET_ACTIVE;
  402. result &= ~EEH_STATE_MMIO_ACTIVE;
  403. result &= ~EEH_STATE_DMA_ACTIVE;
  404. break;
  405. case 4:
  406. result &= ~EEH_STATE_RESET_ACTIVE;
  407. result &= ~EEH_STATE_MMIO_ACTIVE;
  408. result &= ~EEH_STATE_DMA_ACTIVE;
  409. result |= EEH_STATE_MMIO_ENABLED;
  410. break;
  411. case 5:
  412. if (rets[2]) {
  413. if (state) *state = rets[2];
  414. result = EEH_STATE_UNAVAILABLE;
  415. } else {
  416. result = EEH_STATE_NOT_SUPPORT;
  417. }
  418. default:
  419. result = EEH_STATE_NOT_SUPPORT;
  420. }
  421. } else {
  422. result = EEH_STATE_NOT_SUPPORT;
  423. }
  424. return result;
  425. }
  426. /**
  427. * pseries_eeh_reset - Reset the specified PE
  428. * @pe: EEH PE
  429. * @option: reset option
  430. *
  431. * Reset the specified PE
  432. */
  433. static int pseries_eeh_reset(struct eeh_pe *pe, int option)
  434. {
  435. int config_addr;
  436. int ret;
  437. /* Figure out PE address */
  438. config_addr = pe->config_addr;
  439. if (pe->addr)
  440. config_addr = pe->addr;
  441. /* Reset PE through RTAS call */
  442. ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
  443. config_addr, BUID_HI(pe->phb->buid),
  444. BUID_LO(pe->phb->buid), option);
  445. /* If fundamental-reset not supported, try hot-reset */
  446. if (option == EEH_RESET_FUNDAMENTAL &&
  447. ret == -8) {
  448. ret = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
  449. config_addr, BUID_HI(pe->phb->buid),
  450. BUID_LO(pe->phb->buid), EEH_RESET_HOT);
  451. }
  452. return ret;
  453. }
  454. /**
  455. * pseries_eeh_wait_state - Wait for PE state
  456. * @pe: EEH PE
  457. * @max_wait: maximal period in microsecond
  458. *
  459. * Wait for the state of associated PE. It might take some time
  460. * to retrieve the PE's state.
  461. */
  462. static int pseries_eeh_wait_state(struct eeh_pe *pe, int max_wait)
  463. {
  464. int ret;
  465. int mwait;
  466. /*
  467. * According to PAPR, the state of PE might be temporarily
  468. * unavailable. Under the circumstance, we have to wait
  469. * for indicated time determined by firmware. The maximal
  470. * wait time is 5 minutes, which is acquired from the original
  471. * EEH implementation. Also, the original implementation
  472. * also defined the minimal wait time as 1 second.
  473. */
  474. #define EEH_STATE_MIN_WAIT_TIME (1000)
  475. #define EEH_STATE_MAX_WAIT_TIME (300 * 1000)
  476. while (1) {
  477. ret = pseries_eeh_get_state(pe, &mwait);
  478. /*
  479. * If the PE's state is temporarily unavailable,
  480. * we have to wait for the specified time. Otherwise,
  481. * the PE's state will be returned immediately.
  482. */
  483. if (ret != EEH_STATE_UNAVAILABLE)
  484. return ret;
  485. if (max_wait <= 0) {
  486. pr_warning("%s: Timeout when getting PE's state (%d)\n",
  487. __func__, max_wait);
  488. return EEH_STATE_NOT_SUPPORT;
  489. }
  490. if (mwait <= 0) {
  491. pr_warning("%s: Firmware returned bad wait value %d\n",
  492. __func__, mwait);
  493. mwait = EEH_STATE_MIN_WAIT_TIME;
  494. } else if (mwait > EEH_STATE_MAX_WAIT_TIME) {
  495. pr_warning("%s: Firmware returned too long wait value %d\n",
  496. __func__, mwait);
  497. mwait = EEH_STATE_MAX_WAIT_TIME;
  498. }
  499. max_wait -= mwait;
  500. msleep(mwait);
  501. }
  502. return EEH_STATE_NOT_SUPPORT;
  503. }
  504. /**
  505. * pseries_eeh_get_log - Retrieve error log
  506. * @pe: EEH PE
  507. * @severity: temporary or permanent error log
  508. * @drv_log: driver log to be combined with retrieved error log
  509. * @len: length of driver log
  510. *
  511. * Retrieve the temporary or permanent error from the PE.
  512. * Actually, the error will be retrieved through the dedicated
  513. * RTAS call.
  514. */
  515. static int pseries_eeh_get_log(struct eeh_pe *pe, int severity, char *drv_log, unsigned long len)
  516. {
  517. int config_addr;
  518. unsigned long flags;
  519. int ret;
  520. spin_lock_irqsave(&slot_errbuf_lock, flags);
  521. memset(slot_errbuf, 0, eeh_error_buf_size);
  522. /* Figure out the PE address */
  523. config_addr = pe->config_addr;
  524. if (pe->addr)
  525. config_addr = pe->addr;
  526. ret = rtas_call(ibm_slot_error_detail, 8, 1, NULL, config_addr,
  527. BUID_HI(pe->phb->buid), BUID_LO(pe->phb->buid),
  528. virt_to_phys(drv_log), len,
  529. virt_to_phys(slot_errbuf), eeh_error_buf_size,
  530. severity);
  531. if (!ret)
  532. log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
  533. spin_unlock_irqrestore(&slot_errbuf_lock, flags);
  534. return ret;
  535. }
  536. /**
  537. * pseries_eeh_configure_bridge - Configure PCI bridges in the indicated PE
  538. * @pe: EEH PE
  539. *
  540. * The function will be called to reconfigure the bridges included
  541. * in the specified PE so that the mulfunctional PE would be recovered
  542. * again.
  543. */
  544. static int pseries_eeh_configure_bridge(struct eeh_pe *pe)
  545. {
  546. int config_addr;
  547. int ret;
  548. /* Figure out the PE address */
  549. config_addr = pe->config_addr;
  550. if (pe->addr)
  551. config_addr = pe->addr;
  552. /* Use new configure-pe function, if supported */
  553. if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE) {
  554. ret = rtas_call(ibm_configure_pe, 3, 1, NULL,
  555. config_addr, BUID_HI(pe->phb->buid),
  556. BUID_LO(pe->phb->buid));
  557. } else if (ibm_configure_bridge != RTAS_UNKNOWN_SERVICE) {
  558. ret = rtas_call(ibm_configure_bridge, 3, 1, NULL,
  559. config_addr, BUID_HI(pe->phb->buid),
  560. BUID_LO(pe->phb->buid));
  561. } else {
  562. return -EFAULT;
  563. }
  564. if (ret)
  565. pr_warning("%s: Unable to configure bridge PHB#%d-PE#%x (%d)\n",
  566. __func__, pe->phb->global_number, pe->addr, ret);
  567. return ret;
  568. }
  569. /**
  570. * pseries_eeh_read_config - Read PCI config space
  571. * @dn: device node
  572. * @where: PCI address
  573. * @size: size to read
  574. * @val: return value
  575. *
  576. * Read config space from the speicifed device
  577. */
  578. static int pseries_eeh_read_config(struct device_node *dn, int where, int size, u32 *val)
  579. {
  580. struct pci_dn *pdn;
  581. pdn = PCI_DN(dn);
  582. return rtas_read_config(pdn, where, size, val);
  583. }
  584. /**
  585. * pseries_eeh_write_config - Write PCI config space
  586. * @dn: device node
  587. * @where: PCI address
  588. * @size: size to write
  589. * @val: value to be written
  590. *
  591. * Write config space to the specified device
  592. */
  593. static int pseries_eeh_write_config(struct device_node *dn, int where, int size, u32 val)
  594. {
  595. struct pci_dn *pdn;
  596. pdn = PCI_DN(dn);
  597. return rtas_write_config(pdn, where, size, val);
  598. }
  599. static struct eeh_ops pseries_eeh_ops = {
  600. .name = "pseries",
  601. .init = pseries_eeh_init,
  602. .of_probe = pseries_eeh_of_probe,
  603. .dev_probe = NULL,
  604. .set_option = pseries_eeh_set_option,
  605. .get_pe_addr = pseries_eeh_get_pe_addr,
  606. .get_state = pseries_eeh_get_state,
  607. .reset = pseries_eeh_reset,
  608. .wait_state = pseries_eeh_wait_state,
  609. .get_log = pseries_eeh_get_log,
  610. .configure_bridge = pseries_eeh_configure_bridge,
  611. .read_config = pseries_eeh_read_config,
  612. .write_config = pseries_eeh_write_config
  613. };
  614. /**
  615. * eeh_pseries_init - Register platform dependent EEH operations
  616. *
  617. * EEH initialization on pseries platform. This function should be
  618. * called before any EEH related functions.
  619. */
  620. static int __init eeh_pseries_init(void)
  621. {
  622. int ret = -EINVAL;
  623. if (!machine_is(pseries))
  624. return ret;
  625. ret = eeh_ops_register(&pseries_eeh_ops);
  626. if (!ret)
  627. pr_info("EEH: pSeries platform initialized\n");
  628. else
  629. pr_info("EEH: pSeries platform initialization failure (%d)\n",
  630. ret);
  631. return ret;
  632. }
  633. early_initcall(eeh_pseries_init);