gpio_mdio.c 6.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343
  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Author: Olof Johansson, PA Semi
  5. *
  6. * Maintained by: Olof Johansson <olof@lixom.net>
  7. *
  8. * Based on drivers/net/fs_enet/mii-bitbang.c.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. */
  23. #include <linux/io.h>
  24. #include <linux/module.h>
  25. #include <linux/types.h>
  26. #include <linux/slab.h>
  27. #include <linux/sched.h>
  28. #include <linux/errno.h>
  29. #include <linux/ioport.h>
  30. #include <linux/interrupt.h>
  31. #include <linux/phy.h>
  32. #include <linux/of_address.h>
  33. #include <linux/of_mdio.h>
  34. #include <linux/of_platform.h>
  35. #define DELAY 1
  36. static void __iomem *gpio_regs;
  37. struct gpio_priv {
  38. int mdc_pin;
  39. int mdio_pin;
  40. int mdio_irqs[PHY_MAX_ADDR];
  41. };
  42. #define MDC_PIN(bus) (((struct gpio_priv *)bus->priv)->mdc_pin)
  43. #define MDIO_PIN(bus) (((struct gpio_priv *)bus->priv)->mdio_pin)
  44. static inline void mdio_lo(struct mii_bus *bus)
  45. {
  46. out_le32(gpio_regs+0x10, 1 << MDIO_PIN(bus));
  47. }
  48. static inline void mdio_hi(struct mii_bus *bus)
  49. {
  50. out_le32(gpio_regs, 1 << MDIO_PIN(bus));
  51. }
  52. static inline void mdc_lo(struct mii_bus *bus)
  53. {
  54. out_le32(gpio_regs+0x10, 1 << MDC_PIN(bus));
  55. }
  56. static inline void mdc_hi(struct mii_bus *bus)
  57. {
  58. out_le32(gpio_regs, 1 << MDC_PIN(bus));
  59. }
  60. static inline void mdio_active(struct mii_bus *bus)
  61. {
  62. out_le32(gpio_regs+0x20, (1 << MDC_PIN(bus)) | (1 << MDIO_PIN(bus)));
  63. }
  64. static inline void mdio_tristate(struct mii_bus *bus)
  65. {
  66. out_le32(gpio_regs+0x30, (1 << MDIO_PIN(bus)));
  67. }
  68. static inline int mdio_read(struct mii_bus *bus)
  69. {
  70. return !!(in_le32(gpio_regs+0x40) & (1 << MDIO_PIN(bus)));
  71. }
  72. static void clock_out(struct mii_bus *bus, int bit)
  73. {
  74. if (bit)
  75. mdio_hi(bus);
  76. else
  77. mdio_lo(bus);
  78. udelay(DELAY);
  79. mdc_hi(bus);
  80. udelay(DELAY);
  81. mdc_lo(bus);
  82. }
  83. /* Utility to send the preamble, address, and register (common to read and write). */
  84. static void bitbang_pre(struct mii_bus *bus, int read, u8 addr, u8 reg)
  85. {
  86. int i;
  87. /* CFE uses a really long preamble (40 bits). We'll do the same. */
  88. mdio_active(bus);
  89. for (i = 0; i < 40; i++) {
  90. clock_out(bus, 1);
  91. }
  92. /* send the start bit (01) and the read opcode (10) or write (10) */
  93. clock_out(bus, 0);
  94. clock_out(bus, 1);
  95. clock_out(bus, read);
  96. clock_out(bus, !read);
  97. /* send the PHY address */
  98. for (i = 0; i < 5; i++) {
  99. clock_out(bus, (addr & 0x10) != 0);
  100. addr <<= 1;
  101. }
  102. /* send the register address */
  103. for (i = 0; i < 5; i++) {
  104. clock_out(bus, (reg & 0x10) != 0);
  105. reg <<= 1;
  106. }
  107. }
  108. static int gpio_mdio_read(struct mii_bus *bus, int phy_id, int location)
  109. {
  110. u16 rdreg;
  111. int ret, i;
  112. u8 addr = phy_id & 0xff;
  113. u8 reg = location & 0xff;
  114. bitbang_pre(bus, 1, addr, reg);
  115. /* tri-state our MDIO I/O pin so we can read */
  116. mdio_tristate(bus);
  117. udelay(DELAY);
  118. mdc_hi(bus);
  119. udelay(DELAY);
  120. mdc_lo(bus);
  121. /* read 16 bits of register data, MSB first */
  122. rdreg = 0;
  123. for (i = 0; i < 16; i++) {
  124. mdc_lo(bus);
  125. udelay(DELAY);
  126. mdc_hi(bus);
  127. udelay(DELAY);
  128. mdc_lo(bus);
  129. udelay(DELAY);
  130. rdreg <<= 1;
  131. rdreg |= mdio_read(bus);
  132. }
  133. mdc_hi(bus);
  134. udelay(DELAY);
  135. mdc_lo(bus);
  136. udelay(DELAY);
  137. ret = rdreg;
  138. return ret;
  139. }
  140. static int gpio_mdio_write(struct mii_bus *bus, int phy_id, int location, u16 val)
  141. {
  142. int i;
  143. u8 addr = phy_id & 0xff;
  144. u8 reg = location & 0xff;
  145. u16 value = val & 0xffff;
  146. bitbang_pre(bus, 0, addr, reg);
  147. /* send the turnaround (10) */
  148. mdc_lo(bus);
  149. mdio_hi(bus);
  150. udelay(DELAY);
  151. mdc_hi(bus);
  152. udelay(DELAY);
  153. mdc_lo(bus);
  154. mdio_lo(bus);
  155. udelay(DELAY);
  156. mdc_hi(bus);
  157. udelay(DELAY);
  158. /* write 16 bits of register data, MSB first */
  159. for (i = 0; i < 16; i++) {
  160. mdc_lo(bus);
  161. if (value & 0x8000)
  162. mdio_hi(bus);
  163. else
  164. mdio_lo(bus);
  165. udelay(DELAY);
  166. mdc_hi(bus);
  167. udelay(DELAY);
  168. value <<= 1;
  169. }
  170. /*
  171. * Tri-state the MDIO line.
  172. */
  173. mdio_tristate(bus);
  174. mdc_lo(bus);
  175. udelay(DELAY);
  176. mdc_hi(bus);
  177. udelay(DELAY);
  178. return 0;
  179. }
  180. static int gpio_mdio_reset(struct mii_bus *bus)
  181. {
  182. /*nothing here - dunno how to reset it*/
  183. return 0;
  184. }
  185. static int gpio_mdio_probe(struct platform_device *ofdev)
  186. {
  187. struct device *dev = &ofdev->dev;
  188. struct device_node *np = ofdev->dev.of_node;
  189. struct mii_bus *new_bus;
  190. struct gpio_priv *priv;
  191. const unsigned int *prop;
  192. int err;
  193. err = -ENOMEM;
  194. priv = kzalloc(sizeof(struct gpio_priv), GFP_KERNEL);
  195. if (!priv)
  196. goto out;
  197. new_bus = mdiobus_alloc();
  198. if (!new_bus)
  199. goto out_free_priv;
  200. new_bus->name = "pasemi gpio mdio bus";
  201. new_bus->read = &gpio_mdio_read;
  202. new_bus->write = &gpio_mdio_write;
  203. new_bus->reset = &gpio_mdio_reset;
  204. prop = of_get_property(np, "reg", NULL);
  205. snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", *prop);
  206. new_bus->priv = priv;
  207. new_bus->irq = priv->mdio_irqs;
  208. prop = of_get_property(np, "mdc-pin", NULL);
  209. priv->mdc_pin = *prop;
  210. prop = of_get_property(np, "mdio-pin", NULL);
  211. priv->mdio_pin = *prop;
  212. new_bus->parent = dev;
  213. dev_set_drvdata(dev, new_bus);
  214. err = of_mdiobus_register(new_bus, np);
  215. if (err != 0) {
  216. printk(KERN_ERR "%s: Cannot register as MDIO bus, err %d\n",
  217. new_bus->name, err);
  218. goto out_free_irq;
  219. }
  220. return 0;
  221. out_free_irq:
  222. kfree(new_bus);
  223. out_free_priv:
  224. kfree(priv);
  225. out:
  226. return err;
  227. }
  228. static int gpio_mdio_remove(struct platform_device *dev)
  229. {
  230. struct mii_bus *bus = dev_get_drvdata(&dev->dev);
  231. mdiobus_unregister(bus);
  232. dev_set_drvdata(&dev->dev, NULL);
  233. kfree(bus->priv);
  234. bus->priv = NULL;
  235. mdiobus_free(bus);
  236. return 0;
  237. }
  238. static struct of_device_id gpio_mdio_match[] =
  239. {
  240. {
  241. .compatible = "gpio-mdio",
  242. },
  243. {},
  244. };
  245. MODULE_DEVICE_TABLE(of, gpio_mdio_match);
  246. static struct platform_driver gpio_mdio_driver =
  247. {
  248. .probe = gpio_mdio_probe,
  249. .remove = gpio_mdio_remove,
  250. .driver = {
  251. .name = "gpio-mdio-bitbang",
  252. .owner = THIS_MODULE,
  253. .of_match_table = gpio_mdio_match,
  254. },
  255. };
  256. int gpio_mdio_init(void)
  257. {
  258. struct device_node *np;
  259. np = of_find_compatible_node(NULL, NULL, "1682m-gpio");
  260. if (!np)
  261. np = of_find_compatible_node(NULL, NULL,
  262. "pasemi,pwrficient-gpio");
  263. if (!np)
  264. return -ENODEV;
  265. gpio_regs = of_iomap(np, 0);
  266. of_node_put(np);
  267. if (!gpio_regs)
  268. return -ENODEV;
  269. return platform_driver_register(&gpio_mdio_driver);
  270. }
  271. module_init(gpio_mdio_init);
  272. void gpio_mdio_exit(void)
  273. {
  274. platform_driver_unregister(&gpio_mdio_driver);
  275. if (gpio_regs)
  276. iounmap(gpio_regs);
  277. }
  278. module_exit(gpio_mdio_exit);
  279. MODULE_LICENSE("GPL");
  280. MODULE_AUTHOR("Olof Johansson <olof@lixom.net>");
  281. MODULE_DESCRIPTION("Driver for MDIO over GPIO on PA Semi PWRficient-based boards");