smp.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574
  1. /*
  2. * SMP initialisation and IPI support
  3. * Based on arch/arm/kernel/smp.c
  4. *
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/delay.h>
  20. #include <linux/init.h>
  21. #include <linux/spinlock.h>
  22. #include <linux/sched.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cache.h>
  25. #include <linux/profile.h>
  26. #include <linux/errno.h>
  27. #include <linux/mm.h>
  28. #include <linux/err.h>
  29. #include <linux/cpu.h>
  30. #include <linux/smp.h>
  31. #include <linux/seq_file.h>
  32. #include <linux/irq.h>
  33. #include <linux/percpu.h>
  34. #include <linux/clockchips.h>
  35. #include <linux/completion.h>
  36. #include <linux/of.h>
  37. #include <asm/atomic.h>
  38. #include <asm/cacheflush.h>
  39. #include <asm/cputype.h>
  40. #include <asm/cpu_ops.h>
  41. #include <asm/mmu_context.h>
  42. #include <asm/pgtable.h>
  43. #include <asm/pgalloc.h>
  44. #include <asm/processor.h>
  45. #include <asm/smp_plat.h>
  46. #include <asm/sections.h>
  47. #include <asm/tlbflush.h>
  48. #include <asm/ptrace.h>
  49. /*
  50. * as from 2.5, kernels no longer have an init_tasks structure
  51. * so we need some other way of telling a new secondary core
  52. * where to place its SVC stack
  53. */
  54. struct secondary_data secondary_data;
  55. enum ipi_msg_type {
  56. IPI_RESCHEDULE,
  57. IPI_CALL_FUNC,
  58. IPI_CALL_FUNC_SINGLE,
  59. IPI_CPU_STOP,
  60. };
  61. /*
  62. * Boot a secondary CPU, and assign it the specified idle task.
  63. * This also gives us the initial stack to use for this CPU.
  64. */
  65. static int boot_secondary(unsigned int cpu, struct task_struct *idle)
  66. {
  67. if (cpu_ops[cpu]->cpu_boot)
  68. return cpu_ops[cpu]->cpu_boot(cpu);
  69. return -EOPNOTSUPP;
  70. }
  71. static DECLARE_COMPLETION(cpu_running);
  72. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  73. {
  74. int ret;
  75. /*
  76. * We need to tell the secondary core where to find its stack and the
  77. * page tables.
  78. */
  79. secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
  80. __flush_dcache_area(&secondary_data, sizeof(secondary_data));
  81. /*
  82. * Now bring the CPU into our world.
  83. */
  84. ret = boot_secondary(cpu, idle);
  85. if (ret == 0) {
  86. /*
  87. * CPU was successfully started, wait for it to come online or
  88. * time out.
  89. */
  90. wait_for_completion_timeout(&cpu_running,
  91. msecs_to_jiffies(1000));
  92. if (!cpu_online(cpu)) {
  93. pr_crit("CPU%u: failed to come online\n", cpu);
  94. ret = -EIO;
  95. }
  96. } else {
  97. pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
  98. }
  99. secondary_data.stack = NULL;
  100. return ret;
  101. }
  102. /*
  103. * This is the secondary CPU boot entry. We're using this CPUs
  104. * idle thread stack, but a set of temporary page tables.
  105. */
  106. asmlinkage void secondary_start_kernel(void)
  107. {
  108. struct mm_struct *mm = &init_mm;
  109. unsigned int cpu = smp_processor_id();
  110. printk("CPU%u: Booted secondary processor\n", cpu);
  111. /*
  112. * All kernel threads share the same mm context; grab a
  113. * reference and switch to it.
  114. */
  115. atomic_inc(&mm->mm_count);
  116. current->active_mm = mm;
  117. cpumask_set_cpu(cpu, mm_cpumask(mm));
  118. /*
  119. * TTBR0 is only used for the identity mapping at this stage. Make it
  120. * point to zero page to avoid speculatively fetching new entries.
  121. */
  122. cpu_set_reserved_ttbr0();
  123. flush_tlb_all();
  124. preempt_disable();
  125. trace_hardirqs_off();
  126. if (cpu_ops[cpu]->cpu_postboot)
  127. cpu_ops[cpu]->cpu_postboot();
  128. /*
  129. * Enable GIC and timers.
  130. */
  131. notify_cpu_starting(cpu);
  132. /*
  133. * OK, now it's safe to let the boot CPU continue. Wait for
  134. * the CPU migration code to notice that the CPU is online
  135. * before we continue.
  136. */
  137. set_cpu_online(cpu, true);
  138. complete(&cpu_running);
  139. local_irq_enable();
  140. local_fiq_enable();
  141. /*
  142. * OK, it's off to the idle thread for us
  143. */
  144. cpu_startup_entry(CPUHP_ONLINE);
  145. }
  146. #ifdef CONFIG_HOTPLUG_CPU
  147. static int op_cpu_disable(unsigned int cpu)
  148. {
  149. /*
  150. * If we don't have a cpu_die method, abort before we reach the point
  151. * of no return. CPU0 may not have an cpu_ops, so test for it.
  152. */
  153. if (!cpu_ops[cpu] || !cpu_ops[cpu]->cpu_die)
  154. return -EOPNOTSUPP;
  155. /*
  156. * We may need to abort a hot unplug for some other mechanism-specific
  157. * reason.
  158. */
  159. if (cpu_ops[cpu]->cpu_disable)
  160. return cpu_ops[cpu]->cpu_disable(cpu);
  161. return 0;
  162. }
  163. /*
  164. * __cpu_disable runs on the processor to be shutdown.
  165. */
  166. int __cpu_disable(void)
  167. {
  168. unsigned int cpu = smp_processor_id();
  169. int ret;
  170. ret = op_cpu_disable(cpu);
  171. if (ret)
  172. return ret;
  173. /*
  174. * Take this CPU offline. Once we clear this, we can't return,
  175. * and we must not schedule until we're ready to give up the cpu.
  176. */
  177. set_cpu_online(cpu, false);
  178. /*
  179. * OK - migrate IRQs away from this CPU
  180. */
  181. migrate_irqs();
  182. /*
  183. * Remove this CPU from the vm mask set of all processes.
  184. */
  185. clear_tasks_mm_cpumask(cpu);
  186. return 0;
  187. }
  188. static DECLARE_COMPLETION(cpu_died);
  189. /*
  190. * called on the thread which is asking for a CPU to be shutdown -
  191. * waits until shutdown has completed, or it is timed out.
  192. */
  193. void __cpu_die(unsigned int cpu)
  194. {
  195. if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
  196. pr_crit("CPU%u: cpu didn't die\n", cpu);
  197. return;
  198. }
  199. pr_notice("CPU%u: shutdown\n", cpu);
  200. }
  201. /*
  202. * Called from the idle thread for the CPU which has been shutdown.
  203. *
  204. * Note that we disable IRQs here, but do not re-enable them
  205. * before returning to the caller. This is also the behaviour
  206. * of the other hotplug-cpu capable cores, so presumably coming
  207. * out of idle fixes this.
  208. */
  209. void cpu_die(void)
  210. {
  211. unsigned int cpu = smp_processor_id();
  212. idle_task_exit();
  213. local_irq_disable();
  214. /* Tell __cpu_die() that this CPU is now safe to dispose of */
  215. complete(&cpu_died);
  216. /*
  217. * Actually shutdown the CPU. This must never fail. The specific hotplug
  218. * mechanism must perform all required cache maintenance to ensure that
  219. * no dirty lines are lost in the process of shutting down the CPU.
  220. */
  221. cpu_ops[cpu]->cpu_die(cpu);
  222. BUG();
  223. }
  224. #endif
  225. void __init smp_cpus_done(unsigned int max_cpus)
  226. {
  227. pr_info("SMP: Total of %d processors activated.\n", num_online_cpus());
  228. }
  229. void __init smp_prepare_boot_cpu(void)
  230. {
  231. }
  232. static void (*smp_cross_call)(const struct cpumask *, unsigned int);
  233. /*
  234. * Enumerate the possible CPU set from the device tree and build the
  235. * cpu logical map array containing MPIDR values related to logical
  236. * cpus. Assumes that cpu_logical_map(0) has already been initialized.
  237. */
  238. void __init smp_init_cpus(void)
  239. {
  240. struct device_node *dn = NULL;
  241. unsigned int i, cpu = 1;
  242. bool bootcpu_valid = false;
  243. while ((dn = of_find_node_by_type(dn, "cpu"))) {
  244. const u32 *cell;
  245. u64 hwid;
  246. /*
  247. * A cpu node with missing "reg" property is
  248. * considered invalid to build a cpu_logical_map
  249. * entry.
  250. */
  251. cell = of_get_property(dn, "reg", NULL);
  252. if (!cell) {
  253. pr_err("%s: missing reg property\n", dn->full_name);
  254. goto next;
  255. }
  256. hwid = of_read_number(cell, of_n_addr_cells(dn));
  257. /*
  258. * Non affinity bits must be set to 0 in the DT
  259. */
  260. if (hwid & ~MPIDR_HWID_BITMASK) {
  261. pr_err("%s: invalid reg property\n", dn->full_name);
  262. goto next;
  263. }
  264. /*
  265. * Duplicate MPIDRs are a recipe for disaster. Scan
  266. * all initialized entries and check for
  267. * duplicates. If any is found just ignore the cpu.
  268. * cpu_logical_map was initialized to INVALID_HWID to
  269. * avoid matching valid MPIDR values.
  270. */
  271. for (i = 1; (i < cpu) && (i < NR_CPUS); i++) {
  272. if (cpu_logical_map(i) == hwid) {
  273. pr_err("%s: duplicate cpu reg properties in the DT\n",
  274. dn->full_name);
  275. goto next;
  276. }
  277. }
  278. /*
  279. * The numbering scheme requires that the boot CPU
  280. * must be assigned logical id 0. Record it so that
  281. * the logical map built from DT is validated and can
  282. * be used.
  283. */
  284. if (hwid == cpu_logical_map(0)) {
  285. if (bootcpu_valid) {
  286. pr_err("%s: duplicate boot cpu reg property in DT\n",
  287. dn->full_name);
  288. goto next;
  289. }
  290. bootcpu_valid = true;
  291. /*
  292. * cpu_logical_map has already been
  293. * initialized and the boot cpu doesn't need
  294. * the enable-method so continue without
  295. * incrementing cpu.
  296. */
  297. continue;
  298. }
  299. if (cpu >= NR_CPUS)
  300. goto next;
  301. if (cpu_read_ops(dn, cpu) != 0)
  302. goto next;
  303. if (cpu_ops[cpu]->cpu_init(dn, cpu))
  304. goto next;
  305. pr_debug("cpu logical map 0x%llx\n", hwid);
  306. cpu_logical_map(cpu) = hwid;
  307. next:
  308. cpu++;
  309. }
  310. /* sanity check */
  311. if (cpu > NR_CPUS)
  312. pr_warning("no. of cores (%d) greater than configured maximum of %d - clipping\n",
  313. cpu, NR_CPUS);
  314. if (!bootcpu_valid) {
  315. pr_err("DT missing boot CPU MPIDR, not enabling secondaries\n");
  316. return;
  317. }
  318. /*
  319. * All the cpus that made it to the cpu_logical_map have been
  320. * validated so set them as possible cpus.
  321. */
  322. for (i = 0; i < NR_CPUS; i++)
  323. if (cpu_logical_map(i) != INVALID_HWID)
  324. set_cpu_possible(i, true);
  325. }
  326. void __init smp_prepare_cpus(unsigned int max_cpus)
  327. {
  328. int err;
  329. unsigned int cpu, ncores = num_possible_cpus();
  330. /*
  331. * are we trying to boot more cores than exist?
  332. */
  333. if (max_cpus > ncores)
  334. max_cpus = ncores;
  335. /* Don't bother if we're effectively UP */
  336. if (max_cpus <= 1)
  337. return;
  338. /*
  339. * Initialise the present map (which describes the set of CPUs
  340. * actually populated at the present time) and release the
  341. * secondaries from the bootloader.
  342. *
  343. * Make sure we online at most (max_cpus - 1) additional CPUs.
  344. */
  345. max_cpus--;
  346. for_each_possible_cpu(cpu) {
  347. if (max_cpus == 0)
  348. break;
  349. if (cpu == smp_processor_id())
  350. continue;
  351. if (!cpu_ops[cpu])
  352. continue;
  353. err = cpu_ops[cpu]->cpu_prepare(cpu);
  354. if (err)
  355. continue;
  356. set_cpu_present(cpu, true);
  357. max_cpus--;
  358. }
  359. }
  360. void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
  361. {
  362. smp_cross_call = fn;
  363. }
  364. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  365. {
  366. smp_cross_call(mask, IPI_CALL_FUNC);
  367. }
  368. void arch_send_call_function_single_ipi(int cpu)
  369. {
  370. smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC_SINGLE);
  371. }
  372. static const char *ipi_types[NR_IPI] = {
  373. #define S(x,s) [x - IPI_RESCHEDULE] = s
  374. S(IPI_RESCHEDULE, "Rescheduling interrupts"),
  375. S(IPI_CALL_FUNC, "Function call interrupts"),
  376. S(IPI_CALL_FUNC_SINGLE, "Single function call interrupts"),
  377. S(IPI_CPU_STOP, "CPU stop interrupts"),
  378. };
  379. void show_ipi_list(struct seq_file *p, int prec)
  380. {
  381. unsigned int cpu, i;
  382. for (i = 0; i < NR_IPI; i++) {
  383. seq_printf(p, "%*s%u:%s", prec - 1, "IPI", i + IPI_RESCHEDULE,
  384. prec >= 4 ? " " : "");
  385. for_each_online_cpu(cpu)
  386. seq_printf(p, "%10u ",
  387. __get_irq_stat(cpu, ipi_irqs[i]));
  388. seq_printf(p, " %s\n", ipi_types[i]);
  389. }
  390. }
  391. u64 smp_irq_stat_cpu(unsigned int cpu)
  392. {
  393. u64 sum = 0;
  394. int i;
  395. for (i = 0; i < NR_IPI; i++)
  396. sum += __get_irq_stat(cpu, ipi_irqs[i]);
  397. return sum;
  398. }
  399. static DEFINE_RAW_SPINLOCK(stop_lock);
  400. /*
  401. * ipi_cpu_stop - handle IPI from smp_send_stop()
  402. */
  403. static void ipi_cpu_stop(unsigned int cpu)
  404. {
  405. if (system_state == SYSTEM_BOOTING ||
  406. system_state == SYSTEM_RUNNING) {
  407. raw_spin_lock(&stop_lock);
  408. pr_crit("CPU%u: stopping\n", cpu);
  409. dump_stack();
  410. raw_spin_unlock(&stop_lock);
  411. }
  412. set_cpu_online(cpu, false);
  413. local_fiq_disable();
  414. local_irq_disable();
  415. while (1)
  416. cpu_relax();
  417. }
  418. /*
  419. * Main handler for inter-processor interrupts
  420. */
  421. void handle_IPI(int ipinr, struct pt_regs *regs)
  422. {
  423. unsigned int cpu = smp_processor_id();
  424. struct pt_regs *old_regs = set_irq_regs(regs);
  425. if (ipinr >= IPI_RESCHEDULE && ipinr < IPI_RESCHEDULE + NR_IPI)
  426. __inc_irq_stat(cpu, ipi_irqs[ipinr - IPI_RESCHEDULE]);
  427. switch (ipinr) {
  428. case IPI_RESCHEDULE:
  429. scheduler_ipi();
  430. break;
  431. case IPI_CALL_FUNC:
  432. irq_enter();
  433. generic_smp_call_function_interrupt();
  434. irq_exit();
  435. break;
  436. case IPI_CALL_FUNC_SINGLE:
  437. irq_enter();
  438. generic_smp_call_function_single_interrupt();
  439. irq_exit();
  440. break;
  441. case IPI_CPU_STOP:
  442. irq_enter();
  443. ipi_cpu_stop(cpu);
  444. irq_exit();
  445. break;
  446. default:
  447. pr_crit("CPU%u: Unknown IPI message 0x%x\n", cpu, ipinr);
  448. break;
  449. }
  450. set_irq_regs(old_regs);
  451. }
  452. void smp_send_reschedule(int cpu)
  453. {
  454. smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
  455. }
  456. void smp_send_stop(void)
  457. {
  458. unsigned long timeout;
  459. if (num_online_cpus() > 1) {
  460. cpumask_t mask;
  461. cpumask_copy(&mask, cpu_online_mask);
  462. cpu_clear(smp_processor_id(), mask);
  463. smp_cross_call(&mask, IPI_CPU_STOP);
  464. }
  465. /* Wait up to one second for other CPUs to stop */
  466. timeout = USEC_PER_SEC;
  467. while (num_online_cpus() > 1 && timeout--)
  468. udelay(1);
  469. if (num_online_cpus() > 1)
  470. pr_warning("SMP: failed to stop secondary CPUs\n");
  471. }
  472. /*
  473. * not supported here
  474. */
  475. int setup_profiling_timer(unsigned int multiplier)
  476. {
  477. return -EINVAL;
  478. }