setup.c 7.6 KB

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  1. /*
  2. * Based on arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. * Copyright (C) 2012 ARM Ltd.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/export.h>
  20. #include <linux/kernel.h>
  21. #include <linux/stddef.h>
  22. #include <linux/ioport.h>
  23. #include <linux/delay.h>
  24. #include <linux/utsname.h>
  25. #include <linux/initrd.h>
  26. #include <linux/console.h>
  27. #include <linux/bootmem.h>
  28. #include <linux/seq_file.h>
  29. #include <linux/screen_info.h>
  30. #include <linux/init.h>
  31. #include <linux/kexec.h>
  32. #include <linux/crash_dump.h>
  33. #include <linux/root_dev.h>
  34. #include <linux/clk-provider.h>
  35. #include <linux/cpu.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/smp.h>
  38. #include <linux/fs.h>
  39. #include <linux/proc_fs.h>
  40. #include <linux/memblock.h>
  41. #include <linux/of_fdt.h>
  42. #include <linux/of_platform.h>
  43. #include <asm/cputype.h>
  44. #include <asm/elf.h>
  45. #include <asm/cputable.h>
  46. #include <asm/cpu_ops.h>
  47. #include <asm/sections.h>
  48. #include <asm/setup.h>
  49. #include <asm/smp_plat.h>
  50. #include <asm/cacheflush.h>
  51. #include <asm/tlbflush.h>
  52. #include <asm/traps.h>
  53. #include <asm/memblock.h>
  54. #include <asm/psci.h>
  55. unsigned int processor_id;
  56. EXPORT_SYMBOL(processor_id);
  57. unsigned long elf_hwcap __read_mostly;
  58. EXPORT_SYMBOL_GPL(elf_hwcap);
  59. #ifdef CONFIG_COMPAT
  60. #define COMPAT_ELF_HWCAP_DEFAULT \
  61. (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
  62. COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
  63. COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
  64. COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
  65. COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
  66. unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
  67. #endif
  68. static const char *cpu_name;
  69. static const char *machine_name;
  70. phys_addr_t __fdt_pointer __initdata;
  71. /*
  72. * Standard memory resources
  73. */
  74. static struct resource mem_res[] = {
  75. {
  76. .name = "Kernel code",
  77. .start = 0,
  78. .end = 0,
  79. .flags = IORESOURCE_MEM
  80. },
  81. {
  82. .name = "Kernel data",
  83. .start = 0,
  84. .end = 0,
  85. .flags = IORESOURCE_MEM
  86. }
  87. };
  88. #define kernel_code mem_res[0]
  89. #define kernel_data mem_res[1]
  90. void __init early_print(const char *str, ...)
  91. {
  92. char buf[256];
  93. va_list ap;
  94. va_start(ap, str);
  95. vsnprintf(buf, sizeof(buf), str, ap);
  96. va_end(ap);
  97. printk("%s", buf);
  98. }
  99. bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
  100. {
  101. return phys_id == cpu_logical_map(cpu);
  102. }
  103. static void __init setup_processor(void)
  104. {
  105. struct cpu_info *cpu_info;
  106. /*
  107. * locate processor in the list of supported processor
  108. * types. The linker builds this table for us from the
  109. * entries in arch/arm/mm/proc.S
  110. */
  111. cpu_info = lookup_processor_type(read_cpuid_id());
  112. if (!cpu_info) {
  113. printk("CPU configuration botched (ID %08x), unable to continue.\n",
  114. read_cpuid_id());
  115. while (1);
  116. }
  117. cpu_name = cpu_info->cpu_name;
  118. printk("CPU: %s [%08x] revision %d\n",
  119. cpu_name, read_cpuid_id(), read_cpuid_id() & 15);
  120. sprintf(init_utsname()->machine, ELF_PLATFORM);
  121. elf_hwcap = 0;
  122. }
  123. static void __init setup_machine_fdt(phys_addr_t dt_phys)
  124. {
  125. if (!dt_phys || !early_init_dt_scan(phys_to_virt(dt_phys))) {
  126. early_print("\n"
  127. "Error: invalid device tree blob at physical address 0x%p (virtual address 0x%p)\n"
  128. "The dtb must be 8-byte aligned and passed in the first 512MB of memory\n"
  129. "\nPlease check your bootloader.\n",
  130. dt_phys, phys_to_virt(dt_phys));
  131. while (true)
  132. cpu_relax();
  133. }
  134. machine_name = of_flat_dt_get_machine_name();
  135. }
  136. /*
  137. * Limit the memory size that was specified via FDT.
  138. */
  139. static int __init early_mem(char *p)
  140. {
  141. phys_addr_t limit;
  142. if (!p)
  143. return 1;
  144. limit = memparse(p, &p) & PAGE_MASK;
  145. pr_notice("Memory limited to %lldMB\n", limit >> 20);
  146. memblock_enforce_memory_limit(limit);
  147. return 0;
  148. }
  149. early_param("mem", early_mem);
  150. static void __init request_standard_resources(void)
  151. {
  152. struct memblock_region *region;
  153. struct resource *res;
  154. kernel_code.start = virt_to_phys(_text);
  155. kernel_code.end = virt_to_phys(_etext - 1);
  156. kernel_data.start = virt_to_phys(_sdata);
  157. kernel_data.end = virt_to_phys(_end - 1);
  158. for_each_memblock(memory, region) {
  159. res = alloc_bootmem_low(sizeof(*res));
  160. res->name = "System RAM";
  161. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  162. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  163. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  164. request_resource(&iomem_resource, res);
  165. if (kernel_code.start >= res->start &&
  166. kernel_code.end <= res->end)
  167. request_resource(res, &kernel_code);
  168. if (kernel_data.start >= res->start &&
  169. kernel_data.end <= res->end)
  170. request_resource(res, &kernel_data);
  171. }
  172. }
  173. u64 __cpu_logical_map[NR_CPUS] = { [0 ... NR_CPUS-1] = INVALID_HWID };
  174. void __init setup_arch(char **cmdline_p)
  175. {
  176. setup_processor();
  177. setup_machine_fdt(__fdt_pointer);
  178. init_mm.start_code = (unsigned long) _text;
  179. init_mm.end_code = (unsigned long) _etext;
  180. init_mm.end_data = (unsigned long) _edata;
  181. init_mm.brk = (unsigned long) _end;
  182. *cmdline_p = boot_command_line;
  183. parse_early_param();
  184. arm64_memblock_init();
  185. paging_init();
  186. request_standard_resources();
  187. unflatten_device_tree();
  188. psci_init();
  189. cpu_logical_map(0) = read_cpuid_mpidr() & MPIDR_HWID_BITMASK;
  190. cpu_read_bootcpu_ops();
  191. #ifdef CONFIG_SMP
  192. smp_init_cpus();
  193. #endif
  194. #ifdef CONFIG_VT
  195. #if defined(CONFIG_VGA_CONSOLE)
  196. conswitchp = &vga_con;
  197. #elif defined(CONFIG_DUMMY_CONSOLE)
  198. conswitchp = &dummy_con;
  199. #endif
  200. #endif
  201. }
  202. static int __init arm64_device_init(void)
  203. {
  204. of_clk_init(NULL);
  205. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  206. return 0;
  207. }
  208. arch_initcall(arm64_device_init);
  209. static DEFINE_PER_CPU(struct cpu, cpu_data);
  210. static int __init topology_init(void)
  211. {
  212. int i;
  213. for_each_possible_cpu(i) {
  214. struct cpu *cpu = &per_cpu(cpu_data, i);
  215. cpu->hotpluggable = 1;
  216. register_cpu(cpu, i);
  217. }
  218. return 0;
  219. }
  220. subsys_initcall(topology_init);
  221. static const char *hwcap_str[] = {
  222. "fp",
  223. "asimd",
  224. "evtstrm",
  225. NULL
  226. };
  227. static int c_show(struct seq_file *m, void *v)
  228. {
  229. int i;
  230. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  231. cpu_name, read_cpuid_id() & 15, ELF_PLATFORM);
  232. for_each_online_cpu(i) {
  233. /*
  234. * glibc reads /proc/cpuinfo to determine the number of
  235. * online processors, looking for lines beginning with
  236. * "processor". Give glibc what it expects.
  237. */
  238. #ifdef CONFIG_SMP
  239. seq_printf(m, "processor\t: %d\n", i);
  240. #endif
  241. }
  242. /* dump out the processor features */
  243. seq_puts(m, "Features\t: ");
  244. for (i = 0; hwcap_str[i]; i++)
  245. if (elf_hwcap & (1 << i))
  246. seq_printf(m, "%s ", hwcap_str[i]);
  247. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  248. seq_printf(m, "CPU architecture: AArch64\n");
  249. seq_printf(m, "CPU variant\t: 0x%x\n", (read_cpuid_id() >> 20) & 15);
  250. seq_printf(m, "CPU part\t: 0x%03x\n", (read_cpuid_id() >> 4) & 0xfff);
  251. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  252. seq_puts(m, "\n");
  253. seq_printf(m, "Hardware\t: %s\n", machine_name);
  254. return 0;
  255. }
  256. static void *c_start(struct seq_file *m, loff_t *pos)
  257. {
  258. return *pos < 1 ? (void *)1 : NULL;
  259. }
  260. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  261. {
  262. ++*pos;
  263. return NULL;
  264. }
  265. static void c_stop(struct seq_file *m, void *v)
  266. {
  267. }
  268. const struct seq_operations cpuinfo_op = {
  269. .start = c_start,
  270. .next = c_next,
  271. .stop = c_stop,
  272. .show = c_show
  273. };