cpu-db8500.c 6.9 KB

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  1. /*
  2. * Copyright (C) 2008-2009 ST-Ericsson SA
  3. *
  4. * Author: Srinidhi KASAGAR <srinidhi.kasagar@stericsson.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2, as
  8. * published by the Free Software Foundation.
  9. *
  10. */
  11. #include <linux/types.h>
  12. #include <linux/init.h>
  13. #include <linux/device.h>
  14. #include <linux/amba/bus.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/irq.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/io.h>
  19. #include <linux/mfd/abx500/ab8500.h>
  20. #include <linux/mfd/dbx500-prcmu.h>
  21. #include <linux/of.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/regulator/machine.h>
  24. #include <linux/platform_data/pinctrl-nomadik.h>
  25. #include <linux/random.h>
  26. #include <asm/pmu.h>
  27. #include <asm/mach/map.h>
  28. #include "setup.h"
  29. #include "devices.h"
  30. #include "irqs.h"
  31. #include "devices-db8500.h"
  32. #include "db8500-regs.h"
  33. #include "board-mop500.h"
  34. #include "id.h"
  35. /* minimum static i/o mapping required to boot U8500 platforms */
  36. static struct map_desc u8500_uart_io_desc[] __initdata = {
  37. __IO_DEV_DESC(U8500_UART0_BASE, SZ_4K),
  38. __IO_DEV_DESC(U8500_UART2_BASE, SZ_4K),
  39. };
  40. /* U8500 and U9540 common io_desc */
  41. static struct map_desc u8500_common_io_desc[] __initdata = {
  42. /* SCU base also covers GIC CPU BASE and TWD with its 4K page */
  43. __IO_DEV_DESC(U8500_SCU_BASE, SZ_4K),
  44. __IO_DEV_DESC(U8500_GIC_DIST_BASE, SZ_4K),
  45. __IO_DEV_DESC(U8500_L2CC_BASE, SZ_4K),
  46. __IO_DEV_DESC(U8500_MTU0_BASE, SZ_4K),
  47. __IO_DEV_DESC(U8500_BACKUPRAM0_BASE, SZ_8K),
  48. __IO_DEV_DESC(U8500_CLKRST1_BASE, SZ_4K),
  49. __IO_DEV_DESC(U8500_CLKRST2_BASE, SZ_4K),
  50. __IO_DEV_DESC(U8500_CLKRST3_BASE, SZ_4K),
  51. __IO_DEV_DESC(U8500_CLKRST5_BASE, SZ_4K),
  52. __IO_DEV_DESC(U8500_CLKRST6_BASE, SZ_4K),
  53. __IO_DEV_DESC(U8500_GPIO0_BASE, SZ_4K),
  54. __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
  55. __IO_DEV_DESC(U8500_GPIO2_BASE, SZ_4K),
  56. __IO_DEV_DESC(U8500_GPIO3_BASE, SZ_4K),
  57. };
  58. /* U8500 IO map specific description */
  59. static struct map_desc u8500_io_desc[] __initdata = {
  60. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
  61. __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K),
  62. };
  63. /* U9540 IO map specific description */
  64. static struct map_desc u9540_io_desc[] __initdata = {
  65. __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K + SZ_8K),
  66. __IO_DEV_DESC(U8500_PRCMU_TCDM_BASE, SZ_4K + SZ_8K),
  67. };
  68. void __init u8500_map_io(void)
  69. {
  70. /*
  71. * Map the UARTs early so that the DEBUG_LL stuff continues to work.
  72. */
  73. iotable_init(u8500_uart_io_desc, ARRAY_SIZE(u8500_uart_io_desc));
  74. ux500_map_io();
  75. iotable_init(u8500_common_io_desc, ARRAY_SIZE(u8500_common_io_desc));
  76. if (cpu_is_ux540_family())
  77. iotable_init(u9540_io_desc, ARRAY_SIZE(u9540_io_desc));
  78. else
  79. iotable_init(u8500_io_desc, ARRAY_SIZE(u8500_io_desc));
  80. }
  81. /*
  82. * The PMU IRQ lines of two cores are wired together into a single interrupt.
  83. * Bounce the interrupt to the other core if it's not ours.
  84. */
  85. static irqreturn_t db8500_pmu_handler(int irq, void *dev, irq_handler_t handler)
  86. {
  87. irqreturn_t ret = handler(irq, dev);
  88. int other = !smp_processor_id();
  89. if (ret == IRQ_NONE && cpu_online(other))
  90. irq_set_affinity(irq, cpumask_of(other));
  91. /*
  92. * We should be able to get away with the amount of IRQ_NONEs we give,
  93. * while still having the spurious IRQ detection code kick in if the
  94. * interrupt really starts hitting spuriously.
  95. */
  96. return ret;
  97. }
  98. struct arm_pmu_platdata db8500_pmu_platdata = {
  99. .handle_irq = db8500_pmu_handler,
  100. };
  101. static const char *db8500_read_soc_id(void)
  102. {
  103. void __iomem *uid = __io_address(U8500_BB_UID_BASE);
  104. /* Throw these device-specific numbers into the entropy pool */
  105. add_device_randomness(uid, 0x14);
  106. return kasprintf(GFP_KERNEL, "%08x%08x%08x%08x%08x",
  107. readl((u32 *)uid+0),
  108. readl((u32 *)uid+1), readl((u32 *)uid+2),
  109. readl((u32 *)uid+3), readl((u32 *)uid+4));
  110. }
  111. static struct device * __init db8500_soc_device_init(void)
  112. {
  113. const char *soc_id = db8500_read_soc_id();
  114. return ux500_soc_device_init(soc_id);
  115. }
  116. #ifdef CONFIG_MACH_UX500_DT
  117. static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
  118. /* Requires call-back bindings. */
  119. OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
  120. /* Requires DMA bindings. */
  121. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80123000,
  122. "ux500-msp-i2s.0", &msp0_platform_data),
  123. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80124000,
  124. "ux500-msp-i2s.1", &msp1_platform_data),
  125. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80117000,
  126. "ux500-msp-i2s.2", &msp2_platform_data),
  127. OF_DEV_AUXDATA("stericsson,ux500-msp-i2s", 0x80125000,
  128. "ux500-msp-i2s.3", &msp3_platform_data),
  129. /* Requires non-DT:able platform data. */
  130. OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
  131. &db8500_prcmu_pdata),
  132. OF_DEV_AUXDATA("stericsson,ux500-cryp", 0xa03cb000, "cryp1", NULL),
  133. OF_DEV_AUXDATA("stericsson,ux500-hash", 0xa03c2000, "hash1", NULL),
  134. OF_DEV_AUXDATA("stericsson,snd-soc-mop500", 0, "snd-soc-mop500.0",
  135. NULL),
  136. /* Requires device name bindings. */
  137. OF_DEV_AUXDATA("stericsson,db8500-pinctrl", U8500_PRCMU_BASE,
  138. "pinctrl-db8500", NULL),
  139. {},
  140. };
  141. static struct of_dev_auxdata u8540_auxdata_lookup[] __initdata = {
  142. /* Requires DMA bindings. */
  143. OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", NULL),
  144. OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", NULL),
  145. OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", NULL),
  146. OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
  147. &db8500_prcmu_pdata),
  148. {},
  149. };
  150. static const struct of_device_id u8500_local_bus_nodes[] = {
  151. /* only create devices below soc node */
  152. { .compatible = "stericsson,db8500", },
  153. { .compatible = "stericsson,db8500-prcmu", },
  154. { .compatible = "simple-bus"},
  155. { },
  156. };
  157. static void __init u8500_init_machine(void)
  158. {
  159. struct device *parent = db8500_soc_device_init();
  160. /* Pinmaps must be in place before devices register */
  161. if (of_machine_is_compatible("st-ericsson,mop500"))
  162. mop500_pinmaps_init();
  163. else if (of_machine_is_compatible("calaosystems,snowball-a9500")) {
  164. snowball_pinmaps_init();
  165. } else if (of_machine_is_compatible("st-ericsson,hrefv60+"))
  166. hrefv60_pinmaps_init();
  167. else if (of_machine_is_compatible("st-ericsson,ccu9540")) {}
  168. /* TODO: Add pinmaps for ccu9540 board. */
  169. /* automatically probe child nodes of dbx5x0 devices */
  170. if (of_machine_is_compatible("st-ericsson,u8540"))
  171. of_platform_populate(NULL, u8500_local_bus_nodes,
  172. u8540_auxdata_lookup, parent);
  173. else
  174. of_platform_populate(NULL, u8500_local_bus_nodes,
  175. u8500_auxdata_lookup, parent);
  176. }
  177. static const char * stericsson_dt_platform_compat[] = {
  178. "st-ericsson,u8500",
  179. "st-ericsson,u8540",
  180. "st-ericsson,u9500",
  181. "st-ericsson,u9540",
  182. NULL,
  183. };
  184. DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)")
  185. .smp = smp_ops(ux500_smp_ops),
  186. .map_io = u8500_map_io,
  187. .init_irq = ux500_init_irq,
  188. /* we re-use nomadik timer here */
  189. .init_time = ux500_timer_init,
  190. .init_machine = u8500_init_machine,
  191. .init_late = NULL,
  192. .dt_compat = stericsson_dt_platform_compat,
  193. .restart = ux500_restart,
  194. MACHINE_END
  195. #endif