setup-r7s72100.c 2.8 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788
  1. /*
  2. * r7s72100 processor support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/irq.h>
  21. #include <linux/kernel.h>
  22. #include <linux/of_platform.h>
  23. #include <linux/serial_sci.h>
  24. #include <mach/common.h>
  25. #include <mach/irqs.h>
  26. #include <mach/r7s72100.h>
  27. #include <asm/mach/arch.h>
  28. #define SCIF_DATA(index, baseaddr, irq) \
  29. [index] = { \
  30. .type = PORT_SCIF, \
  31. .regtype = SCIx_SH2_SCIF_FIFODATA_REGTYPE, \
  32. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
  33. .scbrr_algo_id = SCBRR_ALGO_2, \
  34. .scscr = SCSCR_RIE | SCSCR_TIE | SCSCR_RE | SCSCR_TE | \
  35. SCSCR_REIE, \
  36. .mapbase = baseaddr, \
  37. .irqs = { irq + 1, irq + 2, irq + 3, irq }, \
  38. }
  39. enum { SCIF0, SCIF1, SCIF2, SCIF3, SCIF4, SCIF5, SCIF6, SCIF7 };
  40. static const struct plat_sci_port scif[] __initconst = {
  41. SCIF_DATA(SCIF0, 0xe8007000, gic_iid(221)), /* SCIF0 */
  42. SCIF_DATA(SCIF1, 0xe8007800, gic_iid(225)), /* SCIF1 */
  43. SCIF_DATA(SCIF2, 0xe8008000, gic_iid(229)), /* SCIF2 */
  44. SCIF_DATA(SCIF3, 0xe8008800, gic_iid(233)), /* SCIF3 */
  45. SCIF_DATA(SCIF4, 0xe8009000, gic_iid(237)), /* SCIF4 */
  46. SCIF_DATA(SCIF5, 0xe8009800, gic_iid(241)), /* SCIF5 */
  47. SCIF_DATA(SCIF6, 0xe800a000, gic_iid(245)), /* SCIF6 */
  48. SCIF_DATA(SCIF7, 0xe800a800, gic_iid(249)), /* SCIF7 */
  49. };
  50. static inline void r7s72100_register_scif(int idx)
  51. {
  52. platform_device_register_data(&platform_bus, "sh-sci", idx, &scif[idx],
  53. sizeof(struct plat_sci_port));
  54. }
  55. void __init r7s72100_add_dt_devices(void)
  56. {
  57. r7s72100_register_scif(SCIF0);
  58. r7s72100_register_scif(SCIF1);
  59. r7s72100_register_scif(SCIF2);
  60. r7s72100_register_scif(SCIF3);
  61. r7s72100_register_scif(SCIF4);
  62. r7s72100_register_scif(SCIF5);
  63. r7s72100_register_scif(SCIF6);
  64. r7s72100_register_scif(SCIF7);
  65. }
  66. void __init r7s72100_init_early(void)
  67. {
  68. shmobile_setup_delay(400, 1, 3); /* Cortex-A9 @ 400MHz */
  69. }
  70. #ifdef CONFIG_USE_OF
  71. static const char *r7s72100_boards_compat_dt[] __initdata = {
  72. "renesas,r7s72100",
  73. NULL,
  74. };
  75. DT_MACHINE_START(R7S72100_DT, "Generic R7S72100 (Flattened Device Tree)")
  76. .init_early = r7s72100_init_early,
  77. .dt_compat = r7s72100_boards_compat_dt,
  78. MACHINE_END
  79. #endif /* CONFIG_USE_OF */