board-lager.c 7.6 KB

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  1. /*
  2. * Lager board support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/gpio.h>
  21. #include <linux/gpio_keys.h>
  22. #include <linux/input.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/kernel.h>
  25. #include <linux/leds.h>
  26. #include <linux/mmc/host.h>
  27. #include <linux/mmc/sh_mmcif.h>
  28. #include <linux/pinctrl/machine.h>
  29. #include <linux/platform_data/gpio-rcar.h>
  30. #include <linux/platform_data/rcar-du.h>
  31. #include <linux/platform_device.h>
  32. #include <linux/phy.h>
  33. #include <linux/regulator/fixed.h>
  34. #include <linux/regulator/machine.h>
  35. #include <linux/sh_eth.h>
  36. #include <mach/common.h>
  37. #include <mach/irqs.h>
  38. #include <mach/r8a7790.h>
  39. #include <asm/mach-types.h>
  40. #include <asm/mach/arch.h>
  41. /* DU */
  42. static struct rcar_du_encoder_data lager_du_encoders[] = {
  43. {
  44. .type = RCAR_DU_ENCODER_VGA,
  45. .output = RCAR_DU_OUTPUT_DPAD0,
  46. }, {
  47. .type = RCAR_DU_ENCODER_NONE,
  48. .output = RCAR_DU_OUTPUT_LVDS1,
  49. .connector.lvds.panel = {
  50. .width_mm = 210,
  51. .height_mm = 158,
  52. .mode = {
  53. .clock = 65000,
  54. .hdisplay = 1024,
  55. .hsync_start = 1048,
  56. .hsync_end = 1184,
  57. .htotal = 1344,
  58. .vdisplay = 768,
  59. .vsync_start = 771,
  60. .vsync_end = 777,
  61. .vtotal = 806,
  62. .flags = 0,
  63. },
  64. },
  65. },
  66. };
  67. static const struct rcar_du_platform_data lager_du_pdata __initconst = {
  68. .encoders = lager_du_encoders,
  69. .num_encoders = ARRAY_SIZE(lager_du_encoders),
  70. };
  71. static const struct resource du_resources[] __initconst = {
  72. DEFINE_RES_MEM(0xfeb00000, 0x70000),
  73. DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
  74. DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
  75. DEFINE_RES_IRQ(gic_spi(256)),
  76. DEFINE_RES_IRQ(gic_spi(268)),
  77. DEFINE_RES_IRQ(gic_spi(269)),
  78. };
  79. static void __init lager_add_du_device(void)
  80. {
  81. struct platform_device_info info = {
  82. .name = "rcar-du-r8a7790",
  83. .id = -1,
  84. .res = du_resources,
  85. .num_res = ARRAY_SIZE(du_resources),
  86. .data = &lager_du_pdata,
  87. .size_data = sizeof(lager_du_pdata),
  88. .dma_mask = DMA_BIT_MASK(32),
  89. };
  90. platform_device_register_full(&info);
  91. }
  92. /* LEDS */
  93. static struct gpio_led lager_leds[] = {
  94. {
  95. .name = "led8",
  96. .gpio = RCAR_GP_PIN(5, 17),
  97. .default_state = LEDS_GPIO_DEFSTATE_ON,
  98. }, {
  99. .name = "led7",
  100. .gpio = RCAR_GP_PIN(4, 23),
  101. .default_state = LEDS_GPIO_DEFSTATE_ON,
  102. }, {
  103. .name = "led6",
  104. .gpio = RCAR_GP_PIN(4, 22),
  105. .default_state = LEDS_GPIO_DEFSTATE_ON,
  106. },
  107. };
  108. static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
  109. .leds = lager_leds,
  110. .num_leds = ARRAY_SIZE(lager_leds),
  111. };
  112. /* GPIO KEY */
  113. #define GPIO_KEY(c, g, d, ...) \
  114. { .code = c, .gpio = g, .desc = d, .active_low = 1 }
  115. static struct gpio_keys_button gpio_buttons[] = {
  116. GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
  117. GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
  118. GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
  119. GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
  120. };
  121. static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
  122. .buttons = gpio_buttons,
  123. .nbuttons = ARRAY_SIZE(gpio_buttons),
  124. };
  125. /* Fixed 3.3V regulator to be used by MMCIF */
  126. static struct regulator_consumer_supply fixed3v3_power_consumers[] =
  127. {
  128. REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
  129. };
  130. /* MMCIF */
  131. static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
  132. .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
  133. .clk_ctrl2_present = true,
  134. .ccs_unsupported = true,
  135. };
  136. static const struct resource mmcif1_resources[] __initconst = {
  137. DEFINE_RES_MEM_NAMED(0xee220000, 0x80, "MMCIF1"),
  138. DEFINE_RES_IRQ(gic_spi(170)),
  139. };
  140. /* Ether */
  141. static const struct sh_eth_plat_data ether_pdata __initconst = {
  142. .phy = 0x1,
  143. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  144. .phy_interface = PHY_INTERFACE_MODE_RMII,
  145. .ether_link_active_low = 1,
  146. };
  147. static const struct resource ether_resources[] __initconst = {
  148. DEFINE_RES_MEM(0xee700000, 0x400),
  149. DEFINE_RES_IRQ(gic_spi(162)),
  150. };
  151. static const struct pinctrl_map lager_pinctrl_map[] = {
  152. /* DU (CN10: ARGB0, CN13: LVDS) */
  153. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  154. "du_rgb666", "du"),
  155. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  156. "du_sync_1", "du"),
  157. PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
  158. "du_clk_out_0", "du"),
  159. /* SCIF0 (CN19: DEBUG SERIAL0) */
  160. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
  161. "scif0_data", "scif0"),
  162. /* SCIF1 (CN20: DEBUG SERIAL1) */
  163. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
  164. "scif1_data", "scif1"),
  165. /* MMCIF1 */
  166. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  167. "mmc1_data8", "mmc1"),
  168. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
  169. "mmc1_ctrl", "mmc1"),
  170. /* Ether */
  171. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  172. "eth_link", "eth"),
  173. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  174. "eth_mdio", "eth"),
  175. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  176. "eth_rmii", "eth"),
  177. PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
  178. "intc_irq0", "intc"),
  179. };
  180. static void __init lager_add_standard_devices(void)
  181. {
  182. r8a7790_clock_init();
  183. pinctrl_register_mappings(lager_pinctrl_map,
  184. ARRAY_SIZE(lager_pinctrl_map));
  185. r8a7790_pinmux_init();
  186. r8a7790_add_standard_devices();
  187. platform_device_register_data(&platform_bus, "leds-gpio", -1,
  188. &lager_leds_pdata,
  189. sizeof(lager_leds_pdata));
  190. platform_device_register_data(&platform_bus, "gpio-keys", -1,
  191. &lager_keys_pdata,
  192. sizeof(lager_keys_pdata));
  193. regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers,
  194. ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
  195. platform_device_register_resndata(&platform_bus, "sh_mmcif", 1,
  196. mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
  197. &mmcif1_pdata, sizeof(mmcif1_pdata));
  198. platform_device_register_resndata(&platform_bus, "r8a7790-ether", -1,
  199. ether_resources,
  200. ARRAY_SIZE(ether_resources),
  201. &ether_pdata, sizeof(ether_pdata));
  202. lager_add_du_device();
  203. }
  204. /*
  205. * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
  206. * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
  207. * 14-15. We have to set them back to 01 from the default 00 value each time
  208. * the PHY is reset. It's also important because the PHY's LED0 signal is
  209. * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
  210. * bounce on and off after each packet, which we apparently want to avoid.
  211. */
  212. static int lager_ksz8041_fixup(struct phy_device *phydev)
  213. {
  214. u16 phyctrl1 = phy_read(phydev, 0x1e);
  215. phyctrl1 &= ~0xc000;
  216. phyctrl1 |= 0x4000;
  217. return phy_write(phydev, 0x1e, phyctrl1);
  218. }
  219. static void __init lager_init(void)
  220. {
  221. lager_add_standard_devices();
  222. phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
  223. }
  224. static const char * const lager_boards_compat_dt[] __initconst = {
  225. "renesas,lager",
  226. NULL,
  227. };
  228. DT_MACHINE_START(LAGER_DT, "lager")
  229. .smp = smp_ops(r8a7790_smp_ops),
  230. .init_early = r8a7790_init_early,
  231. .init_time = rcar_gen2_timer_init,
  232. .init_machine = lager_init,
  233. .dt_compat = lager_boards_compat_dt,
  234. MACHINE_END