board-bockw.c 17 KB

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  1. /*
  2. * Bock-W board support
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
  6. * Copyright (C) 2013 Cogent Embedded, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; version 2 of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  20. */
  21. #include <linux/mfd/tmio.h>
  22. #include <linux/mmc/host.h>
  23. #include <linux/mmc/sh_mobile_sdhi.h>
  24. #include <linux/mmc/sh_mmcif.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/pinctrl/machine.h>
  27. #include <linux/platform_data/usb-rcar-phy.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/regulator/fixed.h>
  30. #include <linux/regulator/machine.h>
  31. #include <linux/smsc911x.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/flash.h>
  34. #include <linux/usb/renesas_usbhs.h>
  35. #include <media/soc_camera.h>
  36. #include <mach/common.h>
  37. #include <mach/irqs.h>
  38. #include <mach/r8a7778.h>
  39. #include <asm/mach/arch.h>
  40. #include <sound/rcar_snd.h>
  41. #include <sound/simple_card.h>
  42. #define FPGA 0x18200000
  43. #define IRQ0MR 0x30
  44. #define COMCTLR 0x101c
  45. static void __iomem *fpga;
  46. /*
  47. * CN9(Upper side) SCIF/RCAN selection
  48. *
  49. * 1,4 3,6
  50. * SW40 SCIF RCAN
  51. * SW41 SCIF RCAN
  52. */
  53. /*
  54. * MMC (CN26) pin
  55. *
  56. * SW6 (D2) 3 pin
  57. * SW7 (D5) ON
  58. * SW8 (D3) 3 pin
  59. * SW10 (D4) 1 pin
  60. * SW12 (CLK) 1 pin
  61. * SW13 (D6) 3 pin
  62. * SW14 (CMD) ON
  63. * SW15 (D6) 1 pin
  64. * SW16 (D0) ON
  65. * SW17 (D1) ON
  66. * SW18 (D7) 3 pin
  67. * SW19 (MMC) 1 pin
  68. */
  69. /*
  70. * SSI settings
  71. *
  72. * SW45: 1-4 side (SSI5 out, ROUT/LOUT CN19 Mid)
  73. * SW46: 1101 (SSI6 Recorde)
  74. * SW47: 1110 (SSI5 Playback)
  75. * SW48: 11 (Recorde power)
  76. * SW49: 1 (SSI slave mode)
  77. * SW50: 1111 (SSI7, SSI8)
  78. * SW51: 1111 (SSI3, SSI4)
  79. * SW54: 1pin (ak4554 FPGA control)
  80. * SW55: 1 (CLKB is 24.5760MHz)
  81. * SW60: 1pin (ak4554 FPGA control)
  82. * SW61: 3pin (use X11 clock)
  83. * SW78: 3-6 (ak4642 connects I2C0)
  84. *
  85. * You can use sound as
  86. *
  87. * hw0: CN19: SSI56-AK4643
  88. * hw1: CN21: SSI3-AK4554(playback)
  89. * hw2: CN21: SSI4-AK4554(capture)
  90. * hw3: CN20: SSI7-AK4554(playback)
  91. * hw4: CN20: SSI8-AK4554(capture)
  92. *
  93. * this command is required when playback on hw0.
  94. *
  95. * # amixer set "LINEOUT Mixer DACL" on
  96. */
  97. /*
  98. * USB
  99. *
  100. * USB1 (CN29) can be Host/Function
  101. *
  102. * Host Func
  103. * SW98 1 2
  104. * SW99 1 3
  105. */
  106. /* Dummy supplies, where voltage doesn't matter */
  107. static struct regulator_consumer_supply dummy_supplies[] = {
  108. REGULATOR_SUPPLY("vddvario", "smsc911x"),
  109. REGULATOR_SUPPLY("vdd33a", "smsc911x"),
  110. };
  111. static struct smsc911x_platform_config smsc911x_data __initdata = {
  112. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  113. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  114. .flags = SMSC911X_USE_32BIT,
  115. .phy_interface = PHY_INTERFACE_MODE_MII,
  116. };
  117. static struct resource smsc911x_resources[] __initdata = {
  118. DEFINE_RES_MEM(0x18300000, 0x1000),
  119. DEFINE_RES_IRQ(irq_pin(0)), /* IRQ 0 */
  120. };
  121. #if IS_ENABLED(CONFIG_USB_RENESAS_USBHS_UDC)
  122. /*
  123. * When USB1 is Func
  124. */
  125. static int usbhsf_get_id(struct platform_device *pdev)
  126. {
  127. return USBHS_GADGET;
  128. }
  129. #define SUSPMODE 0x102
  130. static int usbhsf_power_ctrl(struct platform_device *pdev,
  131. void __iomem *base, int enable)
  132. {
  133. enable = !!enable;
  134. r8a7778_usb_phy_power(enable);
  135. iowrite16(enable << 14, base + SUSPMODE);
  136. return 0;
  137. }
  138. static struct resource usbhsf_resources[] __initdata = {
  139. DEFINE_RES_MEM(0xffe60000, 0x110),
  140. DEFINE_RES_IRQ(gic_iid(0x4f)),
  141. };
  142. static struct renesas_usbhs_platform_info usbhs_info __initdata = {
  143. .platform_callback = {
  144. .get_id = usbhsf_get_id,
  145. .power_ctrl = usbhsf_power_ctrl,
  146. },
  147. .driver_param = {
  148. .buswait_bwait = 4,
  149. },
  150. };
  151. #define USB_PHY_SETTING {.port1_func = 1, .ovc_pin[1].active_high = 1,}
  152. #define USB1_DEVICE "renesas_usbhs"
  153. #define ADD_USB_FUNC_DEVICE_IF_POSSIBLE() \
  154. platform_device_register_resndata( \
  155. &platform_bus, "renesas_usbhs", -1, \
  156. usbhsf_resources, \
  157. ARRAY_SIZE(usbhsf_resources), \
  158. &usbhs_info, sizeof(struct renesas_usbhs_platform_info))
  159. #else
  160. /*
  161. * When USB1 is Host
  162. */
  163. #define USB_PHY_SETTING { }
  164. #define USB1_DEVICE "ehci-platform"
  165. #define ADD_USB_FUNC_DEVICE_IF_POSSIBLE()
  166. #endif
  167. /* USB */
  168. static struct resource usb_phy_resources[] __initdata = {
  169. DEFINE_RES_MEM(0xffe70800, 0x100),
  170. DEFINE_RES_MEM(0xffe76000, 0x100),
  171. };
  172. static struct rcar_phy_platform_data usb_phy_platform_data __initdata =
  173. USB_PHY_SETTING;
  174. /* SDHI */
  175. static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
  176. .dma_slave_tx = HPBDMA_SLAVE_SDHI0_TX,
  177. .dma_slave_rx = HPBDMA_SLAVE_SDHI0_RX,
  178. .tmio_caps = MMC_CAP_SD_HIGHSPEED,
  179. .tmio_ocr_mask = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  180. .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
  181. };
  182. static struct resource sdhi0_resources[] __initdata = {
  183. DEFINE_RES_MEM(0xFFE4C000, 0x100),
  184. DEFINE_RES_IRQ(gic_iid(0x77)),
  185. };
  186. /* Ether */
  187. static struct resource ether_resources[] __initdata = {
  188. DEFINE_RES_MEM(0xfde00000, 0x400),
  189. DEFINE_RES_IRQ(gic_iid(0x89)),
  190. };
  191. static struct sh_eth_plat_data ether_platform_data __initdata = {
  192. .phy = 0x01,
  193. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  194. .phy_interface = PHY_INTERFACE_MODE_RMII,
  195. /*
  196. * Although the LINK signal is available on the board, it's connected to
  197. * the link/activity LED output of the PHY, thus the link disappears and
  198. * reappears after each packet. We'd be better off ignoring such signal
  199. * and getting the link state from the PHY indirectly.
  200. */
  201. .no_ether_link = 1,
  202. };
  203. /* I2C */
  204. static struct i2c_board_info i2c0_devices[] = {
  205. {
  206. I2C_BOARD_INFO("rx8581", 0x51),
  207. }, {
  208. I2C_BOARD_INFO("ak4643", 0x12),
  209. }
  210. };
  211. /* HSPI*/
  212. static struct mtd_partition m25p80_spi_flash_partitions[] = {
  213. {
  214. .name = "data(spi)",
  215. .size = 0x0100000,
  216. .offset = 0,
  217. },
  218. };
  219. static struct flash_platform_data spi_flash_data = {
  220. .name = "m25p80",
  221. .type = "s25fl008k",
  222. .parts = m25p80_spi_flash_partitions,
  223. .nr_parts = ARRAY_SIZE(m25p80_spi_flash_partitions),
  224. };
  225. static struct spi_board_info spi_board_info[] __initdata = {
  226. {
  227. .modalias = "m25p80",
  228. .max_speed_hz = 104000000,
  229. .chip_select = 0,
  230. .bus_num = 0,
  231. .mode = SPI_MODE_0,
  232. .platform_data = &spi_flash_data,
  233. },
  234. };
  235. /* MMC */
  236. static struct resource mmc_resources[] __initdata = {
  237. DEFINE_RES_MEM(0xffe4e000, 0x100),
  238. DEFINE_RES_IRQ(gic_iid(0x5d)),
  239. };
  240. static struct sh_mmcif_plat_data sh_mmcif_plat __initdata = {
  241. .sup_pclk = 0,
  242. .ocr = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34,
  243. .caps = MMC_CAP_4_BIT_DATA |
  244. MMC_CAP_8_BIT_DATA |
  245. MMC_CAP_NEEDS_POLL,
  246. };
  247. /* In the default configuration both decoders reside on I2C bus 0 */
  248. #define BOCKW_CAMERA(idx) \
  249. static struct i2c_board_info camera##idx##_info = { \
  250. I2C_BOARD_INFO("ml86v7667", 0x41 + 2 * (idx)), \
  251. }; \
  252. \
  253. static struct soc_camera_link iclink##idx##_ml86v7667 __initdata = { \
  254. .bus_id = idx, \
  255. .i2c_adapter_id = 0, \
  256. .board_info = &camera##idx##_info, \
  257. }
  258. BOCKW_CAMERA(0);
  259. BOCKW_CAMERA(1);
  260. /* VIN */
  261. static struct rcar_vin_platform_data vin_platform_data __initdata = {
  262. .flags = RCAR_VIN_BT656,
  263. };
  264. #define R8A7778_VIN(idx) \
  265. static struct resource vin##idx##_resources[] __initdata = { \
  266. DEFINE_RES_MEM(0xffc50000 + 0x1000 * (idx), 0x1000), \
  267. DEFINE_RES_IRQ(gic_iid(0x5a)), \
  268. }; \
  269. \
  270. static struct platform_device_info vin##idx##_info __initdata = { \
  271. .parent = &platform_bus, \
  272. .name = "r8a7778-vin", \
  273. .id = idx, \
  274. .res = vin##idx##_resources, \
  275. .num_res = ARRAY_SIZE(vin##idx##_resources), \
  276. .dma_mask = DMA_BIT_MASK(32), \
  277. .data = &vin_platform_data, \
  278. .size_data = sizeof(vin_platform_data), \
  279. }
  280. R8A7778_VIN(0);
  281. R8A7778_VIN(1);
  282. /* Sound */
  283. static struct resource rsnd_resources[] __initdata = {
  284. [RSND_GEN1_SRU] = DEFINE_RES_MEM(0xffd90000, 0x1000),
  285. [RSND_GEN1_SSI] = DEFINE_RES_MEM(0xffd91000, 0x1240),
  286. [RSND_GEN1_ADG] = DEFINE_RES_MEM(0xfffe0000, 0x24),
  287. };
  288. static struct rsnd_ssi_platform_info rsnd_ssi[] = {
  289. RSND_SSI_UNUSED, /* SSI 0 */
  290. RSND_SSI_UNUSED, /* SSI 1 */
  291. RSND_SSI_UNUSED, /* SSI 2 */
  292. RSND_SSI_SET(1, 0, gic_iid(0x85), RSND_SSI_PLAY),
  293. RSND_SSI_SET(2, 0, gic_iid(0x85), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
  294. RSND_SSI_SET(0, 0, gic_iid(0x86), RSND_SSI_PLAY),
  295. RSND_SSI_SET(0, 0, gic_iid(0x86), 0),
  296. RSND_SSI_SET(3, 0, gic_iid(0x86), RSND_SSI_PLAY),
  297. RSND_SSI_SET(4, 0, gic_iid(0x86), RSND_SSI_CLK_PIN_SHARE | RSND_SSI_CLK_FROM_ADG),
  298. };
  299. static struct rsnd_scu_platform_info rsnd_scu[9] = {
  300. /* no member at this point */
  301. };
  302. enum {
  303. AK4554_34 = 0,
  304. AK4643_56,
  305. AK4554_78,
  306. SOUND_MAX,
  307. };
  308. static int rsnd_codec_power(int id, int enable)
  309. {
  310. static int sound_user[SOUND_MAX] = {0, 0, 0};
  311. int *usr = NULL;
  312. u32 bit;
  313. switch (id) {
  314. case 3:
  315. case 4:
  316. usr = sound_user + AK4554_34;
  317. bit = (1 << 10);
  318. break;
  319. case 5:
  320. case 6:
  321. usr = sound_user + AK4643_56;
  322. bit = (1 << 6);
  323. break;
  324. case 7:
  325. case 8:
  326. usr = sound_user + AK4554_78;
  327. bit = (1 << 7);
  328. break;
  329. }
  330. if (!usr)
  331. return -EIO;
  332. if (enable) {
  333. if (*usr == 0) {
  334. u32 val = ioread16(fpga + COMCTLR);
  335. val &= ~bit;
  336. iowrite16(val, fpga + COMCTLR);
  337. }
  338. (*usr)++;
  339. } else {
  340. if (*usr == 0)
  341. return 0;
  342. (*usr)--;
  343. if (*usr == 0) {
  344. u32 val = ioread16(fpga + COMCTLR);
  345. val |= bit;
  346. iowrite16(val, fpga + COMCTLR);
  347. }
  348. }
  349. return 0;
  350. }
  351. static int rsnd_start(int id)
  352. {
  353. return rsnd_codec_power(id, 1);
  354. }
  355. static int rsnd_stop(int id)
  356. {
  357. return rsnd_codec_power(id, 0);
  358. }
  359. static struct rcar_snd_info rsnd_info = {
  360. .flags = RSND_GEN1,
  361. .ssi_info = rsnd_ssi,
  362. .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
  363. .scu_info = rsnd_scu,
  364. .scu_info_nr = ARRAY_SIZE(rsnd_scu),
  365. .start = rsnd_start,
  366. .stop = rsnd_stop,
  367. };
  368. static struct asoc_simple_card_info rsnd_card_info[] = {
  369. /* SSI5, SSI6 */
  370. {
  371. .name = "AK4643",
  372. .card = "SSI56-AK4643",
  373. .codec = "ak4642-codec.0-0012",
  374. .platform = "rcar_sound",
  375. .daifmt = SND_SOC_DAIFMT_LEFT_J,
  376. .cpu_dai = {
  377. .name = "rsnd-dai.0",
  378. .fmt = SND_SOC_DAIFMT_CBS_CFS,
  379. },
  380. .codec_dai = {
  381. .name = "ak4642-hifi",
  382. .fmt = SND_SOC_DAIFMT_CBM_CFM,
  383. .sysclk = 11289600,
  384. },
  385. },
  386. /* SSI3 */
  387. {
  388. .name = "AK4554",
  389. .card = "SSI3-AK4554(playback)",
  390. .codec = "ak4554-adc-dac.0",
  391. .platform = "rcar_sound",
  392. .cpu_dai = {
  393. .name = "rsnd-dai.1",
  394. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  395. SND_SOC_DAIFMT_RIGHT_J,
  396. },
  397. .codec_dai = {
  398. .name = "ak4554-hifi",
  399. },
  400. },
  401. /* SSI4 */
  402. {
  403. .name = "AK4554",
  404. .card = "SSI4-AK4554(capture)",
  405. .codec = "ak4554-adc-dac.0",
  406. .platform = "rcar_sound",
  407. .cpu_dai = {
  408. .name = "rsnd-dai.2",
  409. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  410. SND_SOC_DAIFMT_LEFT_J,
  411. },
  412. .codec_dai = {
  413. .name = "ak4554-hifi",
  414. },
  415. },
  416. /* SSI7 */
  417. {
  418. .name = "AK4554",
  419. .card = "SSI7-AK4554(playback)",
  420. .codec = "ak4554-adc-dac.1",
  421. .platform = "rcar_sound",
  422. .cpu_dai = {
  423. .name = "rsnd-dai.3",
  424. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  425. SND_SOC_DAIFMT_RIGHT_J,
  426. },
  427. .codec_dai = {
  428. .name = "ak4554-hifi",
  429. },
  430. },
  431. /* SSI8 */
  432. {
  433. .name = "AK4554",
  434. .card = "SSI8-AK4554(capture)",
  435. .codec = "ak4554-adc-dac.1",
  436. .platform = "rcar_sound",
  437. .cpu_dai = {
  438. .name = "rsnd-dai.4",
  439. .fmt = SND_SOC_DAIFMT_CBM_CFM |
  440. SND_SOC_DAIFMT_LEFT_J,
  441. },
  442. .codec_dai = {
  443. .name = "ak4554-hifi",
  444. },
  445. }
  446. };
  447. static const struct pinctrl_map bockw_pinctrl_map[] = {
  448. /* AUDIO */
  449. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  450. "audio_clk_a", "audio_clk"),
  451. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  452. "audio_clk_b", "audio_clk"),
  453. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  454. "ssi34_ctrl", "ssi"),
  455. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  456. "ssi3_data", "ssi"),
  457. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  458. "ssi4_data", "ssi"),
  459. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  460. "ssi5_ctrl", "ssi"),
  461. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  462. "ssi5_data", "ssi"),
  463. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  464. "ssi6_ctrl", "ssi"),
  465. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  466. "ssi6_data", "ssi"),
  467. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  468. "ssi78_ctrl", "ssi"),
  469. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  470. "ssi7_data", "ssi"),
  471. PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7778",
  472. "ssi8_data", "ssi"),
  473. /* Ether */
  474. PIN_MAP_MUX_GROUP_DEFAULT("r8a777x-ether", "pfc-r8a7778",
  475. "ether_rmii", "ether"),
  476. /* HSPI0 */
  477. PIN_MAP_MUX_GROUP_DEFAULT("sh-hspi.0", "pfc-r8a7778",
  478. "hspi0_a", "hspi0"),
  479. /* MMC */
  480. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  481. "mmc_data8", "mmc"),
  482. PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif", "pfc-r8a7778",
  483. "mmc_ctrl", "mmc"),
  484. /* SCIF0 */
  485. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  486. "scif0_data_a", "scif0"),
  487. PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.0", "pfc-r8a7778",
  488. "scif0_ctrl", "scif0"),
  489. /* USB */
  490. PIN_MAP_MUX_GROUP_DEFAULT("ehci-platform", "pfc-r8a7778",
  491. "usb0", "usb0"),
  492. PIN_MAP_MUX_GROUP_DEFAULT(USB1_DEVICE, "pfc-r8a7778",
  493. "usb1", "usb1"),
  494. /* SDHI0 */
  495. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  496. "sdhi0_data4", "sdhi0"),
  497. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  498. "sdhi0_ctrl", "sdhi0"),
  499. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  500. "sdhi0_cd", "sdhi0"),
  501. PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7778",
  502. "sdhi0_wp", "sdhi0"),
  503. /* VIN0 */
  504. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  505. "vin0_clk", "vin0"),
  506. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.0", "pfc-r8a7778",
  507. "vin0_data8", "vin0"),
  508. /* VIN1 */
  509. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  510. "vin1_clk", "vin1"),
  511. PIN_MAP_MUX_GROUP_DEFAULT("r8a7778-vin.1", "pfc-r8a7778",
  512. "vin1_data8", "vin1"),
  513. };
  514. #define PFC 0xfffc0000
  515. #define PUPR4 0x110
  516. static void __init bockw_init(void)
  517. {
  518. void __iomem *base;
  519. struct clk *clk;
  520. int i;
  521. r8a7778_clock_init();
  522. r8a7778_init_irq_extpin(1);
  523. r8a7778_add_standard_devices();
  524. platform_device_register_resndata(&platform_bus, "r8a777x-ether", -1,
  525. ether_resources,
  526. ARRAY_SIZE(ether_resources),
  527. &ether_platform_data,
  528. sizeof(ether_platform_data));
  529. platform_device_register_full(&vin0_info);
  530. /* VIN1 has a pin conflict with Ether */
  531. if (!IS_ENABLED(CONFIG_SH_ETH))
  532. platform_device_register_full(&vin1_info);
  533. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 0,
  534. &iclink0_ml86v7667,
  535. sizeof(iclink0_ml86v7667));
  536. platform_device_register_data(&platform_bus, "soc-camera-pdrv", 1,
  537. &iclink1_ml86v7667,
  538. sizeof(iclink1_ml86v7667));
  539. i2c_register_board_info(0, i2c0_devices,
  540. ARRAY_SIZE(i2c0_devices));
  541. spi_register_board_info(spi_board_info,
  542. ARRAY_SIZE(spi_board_info));
  543. pinctrl_register_mappings(bockw_pinctrl_map,
  544. ARRAY_SIZE(bockw_pinctrl_map));
  545. r8a7778_pinmux_init();
  546. platform_device_register_resndata(
  547. &platform_bus, "sh_mmcif", -1,
  548. mmc_resources, ARRAY_SIZE(mmc_resources),
  549. &sh_mmcif_plat, sizeof(struct sh_mmcif_plat_data));
  550. platform_device_register_resndata(
  551. &platform_bus, "rcar_usb_phy", -1,
  552. usb_phy_resources,
  553. ARRAY_SIZE(usb_phy_resources),
  554. &usb_phy_platform_data,
  555. sizeof(struct rcar_phy_platform_data));
  556. /* for SMSC */
  557. fpga = ioremap_nocache(FPGA, SZ_1M);
  558. if (fpga) {
  559. /*
  560. * CAUTION
  561. *
  562. * IRQ0/1 is cascaded interrupt from FPGA.
  563. * it should be cared in the future
  564. * Now, it is assuming IRQ0 was used only from SMSC.
  565. */
  566. u16 val = ioread16(fpga + IRQ0MR);
  567. val &= ~(1 << 4); /* enable SMSC911x */
  568. iowrite16(val, fpga + IRQ0MR);
  569. regulator_register_fixed(0, dummy_supplies,
  570. ARRAY_SIZE(dummy_supplies));
  571. platform_device_register_resndata(
  572. &platform_bus, "smsc911x", -1,
  573. smsc911x_resources, ARRAY_SIZE(smsc911x_resources),
  574. &smsc911x_data, sizeof(smsc911x_data));
  575. }
  576. /* for SDHI */
  577. base = ioremap_nocache(PFC, 0x200);
  578. if (base) {
  579. /*
  580. * FIXME
  581. *
  582. * SDHI CD/WP pin needs pull-up
  583. */
  584. iowrite32(ioread32(base + PUPR4) | (3 << 26), base + PUPR4);
  585. iounmap(base);
  586. platform_device_register_resndata(
  587. &platform_bus, "sh_mobile_sdhi", 0,
  588. sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
  589. &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
  590. }
  591. /* for Audio */
  592. clk = clk_get(NULL, "audio_clk_b");
  593. clk_set_rate(clk, 24576000);
  594. clk_put(clk);
  595. rsnd_codec_power(5, 1); /* enable ak4642 */
  596. platform_device_register_simple(
  597. "ak4554-adc-dac", 0, NULL, 0);
  598. platform_device_register_simple(
  599. "ak4554-adc-dac", 1, NULL, 0);
  600. platform_device_register_resndata(
  601. &platform_bus, "rcar_sound", -1,
  602. rsnd_resources, ARRAY_SIZE(rsnd_resources),
  603. &rsnd_info, sizeof(rsnd_info));
  604. for (i = 0; i < ARRAY_SIZE(rsnd_card_info); i++) {
  605. struct platform_device_info cardinfo = {
  606. .parent = &platform_bus,
  607. .name = "asoc-simple-card",
  608. .id = i,
  609. .data = &rsnd_card_info[i],
  610. .size_data = sizeof(struct asoc_simple_card_info),
  611. .dma_mask = ~0,
  612. };
  613. platform_device_register_full(&cardinfo);
  614. }
  615. }
  616. static void __init bockw_init_late(void)
  617. {
  618. r8a7778_init_late();
  619. ADD_USB_FUNC_DEVICE_IF_POSSIBLE();
  620. }
  621. static const char *bockw_boards_compat_dt[] __initdata = {
  622. "renesas,bockw",
  623. NULL,
  624. };
  625. DT_MACHINE_START(BOCKW_DT, "bockw")
  626. .init_early = r8a7778_init_delay,
  627. .init_irq = r8a7778_init_irq_dt,
  628. .init_machine = bockw_init,
  629. .dt_compat = bockw_boards_compat_dt,
  630. .init_late = bockw_init_late,
  631. MACHINE_END