highbank.c 4.1 KB

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  1. /*
  2. * Copyright 2010-2011 Calxeda, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. #include <linux/clk.h>
  17. #include <linux/clkdev.h>
  18. #include <linux/clocksource.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/io.h>
  21. #include <linux/irqchip.h>
  22. #include <linux/of.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/of_address.h>
  26. #include <linux/amba/bus.h>
  27. #include <linux/platform_device.h>
  28. #include <asm/psci.h>
  29. #include <asm/hardware/cache-l2x0.h>
  30. #include <asm/mach/arch.h>
  31. #include <asm/mach/map.h>
  32. #include "core.h"
  33. #include "sysregs.h"
  34. void __iomem *sregs_base;
  35. void __iomem *scu_base_addr;
  36. static void __init highbank_scu_map_io(void)
  37. {
  38. unsigned long base;
  39. /* Get SCU base */
  40. asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  41. scu_base_addr = ioremap(base, SZ_4K);
  42. }
  43. static void highbank_l2x0_disable(void)
  44. {
  45. /* Disable PL310 L2 Cache controller */
  46. highbank_smc1(0x102, 0x0);
  47. }
  48. static void __init highbank_init_irq(void)
  49. {
  50. irqchip_init();
  51. if (of_find_compatible_node(NULL, NULL, "arm,cortex-a9"))
  52. highbank_scu_map_io();
  53. /* Enable PL310 L2 Cache controller */
  54. if (IS_ENABLED(CONFIG_CACHE_L2X0) &&
  55. of_find_compatible_node(NULL, NULL, "arm,pl310-cache")) {
  56. highbank_smc1(0x102, 0x1);
  57. l2x0_of_init(0, ~0UL);
  58. outer_cache.disable = highbank_l2x0_disable;
  59. }
  60. }
  61. static void highbank_power_off(void)
  62. {
  63. highbank_set_pwr_shutdown();
  64. while (1)
  65. cpu_do_idle();
  66. }
  67. static int highbank_platform_notifier(struct notifier_block *nb,
  68. unsigned long event, void *__dev)
  69. {
  70. struct resource *res;
  71. int reg = -1;
  72. u32 val;
  73. struct device *dev = __dev;
  74. if (event != BUS_NOTIFY_ADD_DEVICE)
  75. return NOTIFY_DONE;
  76. if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
  77. reg = 0xc;
  78. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
  79. reg = 0x18;
  80. else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
  81. reg = 0x20;
  82. else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
  83. res = platform_get_resource(to_platform_device(dev),
  84. IORESOURCE_MEM, 0);
  85. if (res) {
  86. if (res->start == 0xfff50000)
  87. reg = 0;
  88. else if (res->start == 0xfff51000)
  89. reg = 4;
  90. }
  91. }
  92. if (reg < 0)
  93. return NOTIFY_DONE;
  94. if (of_property_read_bool(dev->of_node, "dma-coherent")) {
  95. val = readl(sregs_base + reg);
  96. writel(val | 0xff01, sregs_base + reg);
  97. set_dma_ops(dev, &arm_coherent_dma_ops);
  98. }
  99. return NOTIFY_OK;
  100. }
  101. static struct notifier_block highbank_amba_nb = {
  102. .notifier_call = highbank_platform_notifier,
  103. };
  104. static struct notifier_block highbank_platform_nb = {
  105. .notifier_call = highbank_platform_notifier,
  106. };
  107. static struct platform_device highbank_cpuidle_device = {
  108. .name = "cpuidle-calxeda",
  109. };
  110. static void __init highbank_init(void)
  111. {
  112. struct device_node *np;
  113. /* Map system registers */
  114. np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
  115. sregs_base = of_iomap(np, 0);
  116. WARN_ON(!sregs_base);
  117. pm_power_off = highbank_power_off;
  118. highbank_pm_init();
  119. bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
  120. bus_register_notifier(&amba_bustype, &highbank_amba_nb);
  121. of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
  122. if (psci_ops.cpu_suspend)
  123. platform_device_register(&highbank_cpuidle_device);
  124. }
  125. static const char *highbank_match[] __initconst = {
  126. "calxeda,highbank",
  127. "calxeda,ecx-2000",
  128. NULL,
  129. };
  130. DT_MACHINE_START(HIGHBANK, "Highbank")
  131. #if defined(CONFIG_ZONE_DMA) && defined(CONFIG_ARM_LPAE)
  132. .dma_zone_size = (4ULL * SZ_1G),
  133. #endif
  134. .init_irq = highbank_init_irq,
  135. .init_machine = highbank_init,
  136. .dt_compat = highbank_match,
  137. .restart = highbank_restart,
  138. MACHINE_END