socfpga_cyclone5.dtsi 1.4 KB

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  1. /*
  2. * Copyright (C) 2012 Altera Corporation <www.altera.com>
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation; either version 2 of the License, or
  7. * (at your option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. /dts-v1/;
  18. /include/ "socfpga.dtsi"
  19. / {
  20. soc {
  21. clkmgr@ffd04000 {
  22. clocks {
  23. osc1 {
  24. clock-frequency = <25000000>;
  25. };
  26. };
  27. };
  28. ethernet@ff702000 {
  29. phy-mode = "rgmii";
  30. phy-addr = <0xffffffff>; /* probe for phy addr */
  31. status = "okay";
  32. };
  33. timer0@ffc08000 {
  34. clock-frequency = <100000000>;
  35. };
  36. timer1@ffc09000 {
  37. clock-frequency = <100000000>;
  38. };
  39. timer2@ffd00000 {
  40. clock-frequency = <25000000>;
  41. };
  42. timer3@ffd01000 {
  43. clock-frequency = <25000000>;
  44. };
  45. serial0@ffc02000 {
  46. clock-frequency = <100000000>;
  47. };
  48. serial1@ffc03000 {
  49. clock-frequency = <100000000>;
  50. };
  51. sysmgr@ffd08000 {
  52. cpu1-start-addr = <0xffd080c4>;
  53. };
  54. };
  55. };