r8a73a4.dtsi 6.1 KB

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  1. /*
  2. * Device Tree Source for the r8a73a4 SoC
  3. *
  4. * Copyright (C) 2013 Renesas Solutions Corp.
  5. * Copyright (C) 2013 Magnus Damm
  6. *
  7. * This file is licensed under the terms of the GNU General Public License
  8. * version 2. This program is licensed "as is" without any warranty of any
  9. * kind, whether express or implied.
  10. */
  11. / {
  12. compatible = "renesas,r8a73a4";
  13. interrupt-parent = <&gic>;
  14. #address-cells = <2>;
  15. #size-cells = <2>;
  16. cpus {
  17. #address-cells = <1>;
  18. #size-cells = <0>;
  19. cpu0: cpu@0 {
  20. device_type = "cpu";
  21. compatible = "arm,cortex-a15";
  22. reg = <0>;
  23. clock-frequency = <1500000000>;
  24. };
  25. };
  26. gic: interrupt-controller@f1001000 {
  27. compatible = "arm,cortex-a15-gic";
  28. #interrupt-cells = <3>;
  29. #address-cells = <0>;
  30. interrupt-controller;
  31. reg = <0 0xf1001000 0 0x1000>,
  32. <0 0xf1002000 0 0x1000>,
  33. <0 0xf1004000 0 0x2000>,
  34. <0 0xf1006000 0 0x2000>;
  35. interrupts = <1 9 0xf04>;
  36. };
  37. timer {
  38. compatible = "arm,armv7-timer";
  39. interrupts = <1 13 0xf08>,
  40. <1 14 0xf08>,
  41. <1 11 0xf08>,
  42. <1 10 0xf08>;
  43. };
  44. irqc0: interrupt-controller@e61c0000 {
  45. compatible = "renesas,irqc";
  46. #interrupt-cells = <2>;
  47. interrupt-controller;
  48. reg = <0 0xe61c0000 0 0x200>;
  49. interrupt-parent = <&gic>;
  50. interrupts = <0 0 4>, <0 1 4>, <0 2 4>, <0 3 4>,
  51. <0 4 4>, <0 5 4>, <0 6 4>, <0 7 4>,
  52. <0 8 4>, <0 9 4>, <0 10 4>, <0 11 4>,
  53. <0 12 4>, <0 13 4>, <0 14 4>, <0 15 4>,
  54. <0 16 4>, <0 17 4>, <0 18 4>, <0 19 4>,
  55. <0 20 4>, <0 21 4>, <0 22 4>, <0 23 4>,
  56. <0 24 4>, <0 25 4>, <0 26 4>, <0 27 4>,
  57. <0 28 4>, <0 29 4>, <0 30 4>, <0 31 4>;
  58. };
  59. irqc1: interrupt-controller@e61c0200 {
  60. compatible = "renesas,irqc";
  61. #interrupt-cells = <2>;
  62. interrupt-controller;
  63. reg = <0 0xe61c0200 0 0x200>;
  64. interrupt-parent = <&gic>;
  65. interrupts = <0 32 4>, <0 33 4>, <0 34 4>, <0 35 4>,
  66. <0 36 4>, <0 37 4>, <0 38 4>, <0 39 4>,
  67. <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>,
  68. <0 44 4>, <0 45 4>, <0 46 4>, <0 47 4>,
  69. <0 48 4>, <0 49 4>, <0 50 4>, <0 51 4>,
  70. <0 52 4>, <0 53 4>, <0 54 4>, <0 55 4>,
  71. <0 56 4>, <0 57 4>;
  72. };
  73. dmac: dma-multiplexer@0 {
  74. compatible = "renesas,shdma-mux";
  75. #dma-cells = <1>;
  76. dma-channels = <20>;
  77. dma-requests = <256>;
  78. #address-cells = <2>;
  79. #size-cells = <2>;
  80. ranges;
  81. dma0: dma-controller@e6700020 {
  82. compatible = "renesas,shdma-r8a73a4";
  83. reg = <0 0xe6700020 0 0x89e0>;
  84. interrupt-parent = <&gic>;
  85. interrupts = <0 220 4
  86. 0 200 4
  87. 0 201 4
  88. 0 202 4
  89. 0 203 4
  90. 0 204 4
  91. 0 205 4
  92. 0 206 4
  93. 0 207 4
  94. 0 208 4
  95. 0 209 4
  96. 0 210 4
  97. 0 211 4
  98. 0 212 4
  99. 0 213 4
  100. 0 214 4
  101. 0 215 4
  102. 0 216 4
  103. 0 217 4
  104. 0 218 4
  105. 0 219 4>;
  106. interrupt-names = "error",
  107. "ch0", "ch1", "ch2", "ch3",
  108. "ch4", "ch5", "ch6", "ch7",
  109. "ch8", "ch9", "ch10", "ch11",
  110. "ch12", "ch13", "ch14", "ch15",
  111. "ch16", "ch17", "ch18", "ch19";
  112. };
  113. };
  114. thermal@e61f0000 {
  115. compatible = "renesas,rcar-thermal";
  116. reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
  117. <0 0xe61f0200 0 0x38>, <0 0xe61f0300 0 0x38>;
  118. interrupt-parent = <&gic>;
  119. interrupts = <0 69 4>;
  120. };
  121. i2c0: i2c@e6500000 {
  122. #address-cells = <1>;
  123. #size-cells = <0>;
  124. compatible = "renesas,rmobile-iic";
  125. reg = <0 0xe6500000 0 0x428>;
  126. interrupt-parent = <&gic>;
  127. interrupts = <0 174 0x4>;
  128. status = "disabled";
  129. };
  130. i2c1: i2c@e6510000 {
  131. #address-cells = <1>;
  132. #size-cells = <0>;
  133. compatible = "renesas,rmobile-iic";
  134. reg = <0 0xe6510000 0 0x428>;
  135. interrupt-parent = <&gic>;
  136. interrupts = <0 175 0x4>;
  137. status = "disabled";
  138. };
  139. i2c2: i2c@e6520000 {
  140. #address-cells = <1>;
  141. #size-cells = <0>;
  142. compatible = "renesas,rmobile-iic";
  143. reg = <0 0xe6520000 0 0x428>;
  144. interrupt-parent = <&gic>;
  145. interrupts = <0 176 0x4>;
  146. status = "disabled";
  147. };
  148. i2c3: i2c@e6530000 {
  149. #address-cells = <1>;
  150. #size-cells = <0>;
  151. compatible = "renesas,rmobile-iic";
  152. reg = <0 0xe6530000 0 0x428>;
  153. interrupt-parent = <&gic>;
  154. interrupts = <0 177 0x4>;
  155. status = "disabled";
  156. };
  157. i2c4: i2c@e6540000 {
  158. #address-cells = <1>;
  159. #size-cells = <0>;
  160. compatible = "renesas,rmobile-iic";
  161. reg = <0 0xe6540000 0 0x428>;
  162. interrupt-parent = <&gic>;
  163. interrupts = <0 178 0x4>;
  164. status = "disabled";
  165. };
  166. i2c5: i2c@e60b0000 {
  167. #address-cells = <1>;
  168. #size-cells = <0>;
  169. compatible = "renesas,rmobile-iic";
  170. reg = <0 0xe60b0000 0 0x428>;
  171. interrupt-parent = <&gic>;
  172. interrupts = <0 179 0x4>;
  173. status = "disabled";
  174. };
  175. i2c6: i2c@e6550000 {
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. compatible = "renesas,rmobile-iic";
  179. reg = <0 0xe6550000 0 0x428>;
  180. interrupt-parent = <&gic>;
  181. interrupts = <0 184 0x4>;
  182. status = "disabled";
  183. };
  184. i2c7: i2c@e6560000 {
  185. #address-cells = <1>;
  186. #size-cells = <0>;
  187. compatible = "renesas,rmobile-iic";
  188. reg = <0 0xe6560000 0 0x428>;
  189. interrupt-parent = <&gic>;
  190. interrupts = <0 185 0x4>;
  191. status = "disabled";
  192. };
  193. i2c8: i2c@e6570000 {
  194. #address-cells = <1>;
  195. #size-cells = <0>;
  196. compatible = "renesas,rmobile-iic";
  197. reg = <0 0xe6570000 0 0x428>;
  198. interrupt-parent = <&gic>;
  199. interrupts = <0 173 0x4>;
  200. status = "disabled";
  201. };
  202. mmcif0: mmcif@ee200000 {
  203. compatible = "renesas,sh-mmcif";
  204. reg = <0 0xee200000 0 0x80>;
  205. interrupt-parent = <&gic>;
  206. interrupts = <0 169 0x4>;
  207. reg-io-width = <4>;
  208. status = "disabled";
  209. };
  210. mmcif1: mmcif@ee220000 {
  211. compatible = "renesas,sh-mmcif";
  212. reg = <0 0xee220000 0 0x80>;
  213. interrupt-parent = <&gic>;
  214. interrupts = <0 170 0x4>;
  215. reg-io-width = <4>;
  216. status = "disabled";
  217. };
  218. pfc: pfc@e6050000 {
  219. compatible = "renesas,pfc-r8a73a4";
  220. reg = <0 0xe6050000 0 0x9000>;
  221. gpio-controller;
  222. #gpio-cells = <2>;
  223. };
  224. sdhi0: sdhi@ee100000 {
  225. compatible = "renesas,sdhi-r8a73a4";
  226. reg = <0 0xee100000 0 0x100>;
  227. interrupt-parent = <&gic>;
  228. interrupts = <0 165 4>;
  229. cap-sd-highspeed;
  230. status = "disabled";
  231. };
  232. sdhi1: sdhi@ee120000 {
  233. compatible = "renesas,sdhi-r8a73a4";
  234. reg = <0 0xee120000 0 0x100>;
  235. interrupt-parent = <&gic>;
  236. interrupts = <0 166 4>;
  237. cap-sd-highspeed;
  238. status = "disabled";
  239. };
  240. sdhi2: sdhi@ee140000 {
  241. compatible = "renesas,sdhi-r8a73a4";
  242. reg = <0 0xee140000 0 0x100>;
  243. interrupt-parent = <&gic>;
  244. interrupts = <0 167 4>;
  245. cap-sd-highspeed;
  246. status = "disabled";
  247. };
  248. };