imx51-babbage.dts 7.0 KB

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  1. /*
  2. * Copyright 2011 Freescale Semiconductor, Inc.
  3. * Copyright 2011 Linaro Ltd.
  4. *
  5. * The code contained herein is licensed under the GNU General Public
  6. * License. You may obtain a copy of the GNU General Public License
  7. * Version 2 or later at the following locations:
  8. *
  9. * http://www.opensource.org/licenses/gpl-license.html
  10. * http://www.gnu.org/copyleft/gpl.html
  11. */
  12. /dts-v1/;
  13. #include "imx51.dtsi"
  14. / {
  15. model = "Freescale i.MX51 Babbage Board";
  16. compatible = "fsl,imx51-babbage", "fsl,imx51";
  17. memory {
  18. reg = <0x90000000 0x20000000>;
  19. };
  20. display@di0 {
  21. compatible = "fsl,imx-parallel-display";
  22. crtcs = <&ipu 0>;
  23. interface-pix-fmt = "rgb24";
  24. pinctrl-names = "default";
  25. pinctrl-0 = <&pinctrl_ipu_disp1_1>;
  26. display-timings {
  27. native-mode = <&timing0>;
  28. timing0: dvi {
  29. clock-frequency = <65000000>;
  30. hactive = <1024>;
  31. vactive = <768>;
  32. hback-porch = <220>;
  33. hfront-porch = <40>;
  34. vback-porch = <21>;
  35. vfront-porch = <7>;
  36. hsync-len = <60>;
  37. vsync-len = <10>;
  38. };
  39. };
  40. };
  41. display@di1 {
  42. compatible = "fsl,imx-parallel-display";
  43. crtcs = <&ipu 1>;
  44. interface-pix-fmt = "rgb565";
  45. pinctrl-names = "default";
  46. pinctrl-0 = <&pinctrl_ipu_disp2_1>;
  47. status = "disabled";
  48. display-timings {
  49. native-mode = <&timing1>;
  50. timing1: claawvga {
  51. clock-frequency = <27000000>;
  52. hactive = <800>;
  53. vactive = <480>;
  54. hback-porch = <40>;
  55. hfront-porch = <60>;
  56. vback-porch = <10>;
  57. vfront-porch = <10>;
  58. hsync-len = <20>;
  59. vsync-len = <10>;
  60. hsync-active = <0>;
  61. vsync-active = <0>;
  62. de-active = <1>;
  63. pixelclk-active = <0>;
  64. };
  65. };
  66. };
  67. gpio-keys {
  68. compatible = "gpio-keys";
  69. power {
  70. label = "Power Button";
  71. gpios = <&gpio2 21 0>;
  72. linux,code = <116>; /* KEY_POWER */
  73. gpio-key,wakeup;
  74. };
  75. };
  76. sound {
  77. compatible = "fsl,imx51-babbage-sgtl5000",
  78. "fsl,imx-audio-sgtl5000";
  79. model = "imx51-babbage-sgtl5000";
  80. ssi-controller = <&ssi2>;
  81. audio-codec = <&sgtl5000>;
  82. audio-routing =
  83. "MIC_IN", "Mic Jack",
  84. "Mic Jack", "Mic Bias",
  85. "Headphone Jack", "HP_OUT";
  86. mux-int-port = <2>;
  87. mux-ext-port = <3>;
  88. };
  89. clocks {
  90. ckih1 {
  91. clock-frequency = <22579200>;
  92. };
  93. clk_26M: codec_clock {
  94. compatible = "fixed-clock";
  95. reg=<0>;
  96. #clock-cells = <0>;
  97. clock-frequency = <26000000>;
  98. gpios = <&gpio4 26 1>;
  99. };
  100. };
  101. };
  102. &esdhc1 {
  103. pinctrl-names = "default";
  104. pinctrl-0 = <&pinctrl_esdhc1_1>;
  105. fsl,cd-controller;
  106. fsl,wp-controller;
  107. status = "okay";
  108. };
  109. &esdhc2 {
  110. pinctrl-names = "default";
  111. pinctrl-0 = <&pinctrl_esdhc2_1>;
  112. cd-gpios = <&gpio1 6 0>;
  113. wp-gpios = <&gpio1 5 0>;
  114. status = "okay";
  115. };
  116. &uart3 {
  117. pinctrl-names = "default";
  118. pinctrl-0 = <&pinctrl_uart3_1 &pinctrl_uart3_rtscts_1>;
  119. fsl,uart-has-rtscts;
  120. status = "okay";
  121. };
  122. &ecspi1 {
  123. pinctrl-names = "default";
  124. pinctrl-0 = <&pinctrl_ecspi1_1>;
  125. fsl,spi-num-chipselects = <2>;
  126. cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
  127. status = "okay";
  128. pmic: mc13892@0 {
  129. #address-cells = <1>;
  130. #size-cells = <0>;
  131. compatible = "fsl,mc13892";
  132. spi-max-frequency = <6000000>;
  133. spi-cs-high;
  134. reg = <0>;
  135. interrupt-parent = <&gpio1>;
  136. interrupts = <8 0x4>;
  137. regulators {
  138. sw1_reg: sw1 {
  139. regulator-min-microvolt = <600000>;
  140. regulator-max-microvolt = <1375000>;
  141. regulator-boot-on;
  142. regulator-always-on;
  143. };
  144. sw2_reg: sw2 {
  145. regulator-min-microvolt = <900000>;
  146. regulator-max-microvolt = <1850000>;
  147. regulator-boot-on;
  148. regulator-always-on;
  149. };
  150. sw3_reg: sw3 {
  151. regulator-min-microvolt = <1100000>;
  152. regulator-max-microvolt = <1850000>;
  153. regulator-boot-on;
  154. regulator-always-on;
  155. };
  156. sw4_reg: sw4 {
  157. regulator-min-microvolt = <1100000>;
  158. regulator-max-microvolt = <1850000>;
  159. regulator-boot-on;
  160. regulator-always-on;
  161. };
  162. vpll_reg: vpll {
  163. regulator-min-microvolt = <1050000>;
  164. regulator-max-microvolt = <1800000>;
  165. regulator-boot-on;
  166. regulator-always-on;
  167. };
  168. vdig_reg: vdig {
  169. regulator-min-microvolt = <1650000>;
  170. regulator-max-microvolt = <1650000>;
  171. regulator-boot-on;
  172. };
  173. vsd_reg: vsd {
  174. regulator-min-microvolt = <1800000>;
  175. regulator-max-microvolt = <3150000>;
  176. };
  177. vusb2_reg: vusb2 {
  178. regulator-min-microvolt = <2400000>;
  179. regulator-max-microvolt = <2775000>;
  180. regulator-boot-on;
  181. regulator-always-on;
  182. };
  183. vvideo_reg: vvideo {
  184. regulator-min-microvolt = <2775000>;
  185. regulator-max-microvolt = <2775000>;
  186. };
  187. vaudio_reg: vaudio {
  188. regulator-min-microvolt = <2300000>;
  189. regulator-max-microvolt = <3000000>;
  190. };
  191. vcam_reg: vcam {
  192. regulator-min-microvolt = <2500000>;
  193. regulator-max-microvolt = <3000000>;
  194. };
  195. vgen1_reg: vgen1 {
  196. regulator-min-microvolt = <1200000>;
  197. regulator-max-microvolt = <1200000>;
  198. };
  199. vgen2_reg: vgen2 {
  200. regulator-min-microvolt = <1200000>;
  201. regulator-max-microvolt = <3150000>;
  202. regulator-always-on;
  203. };
  204. vgen3_reg: vgen3 {
  205. regulator-min-microvolt = <1800000>;
  206. regulator-max-microvolt = <2900000>;
  207. regulator-always-on;
  208. };
  209. };
  210. };
  211. flash: at45db321d@1 {
  212. #address-cells = <1>;
  213. #size-cells = <1>;
  214. compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
  215. spi-max-frequency = <25000000>;
  216. reg = <1>;
  217. partition@0 {
  218. label = "U-Boot";
  219. reg = <0x0 0x40000>;
  220. read-only;
  221. };
  222. partition@40000 {
  223. label = "Kernel";
  224. reg = <0x40000 0x3c0000>;
  225. };
  226. };
  227. };
  228. &ssi2 {
  229. fsl,mode = "i2s-slave";
  230. status = "okay";
  231. };
  232. &iomuxc {
  233. pinctrl-names = "default";
  234. pinctrl-0 = <&pinctrl_hog>;
  235. hog {
  236. pinctrl_hog: hoggrp {
  237. fsl,pins = <
  238. MX51_PAD_GPIO1_0__SD1_CD 0x20d5
  239. MX51_PAD_GPIO1_1__SD1_WP 0x20d5
  240. MX51_PAD_GPIO1_5__GPIO1_5 0x100
  241. MX51_PAD_GPIO1_6__GPIO1_6 0x100
  242. MX51_PAD_EIM_A27__GPIO2_21 0x5
  243. MX51_PAD_CSPI1_SS0__GPIO4_24 0x85
  244. MX51_PAD_CSPI1_SS1__GPIO4_25 0x85
  245. MX51_PAD_CSPI1_RDY__GPIO4_26 0x80000000
  246. >;
  247. };
  248. };
  249. };
  250. &uart1 {
  251. pinctrl-names = "default";
  252. pinctrl-0 = <&pinctrl_uart1_1 &pinctrl_uart1_rtscts_1>;
  253. fsl,uart-has-rtscts;
  254. status = "okay";
  255. };
  256. &uart2 {
  257. pinctrl-names = "default";
  258. pinctrl-0 = <&pinctrl_uart2_1>;
  259. status = "okay";
  260. };
  261. &i2c2 {
  262. pinctrl-names = "default";
  263. pinctrl-0 = <&pinctrl_i2c2_1>;
  264. status = "okay";
  265. sgtl5000: codec@0a {
  266. compatible = "fsl,sgtl5000";
  267. reg = <0x0a>;
  268. clocks = <&clk_26M>;
  269. VDDA-supply = <&vdig_reg>;
  270. VDDIO-supply = <&vvideo_reg>;
  271. };
  272. };
  273. &audmux {
  274. pinctrl-names = "default";
  275. pinctrl-0 = <&pinctrl_audmux_1>;
  276. status = "okay";
  277. };
  278. &fec {
  279. pinctrl-names = "default";
  280. pinctrl-0 = <&pinctrl_fec_1>;
  281. phy-mode = "mii";
  282. status = "okay";
  283. };
  284. &kpp {
  285. pinctrl-names = "default";
  286. pinctrl-0 = <&pinctrl_kpp_1>;
  287. linux,keymap = <0x00000067 /* KEY_UP */
  288. 0x0001006c /* KEY_DOWN */
  289. 0x00020072 /* KEY_VOLUMEDOWN */
  290. 0x00030066 /* KEY_HOME */
  291. 0x0100006a /* KEY_RIGHT */
  292. 0x01010069 /* KEY_LEFT */
  293. 0x0102001c /* KEY_ENTER */
  294. 0x01030073 /* KEY_VOLUMEUP */
  295. 0x02000040 /* KEY_F6 */
  296. 0x02010042 /* KEY_F8 */
  297. 0x02020043 /* KEY_F9 */
  298. 0x02030044 /* KEY_F10 */
  299. 0x0300003b /* KEY_F1 */
  300. 0x0301003c /* KEY_F2 */
  301. 0x0302003d /* KEY_F3 */
  302. 0x03030074>; /* KEY_POWER */
  303. status = "okay";
  304. };