exynos4.dtsi 12 KB

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  1. /*
  2. * Samsung's Exynos4 SoC series common device tree source
  3. *
  4. * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. * Copyright (c) 2010-2011 Linaro Ltd.
  7. * www.linaro.org
  8. *
  9. * Samsung's Exynos4 SoC series device nodes are listed in this file. Particular
  10. * SoCs from Exynos4 series can include this file and provide values for SoCs
  11. * specfic bindings.
  12. *
  13. * Note: This file does not include device nodes for all the controllers in
  14. * Exynos4 SoCs. As device tree coverage for Exynos4 increases, additional
  15. * nodes can be added to this file.
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License version 2 as
  19. * published by the Free Software Foundation.
  20. */
  21. #include "skeleton.dtsi"
  22. / {
  23. interrupt-parent = <&gic>;
  24. aliases {
  25. spi0 = &spi_0;
  26. spi1 = &spi_1;
  27. spi2 = &spi_2;
  28. i2c0 = &i2c_0;
  29. i2c1 = &i2c_1;
  30. i2c2 = &i2c_2;
  31. i2c3 = &i2c_3;
  32. i2c4 = &i2c_4;
  33. i2c5 = &i2c_5;
  34. i2c6 = &i2c_6;
  35. i2c7 = &i2c_7;
  36. csis0 = &csis_0;
  37. csis1 = &csis_1;
  38. fimc0 = &fimc_0;
  39. fimc1 = &fimc_1;
  40. fimc2 = &fimc_2;
  41. fimc3 = &fimc_3;
  42. };
  43. chipid@10000000 {
  44. compatible = "samsung,exynos4210-chipid";
  45. reg = <0x10000000 0x100>;
  46. };
  47. mipi_phy: video-phy@10020710 {
  48. compatible = "samsung,s5pv210-mipi-video-phy";
  49. reg = <0x10020710 8>;
  50. #phy-cells = <1>;
  51. };
  52. pd_mfc: mfc-power-domain@10023C40 {
  53. compatible = "samsung,exynos4210-pd";
  54. reg = <0x10023C40 0x20>;
  55. };
  56. pd_g3d: g3d-power-domain@10023C60 {
  57. compatible = "samsung,exynos4210-pd";
  58. reg = <0x10023C60 0x20>;
  59. };
  60. pd_lcd0: lcd0-power-domain@10023C80 {
  61. compatible = "samsung,exynos4210-pd";
  62. reg = <0x10023C80 0x20>;
  63. };
  64. pd_tv: tv-power-domain@10023C20 {
  65. compatible = "samsung,exynos4210-pd";
  66. reg = <0x10023C20 0x20>;
  67. };
  68. pd_cam: cam-power-domain@10023C00 {
  69. compatible = "samsung,exynos4210-pd";
  70. reg = <0x10023C00 0x20>;
  71. };
  72. pd_gps: gps-power-domain@10023CE0 {
  73. compatible = "samsung,exynos4210-pd";
  74. reg = <0x10023CE0 0x20>;
  75. };
  76. gic:interrupt-controller@10490000 {
  77. compatible = "arm,cortex-a9-gic";
  78. #interrupt-cells = <3>;
  79. interrupt-controller;
  80. reg = <0x10490000 0x1000>, <0x10480000 0x100>;
  81. };
  82. combiner:interrupt-controller@10440000 {
  83. compatible = "samsung,exynos4210-combiner";
  84. #interrupt-cells = <2>;
  85. interrupt-controller;
  86. reg = <0x10440000 0x1000>;
  87. };
  88. sys_reg: sysreg {
  89. compatible = "samsung,exynos4-sysreg", "syscon";
  90. reg = <0x10010000 0x400>;
  91. };
  92. camera {
  93. compatible = "samsung,fimc", "simple-bus";
  94. status = "disabled";
  95. #address-cells = <1>;
  96. #size-cells = <1>;
  97. ranges;
  98. clock_cam: clock-controller {
  99. #clock-cells = <1>;
  100. };
  101. fimc_0: fimc@11800000 {
  102. compatible = "samsung,exynos4210-fimc";
  103. reg = <0x11800000 0x1000>;
  104. interrupts = <0 84 0>;
  105. clocks = <&clock 256>, <&clock 128>;
  106. clock-names = "fimc", "sclk_fimc";
  107. samsung,power-domain = <&pd_cam>;
  108. samsung,sysreg = <&sys_reg>;
  109. status = "disabled";
  110. };
  111. fimc_1: fimc@11810000 {
  112. compatible = "samsung,exynos4210-fimc";
  113. reg = <0x11810000 0x1000>;
  114. interrupts = <0 85 0>;
  115. clocks = <&clock 257>, <&clock 129>;
  116. clock-names = "fimc", "sclk_fimc";
  117. samsung,power-domain = <&pd_cam>;
  118. samsung,sysreg = <&sys_reg>;
  119. status = "disabled";
  120. };
  121. fimc_2: fimc@11820000 {
  122. compatible = "samsung,exynos4210-fimc";
  123. reg = <0x11820000 0x1000>;
  124. interrupts = <0 86 0>;
  125. clocks = <&clock 258>, <&clock 130>;
  126. clock-names = "fimc", "sclk_fimc";
  127. samsung,power-domain = <&pd_cam>;
  128. samsung,sysreg = <&sys_reg>;
  129. status = "disabled";
  130. };
  131. fimc_3: fimc@11830000 {
  132. compatible = "samsung,exynos4210-fimc";
  133. reg = <0x11830000 0x1000>;
  134. interrupts = <0 87 0>;
  135. clocks = <&clock 259>, <&clock 131>;
  136. clock-names = "fimc", "sclk_fimc";
  137. samsung,power-domain = <&pd_cam>;
  138. samsung,sysreg = <&sys_reg>;
  139. status = "disabled";
  140. };
  141. csis_0: csis@11880000 {
  142. compatible = "samsung,exynos4210-csis";
  143. reg = <0x11880000 0x4000>;
  144. interrupts = <0 78 0>;
  145. clocks = <&clock 260>, <&clock 134>;
  146. clock-names = "csis", "sclk_csis";
  147. bus-width = <4>;
  148. samsung,power-domain = <&pd_cam>;
  149. phys = <&mipi_phy 0>;
  150. phy-names = "csis";
  151. status = "disabled";
  152. #address-cells = <1>;
  153. #size-cells = <0>;
  154. };
  155. csis_1: csis@11890000 {
  156. compatible = "samsung,exynos4210-csis";
  157. reg = <0x11890000 0x4000>;
  158. interrupts = <0 80 0>;
  159. clocks = <&clock 261>, <&clock 135>;
  160. clock-names = "csis", "sclk_csis";
  161. bus-width = <2>;
  162. samsung,power-domain = <&pd_cam>;
  163. phys = <&mipi_phy 2>;
  164. phy-names = "csis";
  165. status = "disabled";
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. };
  169. };
  170. watchdog@10060000 {
  171. compatible = "samsung,s3c2410-wdt";
  172. reg = <0x10060000 0x100>;
  173. interrupts = <0 43 0>;
  174. clocks = <&clock 345>;
  175. clock-names = "watchdog";
  176. status = "disabled";
  177. };
  178. rtc@10070000 {
  179. compatible = "samsung,s3c6410-rtc";
  180. reg = <0x10070000 0x100>;
  181. interrupts = <0 44 0>, <0 45 0>;
  182. clocks = <&clock 346>;
  183. clock-names = "rtc";
  184. status = "disabled";
  185. };
  186. keypad@100A0000 {
  187. compatible = "samsung,s5pv210-keypad";
  188. reg = <0x100A0000 0x100>;
  189. interrupts = <0 109 0>;
  190. clocks = <&clock 347>;
  191. clock-names = "keypad";
  192. status = "disabled";
  193. };
  194. sdhci@12510000 {
  195. compatible = "samsung,exynos4210-sdhci";
  196. reg = <0x12510000 0x100>;
  197. interrupts = <0 73 0>;
  198. clocks = <&clock 297>, <&clock 145>;
  199. clock-names = "hsmmc", "mmc_busclk.2";
  200. status = "disabled";
  201. };
  202. sdhci@12520000 {
  203. compatible = "samsung,exynos4210-sdhci";
  204. reg = <0x12520000 0x100>;
  205. interrupts = <0 74 0>;
  206. clocks = <&clock 298>, <&clock 146>;
  207. clock-names = "hsmmc", "mmc_busclk.2";
  208. status = "disabled";
  209. };
  210. sdhci@12530000 {
  211. compatible = "samsung,exynos4210-sdhci";
  212. reg = <0x12530000 0x100>;
  213. interrupts = <0 75 0>;
  214. clocks = <&clock 299>, <&clock 147>;
  215. clock-names = "hsmmc", "mmc_busclk.2";
  216. status = "disabled";
  217. };
  218. sdhci@12540000 {
  219. compatible = "samsung,exynos4210-sdhci";
  220. reg = <0x12540000 0x100>;
  221. interrupts = <0 76 0>;
  222. clocks = <&clock 300>, <&clock 148>;
  223. clock-names = "hsmmc", "mmc_busclk.2";
  224. status = "disabled";
  225. };
  226. ehci@12580000 {
  227. compatible = "samsung,exynos4210-ehci";
  228. reg = <0x12580000 0x100>;
  229. interrupts = <0 70 0>;
  230. clocks = <&clock 304>;
  231. clock-names = "usbhost";
  232. status = "disabled";
  233. };
  234. ohci@12590000 {
  235. compatible = "samsung,exynos4210-ohci";
  236. reg = <0x12590000 0x100>;
  237. interrupts = <0 70 0>;
  238. clocks = <&clock 304>;
  239. clock-names = "usbhost";
  240. status = "disabled";
  241. };
  242. mfc: codec@13400000 {
  243. compatible = "samsung,mfc-v5";
  244. reg = <0x13400000 0x10000>;
  245. interrupts = <0 94 0>;
  246. samsung,power-domain = <&pd_mfc>;
  247. clocks = <&clock 273>;
  248. clock-names = "mfc";
  249. status = "disabled";
  250. };
  251. serial@13800000 {
  252. compatible = "samsung,exynos4210-uart";
  253. reg = <0x13800000 0x100>;
  254. interrupts = <0 52 0>;
  255. clocks = <&clock 312>, <&clock 151>;
  256. clock-names = "uart", "clk_uart_baud0";
  257. status = "disabled";
  258. };
  259. serial@13810000 {
  260. compatible = "samsung,exynos4210-uart";
  261. reg = <0x13810000 0x100>;
  262. interrupts = <0 53 0>;
  263. clocks = <&clock 313>, <&clock 152>;
  264. clock-names = "uart", "clk_uart_baud0";
  265. status = "disabled";
  266. };
  267. serial@13820000 {
  268. compatible = "samsung,exynos4210-uart";
  269. reg = <0x13820000 0x100>;
  270. interrupts = <0 54 0>;
  271. clocks = <&clock 314>, <&clock 153>;
  272. clock-names = "uart", "clk_uart_baud0";
  273. status = "disabled";
  274. };
  275. serial@13830000 {
  276. compatible = "samsung,exynos4210-uart";
  277. reg = <0x13830000 0x100>;
  278. interrupts = <0 55 0>;
  279. clocks = <&clock 315>, <&clock 154>;
  280. clock-names = "uart", "clk_uart_baud0";
  281. status = "disabled";
  282. };
  283. i2c_0: i2c@13860000 {
  284. #address-cells = <1>;
  285. #size-cells = <0>;
  286. compatible = "samsung,s3c2440-i2c";
  287. reg = <0x13860000 0x100>;
  288. interrupts = <0 58 0>;
  289. clocks = <&clock 317>;
  290. clock-names = "i2c";
  291. pinctrl-names = "default";
  292. pinctrl-0 = <&i2c0_bus>;
  293. status = "disabled";
  294. };
  295. i2c_1: i2c@13870000 {
  296. #address-cells = <1>;
  297. #size-cells = <0>;
  298. compatible = "samsung,s3c2440-i2c";
  299. reg = <0x13870000 0x100>;
  300. interrupts = <0 59 0>;
  301. clocks = <&clock 318>;
  302. clock-names = "i2c";
  303. pinctrl-names = "default";
  304. pinctrl-0 = <&i2c1_bus>;
  305. status = "disabled";
  306. };
  307. i2c_2: i2c@13880000 {
  308. #address-cells = <1>;
  309. #size-cells = <0>;
  310. compatible = "samsung,s3c2440-i2c";
  311. reg = <0x13880000 0x100>;
  312. interrupts = <0 60 0>;
  313. clocks = <&clock 319>;
  314. clock-names = "i2c";
  315. status = "disabled";
  316. };
  317. i2c_3: i2c@13890000 {
  318. #address-cells = <1>;
  319. #size-cells = <0>;
  320. compatible = "samsung,s3c2440-i2c";
  321. reg = <0x13890000 0x100>;
  322. interrupts = <0 61 0>;
  323. clocks = <&clock 320>;
  324. clock-names = "i2c";
  325. status = "disabled";
  326. };
  327. i2c_4: i2c@138A0000 {
  328. #address-cells = <1>;
  329. #size-cells = <0>;
  330. compatible = "samsung,s3c2440-i2c";
  331. reg = <0x138A0000 0x100>;
  332. interrupts = <0 62 0>;
  333. clocks = <&clock 321>;
  334. clock-names = "i2c";
  335. status = "disabled";
  336. };
  337. i2c_5: i2c@138B0000 {
  338. #address-cells = <1>;
  339. #size-cells = <0>;
  340. compatible = "samsung,s3c2440-i2c";
  341. reg = <0x138B0000 0x100>;
  342. interrupts = <0 63 0>;
  343. clocks = <&clock 322>;
  344. clock-names = "i2c";
  345. status = "disabled";
  346. };
  347. i2c_6: i2c@138C0000 {
  348. #address-cells = <1>;
  349. #size-cells = <0>;
  350. compatible = "samsung,s3c2440-i2c";
  351. reg = <0x138C0000 0x100>;
  352. interrupts = <0 64 0>;
  353. clocks = <&clock 323>;
  354. clock-names = "i2c";
  355. status = "disabled";
  356. };
  357. i2c_7: i2c@138D0000 {
  358. #address-cells = <1>;
  359. #size-cells = <0>;
  360. compatible = "samsung,s3c2440-i2c";
  361. reg = <0x138D0000 0x100>;
  362. interrupts = <0 65 0>;
  363. clocks = <&clock 324>;
  364. clock-names = "i2c";
  365. status = "disabled";
  366. };
  367. spi_0: spi@13920000 {
  368. compatible = "samsung,exynos4210-spi";
  369. reg = <0x13920000 0x100>;
  370. interrupts = <0 66 0>;
  371. dmas = <&pdma0 7>, <&pdma0 6>;
  372. dma-names = "tx", "rx";
  373. #address-cells = <1>;
  374. #size-cells = <0>;
  375. clocks = <&clock 327>, <&clock 159>;
  376. clock-names = "spi", "spi_busclk0";
  377. pinctrl-names = "default";
  378. pinctrl-0 = <&spi0_bus>;
  379. status = "disabled";
  380. };
  381. spi_1: spi@13930000 {
  382. compatible = "samsung,exynos4210-spi";
  383. reg = <0x13930000 0x100>;
  384. interrupts = <0 67 0>;
  385. dmas = <&pdma1 7>, <&pdma1 6>;
  386. dma-names = "tx", "rx";
  387. #address-cells = <1>;
  388. #size-cells = <0>;
  389. clocks = <&clock 328>, <&clock 160>;
  390. clock-names = "spi", "spi_busclk0";
  391. pinctrl-names = "default";
  392. pinctrl-0 = <&spi1_bus>;
  393. status = "disabled";
  394. };
  395. spi_2: spi@13940000 {
  396. compatible = "samsung,exynos4210-spi";
  397. reg = <0x13940000 0x100>;
  398. interrupts = <0 68 0>;
  399. dmas = <&pdma0 9>, <&pdma0 8>;
  400. dma-names = "tx", "rx";
  401. #address-cells = <1>;
  402. #size-cells = <0>;
  403. clocks = <&clock 329>, <&clock 161>;
  404. clock-names = "spi", "spi_busclk0";
  405. pinctrl-names = "default";
  406. pinctrl-0 = <&spi2_bus>;
  407. status = "disabled";
  408. };
  409. pwm@139D0000 {
  410. compatible = "samsung,exynos4210-pwm";
  411. reg = <0x139D0000 0x1000>;
  412. interrupts = <0 37 0>, <0 38 0>, <0 39 0>, <0 40 0>, <0 41 0>;
  413. clocks = <&clock 336>;
  414. clock-names = "timers";
  415. #pwm-cells = <2>;
  416. status = "disabled";
  417. };
  418. amba {
  419. #address-cells = <1>;
  420. #size-cells = <1>;
  421. compatible = "arm,amba-bus";
  422. interrupt-parent = <&gic>;
  423. ranges;
  424. pdma0: pdma@12680000 {
  425. compatible = "arm,pl330", "arm,primecell";
  426. reg = <0x12680000 0x1000>;
  427. interrupts = <0 35 0>;
  428. clocks = <&clock 292>;
  429. clock-names = "apb_pclk";
  430. #dma-cells = <1>;
  431. #dma-channels = <8>;
  432. #dma-requests = <32>;
  433. };
  434. pdma1: pdma@12690000 {
  435. compatible = "arm,pl330", "arm,primecell";
  436. reg = <0x12690000 0x1000>;
  437. interrupts = <0 36 0>;
  438. clocks = <&clock 293>;
  439. clock-names = "apb_pclk";
  440. #dma-cells = <1>;
  441. #dma-channels = <8>;
  442. #dma-requests = <32>;
  443. };
  444. mdma1: mdma@12850000 {
  445. compatible = "arm,pl330", "arm,primecell";
  446. reg = <0x12850000 0x1000>;
  447. interrupts = <0 34 0>;
  448. clocks = <&clock 279>;
  449. clock-names = "apb_pclk";
  450. #dma-cells = <1>;
  451. #dma-channels = <8>;
  452. #dma-requests = <1>;
  453. };
  454. };
  455. fimd: fimd@11c00000 {
  456. compatible = "samsung,exynos4210-fimd";
  457. interrupt-parent = <&combiner>;
  458. reg = <0x11c00000 0x20000>;
  459. interrupt-names = "fifo", "vsync", "lcd_sys";
  460. interrupts = <11 0>, <11 1>, <11 2>;
  461. clocks = <&clock 140>, <&clock 283>;
  462. clock-names = "sclk_fimd", "fimd";
  463. samsung,power-domain = <&pd_lcd0>;
  464. status = "disabled";
  465. };
  466. };