armada-xp.dtsi 4.0 KB

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  1. /*
  2. * Device Tree Include file for Marvell Armada XP family SoC
  3. *
  4. * Copyright (C) 2012 Marvell
  5. *
  6. * Lior Amsalem <alior@marvell.com>
  7. * Gregory CLEMENT <gregory.clement@free-electrons.com>
  8. * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  9. * Ben Dooks <ben.dooks@codethink.co.uk>
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without any
  13. * warranty of any kind, whether express or implied.
  14. *
  15. * Contains definitions specific to the Armada XP SoC that are not
  16. * common to all Armada SoCs.
  17. */
  18. #include "armada-370-xp.dtsi"
  19. / {
  20. model = "Marvell Armada XP family SoC";
  21. compatible = "marvell,armadaxp", "marvell,armada-370-xp";
  22. aliases {
  23. eth2 = &eth2;
  24. };
  25. soc {
  26. compatible = "marvell,armadaxp-mbus", "simple-bus";
  27. bootrom {
  28. compatible = "marvell,bootrom";
  29. reg = <MBUS_ID(0x01, 0x1d) 0 0x100000>;
  30. };
  31. internal-regs {
  32. L2: l2-cache {
  33. compatible = "marvell,aurora-system-cache";
  34. reg = <0x08000 0x1000>;
  35. cache-id-part = <0x100>;
  36. wt-override;
  37. };
  38. interrupt-controller@20000 {
  39. reg = <0x20a00 0x2d0>, <0x21070 0x58>;
  40. };
  41. armada-370-xp-pmsu@22000 {
  42. compatible = "marvell,armada-370-xp-pmsu";
  43. reg = <0x22100 0x430>, <0x20800 0x20>;
  44. };
  45. serial@12200 {
  46. compatible = "snps,dw-apb-uart";
  47. reg = <0x12200 0x100>;
  48. reg-shift = <2>;
  49. interrupts = <43>;
  50. reg-io-width = <1>;
  51. status = "disabled";
  52. };
  53. serial@12300 {
  54. compatible = "snps,dw-apb-uart";
  55. reg = <0x12300 0x100>;
  56. reg-shift = <2>;
  57. interrupts = <44>;
  58. reg-io-width = <1>;
  59. status = "disabled";
  60. };
  61. timer@20300 {
  62. compatible = "marvell,armada-xp-timer";
  63. clocks = <&coreclk 2>, <&refclk>;
  64. clock-names = "nbclk", "fixed";
  65. };
  66. coreclk: mvebu-sar@18230 {
  67. compatible = "marvell,armada-xp-core-clock";
  68. reg = <0x18230 0x08>;
  69. #clock-cells = <1>;
  70. };
  71. cpuclk: clock-complex@18700 {
  72. #clock-cells = <1>;
  73. compatible = "marvell,armada-xp-cpu-clock";
  74. reg = <0x18700 0xA0>;
  75. clocks = <&coreclk 1>;
  76. };
  77. gateclk: clock-gating-control@18220 {
  78. compatible = "marvell,armada-xp-gating-clock";
  79. reg = <0x18220 0x4>;
  80. clocks = <&coreclk 0>;
  81. #clock-cells = <1>;
  82. };
  83. system-controller@18200 {
  84. compatible = "marvell,armada-370-xp-system-controller";
  85. reg = <0x18200 0x500>;
  86. };
  87. eth2: ethernet@30000 {
  88. compatible = "marvell,armada-370-neta";
  89. reg = <0x30000 0x4000>;
  90. interrupts = <12>;
  91. clocks = <&gateclk 2>;
  92. status = "disabled";
  93. };
  94. xor@60900 {
  95. compatible = "marvell,orion-xor";
  96. reg = <0x60900 0x100
  97. 0x60b00 0x100>;
  98. clocks = <&gateclk 22>;
  99. status = "okay";
  100. xor10 {
  101. interrupts = <51>;
  102. dmacap,memcpy;
  103. dmacap,xor;
  104. };
  105. xor11 {
  106. interrupts = <52>;
  107. dmacap,memcpy;
  108. dmacap,xor;
  109. dmacap,memset;
  110. };
  111. };
  112. xor@f0900 {
  113. compatible = "marvell,orion-xor";
  114. reg = <0xF0900 0x100
  115. 0xF0B00 0x100>;
  116. clocks = <&gateclk 28>;
  117. status = "okay";
  118. xor00 {
  119. interrupts = <94>;
  120. dmacap,memcpy;
  121. dmacap,xor;
  122. };
  123. xor01 {
  124. interrupts = <95>;
  125. dmacap,memcpy;
  126. dmacap,xor;
  127. dmacap,memset;
  128. };
  129. };
  130. i2c0: i2c@11000 {
  131. compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  132. reg = <0x11000 0x100>;
  133. };
  134. i2c1: i2c@11100 {
  135. compatible = "marvell,mv78230-i2c", "marvell,mv64xxx-i2c";
  136. reg = <0x11100 0x100>;
  137. };
  138. usb@50000 {
  139. clocks = <&gateclk 18>;
  140. };
  141. usb@51000 {
  142. clocks = <&gateclk 19>;
  143. };
  144. usb@52000 {
  145. compatible = "marvell,orion-ehci";
  146. reg = <0x52000 0x500>;
  147. interrupts = <47>;
  148. clocks = <&gateclk 20>;
  149. status = "disabled";
  150. };
  151. thermal@182b0 {
  152. compatible = "marvell,armadaxp-thermal";
  153. reg = <0x182b0 0x4
  154. 0x184d0 0x4>;
  155. status = "okay";
  156. };
  157. };
  158. };
  159. clocks {
  160. /* 25 MHz reference crystal */
  161. refclk: oscillator {
  162. compatible = "fixed-clock";
  163. #clock-cells = <0>;
  164. clock-frequency = <25000000>;
  165. };
  166. };
  167. };