am335x-evm.dts 15 KB

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  1. /*
  2. * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. */
  8. /dts-v1/;
  9. #include "am33xx.dtsi"
  10. / {
  11. model = "TI AM335x EVM";
  12. compatible = "ti,am335x-evm", "ti,am33xx";
  13. cpus {
  14. cpu@0 {
  15. cpu0-supply = <&vdd1_reg>;
  16. };
  17. };
  18. memory {
  19. device_type = "memory";
  20. reg = <0x80000000 0x10000000>; /* 256 MB */
  21. };
  22. vbat: fixedregulator@0 {
  23. compatible = "regulator-fixed";
  24. regulator-name = "vbat";
  25. regulator-min-microvolt = <5000000>;
  26. regulator-max-microvolt = <5000000>;
  27. regulator-boot-on;
  28. };
  29. lis3_reg: fixedregulator@1 {
  30. compatible = "regulator-fixed";
  31. regulator-name = "lis3_reg";
  32. regulator-boot-on;
  33. };
  34. matrix_keypad: matrix_keypad@0 {
  35. compatible = "gpio-matrix-keypad";
  36. debounce-delay-ms = <5>;
  37. col-scan-delay-us = <2>;
  38. row-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH /* Bank1, pin25 */
  39. &gpio1 26 GPIO_ACTIVE_HIGH /* Bank1, pin26 */
  40. &gpio1 27 GPIO_ACTIVE_HIGH>; /* Bank1, pin27 */
  41. col-gpios = <&gpio1 21 GPIO_ACTIVE_HIGH /* Bank1, pin21 */
  42. &gpio1 22 GPIO_ACTIVE_HIGH>; /* Bank1, pin22 */
  43. linux,keymap = <0x0000008b /* MENU */
  44. 0x0100009e /* BACK */
  45. 0x02000069 /* LEFT */
  46. 0x0001006a /* RIGHT */
  47. 0x0101001c /* ENTER */
  48. 0x0201006c>; /* DOWN */
  49. };
  50. gpio_keys: volume_keys@0 {
  51. compatible = "gpio-keys";
  52. #address-cells = <1>;
  53. #size-cells = <0>;
  54. autorepeat;
  55. switch@9 {
  56. label = "volume-up";
  57. linux,code = <115>;
  58. gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  59. gpio-key,wakeup;
  60. };
  61. switch@10 {
  62. label = "volume-down";
  63. linux,code = <114>;
  64. gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
  65. gpio-key,wakeup;
  66. };
  67. };
  68. backlight {
  69. compatible = "pwm-backlight";
  70. pwms = <&ecap0 0 50000 0>;
  71. brightness-levels = <0 51 53 56 62 75 101 152 255>;
  72. default-brightness-level = <8>;
  73. };
  74. panel {
  75. compatible = "ti,tilcdc,panel";
  76. status = "okay";
  77. pinctrl-names = "default";
  78. pinctrl-0 = <&lcd_pins_s0>;
  79. panel-info {
  80. ac-bias = <255>;
  81. ac-bias-intrpt = <0>;
  82. dma-burst-sz = <16>;
  83. bpp = <32>;
  84. fdd = <0x80>;
  85. sync-edge = <0>;
  86. sync-ctrl = <1>;
  87. raster-order = <0>;
  88. fifo-th = <0>;
  89. };
  90. display-timings {
  91. 800x480p62 {
  92. clock-frequency = <30000000>;
  93. hactive = <800>;
  94. vactive = <480>;
  95. hfront-porch = <39>;
  96. hback-porch = <39>;
  97. hsync-len = <47>;
  98. vback-porch = <29>;
  99. vfront-porch = <13>;
  100. vsync-len = <2>;
  101. hsync-active = <1>;
  102. vsync-active = <1>;
  103. };
  104. };
  105. };
  106. sound {
  107. compatible = "ti,da830-evm-audio";
  108. ti,model = "AM335x-EVM";
  109. ti,audio-codec = <&tlv320aic3106>;
  110. ti,mcasp-controller = <&mcasp1>;
  111. ti,codec-clock-rate = <12000000>;
  112. ti,audio-routing =
  113. "Headphone Jack", "HPLOUT",
  114. "Headphone Jack", "HPROUT",
  115. "LINE1L", "Line In",
  116. "LINE1R", "Line In";
  117. };
  118. };
  119. &am33xx_pinmux {
  120. pinctrl-names = "default";
  121. pinctrl-0 = <&matrix_keypad_s0 &volume_keys_s0 &clkout2_pin>;
  122. matrix_keypad_s0: matrix_keypad_s0 {
  123. pinctrl-single,pins = <
  124. 0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a5.gpio1_21 */
  125. 0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a6.gpio1_22 */
  126. 0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a9.gpio1_25 */
  127. 0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a10.gpio1_26 */
  128. 0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_a11.gpio1_27 */
  129. >;
  130. };
  131. volume_keys_s0: volume_keys_s0 {
  132. pinctrl-single,pins = <
  133. 0x150 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_sclk.gpio0_2 */
  134. 0x154 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d0.gpio0_3 */
  135. >;
  136. };
  137. i2c0_pins: pinmux_i2c0_pins {
  138. pinctrl-single,pins = <
  139. 0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
  140. 0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
  141. >;
  142. };
  143. i2c1_pins: pinmux_i2c1_pins {
  144. pinctrl-single,pins = <
  145. 0x158 (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
  146. 0x15c (PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
  147. >;
  148. };
  149. uart0_pins: pinmux_uart0_pins {
  150. pinctrl-single,pins = <
  151. 0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
  152. 0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
  153. >;
  154. };
  155. clkout2_pin: pinmux_clkout2_pin {
  156. pinctrl-single,pins = <
  157. 0x1b4 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
  158. >;
  159. };
  160. nandflash_pins_s0: nandflash_pins_s0 {
  161. pinctrl-single,pins = <
  162. 0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
  163. 0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
  164. 0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
  165. 0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
  166. 0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
  167. 0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
  168. 0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
  169. 0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
  170. 0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
  171. 0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
  172. 0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
  173. 0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
  174. 0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
  175. 0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
  176. 0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
  177. >;
  178. };
  179. ecap0_pins: backlight_pins {
  180. pinctrl-single,pins = <
  181. 0x164 0x0 /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
  182. >;
  183. };
  184. cpsw_default: cpsw_default {
  185. pinctrl-single,pins = <
  186. /* Slave 1 */
  187. 0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
  188. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxdv.rgmii1_rctl */
  189. 0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd3.rgmii1_td3 */
  190. 0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd2.rgmii1_td2 */
  191. 0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
  192. 0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
  193. 0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rgmii1_tclk */
  194. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxclk.rgmii1_rclk */
  195. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd3.rgmii1_rd3 */
  196. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd2.rgmii1_rd2 */
  197. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd1.rgmii1_rd1 */
  198. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2) /* mii1_rxd0.rgmii1_rd0 */
  199. >;
  200. };
  201. cpsw_sleep: cpsw_sleep {
  202. pinctrl-single,pins = <
  203. /* Slave 1 reset value */
  204. 0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  205. 0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  206. 0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  207. 0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  208. 0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  209. 0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  210. 0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  211. 0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  212. 0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  213. 0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  214. 0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  215. 0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  216. >;
  217. };
  218. davinci_mdio_default: davinci_mdio_default {
  219. pinctrl-single,pins = <
  220. /* MDIO */
  221. 0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
  222. 0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
  223. >;
  224. };
  225. davinci_mdio_sleep: davinci_mdio_sleep {
  226. pinctrl-single,pins = <
  227. /* MDIO reset value */
  228. 0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
  229. 0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
  230. >;
  231. };
  232. lcd_pins_s0: lcd_pins_s0 {
  233. pinctrl-single,pins = <
  234. 0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
  235. 0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
  236. 0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
  237. 0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
  238. 0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
  239. 0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
  240. 0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
  241. 0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
  242. 0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
  243. 0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
  244. 0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
  245. 0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
  246. 0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
  247. 0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
  248. 0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
  249. 0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
  250. 0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
  251. 0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
  252. 0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
  253. 0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
  254. 0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
  255. 0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
  256. 0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
  257. 0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
  258. 0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
  259. 0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
  260. 0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
  261. 0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
  262. >;
  263. };
  264. am335x_evm_audio_pins: am335x_evm_audio_pins {
  265. pinctrl-single,pins = <
  266. 0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */
  267. 0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */
  268. 0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
  269. 0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
  270. >;
  271. };
  272. };
  273. &uart0 {
  274. pinctrl-names = "default";
  275. pinctrl-0 = <&uart0_pins>;
  276. status = "okay";
  277. };
  278. &i2c0 {
  279. pinctrl-names = "default";
  280. pinctrl-0 = <&i2c0_pins>;
  281. status = "okay";
  282. clock-frequency = <400000>;
  283. tps: tps@2d {
  284. reg = <0x2d>;
  285. };
  286. };
  287. &usb {
  288. status = "okay";
  289. control@44e10000 {
  290. status = "okay";
  291. };
  292. usb-phy@47401300 {
  293. status = "okay";
  294. };
  295. usb-phy@47401b00 {
  296. status = "okay";
  297. };
  298. usb@47401000 {
  299. status = "okay";
  300. };
  301. usb@47401800 {
  302. status = "okay";
  303. dr_mode = "host";
  304. };
  305. dma-controller@07402000 {
  306. status = "okay";
  307. };
  308. };
  309. &i2c1 {
  310. pinctrl-names = "default";
  311. pinctrl-0 = <&i2c1_pins>;
  312. status = "okay";
  313. clock-frequency = <100000>;
  314. lis331dlh: lis331dlh@18 {
  315. compatible = "st,lis331dlh", "st,lis3lv02d";
  316. reg = <0x18>;
  317. Vdd-supply = <&lis3_reg>;
  318. Vdd_IO-supply = <&lis3_reg>;
  319. st,click-single-x;
  320. st,click-single-y;
  321. st,click-single-z;
  322. st,click-thresh-x = <10>;
  323. st,click-thresh-y = <10>;
  324. st,click-thresh-z = <10>;
  325. st,irq1-click;
  326. st,irq2-click;
  327. st,wakeup-x-lo;
  328. st,wakeup-x-hi;
  329. st,wakeup-y-lo;
  330. st,wakeup-y-hi;
  331. st,wakeup-z-lo;
  332. st,wakeup-z-hi;
  333. st,min-limit-x = <120>;
  334. st,min-limit-y = <120>;
  335. st,min-limit-z = <140>;
  336. st,max-limit-x = <550>;
  337. st,max-limit-y = <550>;
  338. st,max-limit-z = <750>;
  339. };
  340. tsl2550: tsl2550@39 {
  341. compatible = "taos,tsl2550";
  342. reg = <0x39>;
  343. };
  344. tmp275: tmp275@48 {
  345. compatible = "ti,tmp275";
  346. reg = <0x48>;
  347. };
  348. tlv320aic3106: tlv320aic3106@1b {
  349. compatible = "ti,tlv320aic3106";
  350. reg = <0x1b>;
  351. status = "okay";
  352. /* Regulators */
  353. AVDD-supply = <&vaux2_reg>;
  354. IOVDD-supply = <&vaux2_reg>;
  355. DRVDD-supply = <&vaux2_reg>;
  356. DVDD-supply = <&vbat>;
  357. };
  358. };
  359. &lcdc {
  360. status = "okay";
  361. };
  362. &elm {
  363. status = "okay";
  364. };
  365. &epwmss0 {
  366. status = "okay";
  367. ecap0: ecap@48300100 {
  368. status = "okay";
  369. pinctrl-names = "default";
  370. pinctrl-0 = <&ecap0_pins>;
  371. };
  372. };
  373. &gpmc {
  374. status = "okay";
  375. pinctrl-names = "default";
  376. pinctrl-0 = <&nandflash_pins_s0>;
  377. ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND */
  378. nand@0,0 {
  379. reg = <0 0 0>; /* CS0, offset 0 */
  380. nand-bus-width = <8>;
  381. ti,nand-ecc-opt = "bch8";
  382. gpmc,device-nand = "true";
  383. gpmc,device-width = <1>;
  384. gpmc,sync-clk-ps = <0>;
  385. gpmc,cs-on-ns = <0>;
  386. gpmc,cs-rd-off-ns = <44>;
  387. gpmc,cs-wr-off-ns = <44>;
  388. gpmc,adv-on-ns = <6>;
  389. gpmc,adv-rd-off-ns = <34>;
  390. gpmc,adv-wr-off-ns = <44>;
  391. gpmc,we-on-ns = <0>;
  392. gpmc,we-off-ns = <40>;
  393. gpmc,oe-on-ns = <0>;
  394. gpmc,oe-off-ns = <54>;
  395. gpmc,access-ns = <64>;
  396. gpmc,rd-cycle-ns = <82>;
  397. gpmc,wr-cycle-ns = <82>;
  398. gpmc,wait-on-read = "true";
  399. gpmc,wait-on-write = "true";
  400. gpmc,bus-turnaround-ns = <0>;
  401. gpmc,cycle2cycle-delay-ns = <0>;
  402. gpmc,clk-activation-ns = <0>;
  403. gpmc,wait-monitoring-ns = <0>;
  404. gpmc,wr-access-ns = <40>;
  405. gpmc,wr-data-mux-bus-ns = <0>;
  406. #address-cells = <1>;
  407. #size-cells = <1>;
  408. elm_id = <&elm>;
  409. /* MTD partition table */
  410. partition@0 {
  411. label = "SPL1";
  412. reg = <0x00000000 0x000020000>;
  413. };
  414. partition@1 {
  415. label = "SPL2";
  416. reg = <0x00020000 0x00020000>;
  417. };
  418. partition@2 {
  419. label = "SPL3";
  420. reg = <0x00040000 0x00020000>;
  421. };
  422. partition@3 {
  423. label = "SPL4";
  424. reg = <0x00060000 0x00020000>;
  425. };
  426. partition@4 {
  427. label = "U-boot";
  428. reg = <0x00080000 0x001e0000>;
  429. };
  430. partition@5 {
  431. label = "environment";
  432. reg = <0x00260000 0x00020000>;
  433. };
  434. partition@6 {
  435. label = "Kernel";
  436. reg = <0x00280000 0x00500000>;
  437. };
  438. partition@7 {
  439. label = "File-System";
  440. reg = <0x00780000 0x0F880000>;
  441. };
  442. };
  443. };
  444. #include "tps65910.dtsi"
  445. &mcasp1 {
  446. pinctrl-names = "default";
  447. pinctrl-0 = <&am335x_evm_audio_pins>;
  448. status = "okay";
  449. op-mode = <0>; /* MCASP_IIS_MODE */
  450. tdm-slots = <2>;
  451. /* 4 serializers */
  452. serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
  453. 0 0 1 2
  454. >;
  455. tx-num-evt = <1>;
  456. rx-num-evt = <1>;
  457. };
  458. &tps {
  459. vcc1-supply = <&vbat>;
  460. vcc2-supply = <&vbat>;
  461. vcc3-supply = <&vbat>;
  462. vcc4-supply = <&vbat>;
  463. vcc5-supply = <&vbat>;
  464. vcc6-supply = <&vbat>;
  465. vcc7-supply = <&vbat>;
  466. vccio-supply = <&vbat>;
  467. regulators {
  468. vrtc_reg: regulator@0 {
  469. regulator-always-on;
  470. };
  471. vio_reg: regulator@1 {
  472. regulator-always-on;
  473. };
  474. vdd1_reg: regulator@2 {
  475. /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
  476. regulator-name = "vdd_mpu";
  477. regulator-min-microvolt = <912500>;
  478. regulator-max-microvolt = <1312500>;
  479. regulator-boot-on;
  480. regulator-always-on;
  481. };
  482. vdd2_reg: regulator@3 {
  483. /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
  484. regulator-name = "vdd_core";
  485. regulator-min-microvolt = <912500>;
  486. regulator-max-microvolt = <1150000>;
  487. regulator-boot-on;
  488. regulator-always-on;
  489. };
  490. vdd3_reg: regulator@4 {
  491. regulator-always-on;
  492. };
  493. vdig1_reg: regulator@5 {
  494. regulator-always-on;
  495. };
  496. vdig2_reg: regulator@6 {
  497. regulator-always-on;
  498. };
  499. vpll_reg: regulator@7 {
  500. regulator-always-on;
  501. };
  502. vdac_reg: regulator@8 {
  503. regulator-always-on;
  504. };
  505. vaux1_reg: regulator@9 {
  506. regulator-always-on;
  507. };
  508. vaux2_reg: regulator@10 {
  509. regulator-always-on;
  510. };
  511. vaux33_reg: regulator@11 {
  512. regulator-always-on;
  513. };
  514. vmmc_reg: regulator@12 {
  515. regulator-min-microvolt = <1800000>;
  516. regulator-max-microvolt = <3300000>;
  517. regulator-always-on;
  518. };
  519. };
  520. };
  521. &mac {
  522. pinctrl-names = "default", "sleep";
  523. pinctrl-0 = <&cpsw_default>;
  524. pinctrl-1 = <&cpsw_sleep>;
  525. };
  526. &davinci_mdio {
  527. pinctrl-names = "default", "sleep";
  528. pinctrl-0 = <&davinci_mdio_default>;
  529. pinctrl-1 = <&davinci_mdio_sleep>;
  530. };
  531. &cpsw_emac0 {
  532. phy_id = <&davinci_mdio>, <0>;
  533. phy-mode = "rgmii-txid";
  534. };
  535. &cpsw_emac1 {
  536. phy_id = <&davinci_mdio>, <1>;
  537. phy-mode = "rgmii-txid";
  538. };
  539. &tscadc {
  540. status = "okay";
  541. tsc {
  542. ti,wires = <4>;
  543. ti,x-plate-resistance = <200>;
  544. ti,coordinate-readouts = <5>;
  545. ti,wire-config = <0x00 0x11 0x22 0x33>;
  546. };
  547. adc {
  548. ti,adc-channels = <4 5 6 7>;
  549. };
  550. };
  551. &mmc1 {
  552. status = "okay";
  553. vmmc-supply = <&vmmc_reg>;
  554. bus-width = <4>;
  555. };
  556. &sham {
  557. status = "okay";
  558. };
  559. &aes {
  560. status = "okay";
  561. };