qla_init.c 143 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2010 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. static int qla25xx_init_queues(struct qla_hw_data *);
  36. /* SRB Extensions ---------------------------------------------------------- */
  37. static void
  38. qla2x00_ctx_sp_timeout(unsigned long __data)
  39. {
  40. srb_t *sp = (srb_t *)__data;
  41. struct srb_ctx *ctx;
  42. struct srb_iocb *iocb;
  43. fc_port_t *fcport = sp->fcport;
  44. struct qla_hw_data *ha = fcport->vha->hw;
  45. struct req_que *req;
  46. unsigned long flags;
  47. spin_lock_irqsave(&ha->hardware_lock, flags);
  48. req = ha->req_q_map[0];
  49. req->outstanding_cmds[sp->handle] = NULL;
  50. ctx = sp->ctx;
  51. iocb = ctx->u.iocb_cmd;
  52. iocb->timeout(sp);
  53. iocb->free(sp);
  54. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  55. }
  56. static void
  57. qla2x00_ctx_sp_free(srb_t *sp)
  58. {
  59. struct srb_ctx *ctx = sp->ctx;
  60. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  61. struct scsi_qla_host *vha = sp->fcport->vha;
  62. del_timer_sync(&iocb->timer);
  63. kfree(iocb);
  64. kfree(ctx);
  65. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  66. QLA_VHA_MARK_NOT_BUSY(vha);
  67. }
  68. inline srb_t *
  69. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  70. unsigned long tmo)
  71. {
  72. srb_t *sp = NULL;
  73. struct qla_hw_data *ha = vha->hw;
  74. struct srb_ctx *ctx;
  75. struct srb_iocb *iocb;
  76. uint8_t bail;
  77. QLA_VHA_MARK_BUSY(vha, bail);
  78. if (bail)
  79. return NULL;
  80. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  81. if (!sp)
  82. goto done;
  83. ctx = kzalloc(size, GFP_KERNEL);
  84. if (!ctx) {
  85. mempool_free(sp, ha->srb_mempool);
  86. sp = NULL;
  87. goto done;
  88. }
  89. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  90. if (!iocb) {
  91. mempool_free(sp, ha->srb_mempool);
  92. sp = NULL;
  93. kfree(ctx);
  94. goto done;
  95. }
  96. memset(sp, 0, sizeof(*sp));
  97. sp->fcport = fcport;
  98. sp->ctx = ctx;
  99. ctx->u.iocb_cmd = iocb;
  100. iocb->free = qla2x00_ctx_sp_free;
  101. init_timer(&iocb->timer);
  102. if (!tmo)
  103. goto done;
  104. iocb->timer.expires = jiffies + tmo * HZ;
  105. iocb->timer.data = (unsigned long)sp;
  106. iocb->timer.function = qla2x00_ctx_sp_timeout;
  107. add_timer(&iocb->timer);
  108. done:
  109. if (!sp)
  110. QLA_VHA_MARK_NOT_BUSY(vha);
  111. return sp;
  112. }
  113. /* Asynchronous Login/Logout Routines -------------------------------------- */
  114. static inline unsigned long
  115. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  116. {
  117. unsigned long tmo;
  118. struct qla_hw_data *ha = vha->hw;
  119. /* Firmware should use switch negotiated r_a_tov for timeout. */
  120. tmo = ha->r_a_tov / 10 * 2;
  121. if (!IS_FWI2_CAPABLE(ha)) {
  122. /*
  123. * Except for earlier ISPs where the timeout is seeded from the
  124. * initialization control block.
  125. */
  126. tmo = ha->login_timeout;
  127. }
  128. return tmo;
  129. }
  130. static void
  131. qla2x00_async_iocb_timeout(srb_t *sp)
  132. {
  133. fc_port_t *fcport = sp->fcport;
  134. struct srb_ctx *ctx = sp->ctx;
  135. DEBUG2(printk(KERN_WARNING
  136. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  137. fcport->vha->host_no, sp->handle,
  138. ctx->name, fcport->d_id.b.domain,
  139. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  140. fcport->flags &= ~FCF_ASYNC_SENT;
  141. if (ctx->type == SRB_LOGIN_CMD) {
  142. struct srb_iocb *lio = ctx->u.iocb_cmd;
  143. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  144. /* Retry as needed. */
  145. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  146. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  147. QLA_LOGIO_LOGIN_RETRIED : 0;
  148. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  149. lio->u.logio.data);
  150. }
  151. }
  152. static void
  153. qla2x00_async_login_ctx_done(srb_t *sp)
  154. {
  155. struct srb_ctx *ctx = sp->ctx;
  156. struct srb_iocb *lio = ctx->u.iocb_cmd;
  157. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  158. lio->u.logio.data);
  159. lio->free(sp);
  160. }
  161. int
  162. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  163. uint16_t *data)
  164. {
  165. srb_t *sp;
  166. struct srb_ctx *ctx;
  167. struct srb_iocb *lio;
  168. int rval;
  169. rval = QLA_FUNCTION_FAILED;
  170. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  171. qla2x00_get_async_timeout(vha) + 2);
  172. if (!sp)
  173. goto done;
  174. ctx = sp->ctx;
  175. ctx->type = SRB_LOGIN_CMD;
  176. ctx->name = "login";
  177. lio = ctx->u.iocb_cmd;
  178. lio->timeout = qla2x00_async_iocb_timeout;
  179. lio->done = qla2x00_async_login_ctx_done;
  180. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  181. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  182. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  183. rval = qla2x00_start_sp(sp);
  184. if (rval != QLA_SUCCESS)
  185. goto done_free_sp;
  186. DEBUG2(printk(KERN_DEBUG
  187. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  188. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  189. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  190. fcport->login_retry));
  191. return rval;
  192. done_free_sp:
  193. lio->free(sp);
  194. done:
  195. return rval;
  196. }
  197. static void
  198. qla2x00_async_logout_ctx_done(srb_t *sp)
  199. {
  200. struct srb_ctx *ctx = sp->ctx;
  201. struct srb_iocb *lio = ctx->u.iocb_cmd;
  202. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  203. lio->u.logio.data);
  204. lio->free(sp);
  205. }
  206. int
  207. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  208. {
  209. srb_t *sp;
  210. struct srb_ctx *ctx;
  211. struct srb_iocb *lio;
  212. int rval;
  213. rval = QLA_FUNCTION_FAILED;
  214. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  215. qla2x00_get_async_timeout(vha) + 2);
  216. if (!sp)
  217. goto done;
  218. ctx = sp->ctx;
  219. ctx->type = SRB_LOGOUT_CMD;
  220. ctx->name = "logout";
  221. lio = ctx->u.iocb_cmd;
  222. lio->timeout = qla2x00_async_iocb_timeout;
  223. lio->done = qla2x00_async_logout_ctx_done;
  224. rval = qla2x00_start_sp(sp);
  225. if (rval != QLA_SUCCESS)
  226. goto done_free_sp;
  227. DEBUG2(printk(KERN_DEBUG
  228. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  229. fcport->vha->host_no, sp->handle, fcport->loop_id,
  230. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  231. return rval;
  232. done_free_sp:
  233. lio->free(sp);
  234. done:
  235. return rval;
  236. }
  237. static void
  238. qla2x00_async_adisc_ctx_done(srb_t *sp)
  239. {
  240. struct srb_ctx *ctx = sp->ctx;
  241. struct srb_iocb *lio = ctx->u.iocb_cmd;
  242. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  243. lio->u.logio.data);
  244. lio->free(sp);
  245. }
  246. int
  247. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  248. uint16_t *data)
  249. {
  250. srb_t *sp;
  251. struct srb_ctx *ctx;
  252. struct srb_iocb *lio;
  253. int rval;
  254. rval = QLA_FUNCTION_FAILED;
  255. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  256. qla2x00_get_async_timeout(vha) + 2);
  257. if (!sp)
  258. goto done;
  259. ctx = sp->ctx;
  260. ctx->type = SRB_ADISC_CMD;
  261. ctx->name = "adisc";
  262. lio = ctx->u.iocb_cmd;
  263. lio->timeout = qla2x00_async_iocb_timeout;
  264. lio->done = qla2x00_async_adisc_ctx_done;
  265. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  266. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  267. rval = qla2x00_start_sp(sp);
  268. if (rval != QLA_SUCCESS)
  269. goto done_free_sp;
  270. DEBUG2(printk(KERN_DEBUG
  271. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  272. fcport->vha->host_no, sp->handle, fcport->loop_id,
  273. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  274. return rval;
  275. done_free_sp:
  276. lio->free(sp);
  277. done:
  278. return rval;
  279. }
  280. static void
  281. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  282. {
  283. struct srb_ctx *ctx = sp->ctx;
  284. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  285. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  286. iocb->free(sp);
  287. }
  288. int
  289. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  290. uint32_t tag)
  291. {
  292. struct scsi_qla_host *vha = fcport->vha;
  293. srb_t *sp;
  294. struct srb_ctx *ctx;
  295. struct srb_iocb *tcf;
  296. int rval;
  297. rval = QLA_FUNCTION_FAILED;
  298. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  299. qla2x00_get_async_timeout(vha) + 2);
  300. if (!sp)
  301. goto done;
  302. ctx = sp->ctx;
  303. ctx->type = SRB_TM_CMD;
  304. ctx->name = "tmf";
  305. tcf = ctx->u.iocb_cmd;
  306. tcf->u.tmf.flags = flags;
  307. tcf->u.tmf.lun = lun;
  308. tcf->u.tmf.data = tag;
  309. tcf->timeout = qla2x00_async_iocb_timeout;
  310. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  311. rval = qla2x00_start_sp(sp);
  312. if (rval != QLA_SUCCESS)
  313. goto done_free_sp;
  314. DEBUG2(printk(KERN_DEBUG
  315. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  316. fcport->vha->host_no, sp->handle, fcport->loop_id,
  317. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  318. return rval;
  319. done_free_sp:
  320. tcf->free(sp);
  321. done:
  322. return rval;
  323. }
  324. void
  325. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  326. uint16_t *data)
  327. {
  328. int rval;
  329. switch (data[0]) {
  330. case MBS_COMMAND_COMPLETE:
  331. if (fcport->flags & FCF_FCP2_DEVICE) {
  332. fcport->flags |= FCF_ASYNC_SENT;
  333. qla2x00_post_async_adisc_work(vha, fcport, data);
  334. break;
  335. }
  336. qla2x00_update_fcport(vha, fcport);
  337. break;
  338. case MBS_COMMAND_ERROR:
  339. fcport->flags &= ~FCF_ASYNC_SENT;
  340. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  341. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  342. else
  343. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  344. break;
  345. case MBS_PORT_ID_USED:
  346. fcport->loop_id = data[1];
  347. qla2x00_post_async_logout_work(vha, fcport, NULL);
  348. qla2x00_post_async_login_work(vha, fcport, NULL);
  349. break;
  350. case MBS_LOOP_ID_USED:
  351. fcport->loop_id++;
  352. rval = qla2x00_find_new_loop_id(vha, fcport);
  353. if (rval != QLA_SUCCESS) {
  354. fcport->flags &= ~FCF_ASYNC_SENT;
  355. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  356. break;
  357. }
  358. qla2x00_post_async_login_work(vha, fcport, NULL);
  359. break;
  360. }
  361. return;
  362. }
  363. void
  364. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  365. uint16_t *data)
  366. {
  367. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  368. return;
  369. }
  370. void
  371. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  372. uint16_t *data)
  373. {
  374. if (data[0] == MBS_COMMAND_COMPLETE) {
  375. qla2x00_update_fcport(vha, fcport);
  376. return;
  377. }
  378. /* Retry login. */
  379. fcport->flags &= ~FCF_ASYNC_SENT;
  380. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  381. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  382. else
  383. qla2x00_mark_device_lost(vha, fcport, 1, 1);
  384. return;
  385. }
  386. void
  387. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  388. struct srb_iocb *iocb)
  389. {
  390. int rval;
  391. uint32_t flags;
  392. uint16_t lun;
  393. flags = iocb->u.tmf.flags;
  394. lun = (uint16_t)iocb->u.tmf.lun;
  395. /* Issue Marker IOCB */
  396. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  397. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  398. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  399. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  400. DEBUG2_3_11(printk(KERN_WARNING
  401. "%s(%ld): TM IOCB failed (%x).\n",
  402. __func__, vha->host_no, rval));
  403. }
  404. return;
  405. }
  406. /****************************************************************************/
  407. /* QLogic ISP2x00 Hardware Support Functions. */
  408. /****************************************************************************/
  409. /*
  410. * qla2x00_initialize_adapter
  411. * Initialize board.
  412. *
  413. * Input:
  414. * ha = adapter block pointer.
  415. *
  416. * Returns:
  417. * 0 = success
  418. */
  419. int
  420. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  421. {
  422. int rval;
  423. struct qla_hw_data *ha = vha->hw;
  424. struct req_que *req = ha->req_q_map[0];
  425. /* Clear adapter flags. */
  426. vha->flags.online = 0;
  427. ha->flags.chip_reset_done = 0;
  428. vha->flags.reset_active = 0;
  429. ha->flags.pci_channel_io_perm_failure = 0;
  430. ha->flags.eeh_busy = 0;
  431. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  432. atomic_set(&vha->loop_state, LOOP_DOWN);
  433. vha->device_flags = DFLG_NO_CABLE;
  434. vha->dpc_flags = 0;
  435. vha->flags.management_server_logged_in = 0;
  436. vha->marker_needed = 0;
  437. ha->isp_abort_cnt = 0;
  438. ha->beacon_blink_led = 0;
  439. set_bit(0, ha->req_qid_map);
  440. set_bit(0, ha->rsp_qid_map);
  441. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  442. rval = ha->isp_ops->pci_config(vha);
  443. if (rval) {
  444. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  445. vha->host_no));
  446. return (rval);
  447. }
  448. ha->isp_ops->reset_chip(vha);
  449. rval = qla2xxx_get_flash_info(vha);
  450. if (rval) {
  451. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  452. vha->host_no));
  453. return (rval);
  454. }
  455. ha->isp_ops->get_flash_version(vha, req->ring);
  456. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  457. ha->isp_ops->nvram_config(vha);
  458. if (ha->flags.disable_serdes) {
  459. /* Mask HBA via NVRAM settings? */
  460. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  461. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  462. vha->port_name[0], vha->port_name[1],
  463. vha->port_name[2], vha->port_name[3],
  464. vha->port_name[4], vha->port_name[5],
  465. vha->port_name[6], vha->port_name[7]);
  466. return QLA_FUNCTION_FAILED;
  467. }
  468. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  469. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  470. rval = ha->isp_ops->chip_diag(vha);
  471. if (rval)
  472. return (rval);
  473. rval = qla2x00_setup_chip(vha);
  474. if (rval)
  475. return (rval);
  476. }
  477. if (IS_QLA84XX(ha)) {
  478. ha->cs84xx = qla84xx_get_chip(vha);
  479. if (!ha->cs84xx) {
  480. qla_printk(KERN_ERR, ha,
  481. "Unable to configure ISP84XX.\n");
  482. return QLA_FUNCTION_FAILED;
  483. }
  484. }
  485. rval = qla2x00_init_rings(vha);
  486. ha->flags.chip_reset_done = 1;
  487. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  488. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  489. rval = qla84xx_init_chip(vha);
  490. if (rval != QLA_SUCCESS) {
  491. qla_printk(KERN_ERR, ha,
  492. "Unable to initialize ISP84XX.\n");
  493. qla84xx_put_chip(vha);
  494. }
  495. }
  496. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  497. qla24xx_read_fcp_prio_cfg(vha);
  498. return (rval);
  499. }
  500. /**
  501. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  502. * @ha: HA context
  503. *
  504. * Returns 0 on success.
  505. */
  506. int
  507. qla2100_pci_config(scsi_qla_host_t *vha)
  508. {
  509. uint16_t w;
  510. unsigned long flags;
  511. struct qla_hw_data *ha = vha->hw;
  512. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  513. pci_set_master(ha->pdev);
  514. pci_try_set_mwi(ha->pdev);
  515. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  516. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  517. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  518. pci_disable_rom(ha->pdev);
  519. /* Get PCI bus information. */
  520. spin_lock_irqsave(&ha->hardware_lock, flags);
  521. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  522. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  523. return QLA_SUCCESS;
  524. }
  525. /**
  526. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  527. * @ha: HA context
  528. *
  529. * Returns 0 on success.
  530. */
  531. int
  532. qla2300_pci_config(scsi_qla_host_t *vha)
  533. {
  534. uint16_t w;
  535. unsigned long flags = 0;
  536. uint32_t cnt;
  537. struct qla_hw_data *ha = vha->hw;
  538. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  539. pci_set_master(ha->pdev);
  540. pci_try_set_mwi(ha->pdev);
  541. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  542. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  543. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  544. w &= ~PCI_COMMAND_INTX_DISABLE;
  545. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  546. /*
  547. * If this is a 2300 card and not 2312, reset the
  548. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  549. * the 2310 also reports itself as a 2300 so we need to get the
  550. * fb revision level -- a 6 indicates it really is a 2300 and
  551. * not a 2310.
  552. */
  553. if (IS_QLA2300(ha)) {
  554. spin_lock_irqsave(&ha->hardware_lock, flags);
  555. /* Pause RISC. */
  556. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  557. for (cnt = 0; cnt < 30000; cnt++) {
  558. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  559. break;
  560. udelay(10);
  561. }
  562. /* Select FPM registers. */
  563. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  564. RD_REG_WORD(&reg->ctrl_status);
  565. /* Get the fb rev level */
  566. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  567. if (ha->fb_rev == FPM_2300)
  568. pci_clear_mwi(ha->pdev);
  569. /* Deselect FPM registers. */
  570. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  571. RD_REG_WORD(&reg->ctrl_status);
  572. /* Release RISC module. */
  573. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  574. for (cnt = 0; cnt < 30000; cnt++) {
  575. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  576. break;
  577. udelay(10);
  578. }
  579. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  580. }
  581. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  582. pci_disable_rom(ha->pdev);
  583. /* Get PCI bus information. */
  584. spin_lock_irqsave(&ha->hardware_lock, flags);
  585. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  586. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  587. return QLA_SUCCESS;
  588. }
  589. /**
  590. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  591. * @ha: HA context
  592. *
  593. * Returns 0 on success.
  594. */
  595. int
  596. qla24xx_pci_config(scsi_qla_host_t *vha)
  597. {
  598. uint16_t w;
  599. unsigned long flags = 0;
  600. struct qla_hw_data *ha = vha->hw;
  601. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  602. pci_set_master(ha->pdev);
  603. pci_try_set_mwi(ha->pdev);
  604. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  605. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  606. w &= ~PCI_COMMAND_INTX_DISABLE;
  607. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  608. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  609. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  610. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  611. pcix_set_mmrbc(ha->pdev, 2048);
  612. /* PCIe -- adjust Maximum Read Request Size (2048). */
  613. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  614. pcie_set_readrq(ha->pdev, 2048);
  615. pci_disable_rom(ha->pdev);
  616. ha->chip_revision = ha->pdev->revision;
  617. /* Get PCI bus information. */
  618. spin_lock_irqsave(&ha->hardware_lock, flags);
  619. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  620. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  621. return QLA_SUCCESS;
  622. }
  623. /**
  624. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  625. * @ha: HA context
  626. *
  627. * Returns 0 on success.
  628. */
  629. int
  630. qla25xx_pci_config(scsi_qla_host_t *vha)
  631. {
  632. uint16_t w;
  633. struct qla_hw_data *ha = vha->hw;
  634. pci_set_master(ha->pdev);
  635. pci_try_set_mwi(ha->pdev);
  636. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  637. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  638. w &= ~PCI_COMMAND_INTX_DISABLE;
  639. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  640. /* PCIe -- adjust Maximum Read Request Size (2048). */
  641. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  642. pcie_set_readrq(ha->pdev, 2048);
  643. pci_disable_rom(ha->pdev);
  644. ha->chip_revision = ha->pdev->revision;
  645. return QLA_SUCCESS;
  646. }
  647. /**
  648. * qla2x00_isp_firmware() - Choose firmware image.
  649. * @ha: HA context
  650. *
  651. * Returns 0 on success.
  652. */
  653. static int
  654. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  655. {
  656. int rval;
  657. uint16_t loop_id, topo, sw_cap;
  658. uint8_t domain, area, al_pa;
  659. struct qla_hw_data *ha = vha->hw;
  660. /* Assume loading risc code */
  661. rval = QLA_FUNCTION_FAILED;
  662. if (ha->flags.disable_risc_code_load) {
  663. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  664. vha->host_no));
  665. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  666. /* Verify checksum of loaded RISC code. */
  667. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  668. if (rval == QLA_SUCCESS) {
  669. /* And, verify we are not in ROM code. */
  670. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  671. &area, &domain, &topo, &sw_cap);
  672. }
  673. }
  674. if (rval) {
  675. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  676. vha->host_no));
  677. }
  678. return (rval);
  679. }
  680. /**
  681. * qla2x00_reset_chip() - Reset ISP chip.
  682. * @ha: HA context
  683. *
  684. * Returns 0 on success.
  685. */
  686. void
  687. qla2x00_reset_chip(scsi_qla_host_t *vha)
  688. {
  689. unsigned long flags = 0;
  690. struct qla_hw_data *ha = vha->hw;
  691. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  692. uint32_t cnt;
  693. uint16_t cmd;
  694. if (unlikely(pci_channel_offline(ha->pdev)))
  695. return;
  696. ha->isp_ops->disable_intrs(ha);
  697. spin_lock_irqsave(&ha->hardware_lock, flags);
  698. /* Turn off master enable */
  699. cmd = 0;
  700. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  701. cmd &= ~PCI_COMMAND_MASTER;
  702. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  703. if (!IS_QLA2100(ha)) {
  704. /* Pause RISC. */
  705. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  706. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  707. for (cnt = 0; cnt < 30000; cnt++) {
  708. if ((RD_REG_WORD(&reg->hccr) &
  709. HCCR_RISC_PAUSE) != 0)
  710. break;
  711. udelay(100);
  712. }
  713. } else {
  714. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  715. udelay(10);
  716. }
  717. /* Select FPM registers. */
  718. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  719. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  720. /* FPM Soft Reset. */
  721. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  722. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  723. /* Toggle Fpm Reset. */
  724. if (!IS_QLA2200(ha)) {
  725. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  726. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  727. }
  728. /* Select frame buffer registers. */
  729. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  730. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  731. /* Reset frame buffer FIFOs. */
  732. if (IS_QLA2200(ha)) {
  733. WRT_FB_CMD_REG(ha, reg, 0xa000);
  734. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  735. } else {
  736. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  737. /* Read back fb_cmd until zero or 3 seconds max */
  738. for (cnt = 0; cnt < 3000; cnt++) {
  739. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  740. break;
  741. udelay(100);
  742. }
  743. }
  744. /* Select RISC module registers. */
  745. WRT_REG_WORD(&reg->ctrl_status, 0);
  746. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  747. /* Reset RISC processor. */
  748. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  749. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  750. /* Release RISC processor. */
  751. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  752. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  753. }
  754. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  755. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  756. /* Reset ISP chip. */
  757. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  758. /* Wait for RISC to recover from reset. */
  759. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  760. /*
  761. * It is necessary to for a delay here since the card doesn't
  762. * respond to PCI reads during a reset. On some architectures
  763. * this will result in an MCA.
  764. */
  765. udelay(20);
  766. for (cnt = 30000; cnt; cnt--) {
  767. if ((RD_REG_WORD(&reg->ctrl_status) &
  768. CSR_ISP_SOFT_RESET) == 0)
  769. break;
  770. udelay(100);
  771. }
  772. } else
  773. udelay(10);
  774. /* Reset RISC processor. */
  775. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  776. WRT_REG_WORD(&reg->semaphore, 0);
  777. /* Release RISC processor. */
  778. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  779. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  780. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  781. for (cnt = 0; cnt < 30000; cnt++) {
  782. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  783. break;
  784. udelay(100);
  785. }
  786. } else
  787. udelay(100);
  788. /* Turn on master enable */
  789. cmd |= PCI_COMMAND_MASTER;
  790. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  791. /* Disable RISC pause on FPM parity error. */
  792. if (!IS_QLA2100(ha)) {
  793. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  794. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  795. }
  796. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  797. }
  798. /**
  799. * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
  800. *
  801. * Returns 0 on success.
  802. */
  803. int
  804. qla81xx_reset_mpi(scsi_qla_host_t *vha)
  805. {
  806. uint16_t mb[4] = {0x1010, 0, 1, 0};
  807. return qla81xx_write_mpi_register(vha, mb);
  808. }
  809. /**
  810. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  811. * @ha: HA context
  812. *
  813. * Returns 0 on success.
  814. */
  815. static inline void
  816. qla24xx_reset_risc(scsi_qla_host_t *vha)
  817. {
  818. unsigned long flags = 0;
  819. struct qla_hw_data *ha = vha->hw;
  820. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  821. uint32_t cnt, d2;
  822. uint16_t wd;
  823. static int abts_cnt; /* ISP abort retry counts */
  824. spin_lock_irqsave(&ha->hardware_lock, flags);
  825. /* Reset RISC. */
  826. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  827. for (cnt = 0; cnt < 30000; cnt++) {
  828. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  829. break;
  830. udelay(10);
  831. }
  832. WRT_REG_DWORD(&reg->ctrl_status,
  833. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  834. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  835. udelay(100);
  836. /* Wait for firmware to complete NVRAM accesses. */
  837. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  838. for (cnt = 10000 ; cnt && d2; cnt--) {
  839. udelay(5);
  840. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  841. barrier();
  842. }
  843. /* Wait for soft-reset to complete. */
  844. d2 = RD_REG_DWORD(&reg->ctrl_status);
  845. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  846. udelay(5);
  847. d2 = RD_REG_DWORD(&reg->ctrl_status);
  848. barrier();
  849. }
  850. /* If required, do an MPI FW reset now */
  851. if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
  852. if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
  853. if (++abts_cnt < 5) {
  854. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  855. set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
  856. } else {
  857. /*
  858. * We exhausted the ISP abort retries. We have to
  859. * set the board offline.
  860. */
  861. abts_cnt = 0;
  862. vha->flags.online = 0;
  863. }
  864. }
  865. }
  866. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  867. RD_REG_DWORD(&reg->hccr);
  868. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  869. RD_REG_DWORD(&reg->hccr);
  870. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  871. RD_REG_DWORD(&reg->hccr);
  872. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  873. for (cnt = 6000000 ; cnt && d2; cnt--) {
  874. udelay(5);
  875. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  876. barrier();
  877. }
  878. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  879. if (IS_NOPOLLING_TYPE(ha))
  880. ha->isp_ops->enable_intrs(ha);
  881. }
  882. /**
  883. * qla24xx_reset_chip() - Reset ISP24xx chip.
  884. * @ha: HA context
  885. *
  886. * Returns 0 on success.
  887. */
  888. void
  889. qla24xx_reset_chip(scsi_qla_host_t *vha)
  890. {
  891. struct qla_hw_data *ha = vha->hw;
  892. if (pci_channel_offline(ha->pdev) &&
  893. ha->flags.pci_channel_io_perm_failure) {
  894. return;
  895. }
  896. ha->isp_ops->disable_intrs(ha);
  897. /* Perform RISC reset. */
  898. qla24xx_reset_risc(vha);
  899. }
  900. /**
  901. * qla2x00_chip_diag() - Test chip for proper operation.
  902. * @ha: HA context
  903. *
  904. * Returns 0 on success.
  905. */
  906. int
  907. qla2x00_chip_diag(scsi_qla_host_t *vha)
  908. {
  909. int rval;
  910. struct qla_hw_data *ha = vha->hw;
  911. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  912. unsigned long flags = 0;
  913. uint16_t data;
  914. uint32_t cnt;
  915. uint16_t mb[5];
  916. struct req_que *req = ha->req_q_map[0];
  917. /* Assume a failed state */
  918. rval = QLA_FUNCTION_FAILED;
  919. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  920. vha->host_no, (u_long)&reg->flash_address));
  921. spin_lock_irqsave(&ha->hardware_lock, flags);
  922. /* Reset ISP chip. */
  923. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  924. /*
  925. * We need to have a delay here since the card will not respond while
  926. * in reset causing an MCA on some architectures.
  927. */
  928. udelay(20);
  929. data = qla2x00_debounce_register(&reg->ctrl_status);
  930. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  931. udelay(5);
  932. data = RD_REG_WORD(&reg->ctrl_status);
  933. barrier();
  934. }
  935. if (!cnt)
  936. goto chip_diag_failed;
  937. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  938. vha->host_no));
  939. /* Reset RISC processor. */
  940. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  941. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  942. /* Workaround for QLA2312 PCI parity error */
  943. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  944. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  945. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  946. udelay(5);
  947. data = RD_MAILBOX_REG(ha, reg, 0);
  948. barrier();
  949. }
  950. } else
  951. udelay(10);
  952. if (!cnt)
  953. goto chip_diag_failed;
  954. /* Check product ID of chip */
  955. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  956. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  957. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  958. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  959. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  960. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  961. mb[3] != PROD_ID_3) {
  962. qla_printk(KERN_WARNING, ha,
  963. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  964. goto chip_diag_failed;
  965. }
  966. ha->product_id[0] = mb[1];
  967. ha->product_id[1] = mb[2];
  968. ha->product_id[2] = mb[3];
  969. ha->product_id[3] = mb[4];
  970. /* Adjust fw RISC transfer size */
  971. if (req->length > 1024)
  972. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  973. else
  974. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  975. req->length;
  976. if (IS_QLA2200(ha) &&
  977. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  978. /* Limit firmware transfer size with a 2200A */
  979. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  980. vha->host_no));
  981. ha->device_type |= DT_ISP2200A;
  982. ha->fw_transfer_size = 128;
  983. }
  984. /* Wrap Incoming Mailboxes Test. */
  985. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  986. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  987. rval = qla2x00_mbx_reg_test(vha);
  988. if (rval) {
  989. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  990. vha->host_no));
  991. qla_printk(KERN_WARNING, ha,
  992. "Failed mailbox send register test\n");
  993. }
  994. else {
  995. /* Flag a successful rval */
  996. rval = QLA_SUCCESS;
  997. }
  998. spin_lock_irqsave(&ha->hardware_lock, flags);
  999. chip_diag_failed:
  1000. if (rval)
  1001. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1002. "****\n", vha->host_no));
  1003. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1004. return (rval);
  1005. }
  1006. /**
  1007. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1008. * @ha: HA context
  1009. *
  1010. * Returns 0 on success.
  1011. */
  1012. int
  1013. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1014. {
  1015. int rval;
  1016. struct qla_hw_data *ha = vha->hw;
  1017. struct req_que *req = ha->req_q_map[0];
  1018. if (IS_QLA82XX(ha))
  1019. return QLA_SUCCESS;
  1020. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1021. rval = qla2x00_mbx_reg_test(vha);
  1022. if (rval) {
  1023. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1024. vha->host_no));
  1025. qla_printk(KERN_WARNING, ha,
  1026. "Failed mailbox send register test\n");
  1027. } else {
  1028. /* Flag a successful rval */
  1029. rval = QLA_SUCCESS;
  1030. }
  1031. return rval;
  1032. }
  1033. void
  1034. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1035. {
  1036. int rval;
  1037. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1038. eft_size, fce_size, mq_size;
  1039. dma_addr_t tc_dma;
  1040. void *tc;
  1041. struct qla_hw_data *ha = vha->hw;
  1042. struct req_que *req = ha->req_q_map[0];
  1043. struct rsp_que *rsp = ha->rsp_q_map[0];
  1044. if (ha->fw_dump) {
  1045. qla_printk(KERN_WARNING, ha,
  1046. "Firmware dump previously allocated.\n");
  1047. return;
  1048. }
  1049. ha->fw_dumped = 0;
  1050. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1051. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1052. fixed_size = sizeof(struct qla2100_fw_dump);
  1053. } else if (IS_QLA23XX(ha)) {
  1054. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1055. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1056. sizeof(uint16_t);
  1057. } else if (IS_FWI2_CAPABLE(ha)) {
  1058. if (IS_QLA81XX(ha))
  1059. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1060. else if (IS_QLA25XX(ha))
  1061. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1062. else
  1063. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1064. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1065. sizeof(uint32_t);
  1066. if (ha->mqenable)
  1067. mq_size = sizeof(struct qla2xxx_mq_chain);
  1068. /* Allocate memory for Fibre Channel Event Buffer. */
  1069. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1070. goto try_eft;
  1071. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1072. GFP_KERNEL);
  1073. if (!tc) {
  1074. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1075. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1076. goto try_eft;
  1077. }
  1078. memset(tc, 0, FCE_SIZE);
  1079. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1080. ha->fce_mb, &ha->fce_bufs);
  1081. if (rval) {
  1082. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1083. "FCE (%d).\n", rval);
  1084. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1085. tc_dma);
  1086. ha->flags.fce_enabled = 0;
  1087. goto try_eft;
  1088. }
  1089. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1090. FCE_SIZE / 1024);
  1091. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1092. ha->flags.fce_enabled = 1;
  1093. ha->fce_dma = tc_dma;
  1094. ha->fce = tc;
  1095. try_eft:
  1096. /* Allocate memory for Extended Trace Buffer. */
  1097. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1098. GFP_KERNEL);
  1099. if (!tc) {
  1100. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1101. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1102. goto cont_alloc;
  1103. }
  1104. memset(tc, 0, EFT_SIZE);
  1105. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1106. if (rval) {
  1107. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1108. "EFT (%d).\n", rval);
  1109. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1110. tc_dma);
  1111. goto cont_alloc;
  1112. }
  1113. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1114. EFT_SIZE / 1024);
  1115. eft_size = EFT_SIZE;
  1116. ha->eft_dma = tc_dma;
  1117. ha->eft = tc;
  1118. }
  1119. cont_alloc:
  1120. req_q_size = req->length * sizeof(request_t);
  1121. rsp_q_size = rsp->length * sizeof(response_t);
  1122. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1123. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1124. ha->chain_offset = dump_size;
  1125. dump_size += mq_size + fce_size;
  1126. ha->fw_dump = vmalloc(dump_size);
  1127. if (!ha->fw_dump) {
  1128. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1129. "firmware dump!!!\n", dump_size / 1024);
  1130. if (ha->eft) {
  1131. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1132. ha->eft_dma);
  1133. ha->eft = NULL;
  1134. ha->eft_dma = 0;
  1135. }
  1136. return;
  1137. }
  1138. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1139. dump_size / 1024);
  1140. ha->fw_dump_len = dump_size;
  1141. ha->fw_dump->signature[0] = 'Q';
  1142. ha->fw_dump->signature[1] = 'L';
  1143. ha->fw_dump->signature[2] = 'G';
  1144. ha->fw_dump->signature[3] = 'C';
  1145. ha->fw_dump->version = __constant_htonl(1);
  1146. ha->fw_dump->fixed_size = htonl(fixed_size);
  1147. ha->fw_dump->mem_size = htonl(mem_size);
  1148. ha->fw_dump->req_q_size = htonl(req_q_size);
  1149. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1150. ha->fw_dump->eft_size = htonl(eft_size);
  1151. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1152. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1153. ha->fw_dump->header_size =
  1154. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1155. }
  1156. static int
  1157. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1158. {
  1159. #define MPS_MASK 0xe0
  1160. int rval;
  1161. uint16_t dc;
  1162. uint32_t dw;
  1163. struct qla_hw_data *ha = vha->hw;
  1164. if (!IS_QLA81XX(vha->hw))
  1165. return QLA_SUCCESS;
  1166. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1167. if (rval != QLA_SUCCESS) {
  1168. DEBUG2(qla_printk(KERN_WARNING, ha,
  1169. "Sync-MPI: Unable to acquire semaphore.\n"));
  1170. goto done;
  1171. }
  1172. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1173. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1174. if (rval != QLA_SUCCESS) {
  1175. DEBUG2(qla_printk(KERN_WARNING, ha,
  1176. "Sync-MPI: Unable to read sync.\n"));
  1177. goto done_release;
  1178. }
  1179. dc &= MPS_MASK;
  1180. if (dc == (dw & MPS_MASK))
  1181. goto done_release;
  1182. dw &= ~MPS_MASK;
  1183. dw |= dc;
  1184. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1185. if (rval != QLA_SUCCESS) {
  1186. DEBUG2(qla_printk(KERN_WARNING, ha,
  1187. "Sync-MPI: Unable to gain sync.\n"));
  1188. }
  1189. done_release:
  1190. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1191. if (rval != QLA_SUCCESS) {
  1192. DEBUG2(qla_printk(KERN_WARNING, ha,
  1193. "Sync-MPI: Unable to release semaphore.\n"));
  1194. }
  1195. done:
  1196. return rval;
  1197. }
  1198. /**
  1199. * qla2x00_setup_chip() - Load and start RISC firmware.
  1200. * @ha: HA context
  1201. *
  1202. * Returns 0 on success.
  1203. */
  1204. static int
  1205. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1206. {
  1207. int rval;
  1208. uint32_t srisc_address = 0;
  1209. struct qla_hw_data *ha = vha->hw;
  1210. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1211. unsigned long flags;
  1212. uint16_t fw_major_version;
  1213. if (IS_QLA82XX(ha)) {
  1214. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1215. if (rval == QLA_SUCCESS) {
  1216. qla2x00_stop_firmware(vha);
  1217. goto enable_82xx_npiv;
  1218. } else
  1219. goto failed;
  1220. }
  1221. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1222. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1223. spin_lock_irqsave(&ha->hardware_lock, flags);
  1224. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1225. RD_REG_WORD(&reg->hccr);
  1226. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1227. }
  1228. qla81xx_mpi_sync(vha);
  1229. /* Load firmware sequences */
  1230. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1231. if (rval == QLA_SUCCESS) {
  1232. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1233. "code.\n", vha->host_no));
  1234. rval = qla2x00_verify_checksum(vha, srisc_address);
  1235. if (rval == QLA_SUCCESS) {
  1236. /* Start firmware execution. */
  1237. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1238. "firmware.\n", vha->host_no));
  1239. rval = qla2x00_execute_fw(vha, srisc_address);
  1240. /* Retrieve firmware information. */
  1241. if (rval == QLA_SUCCESS) {
  1242. enable_82xx_npiv:
  1243. fw_major_version = ha->fw_major_version;
  1244. rval = qla2x00_get_fw_version(vha,
  1245. &ha->fw_major_version,
  1246. &ha->fw_minor_version,
  1247. &ha->fw_subminor_version,
  1248. &ha->fw_attributes, &ha->fw_memory_size,
  1249. ha->mpi_version, &ha->mpi_capabilities,
  1250. ha->phy_version);
  1251. if (rval != QLA_SUCCESS)
  1252. goto failed;
  1253. ha->flags.npiv_supported = 0;
  1254. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1255. (ha->fw_attributes & BIT_2)) {
  1256. ha->flags.npiv_supported = 1;
  1257. if ((!ha->max_npiv_vports) ||
  1258. ((ha->max_npiv_vports + 1) %
  1259. MIN_MULTI_ID_FABRIC))
  1260. ha->max_npiv_vports =
  1261. MIN_MULTI_ID_FABRIC - 1;
  1262. }
  1263. qla2x00_get_resource_cnts(vha, NULL,
  1264. &ha->fw_xcb_count, NULL, NULL,
  1265. &ha->max_npiv_vports, NULL);
  1266. if (!fw_major_version && ql2xallocfwdump) {
  1267. if (!IS_QLA82XX(ha))
  1268. qla2x00_alloc_fw_dump(vha);
  1269. }
  1270. }
  1271. } else {
  1272. DEBUG2(printk(KERN_INFO
  1273. "scsi(%ld): ISP Firmware failed checksum.\n",
  1274. vha->host_no));
  1275. }
  1276. }
  1277. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1278. /* Enable proper parity. */
  1279. spin_lock_irqsave(&ha->hardware_lock, flags);
  1280. if (IS_QLA2300(ha))
  1281. /* SRAM parity */
  1282. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1283. else
  1284. /* SRAM, Instruction RAM and GP RAM parity */
  1285. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1286. RD_REG_WORD(&reg->hccr);
  1287. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1288. }
  1289. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1290. uint32_t size;
  1291. rval = qla81xx_fac_get_sector_size(vha, &size);
  1292. if (rval == QLA_SUCCESS) {
  1293. ha->flags.fac_supported = 1;
  1294. ha->fdt_block_size = size << 2;
  1295. } else {
  1296. qla_printk(KERN_ERR, ha,
  1297. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1298. ha->fw_major_version, ha->fw_minor_version,
  1299. ha->fw_subminor_version);
  1300. }
  1301. }
  1302. failed:
  1303. if (rval) {
  1304. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1305. vha->host_no));
  1306. }
  1307. return (rval);
  1308. }
  1309. /**
  1310. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1311. * @ha: HA context
  1312. *
  1313. * Beginning of request ring has initialization control block already built
  1314. * by nvram config routine.
  1315. *
  1316. * Returns 0 on success.
  1317. */
  1318. void
  1319. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1320. {
  1321. uint16_t cnt;
  1322. response_t *pkt;
  1323. rsp->ring_ptr = rsp->ring;
  1324. rsp->ring_index = 0;
  1325. rsp->status_srb = NULL;
  1326. pkt = rsp->ring_ptr;
  1327. for (cnt = 0; cnt < rsp->length; cnt++) {
  1328. pkt->signature = RESPONSE_PROCESSED;
  1329. pkt++;
  1330. }
  1331. }
  1332. /**
  1333. * qla2x00_update_fw_options() - Read and process firmware options.
  1334. * @ha: HA context
  1335. *
  1336. * Returns 0 on success.
  1337. */
  1338. void
  1339. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1340. {
  1341. uint16_t swing, emphasis, tx_sens, rx_sens;
  1342. struct qla_hw_data *ha = vha->hw;
  1343. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1344. qla2x00_get_fw_options(vha, ha->fw_options);
  1345. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1346. return;
  1347. /* Serial Link options. */
  1348. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1349. vha->host_no));
  1350. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1351. sizeof(ha->fw_seriallink_options)));
  1352. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1353. if (ha->fw_seriallink_options[3] & BIT_2) {
  1354. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1355. /* 1G settings */
  1356. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1357. emphasis = (ha->fw_seriallink_options[2] &
  1358. (BIT_4 | BIT_3)) >> 3;
  1359. tx_sens = ha->fw_seriallink_options[0] &
  1360. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1361. rx_sens = (ha->fw_seriallink_options[0] &
  1362. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1363. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1364. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1365. if (rx_sens == 0x0)
  1366. rx_sens = 0x3;
  1367. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1368. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1369. ha->fw_options[10] |= BIT_5 |
  1370. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1371. (tx_sens & (BIT_1 | BIT_0));
  1372. /* 2G settings */
  1373. swing = (ha->fw_seriallink_options[2] &
  1374. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1375. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1376. tx_sens = ha->fw_seriallink_options[1] &
  1377. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1378. rx_sens = (ha->fw_seriallink_options[1] &
  1379. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1380. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1381. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1382. if (rx_sens == 0x0)
  1383. rx_sens = 0x3;
  1384. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1385. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1386. ha->fw_options[11] |= BIT_5 |
  1387. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1388. (tx_sens & (BIT_1 | BIT_0));
  1389. }
  1390. /* FCP2 options. */
  1391. /* Return command IOCBs without waiting for an ABTS to complete. */
  1392. ha->fw_options[3] |= BIT_13;
  1393. /* LED scheme. */
  1394. if (ha->flags.enable_led_scheme)
  1395. ha->fw_options[2] |= BIT_12;
  1396. /* Detect ISP6312. */
  1397. if (IS_QLA6312(ha))
  1398. ha->fw_options[2] |= BIT_13;
  1399. /* Update firmware options. */
  1400. qla2x00_set_fw_options(vha, ha->fw_options);
  1401. }
  1402. void
  1403. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1404. {
  1405. int rval;
  1406. struct qla_hw_data *ha = vha->hw;
  1407. if (IS_QLA82XX(ha))
  1408. return;
  1409. /* Update Serial Link options. */
  1410. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1411. return;
  1412. rval = qla2x00_set_serdes_params(vha,
  1413. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1414. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1415. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1416. if (rval != QLA_SUCCESS) {
  1417. qla_printk(KERN_WARNING, ha,
  1418. "Unable to update Serial Link options (%x).\n", rval);
  1419. }
  1420. }
  1421. void
  1422. qla2x00_config_rings(struct scsi_qla_host *vha)
  1423. {
  1424. struct qla_hw_data *ha = vha->hw;
  1425. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1426. struct req_que *req = ha->req_q_map[0];
  1427. struct rsp_que *rsp = ha->rsp_q_map[0];
  1428. /* Setup ring parameters in initialization control block. */
  1429. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1430. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1431. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1432. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1433. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1434. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1435. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1436. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1437. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1438. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1439. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1440. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1441. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1442. }
  1443. void
  1444. qla24xx_config_rings(struct scsi_qla_host *vha)
  1445. {
  1446. struct qla_hw_data *ha = vha->hw;
  1447. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1448. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1449. struct qla_msix_entry *msix;
  1450. struct init_cb_24xx *icb;
  1451. uint16_t rid = 0;
  1452. struct req_que *req = ha->req_q_map[0];
  1453. struct rsp_que *rsp = ha->rsp_q_map[0];
  1454. /* Setup ring parameters in initialization control block. */
  1455. icb = (struct init_cb_24xx *)ha->init_cb;
  1456. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1457. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1458. icb->request_q_length = cpu_to_le16(req->length);
  1459. icb->response_q_length = cpu_to_le16(rsp->length);
  1460. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1461. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1462. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1463. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1464. if (ha->mqenable) {
  1465. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1466. icb->rid = __constant_cpu_to_le16(rid);
  1467. if (ha->flags.msix_enabled) {
  1468. msix = &ha->msix_entries[1];
  1469. DEBUG2_17(printk(KERN_INFO
  1470. "Registering vector 0x%x for base que\n", msix->entry));
  1471. icb->msix = cpu_to_le16(msix->entry);
  1472. }
  1473. /* Use alternate PCI bus number */
  1474. if (MSB(rid))
  1475. icb->firmware_options_2 |=
  1476. __constant_cpu_to_le32(BIT_19);
  1477. /* Use alternate PCI devfn */
  1478. if (LSB(rid))
  1479. icb->firmware_options_2 |=
  1480. __constant_cpu_to_le32(BIT_18);
  1481. /* Use Disable MSIX Handshake mode for capable adapters */
  1482. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1483. icb->firmware_options_2 &=
  1484. __constant_cpu_to_le32(~BIT_22);
  1485. ha->flags.disable_msix_handshake = 1;
  1486. qla_printk(KERN_INFO, ha,
  1487. "MSIX Handshake Disable Mode turned on\n");
  1488. } else {
  1489. icb->firmware_options_2 |=
  1490. __constant_cpu_to_le32(BIT_22);
  1491. }
  1492. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1493. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1494. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1495. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1496. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1497. } else {
  1498. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1499. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1500. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1501. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1502. }
  1503. /* PCI posting */
  1504. RD_REG_DWORD(&ioreg->hccr);
  1505. }
  1506. /**
  1507. * qla2x00_init_rings() - Initializes firmware.
  1508. * @ha: HA context
  1509. *
  1510. * Beginning of request ring has initialization control block already built
  1511. * by nvram config routine.
  1512. *
  1513. * Returns 0 on success.
  1514. */
  1515. static int
  1516. qla2x00_init_rings(scsi_qla_host_t *vha)
  1517. {
  1518. int rval;
  1519. unsigned long flags = 0;
  1520. int cnt, que;
  1521. struct qla_hw_data *ha = vha->hw;
  1522. struct req_que *req;
  1523. struct rsp_que *rsp;
  1524. struct scsi_qla_host *vp;
  1525. struct mid_init_cb_24xx *mid_init_cb =
  1526. (struct mid_init_cb_24xx *) ha->init_cb;
  1527. spin_lock_irqsave(&ha->hardware_lock, flags);
  1528. /* Clear outstanding commands array. */
  1529. for (que = 0; que < ha->max_req_queues; que++) {
  1530. req = ha->req_q_map[que];
  1531. if (!req)
  1532. continue;
  1533. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1534. req->outstanding_cmds[cnt] = NULL;
  1535. req->current_outstanding_cmd = 1;
  1536. /* Initialize firmware. */
  1537. req->ring_ptr = req->ring;
  1538. req->ring_index = 0;
  1539. req->cnt = req->length;
  1540. }
  1541. for (que = 0; que < ha->max_rsp_queues; que++) {
  1542. rsp = ha->rsp_q_map[que];
  1543. if (!rsp)
  1544. continue;
  1545. /* Initialize response queue entries */
  1546. qla2x00_init_response_q_entries(rsp);
  1547. }
  1548. spin_lock(&ha->vport_slock);
  1549. /* Clear RSCN queue. */
  1550. list_for_each_entry(vp, &ha->vp_list, list) {
  1551. vp->rscn_in_ptr = 0;
  1552. vp->rscn_out_ptr = 0;
  1553. }
  1554. spin_unlock(&ha->vport_slock);
  1555. ha->isp_ops->config_rings(vha);
  1556. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1557. /* Update any ISP specific firmware options before initialization. */
  1558. ha->isp_ops->update_fw_options(vha);
  1559. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1560. if (ha->flags.npiv_supported) {
  1561. if (ha->operating_mode == LOOP)
  1562. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1563. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1564. }
  1565. if (IS_FWI2_CAPABLE(ha)) {
  1566. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1567. mid_init_cb->init_cb.execution_throttle =
  1568. cpu_to_le16(ha->fw_xcb_count);
  1569. }
  1570. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1571. if (rval) {
  1572. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1573. vha->host_no));
  1574. } else {
  1575. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1576. vha->host_no));
  1577. }
  1578. return (rval);
  1579. }
  1580. /**
  1581. * qla2x00_fw_ready() - Waits for firmware ready.
  1582. * @ha: HA context
  1583. *
  1584. * Returns 0 on success.
  1585. */
  1586. static int
  1587. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1588. {
  1589. int rval;
  1590. unsigned long wtime, mtime, cs84xx_time;
  1591. uint16_t min_wait; /* Minimum wait time if loop is down */
  1592. uint16_t wait_time; /* Wait time if loop is coming ready */
  1593. uint16_t state[5];
  1594. struct qla_hw_data *ha = vha->hw;
  1595. rval = QLA_SUCCESS;
  1596. /* 20 seconds for loop down. */
  1597. min_wait = 20;
  1598. /*
  1599. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1600. * our own processing.
  1601. */
  1602. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1603. wait_time = min_wait;
  1604. }
  1605. /* Min wait time if loop down */
  1606. mtime = jiffies + (min_wait * HZ);
  1607. /* wait time before firmware ready */
  1608. wtime = jiffies + (wait_time * HZ);
  1609. /* Wait for ISP to finish LIP */
  1610. if (!vha->flags.init_done)
  1611. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1612. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1613. vha->host_no));
  1614. do {
  1615. rval = qla2x00_get_firmware_state(vha, state);
  1616. if (rval == QLA_SUCCESS) {
  1617. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1618. vha->device_flags &= ~DFLG_NO_CABLE;
  1619. }
  1620. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1621. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1622. "84xx=%x.\n", vha->host_no, state[0],
  1623. state[2]));
  1624. if ((state[2] & FSTATE_LOGGED_IN) &&
  1625. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1626. DEBUG16(printk("scsi(%ld): Sending "
  1627. "verify iocb.\n", vha->host_no));
  1628. cs84xx_time = jiffies;
  1629. rval = qla84xx_init_chip(vha);
  1630. if (rval != QLA_SUCCESS)
  1631. break;
  1632. /* Add time taken to initialize. */
  1633. cs84xx_time = jiffies - cs84xx_time;
  1634. wtime += cs84xx_time;
  1635. mtime += cs84xx_time;
  1636. DEBUG16(printk("scsi(%ld): Increasing "
  1637. "wait time by %ld. New time %ld\n",
  1638. vha->host_no, cs84xx_time, wtime));
  1639. }
  1640. } else if (state[0] == FSTATE_READY) {
  1641. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1642. vha->host_no));
  1643. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1644. &ha->login_timeout, &ha->r_a_tov);
  1645. rval = QLA_SUCCESS;
  1646. break;
  1647. }
  1648. rval = QLA_FUNCTION_FAILED;
  1649. if (atomic_read(&vha->loop_down_timer) &&
  1650. state[0] != FSTATE_READY) {
  1651. /* Loop down. Timeout on min_wait for states
  1652. * other than Wait for Login.
  1653. */
  1654. if (time_after_eq(jiffies, mtime)) {
  1655. qla_printk(KERN_INFO, ha,
  1656. "Cable is unplugged...\n");
  1657. vha->device_flags |= DFLG_NO_CABLE;
  1658. break;
  1659. }
  1660. }
  1661. } else {
  1662. /* Mailbox cmd failed. Timeout on min_wait. */
  1663. if (time_after_eq(jiffies, mtime) ||
  1664. (IS_QLA82XX(ha) && ha->flags.fw_hung))
  1665. break;
  1666. }
  1667. if (time_after_eq(jiffies, wtime))
  1668. break;
  1669. /* Delay for a while */
  1670. msleep(500);
  1671. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1672. vha->host_no, state[0], jiffies));
  1673. } while (1);
  1674. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1675. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1676. jiffies));
  1677. if (rval) {
  1678. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1679. vha->host_no));
  1680. }
  1681. return (rval);
  1682. }
  1683. /*
  1684. * qla2x00_configure_hba
  1685. * Setup adapter context.
  1686. *
  1687. * Input:
  1688. * ha = adapter state pointer.
  1689. *
  1690. * Returns:
  1691. * 0 = success
  1692. *
  1693. * Context:
  1694. * Kernel context.
  1695. */
  1696. static int
  1697. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1698. {
  1699. int rval;
  1700. uint16_t loop_id;
  1701. uint16_t topo;
  1702. uint16_t sw_cap;
  1703. uint8_t al_pa;
  1704. uint8_t area;
  1705. uint8_t domain;
  1706. char connect_type[22];
  1707. struct qla_hw_data *ha = vha->hw;
  1708. /* Get host addresses. */
  1709. rval = qla2x00_get_adapter_id(vha,
  1710. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1711. if (rval != QLA_SUCCESS) {
  1712. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1713. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1714. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1715. __func__, vha->host_no));
  1716. } else {
  1717. qla_printk(KERN_WARNING, ha,
  1718. "ERROR -- Unable to get host loop ID.\n");
  1719. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1720. }
  1721. return (rval);
  1722. }
  1723. if (topo == 4) {
  1724. qla_printk(KERN_INFO, ha,
  1725. "Cannot get topology - retrying.\n");
  1726. return (QLA_FUNCTION_FAILED);
  1727. }
  1728. vha->loop_id = loop_id;
  1729. /* initialize */
  1730. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1731. ha->operating_mode = LOOP;
  1732. ha->switch_cap = 0;
  1733. switch (topo) {
  1734. case 0:
  1735. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1736. vha->host_no));
  1737. ha->current_topology = ISP_CFG_NL;
  1738. strcpy(connect_type, "(Loop)");
  1739. break;
  1740. case 1:
  1741. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1742. vha->host_no));
  1743. ha->switch_cap = sw_cap;
  1744. ha->current_topology = ISP_CFG_FL;
  1745. strcpy(connect_type, "(FL_Port)");
  1746. break;
  1747. case 2:
  1748. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1749. vha->host_no));
  1750. ha->operating_mode = P2P;
  1751. ha->current_topology = ISP_CFG_N;
  1752. strcpy(connect_type, "(N_Port-to-N_Port)");
  1753. break;
  1754. case 3:
  1755. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1756. vha->host_no));
  1757. ha->switch_cap = sw_cap;
  1758. ha->operating_mode = P2P;
  1759. ha->current_topology = ISP_CFG_F;
  1760. strcpy(connect_type, "(F_Port)");
  1761. break;
  1762. default:
  1763. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1764. "Using NL.\n",
  1765. vha->host_no, topo));
  1766. ha->current_topology = ISP_CFG_NL;
  1767. strcpy(connect_type, "(Loop)");
  1768. break;
  1769. }
  1770. /* Save Host port and loop ID. */
  1771. /* byte order - Big Endian */
  1772. vha->d_id.b.domain = domain;
  1773. vha->d_id.b.area = area;
  1774. vha->d_id.b.al_pa = al_pa;
  1775. if (!vha->flags.init_done)
  1776. qla_printk(KERN_INFO, ha,
  1777. "Topology - %s, Host Loop address 0x%x\n",
  1778. connect_type, vha->loop_id);
  1779. if (rval) {
  1780. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1781. } else {
  1782. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1783. }
  1784. return(rval);
  1785. }
  1786. inline void
  1787. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1788. char *def)
  1789. {
  1790. char *st, *en;
  1791. uint16_t index;
  1792. struct qla_hw_data *ha = vha->hw;
  1793. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1794. !IS_QLA8XXX_TYPE(ha);
  1795. if (memcmp(model, BINZERO, len) != 0) {
  1796. strncpy(ha->model_number, model, len);
  1797. st = en = ha->model_number;
  1798. en += len - 1;
  1799. while (en > st) {
  1800. if (*en != 0x20 && *en != 0x00)
  1801. break;
  1802. *en-- = '\0';
  1803. }
  1804. index = (ha->pdev->subsystem_device & 0xff);
  1805. if (use_tbl &&
  1806. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1807. index < QLA_MODEL_NAMES)
  1808. strncpy(ha->model_desc,
  1809. qla2x00_model_name[index * 2 + 1],
  1810. sizeof(ha->model_desc) - 1);
  1811. } else {
  1812. index = (ha->pdev->subsystem_device & 0xff);
  1813. if (use_tbl &&
  1814. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1815. index < QLA_MODEL_NAMES) {
  1816. strcpy(ha->model_number,
  1817. qla2x00_model_name[index * 2]);
  1818. strncpy(ha->model_desc,
  1819. qla2x00_model_name[index * 2 + 1],
  1820. sizeof(ha->model_desc) - 1);
  1821. } else {
  1822. strcpy(ha->model_number, def);
  1823. }
  1824. }
  1825. if (IS_FWI2_CAPABLE(ha))
  1826. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1827. sizeof(ha->model_desc));
  1828. }
  1829. /* On sparc systems, obtain port and node WWN from firmware
  1830. * properties.
  1831. */
  1832. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1833. {
  1834. #ifdef CONFIG_SPARC
  1835. struct qla_hw_data *ha = vha->hw;
  1836. struct pci_dev *pdev = ha->pdev;
  1837. struct device_node *dp = pci_device_to_OF_node(pdev);
  1838. const u8 *val;
  1839. int len;
  1840. val = of_get_property(dp, "port-wwn", &len);
  1841. if (val && len >= WWN_SIZE)
  1842. memcpy(nv->port_name, val, WWN_SIZE);
  1843. val = of_get_property(dp, "node-wwn", &len);
  1844. if (val && len >= WWN_SIZE)
  1845. memcpy(nv->node_name, val, WWN_SIZE);
  1846. #endif
  1847. }
  1848. /*
  1849. * NVRAM configuration for ISP 2xxx
  1850. *
  1851. * Input:
  1852. * ha = adapter block pointer.
  1853. *
  1854. * Output:
  1855. * initialization control block in response_ring
  1856. * host adapters parameters in host adapter block
  1857. *
  1858. * Returns:
  1859. * 0 = success.
  1860. */
  1861. int
  1862. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1863. {
  1864. int rval;
  1865. uint8_t chksum = 0;
  1866. uint16_t cnt;
  1867. uint8_t *dptr1, *dptr2;
  1868. struct qla_hw_data *ha = vha->hw;
  1869. init_cb_t *icb = ha->init_cb;
  1870. nvram_t *nv = ha->nvram;
  1871. uint8_t *ptr = ha->nvram;
  1872. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1873. rval = QLA_SUCCESS;
  1874. /* Determine NVRAM starting address. */
  1875. ha->nvram_size = sizeof(nvram_t);
  1876. ha->nvram_base = 0;
  1877. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1878. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1879. ha->nvram_base = 0x80;
  1880. /* Get NVRAM data and calculate checksum. */
  1881. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1882. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1883. chksum += *ptr++;
  1884. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1885. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1886. /* Bad NVRAM data, set defaults parameters. */
  1887. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1888. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1889. /* Reset NVRAM data. */
  1890. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1891. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1892. nv->nvram_version);
  1893. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1894. "invalid -- WWPN) defaults.\n");
  1895. /*
  1896. * Set default initialization control block.
  1897. */
  1898. memset(nv, 0, ha->nvram_size);
  1899. nv->parameter_block_version = ICB_VERSION;
  1900. if (IS_QLA23XX(ha)) {
  1901. nv->firmware_options[0] = BIT_2 | BIT_1;
  1902. nv->firmware_options[1] = BIT_7 | BIT_5;
  1903. nv->add_firmware_options[0] = BIT_5;
  1904. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1905. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1906. nv->special_options[1] = BIT_7;
  1907. } else if (IS_QLA2200(ha)) {
  1908. nv->firmware_options[0] = BIT_2 | BIT_1;
  1909. nv->firmware_options[1] = BIT_7 | BIT_5;
  1910. nv->add_firmware_options[0] = BIT_5;
  1911. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1912. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1913. } else if (IS_QLA2100(ha)) {
  1914. nv->firmware_options[0] = BIT_3 | BIT_1;
  1915. nv->firmware_options[1] = BIT_5;
  1916. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1917. }
  1918. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1919. nv->execution_throttle = __constant_cpu_to_le16(16);
  1920. nv->retry_count = 8;
  1921. nv->retry_delay = 1;
  1922. nv->port_name[0] = 33;
  1923. nv->port_name[3] = 224;
  1924. nv->port_name[4] = 139;
  1925. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1926. nv->login_timeout = 4;
  1927. /*
  1928. * Set default host adapter parameters
  1929. */
  1930. nv->host_p[1] = BIT_2;
  1931. nv->reset_delay = 5;
  1932. nv->port_down_retry_count = 8;
  1933. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1934. nv->link_down_timeout = 60;
  1935. rval = 1;
  1936. }
  1937. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1938. /*
  1939. * The SN2 does not provide BIOS emulation which means you can't change
  1940. * potentially bogus BIOS settings. Force the use of default settings
  1941. * for link rate and frame size. Hope that the rest of the settings
  1942. * are valid.
  1943. */
  1944. if (ia64_platform_is("sn2")) {
  1945. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1946. if (IS_QLA23XX(ha))
  1947. nv->special_options[1] = BIT_7;
  1948. }
  1949. #endif
  1950. /* Reset Initialization control block */
  1951. memset(icb, 0, ha->init_cb_size);
  1952. /*
  1953. * Setup driver NVRAM options.
  1954. */
  1955. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1956. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1957. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1958. nv->firmware_options[1] &= ~BIT_4;
  1959. if (IS_QLA23XX(ha)) {
  1960. nv->firmware_options[0] |= BIT_2;
  1961. nv->firmware_options[0] &= ~BIT_3;
  1962. nv->firmware_options[0] &= ~BIT_6;
  1963. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1964. if (IS_QLA2300(ha)) {
  1965. if (ha->fb_rev == FPM_2310) {
  1966. strcpy(ha->model_number, "QLA2310");
  1967. } else {
  1968. strcpy(ha->model_number, "QLA2300");
  1969. }
  1970. } else {
  1971. qla2x00_set_model_info(vha, nv->model_number,
  1972. sizeof(nv->model_number), "QLA23xx");
  1973. }
  1974. } else if (IS_QLA2200(ha)) {
  1975. nv->firmware_options[0] |= BIT_2;
  1976. /*
  1977. * 'Point-to-point preferred, else loop' is not a safe
  1978. * connection mode setting.
  1979. */
  1980. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1981. (BIT_5 | BIT_4)) {
  1982. /* Force 'loop preferred, else point-to-point'. */
  1983. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1984. nv->add_firmware_options[0] |= BIT_5;
  1985. }
  1986. strcpy(ha->model_number, "QLA22xx");
  1987. } else /*if (IS_QLA2100(ha))*/ {
  1988. strcpy(ha->model_number, "QLA2100");
  1989. }
  1990. /*
  1991. * Copy over NVRAM RISC parameter block to initialization control block.
  1992. */
  1993. dptr1 = (uint8_t *)icb;
  1994. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1995. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1996. while (cnt--)
  1997. *dptr1++ = *dptr2++;
  1998. /* Copy 2nd half. */
  1999. dptr1 = (uint8_t *)icb->add_firmware_options;
  2000. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2001. while (cnt--)
  2002. *dptr1++ = *dptr2++;
  2003. /* Use alternate WWN? */
  2004. if (nv->host_p[1] & BIT_7) {
  2005. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2006. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2007. }
  2008. /* Prepare nodename */
  2009. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2010. /*
  2011. * Firmware will apply the following mask if the nodename was
  2012. * not provided.
  2013. */
  2014. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2015. icb->node_name[0] &= 0xF0;
  2016. }
  2017. /*
  2018. * Set host adapter parameters.
  2019. */
  2020. if (nv->host_p[0] & BIT_7)
  2021. ql2xextended_error_logging = 1;
  2022. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2023. /* Always load RISC code on non ISP2[12]00 chips. */
  2024. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2025. ha->flags.disable_risc_code_load = 0;
  2026. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2027. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2028. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2029. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2030. ha->flags.disable_serdes = 0;
  2031. ha->operating_mode =
  2032. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2033. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2034. sizeof(ha->fw_seriallink_options));
  2035. /* save HBA serial number */
  2036. ha->serial0 = icb->port_name[5];
  2037. ha->serial1 = icb->port_name[6];
  2038. ha->serial2 = icb->port_name[7];
  2039. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2040. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2041. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2042. ha->retry_count = nv->retry_count;
  2043. /* Set minimum login_timeout to 4 seconds. */
  2044. if (nv->login_timeout != ql2xlogintimeout)
  2045. nv->login_timeout = ql2xlogintimeout;
  2046. if (nv->login_timeout < 4)
  2047. nv->login_timeout = 4;
  2048. ha->login_timeout = nv->login_timeout;
  2049. icb->login_timeout = nv->login_timeout;
  2050. /* Set minimum RATOV to 100 tenths of a second. */
  2051. ha->r_a_tov = 100;
  2052. ha->loop_reset_delay = nv->reset_delay;
  2053. /* Link Down Timeout = 0:
  2054. *
  2055. * When Port Down timer expires we will start returning
  2056. * I/O's to OS with "DID_NO_CONNECT".
  2057. *
  2058. * Link Down Timeout != 0:
  2059. *
  2060. * The driver waits for the link to come up after link down
  2061. * before returning I/Os to OS with "DID_NO_CONNECT".
  2062. */
  2063. if (nv->link_down_timeout == 0) {
  2064. ha->loop_down_abort_time =
  2065. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2066. } else {
  2067. ha->link_down_timeout = nv->link_down_timeout;
  2068. ha->loop_down_abort_time =
  2069. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2070. }
  2071. /*
  2072. * Need enough time to try and get the port back.
  2073. */
  2074. ha->port_down_retry_count = nv->port_down_retry_count;
  2075. if (qlport_down_retry)
  2076. ha->port_down_retry_count = qlport_down_retry;
  2077. /* Set login_retry_count */
  2078. ha->login_retry_count = nv->retry_count;
  2079. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2080. ha->port_down_retry_count > 3)
  2081. ha->login_retry_count = ha->port_down_retry_count;
  2082. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2083. ha->login_retry_count = ha->port_down_retry_count;
  2084. if (ql2xloginretrycount)
  2085. ha->login_retry_count = ql2xloginretrycount;
  2086. icb->lun_enables = __constant_cpu_to_le16(0);
  2087. icb->command_resource_count = 0;
  2088. icb->immediate_notify_resource_count = 0;
  2089. icb->timeout = __constant_cpu_to_le16(0);
  2090. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2091. /* Enable RIO */
  2092. icb->firmware_options[0] &= ~BIT_3;
  2093. icb->add_firmware_options[0] &=
  2094. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2095. icb->add_firmware_options[0] |= BIT_2;
  2096. icb->response_accumulation_timer = 3;
  2097. icb->interrupt_delay_timer = 5;
  2098. vha->flags.process_response_queue = 1;
  2099. } else {
  2100. /* Enable ZIO. */
  2101. if (!vha->flags.init_done) {
  2102. ha->zio_mode = icb->add_firmware_options[0] &
  2103. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2104. ha->zio_timer = icb->interrupt_delay_timer ?
  2105. icb->interrupt_delay_timer: 2;
  2106. }
  2107. icb->add_firmware_options[0] &=
  2108. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2109. vha->flags.process_response_queue = 0;
  2110. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2111. ha->zio_mode = QLA_ZIO_MODE_6;
  2112. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2113. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2114. ha->zio_timer * 100));
  2115. qla_printk(KERN_INFO, ha,
  2116. "ZIO mode %d enabled; timer delay (%d us).\n",
  2117. ha->zio_mode, ha->zio_timer * 100);
  2118. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2119. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2120. vha->flags.process_response_queue = 1;
  2121. }
  2122. }
  2123. if (rval) {
  2124. DEBUG2_3(printk(KERN_WARNING
  2125. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2126. }
  2127. return (rval);
  2128. }
  2129. static void
  2130. qla2x00_rport_del(void *data)
  2131. {
  2132. fc_port_t *fcport = data;
  2133. struct fc_rport *rport;
  2134. spin_lock_irq(fcport->vha->host->host_lock);
  2135. rport = fcport->drport ? fcport->drport: fcport->rport;
  2136. fcport->drport = NULL;
  2137. spin_unlock_irq(fcport->vha->host->host_lock);
  2138. if (rport)
  2139. fc_remote_port_delete(rport);
  2140. }
  2141. /**
  2142. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2143. * @ha: HA context
  2144. * @flags: allocation flags
  2145. *
  2146. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2147. */
  2148. fc_port_t *
  2149. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2150. {
  2151. fc_port_t *fcport;
  2152. fcport = kzalloc(sizeof(fc_port_t), flags);
  2153. if (!fcport)
  2154. return NULL;
  2155. /* Setup fcport template structure. */
  2156. fcport->vha = vha;
  2157. fcport->vp_idx = vha->vp_idx;
  2158. fcport->port_type = FCT_UNKNOWN;
  2159. fcport->loop_id = FC_NO_LOOP_ID;
  2160. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2161. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2162. return fcport;
  2163. }
  2164. /*
  2165. * qla2x00_configure_loop
  2166. * Updates Fibre Channel Device Database with what is actually on loop.
  2167. *
  2168. * Input:
  2169. * ha = adapter block pointer.
  2170. *
  2171. * Returns:
  2172. * 0 = success.
  2173. * 1 = error.
  2174. * 2 = database was full and device was not configured.
  2175. */
  2176. static int
  2177. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2178. {
  2179. int rval;
  2180. unsigned long flags, save_flags;
  2181. struct qla_hw_data *ha = vha->hw;
  2182. rval = QLA_SUCCESS;
  2183. /* Get Initiator ID */
  2184. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2185. rval = qla2x00_configure_hba(vha);
  2186. if (rval != QLA_SUCCESS) {
  2187. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2188. vha->host_no));
  2189. return (rval);
  2190. }
  2191. }
  2192. save_flags = flags = vha->dpc_flags;
  2193. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2194. vha->host_no, flags));
  2195. /*
  2196. * If we have both an RSCN and PORT UPDATE pending then handle them
  2197. * both at the same time.
  2198. */
  2199. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2200. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2201. qla2x00_get_data_rate(vha);
  2202. /* Determine what we need to do */
  2203. if (ha->current_topology == ISP_CFG_FL &&
  2204. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2205. vha->flags.rscn_queue_overflow = 1;
  2206. set_bit(RSCN_UPDATE, &flags);
  2207. } else if (ha->current_topology == ISP_CFG_F &&
  2208. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2209. vha->flags.rscn_queue_overflow = 1;
  2210. set_bit(RSCN_UPDATE, &flags);
  2211. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2212. } else if (ha->current_topology == ISP_CFG_N) {
  2213. clear_bit(RSCN_UPDATE, &flags);
  2214. } else if (!vha->flags.online ||
  2215. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2216. vha->flags.rscn_queue_overflow = 1;
  2217. set_bit(RSCN_UPDATE, &flags);
  2218. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2219. }
  2220. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2221. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2222. rval = QLA_FUNCTION_FAILED;
  2223. else
  2224. rval = qla2x00_configure_local_loop(vha);
  2225. }
  2226. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2227. if (LOOP_TRANSITION(vha))
  2228. rval = QLA_FUNCTION_FAILED;
  2229. else
  2230. rval = qla2x00_configure_fabric(vha);
  2231. }
  2232. if (rval == QLA_SUCCESS) {
  2233. if (atomic_read(&vha->loop_down_timer) ||
  2234. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2235. rval = QLA_FUNCTION_FAILED;
  2236. } else {
  2237. atomic_set(&vha->loop_state, LOOP_READY);
  2238. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2239. }
  2240. }
  2241. if (rval) {
  2242. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2243. __func__, vha->host_no));
  2244. } else {
  2245. DEBUG3(printk("%s: exiting normally\n", __func__));
  2246. }
  2247. /* Restore state if a resync event occurred during processing */
  2248. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2249. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2250. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2251. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2252. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2253. if (!IS_ALOGIO_CAPABLE(ha))
  2254. vha->flags.rscn_queue_overflow = 1;
  2255. }
  2256. }
  2257. return (rval);
  2258. }
  2259. /*
  2260. * qla2x00_configure_local_loop
  2261. * Updates Fibre Channel Device Database with local loop devices.
  2262. *
  2263. * Input:
  2264. * ha = adapter block pointer.
  2265. *
  2266. * Returns:
  2267. * 0 = success.
  2268. */
  2269. static int
  2270. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2271. {
  2272. int rval, rval2;
  2273. int found_devs;
  2274. int found;
  2275. fc_port_t *fcport, *new_fcport;
  2276. uint16_t index;
  2277. uint16_t entries;
  2278. char *id_iter;
  2279. uint16_t loop_id;
  2280. uint8_t domain, area, al_pa;
  2281. struct qla_hw_data *ha = vha->hw;
  2282. found_devs = 0;
  2283. new_fcport = NULL;
  2284. entries = MAX_FIBRE_DEVICES;
  2285. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2286. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2287. /* Get list of logged in devices. */
  2288. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2289. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2290. &entries);
  2291. if (rval != QLA_SUCCESS)
  2292. goto cleanup_allocation;
  2293. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2294. vha->host_no, entries));
  2295. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2296. entries * sizeof(struct gid_list_info)));
  2297. /* Allocate temporary fcport for any new fcports discovered. */
  2298. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2299. if (new_fcport == NULL) {
  2300. rval = QLA_MEMORY_ALLOC_FAILED;
  2301. goto cleanup_allocation;
  2302. }
  2303. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2304. /*
  2305. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2306. */
  2307. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2308. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2309. fcport->port_type != FCT_BROADCAST &&
  2310. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2311. DEBUG(printk("scsi(%ld): Marking port lost, "
  2312. "loop_id=0x%04x\n",
  2313. vha->host_no, fcport->loop_id));
  2314. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2315. }
  2316. }
  2317. /* Add devices to port list. */
  2318. id_iter = (char *)ha->gid_list;
  2319. for (index = 0; index < entries; index++) {
  2320. domain = ((struct gid_list_info *)id_iter)->domain;
  2321. area = ((struct gid_list_info *)id_iter)->area;
  2322. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2323. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2324. loop_id = (uint16_t)
  2325. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2326. else
  2327. loop_id = le16_to_cpu(
  2328. ((struct gid_list_info *)id_iter)->loop_id);
  2329. id_iter += ha->gid_list_info_size;
  2330. /* Bypass reserved domain fields. */
  2331. if ((domain & 0xf0) == 0xf0)
  2332. continue;
  2333. /* Bypass if not same domain and area of adapter. */
  2334. if (area && domain &&
  2335. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2336. continue;
  2337. /* Bypass invalid local loop ID. */
  2338. if (loop_id > LAST_LOCAL_LOOP_ID)
  2339. continue;
  2340. /* Fill in member data. */
  2341. new_fcport->d_id.b.domain = domain;
  2342. new_fcport->d_id.b.area = area;
  2343. new_fcport->d_id.b.al_pa = al_pa;
  2344. new_fcport->loop_id = loop_id;
  2345. new_fcport->vp_idx = vha->vp_idx;
  2346. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2347. if (rval2 != QLA_SUCCESS) {
  2348. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2349. "information -- get_port_database=%x, "
  2350. "loop_id=0x%04x\n",
  2351. vha->host_no, rval2, new_fcport->loop_id));
  2352. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2353. vha->host_no));
  2354. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2355. continue;
  2356. }
  2357. /* Check for matching device in port list. */
  2358. found = 0;
  2359. fcport = NULL;
  2360. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2361. if (memcmp(new_fcport->port_name, fcport->port_name,
  2362. WWN_SIZE))
  2363. continue;
  2364. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2365. fcport->loop_id = new_fcport->loop_id;
  2366. fcport->port_type = new_fcport->port_type;
  2367. fcport->d_id.b24 = new_fcport->d_id.b24;
  2368. memcpy(fcport->node_name, new_fcport->node_name,
  2369. WWN_SIZE);
  2370. found++;
  2371. break;
  2372. }
  2373. if (!found) {
  2374. /* New device, add to fcports list. */
  2375. if (vha->vp_idx) {
  2376. new_fcport->vha = vha;
  2377. new_fcport->vp_idx = vha->vp_idx;
  2378. }
  2379. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2380. /* Allocate a new replacement fcport. */
  2381. fcport = new_fcport;
  2382. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2383. if (new_fcport == NULL) {
  2384. rval = QLA_MEMORY_ALLOC_FAILED;
  2385. goto cleanup_allocation;
  2386. }
  2387. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2388. }
  2389. /* Base iIDMA settings on HBA port speed. */
  2390. fcport->fp_speed = ha->link_data_rate;
  2391. qla2x00_update_fcport(vha, fcport);
  2392. found_devs++;
  2393. }
  2394. cleanup_allocation:
  2395. kfree(new_fcport);
  2396. if (rval != QLA_SUCCESS) {
  2397. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2398. "rval=%x\n", vha->host_no, rval));
  2399. }
  2400. return (rval);
  2401. }
  2402. static void
  2403. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2404. {
  2405. #define LS_UNKNOWN 2
  2406. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2407. char *link_speed;
  2408. int rval;
  2409. uint16_t mb[4];
  2410. struct qla_hw_data *ha = vha->hw;
  2411. if (!IS_IIDMA_CAPABLE(ha))
  2412. return;
  2413. if (atomic_read(&fcport->state) != FCS_ONLINE)
  2414. return;
  2415. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2416. fcport->fp_speed > ha->link_data_rate)
  2417. return;
  2418. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2419. mb);
  2420. if (rval != QLA_SUCCESS) {
  2421. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2422. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2423. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2424. fcport->port_name[2], fcport->port_name[3],
  2425. fcport->port_name[4], fcport->port_name[5],
  2426. fcport->port_name[6], fcport->port_name[7], rval,
  2427. fcport->fp_speed, mb[0], mb[1]));
  2428. } else {
  2429. link_speed = link_speeds[LS_UNKNOWN];
  2430. if (fcport->fp_speed < 5)
  2431. link_speed = link_speeds[fcport->fp_speed];
  2432. else if (fcport->fp_speed == 0x13)
  2433. link_speed = link_speeds[5];
  2434. DEBUG2(qla_printk(KERN_INFO, ha,
  2435. "iIDMA adjusted to %s GB/s on "
  2436. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2437. link_speed, fcport->port_name[0],
  2438. fcport->port_name[1], fcport->port_name[2],
  2439. fcport->port_name[3], fcport->port_name[4],
  2440. fcport->port_name[5], fcport->port_name[6],
  2441. fcport->port_name[7]));
  2442. }
  2443. }
  2444. static void
  2445. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2446. {
  2447. struct fc_rport_identifiers rport_ids;
  2448. struct fc_rport *rport;
  2449. struct qla_hw_data *ha = vha->hw;
  2450. qla2x00_rport_del(fcport);
  2451. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2452. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2453. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2454. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2455. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2456. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2457. if (!rport) {
  2458. qla_printk(KERN_WARNING, ha,
  2459. "Unable to allocate fc remote port!\n");
  2460. return;
  2461. }
  2462. spin_lock_irq(fcport->vha->host->host_lock);
  2463. *((fc_port_t **)rport->dd_data) = fcport;
  2464. spin_unlock_irq(fcport->vha->host->host_lock);
  2465. rport->supported_classes = fcport->supported_classes;
  2466. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2467. if (fcport->port_type == FCT_INITIATOR)
  2468. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2469. if (fcport->port_type == FCT_TARGET)
  2470. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2471. fc_remote_port_rolechg(rport, rport_ids.roles);
  2472. }
  2473. /*
  2474. * qla2x00_update_fcport
  2475. * Updates device on list.
  2476. *
  2477. * Input:
  2478. * ha = adapter block pointer.
  2479. * fcport = port structure pointer.
  2480. *
  2481. * Return:
  2482. * 0 - Success
  2483. * BIT_0 - error
  2484. *
  2485. * Context:
  2486. * Kernel context.
  2487. */
  2488. void
  2489. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2490. {
  2491. struct qla_hw_data *ha = vha->hw;
  2492. fcport->vha = vha;
  2493. fcport->login_retry = 0;
  2494. fcport->port_login_retry_count = ha->port_down_retry_count *
  2495. PORT_RETRY_TIME;
  2496. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2497. PORT_RETRY_TIME);
  2498. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2499. qla2x00_iidma_fcport(vha, fcport);
  2500. atomic_set(&fcport->state, FCS_ONLINE);
  2501. qla2x00_reg_remote_port(vha, fcport);
  2502. }
  2503. /*
  2504. * qla2x00_configure_fabric
  2505. * Setup SNS devices with loop ID's.
  2506. *
  2507. * Input:
  2508. * ha = adapter block pointer.
  2509. *
  2510. * Returns:
  2511. * 0 = success.
  2512. * BIT_0 = error
  2513. */
  2514. static int
  2515. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2516. {
  2517. int rval, rval2;
  2518. fc_port_t *fcport, *fcptemp;
  2519. uint16_t next_loopid;
  2520. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2521. uint16_t loop_id;
  2522. LIST_HEAD(new_fcports);
  2523. struct qla_hw_data *ha = vha->hw;
  2524. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2525. /* If FL port exists, then SNS is present */
  2526. if (IS_FWI2_CAPABLE(ha))
  2527. loop_id = NPH_F_PORT;
  2528. else
  2529. loop_id = SNS_FL_PORT;
  2530. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2531. if (rval != QLA_SUCCESS) {
  2532. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2533. "Port\n", vha->host_no));
  2534. vha->device_flags &= ~SWITCH_FOUND;
  2535. return (QLA_SUCCESS);
  2536. }
  2537. vha->device_flags |= SWITCH_FOUND;
  2538. /* Mark devices that need re-synchronization. */
  2539. rval2 = qla2x00_device_resync(vha);
  2540. if (rval2 == QLA_RSCNS_HANDLED) {
  2541. /* No point doing the scan, just continue. */
  2542. return (QLA_SUCCESS);
  2543. }
  2544. do {
  2545. /* FDMI support. */
  2546. if (ql2xfdmienable &&
  2547. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2548. qla2x00_fdmi_register(vha);
  2549. /* Ensure we are logged into the SNS. */
  2550. if (IS_FWI2_CAPABLE(ha))
  2551. loop_id = NPH_SNS;
  2552. else
  2553. loop_id = SIMPLE_NAME_SERVER;
  2554. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2555. 0xfc, mb, BIT_1 | BIT_0);
  2556. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2557. DEBUG2(qla_printk(KERN_INFO, ha,
  2558. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2559. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2560. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2561. return (QLA_SUCCESS);
  2562. }
  2563. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2564. if (qla2x00_rft_id(vha)) {
  2565. /* EMPTY */
  2566. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2567. "TYPE failed.\n", vha->host_no));
  2568. }
  2569. if (qla2x00_rff_id(vha)) {
  2570. /* EMPTY */
  2571. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2572. "Features failed.\n", vha->host_no));
  2573. }
  2574. if (qla2x00_rnn_id(vha)) {
  2575. /* EMPTY */
  2576. DEBUG2(printk("scsi(%ld): Register Node Name "
  2577. "failed.\n", vha->host_no));
  2578. } else if (qla2x00_rsnn_nn(vha)) {
  2579. /* EMPTY */
  2580. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2581. "Node Name failed.\n", vha->host_no));
  2582. }
  2583. }
  2584. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2585. if (rval != QLA_SUCCESS)
  2586. break;
  2587. /*
  2588. * Logout all previous fabric devices marked lost, except
  2589. * FCP2 devices.
  2590. */
  2591. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2592. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2593. break;
  2594. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2595. continue;
  2596. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2597. qla2x00_mark_device_lost(vha, fcport,
  2598. ql2xplogiabsentdevice, 0);
  2599. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2600. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2601. fcport->port_type != FCT_INITIATOR &&
  2602. fcport->port_type != FCT_BROADCAST) {
  2603. ha->isp_ops->fabric_logout(vha,
  2604. fcport->loop_id,
  2605. fcport->d_id.b.domain,
  2606. fcport->d_id.b.area,
  2607. fcport->d_id.b.al_pa);
  2608. fcport->loop_id = FC_NO_LOOP_ID;
  2609. }
  2610. }
  2611. }
  2612. /* Starting free loop ID. */
  2613. next_loopid = ha->min_external_loopid;
  2614. /*
  2615. * Scan through our port list and login entries that need to be
  2616. * logged in.
  2617. */
  2618. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2619. if (atomic_read(&vha->loop_down_timer) ||
  2620. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2621. break;
  2622. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2623. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2624. continue;
  2625. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2626. fcport->loop_id = next_loopid;
  2627. rval = qla2x00_find_new_loop_id(
  2628. base_vha, fcport);
  2629. if (rval != QLA_SUCCESS) {
  2630. /* Ran out of IDs to use */
  2631. break;
  2632. }
  2633. }
  2634. /* Login and update database */
  2635. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2636. }
  2637. /* Exit if out of loop IDs. */
  2638. if (rval != QLA_SUCCESS) {
  2639. break;
  2640. }
  2641. /*
  2642. * Login and add the new devices to our port list.
  2643. */
  2644. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2645. if (atomic_read(&vha->loop_down_timer) ||
  2646. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2647. break;
  2648. /* Find a new loop ID to use. */
  2649. fcport->loop_id = next_loopid;
  2650. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2651. if (rval != QLA_SUCCESS) {
  2652. /* Ran out of IDs to use */
  2653. break;
  2654. }
  2655. /* Login and update database */
  2656. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2657. if (vha->vp_idx) {
  2658. fcport->vha = vha;
  2659. fcport->vp_idx = vha->vp_idx;
  2660. }
  2661. list_move_tail(&fcport->list, &vha->vp_fcports);
  2662. }
  2663. } while (0);
  2664. /* Free all new device structures not processed. */
  2665. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2666. list_del(&fcport->list);
  2667. kfree(fcport);
  2668. }
  2669. if (rval) {
  2670. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2671. "rval=%d\n", vha->host_no, rval));
  2672. }
  2673. return (rval);
  2674. }
  2675. /*
  2676. * qla2x00_find_all_fabric_devs
  2677. *
  2678. * Input:
  2679. * ha = adapter block pointer.
  2680. * dev = database device entry pointer.
  2681. *
  2682. * Returns:
  2683. * 0 = success.
  2684. *
  2685. * Context:
  2686. * Kernel context.
  2687. */
  2688. static int
  2689. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2690. struct list_head *new_fcports)
  2691. {
  2692. int rval;
  2693. uint16_t loop_id;
  2694. fc_port_t *fcport, *new_fcport, *fcptemp;
  2695. int found;
  2696. sw_info_t *swl;
  2697. int swl_idx;
  2698. int first_dev, last_dev;
  2699. port_id_t wrap = {}, nxt_d_id;
  2700. struct qla_hw_data *ha = vha->hw;
  2701. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2702. struct scsi_qla_host *tvp;
  2703. rval = QLA_SUCCESS;
  2704. /* Try GID_PT to get device list, else GAN. */
  2705. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2706. if (!swl) {
  2707. /*EMPTY*/
  2708. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2709. "on GA_NXT\n", vha->host_no));
  2710. } else {
  2711. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2712. kfree(swl);
  2713. swl = NULL;
  2714. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2715. kfree(swl);
  2716. swl = NULL;
  2717. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2718. kfree(swl);
  2719. swl = NULL;
  2720. } else if (ql2xiidmaenable &&
  2721. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2722. qla2x00_gpsc(vha, swl);
  2723. }
  2724. /* If other queries succeeded probe for FC-4 type */
  2725. if (swl)
  2726. qla2x00_gff_id(vha, swl);
  2727. }
  2728. swl_idx = 0;
  2729. /* Allocate temporary fcport for any new fcports discovered. */
  2730. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2731. if (new_fcport == NULL) {
  2732. kfree(swl);
  2733. return (QLA_MEMORY_ALLOC_FAILED);
  2734. }
  2735. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2736. /* Set start port ID scan at adapter ID. */
  2737. first_dev = 1;
  2738. last_dev = 0;
  2739. /* Starting free loop ID. */
  2740. loop_id = ha->min_external_loopid;
  2741. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2742. if (qla2x00_is_reserved_id(vha, loop_id))
  2743. continue;
  2744. if (ha->current_topology == ISP_CFG_FL &&
  2745. (atomic_read(&vha->loop_down_timer) ||
  2746. LOOP_TRANSITION(vha))) {
  2747. atomic_set(&vha->loop_down_timer, 0);
  2748. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2749. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2750. break;
  2751. }
  2752. if (swl != NULL) {
  2753. if (last_dev) {
  2754. wrap.b24 = new_fcport->d_id.b24;
  2755. } else {
  2756. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2757. memcpy(new_fcport->node_name,
  2758. swl[swl_idx].node_name, WWN_SIZE);
  2759. memcpy(new_fcport->port_name,
  2760. swl[swl_idx].port_name, WWN_SIZE);
  2761. memcpy(new_fcport->fabric_port_name,
  2762. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2763. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2764. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2765. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2766. last_dev = 1;
  2767. }
  2768. swl_idx++;
  2769. }
  2770. } else {
  2771. /* Send GA_NXT to the switch */
  2772. rval = qla2x00_ga_nxt(vha, new_fcport);
  2773. if (rval != QLA_SUCCESS) {
  2774. qla_printk(KERN_WARNING, ha,
  2775. "SNS scan failed -- assuming zero-entry "
  2776. "result...\n");
  2777. list_for_each_entry_safe(fcport, fcptemp,
  2778. new_fcports, list) {
  2779. list_del(&fcport->list);
  2780. kfree(fcport);
  2781. }
  2782. rval = QLA_SUCCESS;
  2783. break;
  2784. }
  2785. }
  2786. /* If wrap on switch device list, exit. */
  2787. if (first_dev) {
  2788. wrap.b24 = new_fcport->d_id.b24;
  2789. first_dev = 0;
  2790. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2791. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2792. vha->host_no, new_fcport->d_id.b.domain,
  2793. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2794. break;
  2795. }
  2796. /* Bypass if same physical adapter. */
  2797. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2798. continue;
  2799. /* Bypass virtual ports of the same host. */
  2800. found = 0;
  2801. if (ha->num_vhosts) {
  2802. unsigned long flags;
  2803. spin_lock_irqsave(&ha->vport_slock, flags);
  2804. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2805. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2806. found = 1;
  2807. break;
  2808. }
  2809. }
  2810. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2811. if (found)
  2812. continue;
  2813. }
  2814. /* Bypass if same domain and area of adapter. */
  2815. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2816. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2817. ISP_CFG_FL)
  2818. continue;
  2819. /* Bypass reserved domain fields. */
  2820. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2821. continue;
  2822. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2823. if (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2824. new_fcport->fc4_type != FC4_TYPE_UNKNOWN)
  2825. continue;
  2826. /* Locate matching device in database. */
  2827. found = 0;
  2828. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2829. if (memcmp(new_fcport->port_name, fcport->port_name,
  2830. WWN_SIZE))
  2831. continue;
  2832. found++;
  2833. /* Update port state. */
  2834. memcpy(fcport->fabric_port_name,
  2835. new_fcport->fabric_port_name, WWN_SIZE);
  2836. fcport->fp_speed = new_fcport->fp_speed;
  2837. /*
  2838. * If address the same and state FCS_ONLINE, nothing
  2839. * changed.
  2840. */
  2841. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2842. atomic_read(&fcport->state) == FCS_ONLINE) {
  2843. break;
  2844. }
  2845. /*
  2846. * If device was not a fabric device before.
  2847. */
  2848. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2849. fcport->d_id.b24 = new_fcport->d_id.b24;
  2850. fcport->loop_id = FC_NO_LOOP_ID;
  2851. fcport->flags |= (FCF_FABRIC_DEVICE |
  2852. FCF_LOGIN_NEEDED);
  2853. break;
  2854. }
  2855. /*
  2856. * Port ID changed or device was marked to be updated;
  2857. * Log it out if still logged in and mark it for
  2858. * relogin later.
  2859. */
  2860. fcport->d_id.b24 = new_fcport->d_id.b24;
  2861. fcport->flags |= FCF_LOGIN_NEEDED;
  2862. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2863. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2864. fcport->port_type != FCT_INITIATOR &&
  2865. fcport->port_type != FCT_BROADCAST) {
  2866. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2867. fcport->d_id.b.domain, fcport->d_id.b.area,
  2868. fcport->d_id.b.al_pa);
  2869. fcport->loop_id = FC_NO_LOOP_ID;
  2870. }
  2871. break;
  2872. }
  2873. if (found)
  2874. continue;
  2875. /* If device was not in our fcports list, then add it. */
  2876. list_add_tail(&new_fcport->list, new_fcports);
  2877. /* Allocate a new replacement fcport. */
  2878. nxt_d_id.b24 = new_fcport->d_id.b24;
  2879. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2880. if (new_fcport == NULL) {
  2881. kfree(swl);
  2882. return (QLA_MEMORY_ALLOC_FAILED);
  2883. }
  2884. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2885. new_fcport->d_id.b24 = nxt_d_id.b24;
  2886. }
  2887. kfree(swl);
  2888. kfree(new_fcport);
  2889. return (rval);
  2890. }
  2891. /*
  2892. * qla2x00_find_new_loop_id
  2893. * Scan through our port list and find a new usable loop ID.
  2894. *
  2895. * Input:
  2896. * ha: adapter state pointer.
  2897. * dev: port structure pointer.
  2898. *
  2899. * Returns:
  2900. * qla2x00 local function return status code.
  2901. *
  2902. * Context:
  2903. * Kernel context.
  2904. */
  2905. static int
  2906. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2907. {
  2908. int rval;
  2909. int found;
  2910. fc_port_t *fcport;
  2911. uint16_t first_loop_id;
  2912. struct qla_hw_data *ha = vha->hw;
  2913. struct scsi_qla_host *vp;
  2914. struct scsi_qla_host *tvp;
  2915. unsigned long flags = 0;
  2916. rval = QLA_SUCCESS;
  2917. /* Save starting loop ID. */
  2918. first_loop_id = dev->loop_id;
  2919. for (;;) {
  2920. /* Skip loop ID if already used by adapter. */
  2921. if (dev->loop_id == vha->loop_id)
  2922. dev->loop_id++;
  2923. /* Skip reserved loop IDs. */
  2924. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2925. dev->loop_id++;
  2926. /* Reset loop ID if passed the end. */
  2927. if (dev->loop_id > ha->max_loop_id) {
  2928. /* first loop ID. */
  2929. dev->loop_id = ha->min_external_loopid;
  2930. }
  2931. /* Check for loop ID being already in use. */
  2932. found = 0;
  2933. fcport = NULL;
  2934. spin_lock_irqsave(&ha->vport_slock, flags);
  2935. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2936. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2937. if (fcport->loop_id == dev->loop_id &&
  2938. fcport != dev) {
  2939. /* ID possibly in use */
  2940. found++;
  2941. break;
  2942. }
  2943. }
  2944. if (found)
  2945. break;
  2946. }
  2947. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2948. /* If not in use then it is free to use. */
  2949. if (!found) {
  2950. break;
  2951. }
  2952. /* ID in use. Try next value. */
  2953. dev->loop_id++;
  2954. /* If wrap around. No free ID to use. */
  2955. if (dev->loop_id == first_loop_id) {
  2956. dev->loop_id = FC_NO_LOOP_ID;
  2957. rval = QLA_FUNCTION_FAILED;
  2958. break;
  2959. }
  2960. }
  2961. return (rval);
  2962. }
  2963. /*
  2964. * qla2x00_device_resync
  2965. * Marks devices in the database that needs resynchronization.
  2966. *
  2967. * Input:
  2968. * ha = adapter block pointer.
  2969. *
  2970. * Context:
  2971. * Kernel context.
  2972. */
  2973. static int
  2974. qla2x00_device_resync(scsi_qla_host_t *vha)
  2975. {
  2976. int rval;
  2977. uint32_t mask;
  2978. fc_port_t *fcport;
  2979. uint32_t rscn_entry;
  2980. uint8_t rscn_out_iter;
  2981. uint8_t format;
  2982. port_id_t d_id = {};
  2983. rval = QLA_RSCNS_HANDLED;
  2984. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2985. vha->flags.rscn_queue_overflow) {
  2986. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2987. format = MSB(MSW(rscn_entry));
  2988. d_id.b.domain = LSB(MSW(rscn_entry));
  2989. d_id.b.area = MSB(LSW(rscn_entry));
  2990. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2991. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2992. "[%02x/%02x%02x%02x].\n",
  2993. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2994. d_id.b.area, d_id.b.al_pa));
  2995. vha->rscn_out_ptr++;
  2996. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2997. vha->rscn_out_ptr = 0;
  2998. /* Skip duplicate entries. */
  2999. for (rscn_out_iter = vha->rscn_out_ptr;
  3000. !vha->flags.rscn_queue_overflow &&
  3001. rscn_out_iter != vha->rscn_in_ptr;
  3002. rscn_out_iter = (rscn_out_iter ==
  3003. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  3004. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  3005. break;
  3006. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  3007. "entry found at [%d].\n", vha->host_no,
  3008. rscn_out_iter));
  3009. vha->rscn_out_ptr = rscn_out_iter;
  3010. }
  3011. /* Queue overflow, set switch default case. */
  3012. if (vha->flags.rscn_queue_overflow) {
  3013. DEBUG(printk("scsi(%ld): device_resync: rscn "
  3014. "overflow.\n", vha->host_no));
  3015. format = 3;
  3016. vha->flags.rscn_queue_overflow = 0;
  3017. }
  3018. switch (format) {
  3019. case 0:
  3020. mask = 0xffffff;
  3021. break;
  3022. case 1:
  3023. mask = 0xffff00;
  3024. break;
  3025. case 2:
  3026. mask = 0xff0000;
  3027. break;
  3028. default:
  3029. mask = 0x0;
  3030. d_id.b24 = 0;
  3031. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3032. break;
  3033. }
  3034. rval = QLA_SUCCESS;
  3035. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3036. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3037. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3038. fcport->port_type == FCT_BROADCAST)
  3039. continue;
  3040. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3041. if (format != 3 ||
  3042. fcport->port_type != FCT_INITIATOR) {
  3043. qla2x00_mark_device_lost(vha, fcport,
  3044. 0, 0);
  3045. }
  3046. }
  3047. }
  3048. }
  3049. return (rval);
  3050. }
  3051. /*
  3052. * qla2x00_fabric_dev_login
  3053. * Login fabric target device and update FC port database.
  3054. *
  3055. * Input:
  3056. * ha: adapter state pointer.
  3057. * fcport: port structure list pointer.
  3058. * next_loopid: contains value of a new loop ID that can be used
  3059. * by the next login attempt.
  3060. *
  3061. * Returns:
  3062. * qla2x00 local function return status code.
  3063. *
  3064. * Context:
  3065. * Kernel context.
  3066. */
  3067. static int
  3068. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3069. uint16_t *next_loopid)
  3070. {
  3071. int rval;
  3072. int retry;
  3073. uint8_t opts;
  3074. struct qla_hw_data *ha = vha->hw;
  3075. rval = QLA_SUCCESS;
  3076. retry = 0;
  3077. if (IS_ALOGIO_CAPABLE(ha)) {
  3078. if (fcport->flags & FCF_ASYNC_SENT)
  3079. return rval;
  3080. fcport->flags |= FCF_ASYNC_SENT;
  3081. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3082. if (!rval)
  3083. return rval;
  3084. }
  3085. fcport->flags &= ~FCF_ASYNC_SENT;
  3086. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3087. if (rval == QLA_SUCCESS) {
  3088. /* Send an ADISC to FCP2 devices.*/
  3089. opts = 0;
  3090. if (fcport->flags & FCF_FCP2_DEVICE)
  3091. opts |= BIT_1;
  3092. rval = qla2x00_get_port_database(vha, fcport, opts);
  3093. if (rval != QLA_SUCCESS) {
  3094. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3095. fcport->d_id.b.domain, fcport->d_id.b.area,
  3096. fcport->d_id.b.al_pa);
  3097. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3098. } else {
  3099. qla2x00_update_fcport(vha, fcport);
  3100. }
  3101. }
  3102. return (rval);
  3103. }
  3104. /*
  3105. * qla2x00_fabric_login
  3106. * Issue fabric login command.
  3107. *
  3108. * Input:
  3109. * ha = adapter block pointer.
  3110. * device = pointer to FC device type structure.
  3111. *
  3112. * Returns:
  3113. * 0 - Login successfully
  3114. * 1 - Login failed
  3115. * 2 - Initiator device
  3116. * 3 - Fatal error
  3117. */
  3118. int
  3119. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3120. uint16_t *next_loopid)
  3121. {
  3122. int rval;
  3123. int retry;
  3124. uint16_t tmp_loopid;
  3125. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3126. struct qla_hw_data *ha = vha->hw;
  3127. retry = 0;
  3128. tmp_loopid = 0;
  3129. for (;;) {
  3130. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3131. "for port %02x%02x%02x.\n",
  3132. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3133. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3134. /* Login fcport on switch. */
  3135. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3136. fcport->d_id.b.domain, fcport->d_id.b.area,
  3137. fcport->d_id.b.al_pa, mb, BIT_0);
  3138. if (mb[0] == MBS_PORT_ID_USED) {
  3139. /*
  3140. * Device has another loop ID. The firmware team
  3141. * recommends the driver perform an implicit login with
  3142. * the specified ID again. The ID we just used is save
  3143. * here so we return with an ID that can be tried by
  3144. * the next login.
  3145. */
  3146. retry++;
  3147. tmp_loopid = fcport->loop_id;
  3148. fcport->loop_id = mb[1];
  3149. DEBUG(printk("Fabric Login: port in use - next "
  3150. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3151. fcport->loop_id, fcport->d_id.b.domain,
  3152. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3153. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3154. /*
  3155. * Login succeeded.
  3156. */
  3157. if (retry) {
  3158. /* A retry occurred before. */
  3159. *next_loopid = tmp_loopid;
  3160. } else {
  3161. /*
  3162. * No retry occurred before. Just increment the
  3163. * ID value for next login.
  3164. */
  3165. *next_loopid = (fcport->loop_id + 1);
  3166. }
  3167. if (mb[1] & BIT_0) {
  3168. fcport->port_type = FCT_INITIATOR;
  3169. } else {
  3170. fcport->port_type = FCT_TARGET;
  3171. if (mb[1] & BIT_1) {
  3172. fcport->flags |= FCF_FCP2_DEVICE;
  3173. }
  3174. }
  3175. if (mb[10] & BIT_0)
  3176. fcport->supported_classes |= FC_COS_CLASS2;
  3177. if (mb[10] & BIT_1)
  3178. fcport->supported_classes |= FC_COS_CLASS3;
  3179. rval = QLA_SUCCESS;
  3180. break;
  3181. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3182. /*
  3183. * Loop ID already used, try next loop ID.
  3184. */
  3185. fcport->loop_id++;
  3186. rval = qla2x00_find_new_loop_id(vha, fcport);
  3187. if (rval != QLA_SUCCESS) {
  3188. /* Ran out of loop IDs to use */
  3189. break;
  3190. }
  3191. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3192. /*
  3193. * Firmware possibly timed out during login. If NO
  3194. * retries are left to do then the device is declared
  3195. * dead.
  3196. */
  3197. *next_loopid = fcport->loop_id;
  3198. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3199. fcport->d_id.b.domain, fcport->d_id.b.area,
  3200. fcport->d_id.b.al_pa);
  3201. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3202. rval = 1;
  3203. break;
  3204. } else {
  3205. /*
  3206. * unrecoverable / not handled error
  3207. */
  3208. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3209. "loop_id=%x jiffies=%lx.\n",
  3210. __func__, vha->host_no, mb[0],
  3211. fcport->d_id.b.domain, fcport->d_id.b.area,
  3212. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3213. *next_loopid = fcport->loop_id;
  3214. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3215. fcport->d_id.b.domain, fcport->d_id.b.area,
  3216. fcport->d_id.b.al_pa);
  3217. fcport->loop_id = FC_NO_LOOP_ID;
  3218. fcport->login_retry = 0;
  3219. rval = 3;
  3220. break;
  3221. }
  3222. }
  3223. return (rval);
  3224. }
  3225. /*
  3226. * qla2x00_local_device_login
  3227. * Issue local device login command.
  3228. *
  3229. * Input:
  3230. * ha = adapter block pointer.
  3231. * loop_id = loop id of device to login to.
  3232. *
  3233. * Returns (Where's the #define!!!!):
  3234. * 0 - Login successfully
  3235. * 1 - Login failed
  3236. * 3 - Fatal error
  3237. */
  3238. int
  3239. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3240. {
  3241. int rval;
  3242. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3243. memset(mb, 0, sizeof(mb));
  3244. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3245. if (rval == QLA_SUCCESS) {
  3246. /* Interrogate mailbox registers for any errors */
  3247. if (mb[0] == MBS_COMMAND_ERROR)
  3248. rval = 1;
  3249. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3250. /* device not in PCB table */
  3251. rval = 3;
  3252. }
  3253. return (rval);
  3254. }
  3255. /*
  3256. * qla2x00_loop_resync
  3257. * Resync with fibre channel devices.
  3258. *
  3259. * Input:
  3260. * ha = adapter block pointer.
  3261. *
  3262. * Returns:
  3263. * 0 = success
  3264. */
  3265. int
  3266. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3267. {
  3268. int rval = QLA_SUCCESS;
  3269. uint32_t wait_time;
  3270. struct req_que *req;
  3271. struct rsp_que *rsp;
  3272. if (vha->hw->flags.cpu_affinity_enabled)
  3273. req = vha->hw->req_q_map[0];
  3274. else
  3275. req = vha->req;
  3276. rsp = req->rsp;
  3277. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3278. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3279. if (vha->flags.online) {
  3280. if (!(rval = qla2x00_fw_ready(vha))) {
  3281. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3282. wait_time = 256;
  3283. do {
  3284. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3285. /* Issue a marker after FW becomes ready. */
  3286. qla2x00_marker(vha, req, rsp, 0, 0,
  3287. MK_SYNC_ALL);
  3288. vha->marker_needed = 0;
  3289. /* Remap devices on Loop. */
  3290. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3291. qla2x00_configure_loop(vha);
  3292. wait_time--;
  3293. } while (!atomic_read(&vha->loop_down_timer) &&
  3294. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3295. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3296. &vha->dpc_flags)));
  3297. }
  3298. }
  3299. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3300. return (QLA_FUNCTION_FAILED);
  3301. if (rval)
  3302. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3303. return (rval);
  3304. }
  3305. void
  3306. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3307. {
  3308. fc_port_t *fcport;
  3309. struct scsi_qla_host *vha;
  3310. struct qla_hw_data *ha = base_vha->hw;
  3311. unsigned long flags;
  3312. spin_lock_irqsave(&ha->vport_slock, flags);
  3313. /* Go with deferred removal of rport references. */
  3314. list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
  3315. atomic_inc(&vha->vref_count);
  3316. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3317. if (fcport && fcport->drport &&
  3318. atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
  3319. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3320. qla2x00_rport_del(fcport);
  3321. spin_lock_irqsave(&ha->vport_slock, flags);
  3322. }
  3323. }
  3324. atomic_dec(&vha->vref_count);
  3325. }
  3326. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3327. }
  3328. void
  3329. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3330. {
  3331. struct qla_hw_data *ha = vha->hw;
  3332. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  3333. unsigned long flags;
  3334. vha->flags.online = 0;
  3335. ha->flags.chip_reset_done = 0;
  3336. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3337. ha->qla_stats.total_isp_aborts++;
  3338. qla_printk(KERN_INFO, ha,
  3339. "Performing ISP error recovery - ha= %p.\n", ha);
  3340. /* Chip reset does not apply to 82XX */
  3341. if (!IS_QLA82XX(ha))
  3342. ha->isp_ops->reset_chip(vha);
  3343. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3344. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3345. atomic_set(&vha->loop_state, LOOP_DOWN);
  3346. qla2x00_mark_all_devices_lost(vha, 0);
  3347. spin_lock_irqsave(&ha->vport_slock, flags);
  3348. list_for_each_entry(vp, &base_vha->hw->vp_list, list) {
  3349. atomic_inc(&vp->vref_count);
  3350. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3351. qla2x00_mark_all_devices_lost(vp, 0);
  3352. spin_lock_irqsave(&ha->vport_slock, flags);
  3353. atomic_dec(&vp->vref_count);
  3354. }
  3355. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3356. } else {
  3357. if (!atomic_read(&vha->loop_down_timer))
  3358. atomic_set(&vha->loop_down_timer,
  3359. LOOP_DOWN_TIME);
  3360. }
  3361. if (!ha->flags.eeh_busy) {
  3362. /* Make sure for ISP 82XX IO DMA is complete */
  3363. if (IS_QLA82XX(ha)) {
  3364. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  3365. WAIT_HOST) == QLA_SUCCESS) {
  3366. DEBUG2(qla_printk(KERN_INFO, ha,
  3367. "Done wait for pending commands\n"));
  3368. }
  3369. }
  3370. /* Requeue all commands in outstanding command list. */
  3371. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3372. }
  3373. }
  3374. /*
  3375. * qla2x00_abort_isp
  3376. * Resets ISP and aborts all outstanding commands.
  3377. *
  3378. * Input:
  3379. * ha = adapter block pointer.
  3380. *
  3381. * Returns:
  3382. * 0 = success
  3383. */
  3384. int
  3385. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3386. {
  3387. int rval;
  3388. uint8_t status = 0;
  3389. struct qla_hw_data *ha = vha->hw;
  3390. struct scsi_qla_host *vp;
  3391. struct req_que *req = ha->req_q_map[0];
  3392. unsigned long flags;
  3393. if (vha->flags.online) {
  3394. qla2x00_abort_isp_cleanup(vha);
  3395. if (unlikely(pci_channel_offline(ha->pdev) &&
  3396. ha->flags.pci_channel_io_perm_failure)) {
  3397. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3398. status = 0;
  3399. return status;
  3400. }
  3401. ha->isp_ops->get_flash_version(vha, req->ring);
  3402. ha->isp_ops->nvram_config(vha);
  3403. if (!qla2x00_restart_isp(vha)) {
  3404. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3405. if (!atomic_read(&vha->loop_down_timer)) {
  3406. /*
  3407. * Issue marker command only when we are going
  3408. * to start the I/O .
  3409. */
  3410. vha->marker_needed = 1;
  3411. }
  3412. vha->flags.online = 1;
  3413. ha->isp_ops->enable_intrs(ha);
  3414. ha->isp_abort_cnt = 0;
  3415. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3416. if (IS_QLA81XX(ha))
  3417. qla2x00_get_fw_version(vha,
  3418. &ha->fw_major_version,
  3419. &ha->fw_minor_version,
  3420. &ha->fw_subminor_version,
  3421. &ha->fw_attributes, &ha->fw_memory_size,
  3422. ha->mpi_version, &ha->mpi_capabilities,
  3423. ha->phy_version);
  3424. if (ha->fce) {
  3425. ha->flags.fce_enabled = 1;
  3426. memset(ha->fce, 0,
  3427. fce_calc_size(ha->fce_bufs));
  3428. rval = qla2x00_enable_fce_trace(vha,
  3429. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3430. &ha->fce_bufs);
  3431. if (rval) {
  3432. qla_printk(KERN_WARNING, ha,
  3433. "Unable to reinitialize FCE "
  3434. "(%d).\n", rval);
  3435. ha->flags.fce_enabled = 0;
  3436. }
  3437. }
  3438. if (ha->eft) {
  3439. memset(ha->eft, 0, EFT_SIZE);
  3440. rval = qla2x00_enable_eft_trace(vha,
  3441. ha->eft_dma, EFT_NUM_BUFFERS);
  3442. if (rval) {
  3443. qla_printk(KERN_WARNING, ha,
  3444. "Unable to reinitialize EFT "
  3445. "(%d).\n", rval);
  3446. }
  3447. }
  3448. } else { /* failed the ISP abort */
  3449. vha->flags.online = 1;
  3450. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3451. if (ha->isp_abort_cnt == 0) {
  3452. qla_printk(KERN_WARNING, ha,
  3453. "ISP error recovery failed - "
  3454. "board disabled\n");
  3455. /*
  3456. * The next call disables the board
  3457. * completely.
  3458. */
  3459. ha->isp_ops->reset_adapter(vha);
  3460. vha->flags.online = 0;
  3461. clear_bit(ISP_ABORT_RETRY,
  3462. &vha->dpc_flags);
  3463. status = 0;
  3464. } else { /* schedule another ISP abort */
  3465. ha->isp_abort_cnt--;
  3466. DEBUG(printk("qla%ld: ISP abort - "
  3467. "retry remaining %d\n",
  3468. vha->host_no, ha->isp_abort_cnt));
  3469. status = 1;
  3470. }
  3471. } else {
  3472. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3473. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3474. "- retrying (%d) more times\n",
  3475. vha->host_no, ha->isp_abort_cnt));
  3476. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3477. status = 1;
  3478. }
  3479. }
  3480. }
  3481. if (!status) {
  3482. DEBUG(printk(KERN_INFO
  3483. "qla2x00_abort_isp(%ld): succeeded.\n",
  3484. vha->host_no));
  3485. spin_lock_irqsave(&ha->vport_slock, flags);
  3486. list_for_each_entry(vp, &ha->vp_list, list) {
  3487. if (vp->vp_idx) {
  3488. atomic_inc(&vp->vref_count);
  3489. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3490. qla2x00_vp_abort_isp(vp);
  3491. spin_lock_irqsave(&ha->vport_slock, flags);
  3492. atomic_dec(&vp->vref_count);
  3493. }
  3494. }
  3495. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3496. } else {
  3497. qla_printk(KERN_INFO, ha,
  3498. "qla2x00_abort_isp: **** FAILED ****\n");
  3499. }
  3500. return(status);
  3501. }
  3502. /*
  3503. * qla2x00_restart_isp
  3504. * restarts the ISP after a reset
  3505. *
  3506. * Input:
  3507. * ha = adapter block pointer.
  3508. *
  3509. * Returns:
  3510. * 0 = success
  3511. */
  3512. static int
  3513. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3514. {
  3515. int status = 0;
  3516. uint32_t wait_time;
  3517. struct qla_hw_data *ha = vha->hw;
  3518. struct req_que *req = ha->req_q_map[0];
  3519. struct rsp_que *rsp = ha->rsp_q_map[0];
  3520. /* If firmware needs to be loaded */
  3521. if (qla2x00_isp_firmware(vha)) {
  3522. vha->flags.online = 0;
  3523. status = ha->isp_ops->chip_diag(vha);
  3524. if (!status)
  3525. status = qla2x00_setup_chip(vha);
  3526. }
  3527. if (!status && !(status = qla2x00_init_rings(vha))) {
  3528. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3529. ha->flags.chip_reset_done = 1;
  3530. /* Initialize the queues in use */
  3531. qla25xx_init_queues(ha);
  3532. status = qla2x00_fw_ready(vha);
  3533. if (!status) {
  3534. DEBUG(printk("%s(): Start configure loop, "
  3535. "status = %d\n", __func__, status));
  3536. /* Issue a marker after FW becomes ready. */
  3537. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3538. vha->flags.online = 1;
  3539. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3540. wait_time = 256;
  3541. do {
  3542. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3543. qla2x00_configure_loop(vha);
  3544. wait_time--;
  3545. } while (!atomic_read(&vha->loop_down_timer) &&
  3546. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3547. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3548. &vha->dpc_flags)));
  3549. }
  3550. /* if no cable then assume it's good */
  3551. if ((vha->device_flags & DFLG_NO_CABLE))
  3552. status = 0;
  3553. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3554. __func__,
  3555. status));
  3556. }
  3557. return (status);
  3558. }
  3559. static int
  3560. qla25xx_init_queues(struct qla_hw_data *ha)
  3561. {
  3562. struct rsp_que *rsp = NULL;
  3563. struct req_que *req = NULL;
  3564. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3565. int ret = -1;
  3566. int i;
  3567. for (i = 1; i < ha->max_rsp_queues; i++) {
  3568. rsp = ha->rsp_q_map[i];
  3569. if (rsp) {
  3570. rsp->options &= ~BIT_0;
  3571. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3572. if (ret != QLA_SUCCESS)
  3573. DEBUG2_17(printk(KERN_WARNING
  3574. "%s Rsp que:%d init failed\n", __func__,
  3575. rsp->id));
  3576. else
  3577. DEBUG2_17(printk(KERN_INFO
  3578. "%s Rsp que:%d inited\n", __func__,
  3579. rsp->id));
  3580. }
  3581. }
  3582. for (i = 1; i < ha->max_req_queues; i++) {
  3583. req = ha->req_q_map[i];
  3584. if (req) {
  3585. /* Clear outstanding commands array. */
  3586. req->options &= ~BIT_0;
  3587. ret = qla25xx_init_req_que(base_vha, req);
  3588. if (ret != QLA_SUCCESS)
  3589. DEBUG2_17(printk(KERN_WARNING
  3590. "%s Req que:%d init failed\n", __func__,
  3591. req->id));
  3592. else
  3593. DEBUG2_17(printk(KERN_WARNING
  3594. "%s Req que:%d inited\n", __func__,
  3595. req->id));
  3596. }
  3597. }
  3598. return ret;
  3599. }
  3600. /*
  3601. * qla2x00_reset_adapter
  3602. * Reset adapter.
  3603. *
  3604. * Input:
  3605. * ha = adapter block pointer.
  3606. */
  3607. void
  3608. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3609. {
  3610. unsigned long flags = 0;
  3611. struct qla_hw_data *ha = vha->hw;
  3612. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3613. vha->flags.online = 0;
  3614. ha->isp_ops->disable_intrs(ha);
  3615. spin_lock_irqsave(&ha->hardware_lock, flags);
  3616. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3617. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3618. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3619. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3620. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3621. }
  3622. void
  3623. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3624. {
  3625. unsigned long flags = 0;
  3626. struct qla_hw_data *ha = vha->hw;
  3627. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3628. if (IS_QLA82XX(ha))
  3629. return;
  3630. vha->flags.online = 0;
  3631. ha->isp_ops->disable_intrs(ha);
  3632. spin_lock_irqsave(&ha->hardware_lock, flags);
  3633. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3634. RD_REG_DWORD(&reg->hccr);
  3635. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3636. RD_REG_DWORD(&reg->hccr);
  3637. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3638. if (IS_NOPOLLING_TYPE(ha))
  3639. ha->isp_ops->enable_intrs(ha);
  3640. }
  3641. /* On sparc systems, obtain port and node WWN from firmware
  3642. * properties.
  3643. */
  3644. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3645. struct nvram_24xx *nv)
  3646. {
  3647. #ifdef CONFIG_SPARC
  3648. struct qla_hw_data *ha = vha->hw;
  3649. struct pci_dev *pdev = ha->pdev;
  3650. struct device_node *dp = pci_device_to_OF_node(pdev);
  3651. const u8 *val;
  3652. int len;
  3653. val = of_get_property(dp, "port-wwn", &len);
  3654. if (val && len >= WWN_SIZE)
  3655. memcpy(nv->port_name, val, WWN_SIZE);
  3656. val = of_get_property(dp, "node-wwn", &len);
  3657. if (val && len >= WWN_SIZE)
  3658. memcpy(nv->node_name, val, WWN_SIZE);
  3659. #endif
  3660. }
  3661. int
  3662. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3663. {
  3664. int rval;
  3665. struct init_cb_24xx *icb;
  3666. struct nvram_24xx *nv;
  3667. uint32_t *dptr;
  3668. uint8_t *dptr1, *dptr2;
  3669. uint32_t chksum;
  3670. uint16_t cnt;
  3671. struct qla_hw_data *ha = vha->hw;
  3672. rval = QLA_SUCCESS;
  3673. icb = (struct init_cb_24xx *)ha->init_cb;
  3674. nv = ha->nvram;
  3675. /* Determine NVRAM starting address. */
  3676. if (ha->flags.port0) {
  3677. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3678. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3679. } else {
  3680. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3681. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3682. }
  3683. ha->nvram_size = sizeof(struct nvram_24xx);
  3684. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3685. if (IS_QLA82XX(ha))
  3686. ha->vpd_size = FA_VPD_SIZE_82XX;
  3687. /* Get VPD data into cache */
  3688. ha->vpd = ha->nvram + VPD_OFFSET;
  3689. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3690. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3691. /* Get NVRAM data into cache and calculate checksum. */
  3692. dptr = (uint32_t *)nv;
  3693. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3694. ha->nvram_size);
  3695. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3696. chksum += le32_to_cpu(*dptr++);
  3697. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3698. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3699. /* Bad NVRAM data, set defaults parameters. */
  3700. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3701. || nv->id[3] != ' ' ||
  3702. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3703. /* Reset NVRAM data. */
  3704. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3705. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3706. le16_to_cpu(nv->nvram_version));
  3707. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3708. "invalid -- WWPN) defaults.\n");
  3709. /*
  3710. * Set default initialization control block.
  3711. */
  3712. memset(nv, 0, ha->nvram_size);
  3713. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3714. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3715. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3716. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3717. nv->exchange_count = __constant_cpu_to_le16(0);
  3718. nv->hard_address = __constant_cpu_to_le16(124);
  3719. nv->port_name[0] = 0x21;
  3720. nv->port_name[1] = 0x00 + ha->port_no;
  3721. nv->port_name[2] = 0x00;
  3722. nv->port_name[3] = 0xe0;
  3723. nv->port_name[4] = 0x8b;
  3724. nv->port_name[5] = 0x1c;
  3725. nv->port_name[6] = 0x55;
  3726. nv->port_name[7] = 0x86;
  3727. nv->node_name[0] = 0x20;
  3728. nv->node_name[1] = 0x00;
  3729. nv->node_name[2] = 0x00;
  3730. nv->node_name[3] = 0xe0;
  3731. nv->node_name[4] = 0x8b;
  3732. nv->node_name[5] = 0x1c;
  3733. nv->node_name[6] = 0x55;
  3734. nv->node_name[7] = 0x86;
  3735. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3736. nv->login_retry_count = __constant_cpu_to_le16(8);
  3737. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3738. nv->login_timeout = __constant_cpu_to_le16(0);
  3739. nv->firmware_options_1 =
  3740. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3741. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3742. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3743. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3744. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3745. nv->efi_parameters = __constant_cpu_to_le32(0);
  3746. nv->reset_delay = 5;
  3747. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3748. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3749. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3750. rval = 1;
  3751. }
  3752. /* Reset Initialization control block */
  3753. memset(icb, 0, ha->init_cb_size);
  3754. /* Copy 1st segment. */
  3755. dptr1 = (uint8_t *)icb;
  3756. dptr2 = (uint8_t *)&nv->version;
  3757. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3758. while (cnt--)
  3759. *dptr1++ = *dptr2++;
  3760. icb->login_retry_count = nv->login_retry_count;
  3761. icb->link_down_on_nos = nv->link_down_on_nos;
  3762. /* Copy 2nd segment. */
  3763. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3764. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3765. cnt = (uint8_t *)&icb->reserved_3 -
  3766. (uint8_t *)&icb->interrupt_delay_timer;
  3767. while (cnt--)
  3768. *dptr1++ = *dptr2++;
  3769. /*
  3770. * Setup driver NVRAM options.
  3771. */
  3772. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3773. "QLA2462");
  3774. /* Use alternate WWN? */
  3775. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3776. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3777. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3778. }
  3779. /* Prepare nodename */
  3780. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3781. /*
  3782. * Firmware will apply the following mask if the nodename was
  3783. * not provided.
  3784. */
  3785. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3786. icb->node_name[0] &= 0xF0;
  3787. }
  3788. /* Set host adapter parameters. */
  3789. ha->flags.disable_risc_code_load = 0;
  3790. ha->flags.enable_lip_reset = 0;
  3791. ha->flags.enable_lip_full_login =
  3792. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3793. ha->flags.enable_target_reset =
  3794. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3795. ha->flags.enable_led_scheme = 0;
  3796. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3797. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3798. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3799. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3800. sizeof(ha->fw_seriallink_options24));
  3801. /* save HBA serial number */
  3802. ha->serial0 = icb->port_name[5];
  3803. ha->serial1 = icb->port_name[6];
  3804. ha->serial2 = icb->port_name[7];
  3805. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3806. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3807. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3808. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3809. /* Set minimum login_timeout to 4 seconds. */
  3810. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3811. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3812. if (le16_to_cpu(nv->login_timeout) < 4)
  3813. nv->login_timeout = __constant_cpu_to_le16(4);
  3814. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3815. icb->login_timeout = nv->login_timeout;
  3816. /* Set minimum RATOV to 100 tenths of a second. */
  3817. ha->r_a_tov = 100;
  3818. ha->loop_reset_delay = nv->reset_delay;
  3819. /* Link Down Timeout = 0:
  3820. *
  3821. * When Port Down timer expires we will start returning
  3822. * I/O's to OS with "DID_NO_CONNECT".
  3823. *
  3824. * Link Down Timeout != 0:
  3825. *
  3826. * The driver waits for the link to come up after link down
  3827. * before returning I/Os to OS with "DID_NO_CONNECT".
  3828. */
  3829. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3830. ha->loop_down_abort_time =
  3831. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3832. } else {
  3833. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3834. ha->loop_down_abort_time =
  3835. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3836. }
  3837. /* Need enough time to try and get the port back. */
  3838. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3839. if (qlport_down_retry)
  3840. ha->port_down_retry_count = qlport_down_retry;
  3841. /* Set login_retry_count */
  3842. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3843. if (ha->port_down_retry_count ==
  3844. le16_to_cpu(nv->port_down_retry_count) &&
  3845. ha->port_down_retry_count > 3)
  3846. ha->login_retry_count = ha->port_down_retry_count;
  3847. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3848. ha->login_retry_count = ha->port_down_retry_count;
  3849. if (ql2xloginretrycount)
  3850. ha->login_retry_count = ql2xloginretrycount;
  3851. /* Enable ZIO. */
  3852. if (!vha->flags.init_done) {
  3853. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3854. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3855. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3856. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3857. }
  3858. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3859. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3860. vha->flags.process_response_queue = 0;
  3861. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3862. ha->zio_mode = QLA_ZIO_MODE_6;
  3863. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3864. "(%d us).\n", vha->host_no, ha->zio_mode,
  3865. ha->zio_timer * 100));
  3866. qla_printk(KERN_INFO, ha,
  3867. "ZIO mode %d enabled; timer delay (%d us).\n",
  3868. ha->zio_mode, ha->zio_timer * 100);
  3869. icb->firmware_options_2 |= cpu_to_le32(
  3870. (uint32_t)ha->zio_mode);
  3871. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3872. vha->flags.process_response_queue = 1;
  3873. }
  3874. if (rval) {
  3875. DEBUG2_3(printk(KERN_WARNING
  3876. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3877. }
  3878. return (rval);
  3879. }
  3880. static int
  3881. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3882. uint32_t faddr)
  3883. {
  3884. int rval = QLA_SUCCESS;
  3885. int segments, fragment;
  3886. uint32_t *dcode, dlen;
  3887. uint32_t risc_addr;
  3888. uint32_t risc_size;
  3889. uint32_t i;
  3890. struct qla_hw_data *ha = vha->hw;
  3891. struct req_que *req = ha->req_q_map[0];
  3892. qla_printk(KERN_INFO, ha,
  3893. "FW: Loading from flash (%x)...\n", faddr);
  3894. rval = QLA_SUCCESS;
  3895. segments = FA_RISC_CODE_SEGMENTS;
  3896. dcode = (uint32_t *)req->ring;
  3897. *srisc_addr = 0;
  3898. /* Validate firmware image by checking version. */
  3899. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3900. for (i = 0; i < 4; i++)
  3901. dcode[i] = be32_to_cpu(dcode[i]);
  3902. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3903. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3904. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3905. dcode[3] == 0)) {
  3906. qla_printk(KERN_WARNING, ha,
  3907. "Unable to verify integrity of flash firmware image!\n");
  3908. qla_printk(KERN_WARNING, ha,
  3909. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3910. dcode[1], dcode[2], dcode[3]);
  3911. return QLA_FUNCTION_FAILED;
  3912. }
  3913. while (segments && rval == QLA_SUCCESS) {
  3914. /* Read segment's load information. */
  3915. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3916. risc_addr = be32_to_cpu(dcode[2]);
  3917. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3918. risc_size = be32_to_cpu(dcode[3]);
  3919. fragment = 0;
  3920. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3921. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3922. if (dlen > risc_size)
  3923. dlen = risc_size;
  3924. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3925. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3926. vha->host_no, risc_addr, dlen, faddr));
  3927. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3928. for (i = 0; i < dlen; i++)
  3929. dcode[i] = swab32(dcode[i]);
  3930. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3931. dlen);
  3932. if (rval) {
  3933. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3934. "segment %d of firmware\n", vha->host_no,
  3935. fragment));
  3936. qla_printk(KERN_WARNING, ha,
  3937. "[ERROR] Failed to load segment %d of "
  3938. "firmware\n", fragment);
  3939. break;
  3940. }
  3941. faddr += dlen;
  3942. risc_addr += dlen;
  3943. risc_size -= dlen;
  3944. fragment++;
  3945. }
  3946. /* Next segment. */
  3947. segments--;
  3948. }
  3949. return rval;
  3950. }
  3951. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3952. int
  3953. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3954. {
  3955. int rval;
  3956. int i, fragment;
  3957. uint16_t *wcode, *fwcode;
  3958. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3959. struct fw_blob *blob;
  3960. struct qla_hw_data *ha = vha->hw;
  3961. struct req_que *req = ha->req_q_map[0];
  3962. /* Load firmware blob. */
  3963. blob = qla2x00_request_firmware(vha);
  3964. if (!blob) {
  3965. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3966. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3967. "from: " QLA_FW_URL ".\n");
  3968. return QLA_FUNCTION_FAILED;
  3969. }
  3970. rval = QLA_SUCCESS;
  3971. wcode = (uint16_t *)req->ring;
  3972. *srisc_addr = 0;
  3973. fwcode = (uint16_t *)blob->fw->data;
  3974. fwclen = 0;
  3975. /* Validate firmware image by checking version. */
  3976. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3977. qla_printk(KERN_WARNING, ha,
  3978. "Unable to verify integrity of firmware image (%Zd)!\n",
  3979. blob->fw->size);
  3980. goto fail_fw_integrity;
  3981. }
  3982. for (i = 0; i < 4; i++)
  3983. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3984. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3985. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3986. wcode[2] == 0 && wcode[3] == 0)) {
  3987. qla_printk(KERN_WARNING, ha,
  3988. "Unable to verify integrity of firmware image!\n");
  3989. qla_printk(KERN_WARNING, ha,
  3990. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3991. wcode[1], wcode[2], wcode[3]);
  3992. goto fail_fw_integrity;
  3993. }
  3994. seg = blob->segs;
  3995. while (*seg && rval == QLA_SUCCESS) {
  3996. risc_addr = *seg;
  3997. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3998. risc_size = be16_to_cpu(fwcode[3]);
  3999. /* Validate firmware image size. */
  4000. fwclen += risc_size * sizeof(uint16_t);
  4001. if (blob->fw->size < fwclen) {
  4002. qla_printk(KERN_WARNING, ha,
  4003. "Unable to verify integrity of firmware image "
  4004. "(%Zd)!\n", blob->fw->size);
  4005. goto fail_fw_integrity;
  4006. }
  4007. fragment = 0;
  4008. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4009. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  4010. if (wlen > risc_size)
  4011. wlen = risc_size;
  4012. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4013. "addr %x, number of words 0x%x.\n", vha->host_no,
  4014. risc_addr, wlen));
  4015. for (i = 0; i < wlen; i++)
  4016. wcode[i] = swab16(fwcode[i]);
  4017. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4018. wlen);
  4019. if (rval) {
  4020. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4021. "segment %d of firmware\n", vha->host_no,
  4022. fragment));
  4023. qla_printk(KERN_WARNING, ha,
  4024. "[ERROR] Failed to load segment %d of "
  4025. "firmware\n", fragment);
  4026. break;
  4027. }
  4028. fwcode += wlen;
  4029. risc_addr += wlen;
  4030. risc_size -= wlen;
  4031. fragment++;
  4032. }
  4033. /* Next segment. */
  4034. seg++;
  4035. }
  4036. return rval;
  4037. fail_fw_integrity:
  4038. return QLA_FUNCTION_FAILED;
  4039. }
  4040. static int
  4041. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4042. {
  4043. int rval;
  4044. int segments, fragment;
  4045. uint32_t *dcode, dlen;
  4046. uint32_t risc_addr;
  4047. uint32_t risc_size;
  4048. uint32_t i;
  4049. struct fw_blob *blob;
  4050. uint32_t *fwcode, fwclen;
  4051. struct qla_hw_data *ha = vha->hw;
  4052. struct req_que *req = ha->req_q_map[0];
  4053. /* Load firmware blob. */
  4054. blob = qla2x00_request_firmware(vha);
  4055. if (!blob) {
  4056. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4057. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4058. "from: " QLA_FW_URL ".\n");
  4059. return QLA_FUNCTION_FAILED;
  4060. }
  4061. qla_printk(KERN_INFO, ha,
  4062. "FW: Loading via request-firmware...\n");
  4063. rval = QLA_SUCCESS;
  4064. segments = FA_RISC_CODE_SEGMENTS;
  4065. dcode = (uint32_t *)req->ring;
  4066. *srisc_addr = 0;
  4067. fwcode = (uint32_t *)blob->fw->data;
  4068. fwclen = 0;
  4069. /* Validate firmware image by checking version. */
  4070. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4071. qla_printk(KERN_WARNING, ha,
  4072. "Unable to verify integrity of firmware image (%Zd)!\n",
  4073. blob->fw->size);
  4074. goto fail_fw_integrity;
  4075. }
  4076. for (i = 0; i < 4; i++)
  4077. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4078. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4079. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4080. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4081. dcode[3] == 0)) {
  4082. qla_printk(KERN_WARNING, ha,
  4083. "Unable to verify integrity of firmware image!\n");
  4084. qla_printk(KERN_WARNING, ha,
  4085. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4086. dcode[1], dcode[2], dcode[3]);
  4087. goto fail_fw_integrity;
  4088. }
  4089. while (segments && rval == QLA_SUCCESS) {
  4090. risc_addr = be32_to_cpu(fwcode[2]);
  4091. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4092. risc_size = be32_to_cpu(fwcode[3]);
  4093. /* Validate firmware image size. */
  4094. fwclen += risc_size * sizeof(uint32_t);
  4095. if (blob->fw->size < fwclen) {
  4096. qla_printk(KERN_WARNING, ha,
  4097. "Unable to verify integrity of firmware image "
  4098. "(%Zd)!\n", blob->fw->size);
  4099. goto fail_fw_integrity;
  4100. }
  4101. fragment = 0;
  4102. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4103. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4104. if (dlen > risc_size)
  4105. dlen = risc_size;
  4106. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4107. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4108. risc_addr, dlen));
  4109. for (i = 0; i < dlen; i++)
  4110. dcode[i] = swab32(fwcode[i]);
  4111. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4112. dlen);
  4113. if (rval) {
  4114. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4115. "segment %d of firmware\n", vha->host_no,
  4116. fragment));
  4117. qla_printk(KERN_WARNING, ha,
  4118. "[ERROR] Failed to load segment %d of "
  4119. "firmware\n", fragment);
  4120. break;
  4121. }
  4122. fwcode += dlen;
  4123. risc_addr += dlen;
  4124. risc_size -= dlen;
  4125. fragment++;
  4126. }
  4127. /* Next segment. */
  4128. segments--;
  4129. }
  4130. return rval;
  4131. fail_fw_integrity:
  4132. return QLA_FUNCTION_FAILED;
  4133. }
  4134. int
  4135. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4136. {
  4137. int rval;
  4138. if (ql2xfwloadbin == 1)
  4139. return qla81xx_load_risc(vha, srisc_addr);
  4140. /*
  4141. * FW Load priority:
  4142. * 1) Firmware via request-firmware interface (.bin file).
  4143. * 2) Firmware residing in flash.
  4144. */
  4145. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4146. if (rval == QLA_SUCCESS)
  4147. return rval;
  4148. return qla24xx_load_risc_flash(vha, srisc_addr,
  4149. vha->hw->flt_region_fw);
  4150. }
  4151. int
  4152. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4153. {
  4154. int rval;
  4155. struct qla_hw_data *ha = vha->hw;
  4156. if (ql2xfwloadbin == 2)
  4157. goto try_blob_fw;
  4158. /*
  4159. * FW Load priority:
  4160. * 1) Firmware residing in flash.
  4161. * 2) Firmware via request-firmware interface (.bin file).
  4162. * 3) Golden-Firmware residing in flash -- limited operation.
  4163. */
  4164. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4165. if (rval == QLA_SUCCESS)
  4166. return rval;
  4167. try_blob_fw:
  4168. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4169. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4170. return rval;
  4171. qla_printk(KERN_ERR, ha,
  4172. "FW: Attempting to fallback to golden firmware...\n");
  4173. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4174. if (rval != QLA_SUCCESS)
  4175. return rval;
  4176. qla_printk(KERN_ERR, ha,
  4177. "FW: Please update operational firmware...\n");
  4178. ha->flags.running_gold_fw = 1;
  4179. return rval;
  4180. }
  4181. void
  4182. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4183. {
  4184. int ret, retries;
  4185. struct qla_hw_data *ha = vha->hw;
  4186. if (ha->flags.pci_channel_io_perm_failure)
  4187. return;
  4188. if (!IS_FWI2_CAPABLE(ha))
  4189. return;
  4190. if (!ha->fw_major_version)
  4191. return;
  4192. ret = qla2x00_stop_firmware(vha);
  4193. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4194. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4195. ha->isp_ops->reset_chip(vha);
  4196. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4197. continue;
  4198. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4199. continue;
  4200. qla_printk(KERN_INFO, ha,
  4201. "Attempting retry of stop-firmware command...\n");
  4202. ret = qla2x00_stop_firmware(vha);
  4203. }
  4204. }
  4205. int
  4206. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4207. {
  4208. int rval = QLA_SUCCESS;
  4209. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4210. struct qla_hw_data *ha = vha->hw;
  4211. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4212. struct req_que *req;
  4213. struct rsp_que *rsp;
  4214. if (!vha->vp_idx)
  4215. return -EINVAL;
  4216. rval = qla2x00_fw_ready(base_vha);
  4217. if (ha->flags.cpu_affinity_enabled)
  4218. req = ha->req_q_map[0];
  4219. else
  4220. req = vha->req;
  4221. rsp = req->rsp;
  4222. if (rval == QLA_SUCCESS) {
  4223. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4224. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4225. }
  4226. vha->flags.management_server_logged_in = 0;
  4227. /* Login to SNS first */
  4228. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4229. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4230. DEBUG15(qla_printk(KERN_INFO, ha,
  4231. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4232. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4233. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4234. return (QLA_FUNCTION_FAILED);
  4235. }
  4236. atomic_set(&vha->loop_down_timer, 0);
  4237. atomic_set(&vha->loop_state, LOOP_UP);
  4238. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4239. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4240. rval = qla2x00_loop_resync(base_vha);
  4241. return rval;
  4242. }
  4243. /* 84XX Support **************************************************************/
  4244. static LIST_HEAD(qla_cs84xx_list);
  4245. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4246. static struct qla_chip_state_84xx *
  4247. qla84xx_get_chip(struct scsi_qla_host *vha)
  4248. {
  4249. struct qla_chip_state_84xx *cs84xx;
  4250. struct qla_hw_data *ha = vha->hw;
  4251. mutex_lock(&qla_cs84xx_mutex);
  4252. /* Find any shared 84xx chip. */
  4253. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4254. if (cs84xx->bus == ha->pdev->bus) {
  4255. kref_get(&cs84xx->kref);
  4256. goto done;
  4257. }
  4258. }
  4259. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4260. if (!cs84xx)
  4261. goto done;
  4262. kref_init(&cs84xx->kref);
  4263. spin_lock_init(&cs84xx->access_lock);
  4264. mutex_init(&cs84xx->fw_update_mutex);
  4265. cs84xx->bus = ha->pdev->bus;
  4266. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4267. done:
  4268. mutex_unlock(&qla_cs84xx_mutex);
  4269. return cs84xx;
  4270. }
  4271. static void
  4272. __qla84xx_chip_release(struct kref *kref)
  4273. {
  4274. struct qla_chip_state_84xx *cs84xx =
  4275. container_of(kref, struct qla_chip_state_84xx, kref);
  4276. mutex_lock(&qla_cs84xx_mutex);
  4277. list_del(&cs84xx->list);
  4278. mutex_unlock(&qla_cs84xx_mutex);
  4279. kfree(cs84xx);
  4280. }
  4281. void
  4282. qla84xx_put_chip(struct scsi_qla_host *vha)
  4283. {
  4284. struct qla_hw_data *ha = vha->hw;
  4285. if (ha->cs84xx)
  4286. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4287. }
  4288. static int
  4289. qla84xx_init_chip(scsi_qla_host_t *vha)
  4290. {
  4291. int rval;
  4292. uint16_t status[2];
  4293. struct qla_hw_data *ha = vha->hw;
  4294. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4295. rval = qla84xx_verify_chip(vha, status);
  4296. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4297. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4298. QLA_SUCCESS;
  4299. }
  4300. /* 81XX Support **************************************************************/
  4301. int
  4302. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4303. {
  4304. int rval;
  4305. struct init_cb_81xx *icb;
  4306. struct nvram_81xx *nv;
  4307. uint32_t *dptr;
  4308. uint8_t *dptr1, *dptr2;
  4309. uint32_t chksum;
  4310. uint16_t cnt;
  4311. struct qla_hw_data *ha = vha->hw;
  4312. rval = QLA_SUCCESS;
  4313. icb = (struct init_cb_81xx *)ha->init_cb;
  4314. nv = ha->nvram;
  4315. /* Determine NVRAM starting address. */
  4316. ha->nvram_size = sizeof(struct nvram_81xx);
  4317. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4318. /* Get VPD data into cache */
  4319. ha->vpd = ha->nvram + VPD_OFFSET;
  4320. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4321. ha->vpd_size);
  4322. /* Get NVRAM data into cache and calculate checksum. */
  4323. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4324. ha->nvram_size);
  4325. dptr = (uint32_t *)nv;
  4326. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4327. chksum += le32_to_cpu(*dptr++);
  4328. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4329. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4330. /* Bad NVRAM data, set defaults parameters. */
  4331. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4332. || nv->id[3] != ' ' ||
  4333. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4334. /* Reset NVRAM data. */
  4335. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4336. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4337. le16_to_cpu(nv->nvram_version));
  4338. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4339. "invalid -- WWPN) defaults.\n");
  4340. /*
  4341. * Set default initialization control block.
  4342. */
  4343. memset(nv, 0, ha->nvram_size);
  4344. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4345. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4346. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4347. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4348. nv->exchange_count = __constant_cpu_to_le16(0);
  4349. nv->port_name[0] = 0x21;
  4350. nv->port_name[1] = 0x00 + ha->port_no;
  4351. nv->port_name[2] = 0x00;
  4352. nv->port_name[3] = 0xe0;
  4353. nv->port_name[4] = 0x8b;
  4354. nv->port_name[5] = 0x1c;
  4355. nv->port_name[6] = 0x55;
  4356. nv->port_name[7] = 0x86;
  4357. nv->node_name[0] = 0x20;
  4358. nv->node_name[1] = 0x00;
  4359. nv->node_name[2] = 0x00;
  4360. nv->node_name[3] = 0xe0;
  4361. nv->node_name[4] = 0x8b;
  4362. nv->node_name[5] = 0x1c;
  4363. nv->node_name[6] = 0x55;
  4364. nv->node_name[7] = 0x86;
  4365. nv->login_retry_count = __constant_cpu_to_le16(8);
  4366. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4367. nv->login_timeout = __constant_cpu_to_le16(0);
  4368. nv->firmware_options_1 =
  4369. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4370. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4371. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4372. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4373. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4374. nv->efi_parameters = __constant_cpu_to_le32(0);
  4375. nv->reset_delay = 5;
  4376. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4377. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4378. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4379. nv->enode_mac[0] = 0x00;
  4380. nv->enode_mac[1] = 0x02;
  4381. nv->enode_mac[2] = 0x03;
  4382. nv->enode_mac[3] = 0x04;
  4383. nv->enode_mac[4] = 0x05;
  4384. nv->enode_mac[5] = 0x06 + ha->port_no;
  4385. rval = 1;
  4386. }
  4387. /* Reset Initialization control block */
  4388. memset(icb, 0, sizeof(struct init_cb_81xx));
  4389. /* Copy 1st segment. */
  4390. dptr1 = (uint8_t *)icb;
  4391. dptr2 = (uint8_t *)&nv->version;
  4392. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4393. while (cnt--)
  4394. *dptr1++ = *dptr2++;
  4395. icb->login_retry_count = nv->login_retry_count;
  4396. /* Copy 2nd segment. */
  4397. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4398. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4399. cnt = (uint8_t *)&icb->reserved_5 -
  4400. (uint8_t *)&icb->interrupt_delay_timer;
  4401. while (cnt--)
  4402. *dptr1++ = *dptr2++;
  4403. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4404. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4405. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4406. icb->enode_mac[0] = 0x01;
  4407. icb->enode_mac[1] = 0x02;
  4408. icb->enode_mac[2] = 0x03;
  4409. icb->enode_mac[3] = 0x04;
  4410. icb->enode_mac[4] = 0x05;
  4411. icb->enode_mac[5] = 0x06 + ha->port_no;
  4412. }
  4413. /* Use extended-initialization control block. */
  4414. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4415. /*
  4416. * Setup driver NVRAM options.
  4417. */
  4418. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4419. "QLE8XXX");
  4420. /* Use alternate WWN? */
  4421. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4422. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4423. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4424. }
  4425. /* Prepare nodename */
  4426. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4427. /*
  4428. * Firmware will apply the following mask if the nodename was
  4429. * not provided.
  4430. */
  4431. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4432. icb->node_name[0] &= 0xF0;
  4433. }
  4434. /* Set host adapter parameters. */
  4435. ha->flags.disable_risc_code_load = 0;
  4436. ha->flags.enable_lip_reset = 0;
  4437. ha->flags.enable_lip_full_login =
  4438. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4439. ha->flags.enable_target_reset =
  4440. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4441. ha->flags.enable_led_scheme = 0;
  4442. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4443. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4444. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4445. /* save HBA serial number */
  4446. ha->serial0 = icb->port_name[5];
  4447. ha->serial1 = icb->port_name[6];
  4448. ha->serial2 = icb->port_name[7];
  4449. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4450. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4451. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4452. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4453. /* Set minimum login_timeout to 4 seconds. */
  4454. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4455. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4456. if (le16_to_cpu(nv->login_timeout) < 4)
  4457. nv->login_timeout = __constant_cpu_to_le16(4);
  4458. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4459. icb->login_timeout = nv->login_timeout;
  4460. /* Set minimum RATOV to 100 tenths of a second. */
  4461. ha->r_a_tov = 100;
  4462. ha->loop_reset_delay = nv->reset_delay;
  4463. /* Link Down Timeout = 0:
  4464. *
  4465. * When Port Down timer expires we will start returning
  4466. * I/O's to OS with "DID_NO_CONNECT".
  4467. *
  4468. * Link Down Timeout != 0:
  4469. *
  4470. * The driver waits for the link to come up after link down
  4471. * before returning I/Os to OS with "DID_NO_CONNECT".
  4472. */
  4473. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4474. ha->loop_down_abort_time =
  4475. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4476. } else {
  4477. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4478. ha->loop_down_abort_time =
  4479. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4480. }
  4481. /* Need enough time to try and get the port back. */
  4482. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4483. if (qlport_down_retry)
  4484. ha->port_down_retry_count = qlport_down_retry;
  4485. /* Set login_retry_count */
  4486. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4487. if (ha->port_down_retry_count ==
  4488. le16_to_cpu(nv->port_down_retry_count) &&
  4489. ha->port_down_retry_count > 3)
  4490. ha->login_retry_count = ha->port_down_retry_count;
  4491. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4492. ha->login_retry_count = ha->port_down_retry_count;
  4493. if (ql2xloginretrycount)
  4494. ha->login_retry_count = ql2xloginretrycount;
  4495. /* Enable ZIO. */
  4496. if (!vha->flags.init_done) {
  4497. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4498. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4499. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4500. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4501. }
  4502. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4503. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4504. vha->flags.process_response_queue = 0;
  4505. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4506. ha->zio_mode = QLA_ZIO_MODE_6;
  4507. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4508. "(%d us).\n", vha->host_no, ha->zio_mode,
  4509. ha->zio_timer * 100));
  4510. qla_printk(KERN_INFO, ha,
  4511. "ZIO mode %d enabled; timer delay (%d us).\n",
  4512. ha->zio_mode, ha->zio_timer * 100);
  4513. icb->firmware_options_2 |= cpu_to_le32(
  4514. (uint32_t)ha->zio_mode);
  4515. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4516. vha->flags.process_response_queue = 1;
  4517. }
  4518. if (rval) {
  4519. DEBUG2_3(printk(KERN_WARNING
  4520. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4521. }
  4522. return (rval);
  4523. }
  4524. int
  4525. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4526. {
  4527. int status, rval;
  4528. uint32_t wait_time;
  4529. struct qla_hw_data *ha = vha->hw;
  4530. struct req_que *req = ha->req_q_map[0];
  4531. struct rsp_que *rsp = ha->rsp_q_map[0];
  4532. struct scsi_qla_host *vp;
  4533. unsigned long flags;
  4534. status = qla2x00_init_rings(vha);
  4535. if (!status) {
  4536. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4537. ha->flags.chip_reset_done = 1;
  4538. status = qla2x00_fw_ready(vha);
  4539. if (!status) {
  4540. qla_printk(KERN_INFO, ha,
  4541. "%s(): Start configure loop, "
  4542. "status = %d\n", __func__, status);
  4543. /* Issue a marker after FW becomes ready. */
  4544. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4545. vha->flags.online = 1;
  4546. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4547. wait_time = 256;
  4548. do {
  4549. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4550. qla2x00_configure_loop(vha);
  4551. wait_time--;
  4552. } while (!atomic_read(&vha->loop_down_timer) &&
  4553. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4554. wait_time &&
  4555. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4556. }
  4557. /* if no cable then assume it's good */
  4558. if ((vha->device_flags & DFLG_NO_CABLE))
  4559. status = 0;
  4560. qla_printk(KERN_INFO, ha,
  4561. "%s(): Configure loop done, status = 0x%x\n",
  4562. __func__, status);
  4563. }
  4564. if (!status) {
  4565. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4566. if (!atomic_read(&vha->loop_down_timer)) {
  4567. /*
  4568. * Issue marker command only when we are going
  4569. * to start the I/O .
  4570. */
  4571. vha->marker_needed = 1;
  4572. }
  4573. vha->flags.online = 1;
  4574. ha->isp_ops->enable_intrs(ha);
  4575. ha->isp_abort_cnt = 0;
  4576. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4577. if (ha->fce) {
  4578. ha->flags.fce_enabled = 1;
  4579. memset(ha->fce, 0,
  4580. fce_calc_size(ha->fce_bufs));
  4581. rval = qla2x00_enable_fce_trace(vha,
  4582. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4583. &ha->fce_bufs);
  4584. if (rval) {
  4585. qla_printk(KERN_WARNING, ha,
  4586. "Unable to reinitialize FCE "
  4587. "(%d).\n", rval);
  4588. ha->flags.fce_enabled = 0;
  4589. }
  4590. }
  4591. if (ha->eft) {
  4592. memset(ha->eft, 0, EFT_SIZE);
  4593. rval = qla2x00_enable_eft_trace(vha,
  4594. ha->eft_dma, EFT_NUM_BUFFERS);
  4595. if (rval) {
  4596. qla_printk(KERN_WARNING, ha,
  4597. "Unable to reinitialize EFT "
  4598. "(%d).\n", rval);
  4599. }
  4600. }
  4601. }
  4602. if (!status) {
  4603. DEBUG(printk(KERN_INFO
  4604. "qla82xx_restart_isp(%ld): succeeded.\n",
  4605. vha->host_no));
  4606. spin_lock_irqsave(&ha->vport_slock, flags);
  4607. list_for_each_entry(vp, &ha->vp_list, list) {
  4608. if (vp->vp_idx) {
  4609. atomic_inc(&vp->vref_count);
  4610. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4611. qla2x00_vp_abort_isp(vp);
  4612. spin_lock_irqsave(&ha->vport_slock, flags);
  4613. atomic_dec(&vp->vref_count);
  4614. }
  4615. }
  4616. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4617. } else {
  4618. qla_printk(KERN_INFO, ha,
  4619. "qla82xx_restart_isp: **** FAILED ****\n");
  4620. }
  4621. return status;
  4622. }
  4623. void
  4624. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4625. {
  4626. struct qla_hw_data *ha = vha->hw;
  4627. if (!ql2xetsenable)
  4628. return;
  4629. /* Enable ETS Burst. */
  4630. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4631. ha->fw_options[2] |= BIT_9;
  4632. qla2x00_set_fw_options(vha, ha->fw_options);
  4633. }
  4634. /*
  4635. * qla24xx_get_fcp_prio
  4636. * Gets the fcp cmd priority value for the logged in port.
  4637. * Looks for a match of the port descriptors within
  4638. * each of the fcp prio config entries. If a match is found,
  4639. * the tag (priority) value is returned.
  4640. *
  4641. * Input:
  4642. * ha = adapter block po
  4643. * fcport = port structure pointer.
  4644. *
  4645. * Return:
  4646. * non-zero (if found)
  4647. * 0 (if not found)
  4648. *
  4649. * Context:
  4650. * Kernel context
  4651. */
  4652. uint8_t
  4653. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4654. {
  4655. int i, entries;
  4656. uint8_t pid_match, wwn_match;
  4657. uint8_t priority;
  4658. uint32_t pid1, pid2;
  4659. uint64_t wwn1, wwn2;
  4660. struct qla_fcp_prio_entry *pri_entry;
  4661. struct qla_hw_data *ha = vha->hw;
  4662. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4663. return 0;
  4664. priority = 0;
  4665. entries = ha->fcp_prio_cfg->num_entries;
  4666. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4667. for (i = 0; i < entries; i++) {
  4668. pid_match = wwn_match = 0;
  4669. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4670. pri_entry++;
  4671. continue;
  4672. }
  4673. /* check source pid for a match */
  4674. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4675. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4676. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4677. if (pid1 == INVALID_PORT_ID)
  4678. pid_match++;
  4679. else if (pid1 == pid2)
  4680. pid_match++;
  4681. }
  4682. /* check destination pid for a match */
  4683. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4684. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4685. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4686. if (pid1 == INVALID_PORT_ID)
  4687. pid_match++;
  4688. else if (pid1 == pid2)
  4689. pid_match++;
  4690. }
  4691. /* check source WWN for a match */
  4692. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4693. wwn1 = wwn_to_u64(vha->port_name);
  4694. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4695. if (wwn2 == (uint64_t)-1)
  4696. wwn_match++;
  4697. else if (wwn1 == wwn2)
  4698. wwn_match++;
  4699. }
  4700. /* check destination WWN for a match */
  4701. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4702. wwn1 = wwn_to_u64(fcport->port_name);
  4703. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4704. if (wwn2 == (uint64_t)-1)
  4705. wwn_match++;
  4706. else if (wwn1 == wwn2)
  4707. wwn_match++;
  4708. }
  4709. if (pid_match == 2 || wwn_match == 2) {
  4710. /* Found a matching entry */
  4711. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4712. priority = pri_entry->tag;
  4713. break;
  4714. }
  4715. pri_entry++;
  4716. }
  4717. return priority;
  4718. }
  4719. /*
  4720. * qla24xx_update_fcport_fcp_prio
  4721. * Activates fcp priority for the logged in fc port
  4722. *
  4723. * Input:
  4724. * ha = adapter block pointer.
  4725. * fcp = port structure pointer.
  4726. *
  4727. * Return:
  4728. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4729. *
  4730. * Context:
  4731. * Kernel context.
  4732. */
  4733. int
  4734. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *ha, fc_port_t *fcport)
  4735. {
  4736. int ret;
  4737. uint8_t priority;
  4738. uint16_t mb[5];
  4739. if (atomic_read(&fcport->state) == FCS_UNCONFIGURED ||
  4740. fcport->port_type != FCT_TARGET ||
  4741. fcport->loop_id == FC_NO_LOOP_ID)
  4742. return QLA_FUNCTION_FAILED;
  4743. priority = qla24xx_get_fcp_prio(ha, fcport);
  4744. ret = qla24xx_set_fcp_prio(ha, fcport->loop_id, priority, mb);
  4745. if (ret == QLA_SUCCESS)
  4746. fcport->fcp_prio = priority;
  4747. else
  4748. DEBUG2(printk(KERN_WARNING
  4749. "scsi(%ld): Unable to activate fcp priority, "
  4750. " ret=0x%x\n", ha->host_no, ret));
  4751. return ret;
  4752. }
  4753. /*
  4754. * qla24xx_update_all_fcp_prio
  4755. * Activates fcp priority for all the logged in ports
  4756. *
  4757. * Input:
  4758. * ha = adapter block pointer.
  4759. *
  4760. * Return:
  4761. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4762. *
  4763. * Context:
  4764. * Kernel context.
  4765. */
  4766. int
  4767. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4768. {
  4769. int ret;
  4770. fc_port_t *fcport;
  4771. ret = QLA_FUNCTION_FAILED;
  4772. /* We need to set priority for all logged in ports */
  4773. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4774. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4775. return ret;
  4776. }