atl1_main.c 68 KB

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  1. /*
  2. * Copyright(c) 2005 - 2006 Attansic Corporation. All rights reserved.
  3. * Copyright(c) 2006 Chris Snook <csnook@redhat.com>
  4. * Copyright(c) 2006 Jay Cliburn <jcliburn@gmail.com>
  5. *
  6. * Derived from Intel e1000 driver
  7. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the Free
  11. * Software Foundation; either version 2 of the License, or (at your option)
  12. * any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. *
  19. * You should have received a copy of the GNU General Public License along with
  20. * this program; if not, write to the Free Software Foundation, Inc., 59
  21. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22. *
  23. * The full GNU General Public License is included in this distribution in the
  24. * file called COPYING.
  25. *
  26. * Contact Information:
  27. * Xiong Huang <xiong_huang@attansic.com>
  28. * Attansic Technology Corp. 3F 147, Xianzheng 9th Road, Zhubei,
  29. * Xinzhu 302, TAIWAN, REPUBLIC OF CHINA
  30. *
  31. * Chris Snook <csnook@redhat.com>
  32. * Jay Cliburn <jcliburn@gmail.com>
  33. *
  34. * This version is adapted from the Attansic reference driver for
  35. * inclusion in the Linux kernel. It is currently under heavy development.
  36. * A very incomplete list of things that need to be dealt with:
  37. *
  38. * TODO:
  39. * Fix TSO; tx performance is horrible with TSO enabled.
  40. * Wake on LAN.
  41. * Add more ethtool functions.
  42. * Fix abstruse irq enable/disable condition described here:
  43. * http://marc.theaimsgroup.com/?l=linux-netdev&m=116398508500553&w=2
  44. *
  45. * NEEDS TESTING:
  46. * VLAN
  47. * multicast
  48. * promiscuous mode
  49. * interrupt coalescing
  50. * SMP torture testing
  51. */
  52. #include <linux/types.h>
  53. #include <linux/netdevice.h>
  54. #include <linux/pci.h>
  55. #include <linux/spinlock.h>
  56. #include <linux/slab.h>
  57. #include <linux/string.h>
  58. #include <linux/skbuff.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/if_vlan.h>
  61. #include <linux/irqreturn.h>
  62. #include <linux/workqueue.h>
  63. #include <linux/timer.h>
  64. #include <linux/jiffies.h>
  65. #include <linux/hardirq.h>
  66. #include <linux/interrupt.h>
  67. #include <linux/irqflags.h>
  68. #include <linux/dma-mapping.h>
  69. #include <linux/net.h>
  70. #include <linux/pm.h>
  71. #include <linux/in.h>
  72. #include <linux/ip.h>
  73. #include <linux/tcp.h>
  74. #include <linux/compiler.h>
  75. #include <linux/delay.h>
  76. #include <linux/mii.h>
  77. #include <net/checksum.h>
  78. #include <asm/atomic.h>
  79. #include <asm/byteorder.h>
  80. #include "atl1.h"
  81. #define DRIVER_VERSION "2.0.7"
  82. char atl1_driver_name[] = "atl1";
  83. static const char atl1_driver_string[] = "Attansic L1 Ethernet Network Driver";
  84. static const char atl1_copyright[] = "Copyright(c) 2005-2006 Attansic Corporation.";
  85. char atl1_driver_version[] = DRIVER_VERSION;
  86. MODULE_AUTHOR
  87. ("Attansic Corporation <xiong_huang@attansic.com>, Chris Snook <csnook@redhat.com>, Jay Cliburn <jcliburn@gmail.com>");
  88. MODULE_DESCRIPTION("Attansic 1000M Ethernet Network Driver");
  89. MODULE_LICENSE("GPL");
  90. MODULE_VERSION(DRIVER_VERSION);
  91. /*
  92. * atl1_pci_tbl - PCI Device ID Table
  93. */
  94. static const struct pci_device_id atl1_pci_tbl[] = {
  95. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1)},
  96. /* required last entry */
  97. {0,}
  98. };
  99. MODULE_DEVICE_TABLE(pci, atl1_pci_tbl);
  100. /*
  101. * atl1_sw_init - Initialize general software structures (struct atl1_adapter)
  102. * @adapter: board private structure to initialize
  103. *
  104. * atl1_sw_init initializes the Adapter private data structure.
  105. * Fields are initialized based on PCI device information and
  106. * OS network device settings (MTU size).
  107. */
  108. static int __devinit atl1_sw_init(struct atl1_adapter *adapter)
  109. {
  110. struct atl1_hw *hw = &adapter->hw;
  111. struct net_device *netdev = adapter->netdev;
  112. struct pci_dev *pdev = adapter->pdev;
  113. /* PCI config space info */
  114. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  115. hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  116. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  117. adapter->wol = 0;
  118. adapter->rx_buffer_len = (hw->max_frame_size + 7) & ~7;
  119. adapter->ict = 50000; /* 100ms */
  120. adapter->link_speed = SPEED_0; /* hardware init */
  121. adapter->link_duplex = FULL_DUPLEX;
  122. hw->phy_configured = false;
  123. hw->preamble_len = 7;
  124. hw->ipgt = 0x60;
  125. hw->min_ifg = 0x50;
  126. hw->ipgr1 = 0x40;
  127. hw->ipgr2 = 0x60;
  128. hw->max_retry = 0xf;
  129. hw->lcol = 0x37;
  130. hw->jam_ipg = 7;
  131. hw->rfd_burst = 8;
  132. hw->rrd_burst = 8;
  133. hw->rfd_fetch_gap = 1;
  134. hw->rx_jumbo_th = adapter->rx_buffer_len / 8;
  135. hw->rx_jumbo_lkah = 1;
  136. hw->rrd_ret_timer = 16;
  137. hw->tpd_burst = 4;
  138. hw->tpd_fetch_th = 16;
  139. hw->txf_burst = 0x100;
  140. hw->tx_jumbo_task_th = (hw->max_frame_size + 7) >> 3;
  141. hw->tpd_fetch_gap = 1;
  142. hw->rcb_value = atl1_rcb_64;
  143. hw->dma_ord = atl1_dma_ord_enh;
  144. hw->dmar_block = atl1_dma_req_256;
  145. hw->dmaw_block = atl1_dma_req_256;
  146. hw->cmb_rrd = 4;
  147. hw->cmb_tpd = 4;
  148. hw->cmb_rx_timer = 1; /* about 2us */
  149. hw->cmb_tx_timer = 1; /* about 2us */
  150. hw->smb_timer = 100000; /* about 200ms */
  151. spin_lock_init(&adapter->lock);
  152. spin_lock_init(&adapter->mb_lock);
  153. return 0;
  154. }
  155. /*
  156. * atl1_setup_mem_resources - allocate Tx / RX descriptor resources
  157. * @adapter: board private structure
  158. *
  159. * Return 0 on success, negative on failure
  160. */
  161. s32 atl1_setup_ring_resources(struct atl1_adapter *adapter)
  162. {
  163. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  164. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  165. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  166. struct atl1_ring_header *ring_header = &adapter->ring_header;
  167. struct pci_dev *pdev = adapter->pdev;
  168. int size;
  169. u8 offset = 0;
  170. size = sizeof(struct atl1_buffer) * (tpd_ring->count + rfd_ring->count);
  171. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  172. if (unlikely(!tpd_ring->buffer_info)) {
  173. dev_err(&pdev->dev, "kzalloc failed , size = D%d\n", size);
  174. goto err_nomem;
  175. }
  176. rfd_ring->buffer_info =
  177. (struct atl1_buffer *)(tpd_ring->buffer_info + tpd_ring->count);
  178. /* real ring DMA buffer
  179. * each ring/block may need up to 8 bytes for alignment, hence the
  180. * additional 40 bytes tacked onto the end.
  181. */
  182. ring_header->size = size =
  183. sizeof(struct tx_packet_desc) * tpd_ring->count
  184. + sizeof(struct rx_free_desc) * rfd_ring->count
  185. + sizeof(struct rx_return_desc) * rrd_ring->count
  186. + sizeof(struct coals_msg_block)
  187. + sizeof(struct stats_msg_block)
  188. + 40;
  189. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  190. &ring_header->dma);
  191. if (unlikely(!ring_header->desc)) {
  192. dev_err(&pdev->dev, "pci_alloc_consistent failed\n");
  193. goto err_nomem;
  194. }
  195. memset(ring_header->desc, 0, ring_header->size);
  196. /* init TPD ring */
  197. tpd_ring->dma = ring_header->dma;
  198. offset = (tpd_ring->dma & 0x7) ? (8 - (ring_header->dma & 0x7)) : 0;
  199. tpd_ring->dma += offset;
  200. tpd_ring->desc = (u8 *) ring_header->desc + offset;
  201. tpd_ring->size = sizeof(struct tx_packet_desc) * tpd_ring->count;
  202. atomic_set(&tpd_ring->next_to_use, 0);
  203. atomic_set(&tpd_ring->next_to_clean, 0);
  204. /* init RFD ring */
  205. rfd_ring->dma = tpd_ring->dma + tpd_ring->size;
  206. offset = (rfd_ring->dma & 0x7) ? (8 - (rfd_ring->dma & 0x7)) : 0;
  207. rfd_ring->dma += offset;
  208. rfd_ring->desc = (u8 *) tpd_ring->desc + (tpd_ring->size + offset);
  209. rfd_ring->size = sizeof(struct rx_free_desc) * rfd_ring->count;
  210. rfd_ring->next_to_clean = 0;
  211. atomic_set(&rfd_ring->next_to_use, 0);
  212. /* init RRD ring */
  213. rrd_ring->dma = rfd_ring->dma + rfd_ring->size;
  214. offset = (rrd_ring->dma & 0x7) ? (8 - (rrd_ring->dma & 0x7)) : 0;
  215. rrd_ring->dma += offset;
  216. rrd_ring->desc = (u8 *) rfd_ring->desc + (rfd_ring->size + offset);
  217. rrd_ring->size = sizeof(struct rx_return_desc) * rrd_ring->count;
  218. rrd_ring->next_to_use = 0;
  219. atomic_set(&rrd_ring->next_to_clean, 0);
  220. /* init CMB */
  221. adapter->cmb.dma = rrd_ring->dma + rrd_ring->size;
  222. offset = (adapter->cmb.dma & 0x7) ? (8 - (adapter->cmb.dma & 0x7)) : 0;
  223. adapter->cmb.dma += offset;
  224. adapter->cmb.cmb = (struct coals_msg_block *)
  225. ((u8 *) rrd_ring->desc + (rrd_ring->size + offset));
  226. /* init SMB */
  227. adapter->smb.dma = adapter->cmb.dma + sizeof(struct coals_msg_block);
  228. offset = (adapter->smb.dma & 0x7) ? (8 - (adapter->smb.dma & 0x7)) : 0;
  229. adapter->smb.dma += offset;
  230. adapter->smb.smb = (struct stats_msg_block *)
  231. ((u8 *) adapter->cmb.cmb +
  232. (sizeof(struct coals_msg_block) + offset));
  233. return ATL1_SUCCESS;
  234. err_nomem:
  235. kfree(tpd_ring->buffer_info);
  236. return -ENOMEM;
  237. }
  238. /*
  239. * atl1_irq_enable - Enable default interrupt generation settings
  240. * @adapter: board private structure
  241. */
  242. static void atl1_irq_enable(struct atl1_adapter *adapter)
  243. {
  244. iowrite32(IMR_NORMAL_MASK, adapter->hw.hw_addr + REG_IMR);
  245. ioread32(adapter->hw.hw_addr + REG_IMR);
  246. }
  247. static void atl1_clear_phy_int(struct atl1_adapter *adapter)
  248. {
  249. u16 phy_data;
  250. unsigned long flags;
  251. spin_lock_irqsave(&adapter->lock, flags);
  252. atl1_read_phy_reg(&adapter->hw, 19, &phy_data);
  253. spin_unlock_irqrestore(&adapter->lock, flags);
  254. }
  255. static void atl1_inc_smb(struct atl1_adapter *adapter)
  256. {
  257. struct stats_msg_block *smb = adapter->smb.smb;
  258. /* Fill out the OS statistics structure */
  259. adapter->soft_stats.rx_packets += smb->rx_ok;
  260. adapter->soft_stats.tx_packets += smb->tx_ok;
  261. adapter->soft_stats.rx_bytes += smb->rx_byte_cnt;
  262. adapter->soft_stats.tx_bytes += smb->tx_byte_cnt;
  263. adapter->soft_stats.multicast += smb->rx_mcast;
  264. adapter->soft_stats.collisions += (smb->tx_1_col + smb->tx_2_col * 2 +
  265. smb->tx_late_col + smb->tx_abort_col * adapter->hw.max_retry);
  266. /* Rx Errors */
  267. adapter->soft_stats.rx_errors += (smb->rx_frag + smb->rx_fcs_err +
  268. smb->rx_len_err + smb->rx_sz_ov + smb->rx_rxf_ov +
  269. smb->rx_rrd_ov + smb->rx_align_err);
  270. adapter->soft_stats.rx_fifo_errors += smb->rx_rxf_ov;
  271. adapter->soft_stats.rx_length_errors += smb->rx_len_err;
  272. adapter->soft_stats.rx_crc_errors += smb->rx_fcs_err;
  273. adapter->soft_stats.rx_frame_errors += smb->rx_align_err;
  274. adapter->soft_stats.rx_missed_errors += (smb->rx_rrd_ov +
  275. smb->rx_rxf_ov);
  276. adapter->soft_stats.rx_pause += smb->rx_pause;
  277. adapter->soft_stats.rx_rrd_ov += smb->rx_rrd_ov;
  278. adapter->soft_stats.rx_trunc += smb->rx_sz_ov;
  279. /* Tx Errors */
  280. adapter->soft_stats.tx_errors += (smb->tx_late_col +
  281. smb->tx_abort_col + smb->tx_underrun + smb->tx_trunc);
  282. adapter->soft_stats.tx_fifo_errors += smb->tx_underrun;
  283. adapter->soft_stats.tx_aborted_errors += smb->tx_abort_col;
  284. adapter->soft_stats.tx_window_errors += smb->tx_late_col;
  285. adapter->soft_stats.excecol += smb->tx_abort_col;
  286. adapter->soft_stats.deffer += smb->tx_defer;
  287. adapter->soft_stats.scc += smb->tx_1_col;
  288. adapter->soft_stats.mcc += smb->tx_2_col;
  289. adapter->soft_stats.latecol += smb->tx_late_col;
  290. adapter->soft_stats.tx_underun += smb->tx_underrun;
  291. adapter->soft_stats.tx_trunc += smb->tx_trunc;
  292. adapter->soft_stats.tx_pause += smb->tx_pause;
  293. adapter->net_stats.rx_packets = adapter->soft_stats.rx_packets;
  294. adapter->net_stats.tx_packets = adapter->soft_stats.tx_packets;
  295. adapter->net_stats.rx_bytes = adapter->soft_stats.rx_bytes;
  296. adapter->net_stats.tx_bytes = adapter->soft_stats.tx_bytes;
  297. adapter->net_stats.multicast = adapter->soft_stats.multicast;
  298. adapter->net_stats.collisions = adapter->soft_stats.collisions;
  299. adapter->net_stats.rx_errors = adapter->soft_stats.rx_errors;
  300. adapter->net_stats.rx_over_errors =
  301. adapter->soft_stats.rx_missed_errors;
  302. adapter->net_stats.rx_length_errors =
  303. adapter->soft_stats.rx_length_errors;
  304. adapter->net_stats.rx_crc_errors = adapter->soft_stats.rx_crc_errors;
  305. adapter->net_stats.rx_frame_errors =
  306. adapter->soft_stats.rx_frame_errors;
  307. adapter->net_stats.rx_fifo_errors = adapter->soft_stats.rx_fifo_errors;
  308. adapter->net_stats.rx_missed_errors =
  309. adapter->soft_stats.rx_missed_errors;
  310. adapter->net_stats.tx_errors = adapter->soft_stats.tx_errors;
  311. adapter->net_stats.tx_fifo_errors = adapter->soft_stats.tx_fifo_errors;
  312. adapter->net_stats.tx_aborted_errors =
  313. adapter->soft_stats.tx_aborted_errors;
  314. adapter->net_stats.tx_window_errors =
  315. adapter->soft_stats.tx_window_errors;
  316. adapter->net_stats.tx_carrier_errors =
  317. adapter->soft_stats.tx_carrier_errors;
  318. }
  319. static void atl1_rx_checksum(struct atl1_adapter *adapter,
  320. struct rx_return_desc *rrd, struct sk_buff *skb)
  321. {
  322. struct pci_dev *pdev = adapter->pdev;
  323. skb->ip_summed = CHECKSUM_NONE;
  324. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  325. if (rrd->err_flg & (ERR_FLAG_CRC | ERR_FLAG_TRUNC |
  326. ERR_FLAG_CODE | ERR_FLAG_OV)) {
  327. adapter->hw_csum_err++;
  328. dev_printk(KERN_DEBUG, &pdev->dev,
  329. "rx checksum error\n");
  330. return;
  331. }
  332. }
  333. /* not IPv4 */
  334. if (!(rrd->pkt_flg & PACKET_FLAG_IPV4))
  335. /* checksum is invalid, but it's not an IPv4 pkt, so ok */
  336. return;
  337. /* IPv4 packet */
  338. if (likely(!(rrd->err_flg &
  339. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM)))) {
  340. skb->ip_summed = CHECKSUM_UNNECESSARY;
  341. adapter->hw_csum_good++;
  342. return;
  343. }
  344. /* IPv4, but hardware thinks its checksum is wrong */
  345. dev_printk(KERN_DEBUG, &pdev->dev,
  346. "hw csum wrong, pkt_flag:%x, err_flag:%x\n",
  347. rrd->pkt_flg, rrd->err_flg);
  348. skb->ip_summed = CHECKSUM_COMPLETE;
  349. skb->csum = htons(rrd->xsz.xsum_sz.rx_chksum);
  350. adapter->hw_csum_err++;
  351. return;
  352. }
  353. /*
  354. * atl1_alloc_rx_buffers - Replace used receive buffers
  355. * @adapter: address of board private structure
  356. */
  357. static u16 atl1_alloc_rx_buffers(struct atl1_adapter *adapter)
  358. {
  359. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  360. struct pci_dev *pdev = adapter->pdev;
  361. struct page *page;
  362. unsigned long offset;
  363. struct atl1_buffer *buffer_info, *next_info;
  364. struct sk_buff *skb;
  365. u16 num_alloc = 0;
  366. u16 rfd_next_to_use, next_next;
  367. struct rx_free_desc *rfd_desc;
  368. next_next = rfd_next_to_use = atomic_read(&rfd_ring->next_to_use);
  369. if (++next_next == rfd_ring->count)
  370. next_next = 0;
  371. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  372. next_info = &rfd_ring->buffer_info[next_next];
  373. while (!buffer_info->alloced && !next_info->alloced) {
  374. if (buffer_info->skb) {
  375. buffer_info->alloced = 1;
  376. goto next;
  377. }
  378. rfd_desc = ATL1_RFD_DESC(rfd_ring, rfd_next_to_use);
  379. skb = dev_alloc_skb(adapter->rx_buffer_len + NET_IP_ALIGN);
  380. if (unlikely(!skb)) { /* Better luck next round */
  381. adapter->net_stats.rx_dropped++;
  382. break;
  383. }
  384. /*
  385. * Make buffer alignment 2 beyond a 16 byte boundary
  386. * this will result in a 16 byte aligned IP header after
  387. * the 14 byte MAC header is removed
  388. */
  389. skb_reserve(skb, NET_IP_ALIGN);
  390. buffer_info->alloced = 1;
  391. buffer_info->skb = skb;
  392. buffer_info->length = (u16) adapter->rx_buffer_len;
  393. page = virt_to_page(skb->data);
  394. offset = (unsigned long)skb->data & ~PAGE_MASK;
  395. buffer_info->dma = pci_map_page(pdev, page, offset,
  396. adapter->rx_buffer_len,
  397. PCI_DMA_FROMDEVICE);
  398. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  399. rfd_desc->buf_len = cpu_to_le16(adapter->rx_buffer_len);
  400. rfd_desc->coalese = 0;
  401. next:
  402. rfd_next_to_use = next_next;
  403. if (unlikely(++next_next == rfd_ring->count))
  404. next_next = 0;
  405. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  406. next_info = &rfd_ring->buffer_info[next_next];
  407. num_alloc++;
  408. }
  409. if (num_alloc) {
  410. /*
  411. * Force memory writes to complete before letting h/w
  412. * know there are new descriptors to fetch. (Only
  413. * applicable for weak-ordered memory model archs,
  414. * such as IA-64).
  415. */
  416. wmb();
  417. atomic_set(&rfd_ring->next_to_use, (int)rfd_next_to_use);
  418. }
  419. return num_alloc;
  420. }
  421. static void atl1_intr_rx(struct atl1_adapter *adapter)
  422. {
  423. int i, count;
  424. u16 length;
  425. u16 rrd_next_to_clean;
  426. u32 value;
  427. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  428. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  429. struct atl1_buffer *buffer_info;
  430. struct rx_return_desc *rrd;
  431. struct sk_buff *skb;
  432. count = 0;
  433. rrd_next_to_clean = atomic_read(&rrd_ring->next_to_clean);
  434. while (1) {
  435. rrd = ATL1_RRD_DESC(rrd_ring, rrd_next_to_clean);
  436. i = 1;
  437. if (likely(rrd->xsz.valid)) { /* packet valid */
  438. chk_rrd:
  439. /* check rrd status */
  440. if (likely(rrd->num_buf == 1))
  441. goto rrd_ok;
  442. /* rrd seems to be bad */
  443. if (unlikely(i-- > 0)) {
  444. /* rrd may not be DMAed completely */
  445. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  446. "incomplete RRD DMA transfer\n");
  447. udelay(1);
  448. goto chk_rrd;
  449. }
  450. /* bad rrd */
  451. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  452. "bad RRD\n");
  453. /* see if update RFD index */
  454. if (rrd->num_buf > 1) {
  455. u16 num_buf;
  456. num_buf =
  457. (rrd->xsz.xsum_sz.pkt_size +
  458. adapter->rx_buffer_len -
  459. 1) / adapter->rx_buffer_len;
  460. if (rrd->num_buf == num_buf) {
  461. /* clean alloc flag for bad rrd */
  462. while (rfd_ring->next_to_clean !=
  463. (rrd->buf_indx + num_buf)) {
  464. rfd_ring->buffer_info[rfd_ring->
  465. next_to_clean].alloced = 0;
  466. if (++rfd_ring->next_to_clean ==
  467. rfd_ring->count) {
  468. rfd_ring->
  469. next_to_clean = 0;
  470. }
  471. }
  472. }
  473. }
  474. /* update rrd */
  475. rrd->xsz.valid = 0;
  476. if (++rrd_next_to_clean == rrd_ring->count)
  477. rrd_next_to_clean = 0;
  478. count++;
  479. continue;
  480. } else { /* current rrd still not be updated */
  481. break;
  482. }
  483. rrd_ok:
  484. /* clean alloc flag for bad rrd */
  485. while (rfd_ring->next_to_clean != rrd->buf_indx) {
  486. rfd_ring->buffer_info[rfd_ring->next_to_clean].alloced =
  487. 0;
  488. if (++rfd_ring->next_to_clean == rfd_ring->count)
  489. rfd_ring->next_to_clean = 0;
  490. }
  491. buffer_info = &rfd_ring->buffer_info[rrd->buf_indx];
  492. if (++rfd_ring->next_to_clean == rfd_ring->count)
  493. rfd_ring->next_to_clean = 0;
  494. /* update rrd next to clean */
  495. if (++rrd_next_to_clean == rrd_ring->count)
  496. rrd_next_to_clean = 0;
  497. count++;
  498. if (unlikely(rrd->pkt_flg & PACKET_FLAG_ERR)) {
  499. if (!(rrd->err_flg &
  500. (ERR_FLAG_IP_CHKSUM | ERR_FLAG_L4_CHKSUM
  501. | ERR_FLAG_LEN))) {
  502. /* packet error, don't need upstream */
  503. buffer_info->alloced = 0;
  504. rrd->xsz.valid = 0;
  505. continue;
  506. }
  507. }
  508. /* Good Receive */
  509. pci_unmap_page(adapter->pdev, buffer_info->dma,
  510. buffer_info->length, PCI_DMA_FROMDEVICE);
  511. skb = buffer_info->skb;
  512. length = le16_to_cpu(rrd->xsz.xsum_sz.pkt_size);
  513. skb_put(skb, length - ETHERNET_FCS_SIZE);
  514. /* Receive Checksum Offload */
  515. atl1_rx_checksum(adapter, rrd, skb);
  516. skb->protocol = eth_type_trans(skb, adapter->netdev);
  517. if (adapter->vlgrp && (rrd->pkt_flg & PACKET_FLAG_VLAN_INS)) {
  518. u16 vlan_tag = (rrd->vlan_tag >> 4) |
  519. ((rrd->vlan_tag & 7) << 13) |
  520. ((rrd->vlan_tag & 8) << 9);
  521. vlan_hwaccel_rx(skb, adapter->vlgrp, vlan_tag);
  522. } else
  523. netif_rx(skb);
  524. /* let protocol layer free skb */
  525. buffer_info->skb = NULL;
  526. buffer_info->alloced = 0;
  527. rrd->xsz.valid = 0;
  528. adapter->netdev->last_rx = jiffies;
  529. }
  530. atomic_set(&rrd_ring->next_to_clean, rrd_next_to_clean);
  531. atl1_alloc_rx_buffers(adapter);
  532. /* update mailbox ? */
  533. if (count) {
  534. u32 tpd_next_to_use;
  535. u32 rfd_next_to_use;
  536. u32 rrd_next_to_clean;
  537. spin_lock(&adapter->mb_lock);
  538. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  539. rfd_next_to_use =
  540. atomic_read(&adapter->rfd_ring.next_to_use);
  541. rrd_next_to_clean =
  542. atomic_read(&adapter->rrd_ring.next_to_clean);
  543. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  544. MB_RFD_PROD_INDX_SHIFT) |
  545. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  546. MB_RRD_CONS_INDX_SHIFT) |
  547. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  548. MB_TPD_PROD_INDX_SHIFT);
  549. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  550. spin_unlock(&adapter->mb_lock);
  551. }
  552. }
  553. static void atl1_intr_tx(struct atl1_adapter *adapter)
  554. {
  555. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  556. struct atl1_buffer *buffer_info;
  557. u16 sw_tpd_next_to_clean;
  558. u16 cmb_tpd_next_to_clean;
  559. sw_tpd_next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  560. cmb_tpd_next_to_clean = le16_to_cpu(adapter->cmb.cmb->tpd_cons_idx);
  561. while (cmb_tpd_next_to_clean != sw_tpd_next_to_clean) {
  562. struct tx_packet_desc *tpd;
  563. tpd = ATL1_TPD_DESC(tpd_ring, sw_tpd_next_to_clean);
  564. buffer_info = &tpd_ring->buffer_info[sw_tpd_next_to_clean];
  565. if (buffer_info->dma) {
  566. pci_unmap_page(adapter->pdev, buffer_info->dma,
  567. buffer_info->length, PCI_DMA_TODEVICE);
  568. buffer_info->dma = 0;
  569. }
  570. if (buffer_info->skb) {
  571. dev_kfree_skb_irq(buffer_info->skb);
  572. buffer_info->skb = NULL;
  573. }
  574. tpd->buffer_addr = 0;
  575. tpd->desc.data = 0;
  576. if (++sw_tpd_next_to_clean == tpd_ring->count)
  577. sw_tpd_next_to_clean = 0;
  578. }
  579. atomic_set(&tpd_ring->next_to_clean, sw_tpd_next_to_clean);
  580. if (netif_queue_stopped(adapter->netdev)
  581. && netif_carrier_ok(adapter->netdev))
  582. netif_wake_queue(adapter->netdev);
  583. }
  584. static void atl1_check_for_link(struct atl1_adapter *adapter)
  585. {
  586. struct net_device *netdev = adapter->netdev;
  587. u16 phy_data = 0;
  588. spin_lock(&adapter->lock);
  589. adapter->phy_timer_pending = false;
  590. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  591. atl1_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  592. spin_unlock(&adapter->lock);
  593. /* notify upper layer link down ASAP */
  594. if (!(phy_data & BMSR_LSTATUS)) { /* Link Down */
  595. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  596. dev_info(&adapter->pdev->dev, "%s link is down\n",
  597. netdev->name);
  598. adapter->link_speed = SPEED_0;
  599. netif_carrier_off(netdev);
  600. netif_stop_queue(netdev);
  601. }
  602. }
  603. schedule_work(&adapter->link_chg_task);
  604. }
  605. /*
  606. * atl1_intr - Interrupt Handler
  607. * @irq: interrupt number
  608. * @data: pointer to a network interface device structure
  609. * @pt_regs: CPU registers structure
  610. */
  611. static irqreturn_t atl1_intr(int irq, void *data)
  612. {
  613. struct atl1_adapter *adapter = netdev_priv(data);
  614. u32 status;
  615. u8 update_rx;
  616. int max_ints = 10;
  617. status = adapter->cmb.cmb->int_stats;
  618. if (!status)
  619. return IRQ_NONE;
  620. update_rx = 0;
  621. do {
  622. /* clear CMB interrupt status at once */
  623. adapter->cmb.cmb->int_stats = 0;
  624. if (status & ISR_GPHY) /* clear phy status */
  625. atl1_clear_phy_int(adapter);
  626. /* clear ISR status, and Enable CMB DMA/Disable Interrupt */
  627. iowrite32(status | ISR_DIS_INT, adapter->hw.hw_addr + REG_ISR);
  628. /* check if SMB intr */
  629. if (status & ISR_SMB)
  630. atl1_inc_smb(adapter);
  631. /* check if PCIE PHY Link down */
  632. if (status & ISR_PHY_LINKDOWN) {
  633. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  634. "pcie phy link down %x\n", status);
  635. if (netif_running(adapter->netdev)) { /* reset MAC */
  636. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  637. schedule_work(&adapter->pcie_dma_to_rst_task);
  638. return IRQ_HANDLED;
  639. }
  640. }
  641. /* check if DMA read/write error ? */
  642. if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
  643. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  644. "pcie DMA r/w error (status = 0x%x)\n",
  645. status);
  646. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  647. schedule_work(&adapter->pcie_dma_to_rst_task);
  648. return IRQ_HANDLED;
  649. }
  650. /* link event */
  651. if (status & ISR_GPHY) {
  652. adapter->soft_stats.tx_carrier_errors++;
  653. atl1_check_for_link(adapter);
  654. }
  655. /* transmit event */
  656. if (status & ISR_CMB_TX)
  657. atl1_intr_tx(adapter);
  658. /* rx exception */
  659. if (unlikely(status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  660. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  661. ISR_HOST_RRD_OV | ISR_CMB_RX))) {
  662. if (status & (ISR_RXF_OV | ISR_RFD_UNRUN |
  663. ISR_RRD_OV | ISR_HOST_RFD_UNRUN |
  664. ISR_HOST_RRD_OV))
  665. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  666. "rx exception, ISR = 0x%x\n", status);
  667. atl1_intr_rx(adapter);
  668. }
  669. if (--max_ints < 0)
  670. break;
  671. } while ((status = adapter->cmb.cmb->int_stats));
  672. /* re-enable Interrupt */
  673. iowrite32(ISR_DIS_SMB | ISR_DIS_DMA, adapter->hw.hw_addr + REG_ISR);
  674. return IRQ_HANDLED;
  675. }
  676. /*
  677. * atl1_set_multi - Multicast and Promiscuous mode set
  678. * @netdev: network interface device structure
  679. *
  680. * The set_multi entry point is called whenever the multicast address
  681. * list or the network interface flags are updated. This routine is
  682. * responsible for configuring the hardware for proper multicast,
  683. * promiscuous mode, and all-multi behavior.
  684. */
  685. static void atl1_set_multi(struct net_device *netdev)
  686. {
  687. struct atl1_adapter *adapter = netdev_priv(netdev);
  688. struct atl1_hw *hw = &adapter->hw;
  689. struct dev_mc_list *mc_ptr;
  690. u32 rctl;
  691. u32 hash_value;
  692. /* Check for Promiscuous and All Multicast modes */
  693. rctl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  694. if (netdev->flags & IFF_PROMISC)
  695. rctl |= MAC_CTRL_PROMIS_EN;
  696. else if (netdev->flags & IFF_ALLMULTI) {
  697. rctl |= MAC_CTRL_MC_ALL_EN;
  698. rctl &= ~MAC_CTRL_PROMIS_EN;
  699. } else
  700. rctl &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  701. iowrite32(rctl, hw->hw_addr + REG_MAC_CTRL);
  702. /* clear the old settings from the multicast hash table */
  703. iowrite32(0, hw->hw_addr + REG_RX_HASH_TABLE);
  704. iowrite32(0, (hw->hw_addr + REG_RX_HASH_TABLE) + (1 << 2));
  705. /* compute mc addresses' hash value ,and put it into hash table */
  706. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  707. hash_value = atl1_hash_mc_addr(hw, mc_ptr->dmi_addr);
  708. atl1_hash_set(hw, hash_value);
  709. }
  710. }
  711. static void atl1_setup_mac_ctrl(struct atl1_adapter *adapter)
  712. {
  713. u32 value;
  714. struct atl1_hw *hw = &adapter->hw;
  715. struct net_device *netdev = adapter->netdev;
  716. /* Config MAC CTRL Register */
  717. value = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  718. /* duplex */
  719. if (FULL_DUPLEX == adapter->link_duplex)
  720. value |= MAC_CTRL_DUPLX;
  721. /* speed */
  722. value |= ((u32) ((SPEED_1000 == adapter->link_speed) ?
  723. MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
  724. MAC_CTRL_SPEED_SHIFT);
  725. /* flow control */
  726. value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  727. /* PAD & CRC */
  728. value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  729. /* preamble length */
  730. value |= (((u32) adapter->hw.preamble_len
  731. & MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
  732. /* vlan */
  733. if (adapter->vlgrp)
  734. value |= MAC_CTRL_RMV_VLAN;
  735. /* rx checksum
  736. if (adapter->rx_csum)
  737. value |= MAC_CTRL_RX_CHKSUM_EN;
  738. */
  739. /* filter mode */
  740. value |= MAC_CTRL_BC_EN;
  741. if (netdev->flags & IFF_PROMISC)
  742. value |= MAC_CTRL_PROMIS_EN;
  743. else if (netdev->flags & IFF_ALLMULTI)
  744. value |= MAC_CTRL_MC_ALL_EN;
  745. /* value |= MAC_CTRL_LOOPBACK; */
  746. iowrite32(value, hw->hw_addr + REG_MAC_CTRL);
  747. }
  748. static u32 atl1_check_link(struct atl1_adapter *adapter)
  749. {
  750. struct atl1_hw *hw = &adapter->hw;
  751. struct net_device *netdev = adapter->netdev;
  752. u32 ret_val;
  753. u16 speed, duplex, phy_data;
  754. int reconfig = 0;
  755. /* MII_BMSR must read twice */
  756. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  757. atl1_read_phy_reg(hw, MII_BMSR, &phy_data);
  758. if (!(phy_data & BMSR_LSTATUS)) { /* link down */
  759. if (netif_carrier_ok(netdev)) { /* old link state: Up */
  760. dev_info(&adapter->pdev->dev, "link is down\n");
  761. adapter->link_speed = SPEED_0;
  762. netif_carrier_off(netdev);
  763. netif_stop_queue(netdev);
  764. }
  765. return ATL1_SUCCESS;
  766. }
  767. /* Link Up */
  768. ret_val = atl1_get_speed_and_duplex(hw, &speed, &duplex);
  769. if (ret_val)
  770. return ret_val;
  771. switch (hw->media_type) {
  772. case MEDIA_TYPE_1000M_FULL:
  773. if (speed != SPEED_1000 || duplex != FULL_DUPLEX)
  774. reconfig = 1;
  775. break;
  776. case MEDIA_TYPE_100M_FULL:
  777. if (speed != SPEED_100 || duplex != FULL_DUPLEX)
  778. reconfig = 1;
  779. break;
  780. case MEDIA_TYPE_100M_HALF:
  781. if (speed != SPEED_100 || duplex != HALF_DUPLEX)
  782. reconfig = 1;
  783. break;
  784. case MEDIA_TYPE_10M_FULL:
  785. if (speed != SPEED_10 || duplex != FULL_DUPLEX)
  786. reconfig = 1;
  787. break;
  788. case MEDIA_TYPE_10M_HALF:
  789. if (speed != SPEED_10 || duplex != HALF_DUPLEX)
  790. reconfig = 1;
  791. break;
  792. }
  793. /* link result is our setting */
  794. if (!reconfig) {
  795. if (adapter->link_speed != speed
  796. || adapter->link_duplex != duplex) {
  797. adapter->link_speed = speed;
  798. adapter->link_duplex = duplex;
  799. atl1_setup_mac_ctrl(adapter);
  800. dev_info(&adapter->pdev->dev,
  801. "%s link is up %d Mbps %s\n",
  802. netdev->name, adapter->link_speed,
  803. adapter->link_duplex == FULL_DUPLEX ?
  804. "full duplex" : "half duplex");
  805. }
  806. if (!netif_carrier_ok(netdev)) { /* Link down -> Up */
  807. netif_carrier_on(netdev);
  808. netif_wake_queue(netdev);
  809. }
  810. return ATL1_SUCCESS;
  811. }
  812. /* change orignal link status */
  813. if (netif_carrier_ok(netdev)) {
  814. adapter->link_speed = SPEED_0;
  815. netif_carrier_off(netdev);
  816. netif_stop_queue(netdev);
  817. }
  818. if (hw->media_type != MEDIA_TYPE_AUTO_SENSOR &&
  819. hw->media_type != MEDIA_TYPE_1000M_FULL) {
  820. switch (hw->media_type) {
  821. case MEDIA_TYPE_100M_FULL:
  822. phy_data = MII_CR_FULL_DUPLEX | MII_CR_SPEED_100 |
  823. MII_CR_RESET;
  824. break;
  825. case MEDIA_TYPE_100M_HALF:
  826. phy_data = MII_CR_SPEED_100 | MII_CR_RESET;
  827. break;
  828. case MEDIA_TYPE_10M_FULL:
  829. phy_data =
  830. MII_CR_FULL_DUPLEX | MII_CR_SPEED_10 | MII_CR_RESET;
  831. break;
  832. default: /* MEDIA_TYPE_10M_HALF: */
  833. phy_data = MII_CR_SPEED_10 | MII_CR_RESET;
  834. break;
  835. }
  836. atl1_write_phy_reg(hw, MII_BMCR, phy_data);
  837. return ATL1_SUCCESS;
  838. }
  839. /* auto-neg, insert timer to re-config phy */
  840. if (!adapter->phy_timer_pending) {
  841. adapter->phy_timer_pending = true;
  842. mod_timer(&adapter->phy_config_timer, jiffies + 3 * HZ);
  843. }
  844. return ATL1_SUCCESS;
  845. }
  846. static void set_flow_ctrl_old(struct atl1_adapter *adapter)
  847. {
  848. u32 hi, lo, value;
  849. /* RFD Flow Control */
  850. value = adapter->rfd_ring.count;
  851. hi = value / 16;
  852. if (hi < 2)
  853. hi = 2;
  854. lo = value * 7 / 8;
  855. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  856. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  857. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  858. /* RRD Flow Control */
  859. value = adapter->rrd_ring.count;
  860. lo = value / 16;
  861. hi = value * 7 / 8;
  862. if (lo < 2)
  863. lo = 2;
  864. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  865. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  866. iowrite32(value, adapter->hw.hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  867. }
  868. static void set_flow_ctrl_new(struct atl1_hw *hw)
  869. {
  870. u32 hi, lo, value;
  871. /* RXF Flow Control */
  872. value = ioread32(hw->hw_addr + REG_SRAM_RXF_LEN);
  873. lo = value / 16;
  874. if (lo < 192)
  875. lo = 192;
  876. hi = value * 7 / 8;
  877. if (hi < lo)
  878. hi = lo + 16;
  879. value = ((hi & RXQ_RXF_PAUSE_TH_HI_MASK) << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
  880. ((lo & RXQ_RXF_PAUSE_TH_LO_MASK) << RXQ_RXF_PAUSE_TH_LO_SHIFT);
  881. iowrite32(value, hw->hw_addr + REG_RXQ_RXF_PAUSE_THRESH);
  882. /* RRD Flow Control */
  883. value = ioread32(hw->hw_addr + REG_SRAM_RRD_LEN);
  884. lo = value / 8;
  885. hi = value * 7 / 8;
  886. if (lo < 2)
  887. lo = 2;
  888. if (hi < lo)
  889. hi = lo + 3;
  890. value = ((hi & RXQ_RRD_PAUSE_TH_HI_MASK) << RXQ_RRD_PAUSE_TH_HI_SHIFT) |
  891. ((lo & RXQ_RRD_PAUSE_TH_LO_MASK) << RXQ_RRD_PAUSE_TH_LO_SHIFT);
  892. iowrite32(value, hw->hw_addr + REG_RXQ_RRD_PAUSE_THRESH);
  893. }
  894. /*
  895. * atl1_configure - Configure Transmit&Receive Unit after Reset
  896. * @adapter: board private structure
  897. *
  898. * Configure the Tx /Rx unit of the MAC after a reset.
  899. */
  900. static u32 atl1_configure(struct atl1_adapter *adapter)
  901. {
  902. struct atl1_hw *hw = &adapter->hw;
  903. u32 value;
  904. /* clear interrupt status */
  905. iowrite32(0xffffffff, adapter->hw.hw_addr + REG_ISR);
  906. /* set MAC Address */
  907. value = (((u32) hw->mac_addr[2]) << 24) |
  908. (((u32) hw->mac_addr[3]) << 16) |
  909. (((u32) hw->mac_addr[4]) << 8) |
  910. (((u32) hw->mac_addr[5]));
  911. iowrite32(value, hw->hw_addr + REG_MAC_STA_ADDR);
  912. value = (((u32) hw->mac_addr[0]) << 8) | (((u32) hw->mac_addr[1]));
  913. iowrite32(value, hw->hw_addr + (REG_MAC_STA_ADDR + 4));
  914. /* tx / rx ring */
  915. /* HI base address */
  916. iowrite32((u32) ((adapter->tpd_ring.dma & 0xffffffff00000000ULL) >> 32),
  917. hw->hw_addr + REG_DESC_BASE_ADDR_HI);
  918. /* LO base address */
  919. iowrite32((u32) (adapter->rfd_ring.dma & 0x00000000ffffffffULL),
  920. hw->hw_addr + REG_DESC_RFD_ADDR_LO);
  921. iowrite32((u32) (adapter->rrd_ring.dma & 0x00000000ffffffffULL),
  922. hw->hw_addr + REG_DESC_RRD_ADDR_LO);
  923. iowrite32((u32) (adapter->tpd_ring.dma & 0x00000000ffffffffULL),
  924. hw->hw_addr + REG_DESC_TPD_ADDR_LO);
  925. iowrite32((u32) (adapter->cmb.dma & 0x00000000ffffffffULL),
  926. hw->hw_addr + REG_DESC_CMB_ADDR_LO);
  927. iowrite32((u32) (adapter->smb.dma & 0x00000000ffffffffULL),
  928. hw->hw_addr + REG_DESC_SMB_ADDR_LO);
  929. /* element count */
  930. value = adapter->rrd_ring.count;
  931. value <<= 16;
  932. value += adapter->rfd_ring.count;
  933. iowrite32(value, hw->hw_addr + REG_DESC_RFD_RRD_RING_SIZE);
  934. iowrite32(adapter->tpd_ring.count, hw->hw_addr + REG_DESC_TPD_RING_SIZE);
  935. /* Load Ptr */
  936. iowrite32(1, hw->hw_addr + REG_LOAD_PTR);
  937. /* config Mailbox */
  938. value = ((atomic_read(&adapter->tpd_ring.next_to_use)
  939. & MB_TPD_PROD_INDX_MASK) << MB_TPD_PROD_INDX_SHIFT) |
  940. ((atomic_read(&adapter->rrd_ring.next_to_clean)
  941. & MB_RRD_CONS_INDX_MASK) << MB_RRD_CONS_INDX_SHIFT) |
  942. ((atomic_read(&adapter->rfd_ring.next_to_use)
  943. & MB_RFD_PROD_INDX_MASK) << MB_RFD_PROD_INDX_SHIFT);
  944. iowrite32(value, hw->hw_addr + REG_MAILBOX);
  945. /* config IPG/IFG */
  946. value = (((u32) hw->ipgt & MAC_IPG_IFG_IPGT_MASK)
  947. << MAC_IPG_IFG_IPGT_SHIFT) |
  948. (((u32) hw->min_ifg & MAC_IPG_IFG_MIFG_MASK)
  949. << MAC_IPG_IFG_MIFG_SHIFT) |
  950. (((u32) hw->ipgr1 & MAC_IPG_IFG_IPGR1_MASK)
  951. << MAC_IPG_IFG_IPGR1_SHIFT) |
  952. (((u32) hw->ipgr2 & MAC_IPG_IFG_IPGR2_MASK)
  953. << MAC_IPG_IFG_IPGR2_SHIFT);
  954. iowrite32(value, hw->hw_addr + REG_MAC_IPG_IFG);
  955. /* config Half-Duplex Control */
  956. value = ((u32) hw->lcol & MAC_HALF_DUPLX_CTRL_LCOL_MASK) |
  957. (((u32) hw->max_retry & MAC_HALF_DUPLX_CTRL_RETRY_MASK)
  958. << MAC_HALF_DUPLX_CTRL_RETRY_SHIFT) |
  959. MAC_HALF_DUPLX_CTRL_EXC_DEF_EN |
  960. (0xa << MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT) |
  961. (((u32) hw->jam_ipg & MAC_HALF_DUPLX_CTRL_JAMIPG_MASK)
  962. << MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT);
  963. iowrite32(value, hw->hw_addr + REG_MAC_HALF_DUPLX_CTRL);
  964. /* set Interrupt Moderator Timer */
  965. iowrite16(adapter->imt, hw->hw_addr + REG_IRQ_MODU_TIMER_INIT);
  966. iowrite32(MASTER_CTRL_ITIMER_EN, hw->hw_addr + REG_MASTER_CTRL);
  967. /* set Interrupt Clear Timer */
  968. iowrite16(adapter->ict, hw->hw_addr + REG_CMBDISDMA_TIMER);
  969. /* set MTU, 4 : VLAN */
  970. iowrite32(hw->max_frame_size + 4, hw->hw_addr + REG_MTU);
  971. /* jumbo size & rrd retirement timer */
  972. value = (((u32) hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK)
  973. << RXQ_JMBOSZ_TH_SHIFT) |
  974. (((u32) hw->rx_jumbo_lkah & RXQ_JMBO_LKAH_MASK)
  975. << RXQ_JMBO_LKAH_SHIFT) |
  976. (((u32) hw->rrd_ret_timer & RXQ_RRD_TIMER_MASK)
  977. << RXQ_RRD_TIMER_SHIFT);
  978. iowrite32(value, hw->hw_addr + REG_RXQ_JMBOSZ_RRDTIM);
  979. /* Flow Control */
  980. switch (hw->dev_rev) {
  981. case 0x8001:
  982. case 0x9001:
  983. case 0x9002:
  984. case 0x9003:
  985. set_flow_ctrl_old(adapter);
  986. break;
  987. default:
  988. set_flow_ctrl_new(hw);
  989. break;
  990. }
  991. /* config TXQ */
  992. value = (((u32) hw->tpd_burst & TXQ_CTRL_TPD_BURST_NUM_MASK)
  993. << TXQ_CTRL_TPD_BURST_NUM_SHIFT) |
  994. (((u32) hw->txf_burst & TXQ_CTRL_TXF_BURST_NUM_MASK)
  995. << TXQ_CTRL_TXF_BURST_NUM_SHIFT) |
  996. (((u32) hw->tpd_fetch_th & TXQ_CTRL_TPD_FETCH_TH_MASK)
  997. << TXQ_CTRL_TPD_FETCH_TH_SHIFT) | TXQ_CTRL_ENH_MODE |
  998. TXQ_CTRL_EN;
  999. iowrite32(value, hw->hw_addr + REG_TXQ_CTRL);
  1000. /* min tpd fetch gap & tx jumbo packet size threshold for taskoffload */
  1001. value = (((u32) hw->tx_jumbo_task_th & TX_JUMBO_TASK_TH_MASK)
  1002. << TX_JUMBO_TASK_TH_SHIFT) |
  1003. (((u32) hw->tpd_fetch_gap & TX_TPD_MIN_IPG_MASK)
  1004. << TX_TPD_MIN_IPG_SHIFT);
  1005. iowrite32(value, hw->hw_addr + REG_TX_JUMBO_TASK_TH_TPD_IPG);
  1006. /* config RXQ */
  1007. value = (((u32) hw->rfd_burst & RXQ_CTRL_RFD_BURST_NUM_MASK)
  1008. << RXQ_CTRL_RFD_BURST_NUM_SHIFT) |
  1009. (((u32) hw->rrd_burst & RXQ_CTRL_RRD_BURST_THRESH_MASK)
  1010. << RXQ_CTRL_RRD_BURST_THRESH_SHIFT) |
  1011. (((u32) hw->rfd_fetch_gap & RXQ_CTRL_RFD_PREF_MIN_IPG_MASK)
  1012. << RXQ_CTRL_RFD_PREF_MIN_IPG_SHIFT) | RXQ_CTRL_CUT_THRU_EN |
  1013. RXQ_CTRL_EN;
  1014. iowrite32(value, hw->hw_addr + REG_RXQ_CTRL);
  1015. /* config DMA Engine */
  1016. value = ((((u32) hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1017. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) |
  1018. ((((u32) hw->dmaw_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  1019. << DMA_CTRL_DMAR_BURST_LEN_SHIFT) | DMA_CTRL_DMAR_EN |
  1020. DMA_CTRL_DMAW_EN;
  1021. value |= (u32) hw->dma_ord;
  1022. if (atl1_rcb_128 == hw->rcb_value)
  1023. value |= DMA_CTRL_RCB_VALUE;
  1024. iowrite32(value, hw->hw_addr + REG_DMA_CTRL);
  1025. /* config CMB / SMB */
  1026. value = hw->cmb_rrd | ((u32) hw->cmb_tpd << 16);
  1027. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TH);
  1028. value = hw->cmb_rx_timer | ((u32) hw->cmb_tx_timer << 16);
  1029. iowrite32(value, hw->hw_addr + REG_CMB_WRITE_TIMER);
  1030. iowrite32(hw->smb_timer, hw->hw_addr + REG_SMB_TIMER);
  1031. /* --- enable CMB / SMB */
  1032. value = CSMB_CTRL_CMB_EN | CSMB_CTRL_SMB_EN;
  1033. iowrite32(value, hw->hw_addr + REG_CSMB_CTRL);
  1034. value = ioread32(adapter->hw.hw_addr + REG_ISR);
  1035. if (unlikely((value & ISR_PHY_LINKDOWN) != 0))
  1036. value = 1; /* config failed */
  1037. else
  1038. value = 0;
  1039. /* clear all interrupt status */
  1040. iowrite32(0x3fffffff, adapter->hw.hw_addr + REG_ISR);
  1041. iowrite32(0, adapter->hw.hw_addr + REG_ISR);
  1042. return value;
  1043. }
  1044. /*
  1045. * atl1_irq_disable - Mask off interrupt generation on the NIC
  1046. * @adapter: board private structure
  1047. */
  1048. static void atl1_irq_disable(struct atl1_adapter *adapter)
  1049. {
  1050. iowrite32(0, adapter->hw.hw_addr + REG_IMR);
  1051. ioread32(adapter->hw.hw_addr + REG_IMR);
  1052. synchronize_irq(adapter->pdev->irq);
  1053. }
  1054. static void atl1_vlan_rx_register(struct net_device *netdev,
  1055. struct vlan_group *grp)
  1056. {
  1057. struct atl1_adapter *adapter = netdev_priv(netdev);
  1058. unsigned long flags;
  1059. u32 ctrl;
  1060. spin_lock_irqsave(&adapter->lock, flags);
  1061. /* atl1_irq_disable(adapter); */
  1062. adapter->vlgrp = grp;
  1063. if (grp) {
  1064. /* enable VLAN tag insert/strip */
  1065. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1066. ctrl |= MAC_CTRL_RMV_VLAN;
  1067. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1068. } else {
  1069. /* disable VLAN tag insert/strip */
  1070. ctrl = ioread32(adapter->hw.hw_addr + REG_MAC_CTRL);
  1071. ctrl &= ~MAC_CTRL_RMV_VLAN;
  1072. iowrite32(ctrl, adapter->hw.hw_addr + REG_MAC_CTRL);
  1073. }
  1074. /* atl1_irq_enable(adapter); */
  1075. spin_unlock_irqrestore(&adapter->lock, flags);
  1076. }
  1077. static void atl1_restore_vlan(struct atl1_adapter *adapter)
  1078. {
  1079. atl1_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  1080. }
  1081. static u16 tpd_avail(struct atl1_tpd_ring *tpd_ring)
  1082. {
  1083. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1084. u16 next_to_use = atomic_read(&tpd_ring->next_to_use);
  1085. return ((next_to_clean > next_to_use) ?
  1086. next_to_clean - next_to_use - 1 :
  1087. tpd_ring->count + next_to_clean - next_to_use - 1);
  1088. }
  1089. static int atl1_tso(struct atl1_adapter *adapter, struct sk_buff *skb,
  1090. struct tso_param *tso)
  1091. {
  1092. /* We enter this function holding a spinlock. */
  1093. u8 ipofst;
  1094. int err;
  1095. if (skb_shinfo(skb)->gso_size) {
  1096. if (skb_header_cloned(skb)) {
  1097. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1098. if (unlikely(err))
  1099. return err;
  1100. }
  1101. if (skb->protocol == ntohs(ETH_P_IP)) {
  1102. struct iphdr *iph = ip_hdr(skb);
  1103. iph->tot_len = 0;
  1104. iph->check = 0;
  1105. tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
  1106. iph->daddr, 0,
  1107. IPPROTO_TCP,
  1108. 0);
  1109. ipofst = skb_network_offset(skb);
  1110. if (ipofst != ENET_HEADER_SIZE) /* 802.3 frame */
  1111. tso->tsopl |= 1 << TSO_PARAM_ETHTYPE_SHIFT;
  1112. tso->tsopl |= (iph->ihl &
  1113. CSUM_PARAM_IPHL_MASK) << CSUM_PARAM_IPHL_SHIFT;
  1114. tso->tsopl |= (tcp_hdrlen(skb) &
  1115. TSO_PARAM_TCPHDRLEN_MASK) <<
  1116. TSO_PARAM_TCPHDRLEN_SHIFT;
  1117. tso->tsopl |= (skb_shinfo(skb)->gso_size &
  1118. TSO_PARAM_MSS_MASK) << TSO_PARAM_MSS_SHIFT;
  1119. tso->tsopl |= 1 << TSO_PARAM_IPCKSUM_SHIFT;
  1120. tso->tsopl |= 1 << TSO_PARAM_TCPCKSUM_SHIFT;
  1121. tso->tsopl |= 1 << TSO_PARAM_SEGMENT_SHIFT;
  1122. return true;
  1123. }
  1124. }
  1125. return false;
  1126. }
  1127. static int atl1_tx_csum(struct atl1_adapter *adapter, struct sk_buff *skb,
  1128. struct csum_param *csum)
  1129. {
  1130. u8 css, cso;
  1131. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1132. cso = skb_transport_offset(skb);
  1133. css = cso + skb->csum_offset;
  1134. if (unlikely(cso & 0x1)) {
  1135. dev_printk(KERN_DEBUG, &adapter->pdev->dev,
  1136. "payload offset not an even number\n");
  1137. return -1;
  1138. }
  1139. csum->csumpl |= (cso & CSUM_PARAM_PLOADOFFSET_MASK) <<
  1140. CSUM_PARAM_PLOADOFFSET_SHIFT;
  1141. csum->csumpl |= (css & CSUM_PARAM_XSUMOFFSET_MASK) <<
  1142. CSUM_PARAM_XSUMOFFSET_SHIFT;
  1143. csum->csumpl |= 1 << CSUM_PARAM_CUSTOMCKSUM_SHIFT;
  1144. return true;
  1145. }
  1146. return true;
  1147. }
  1148. static void atl1_tx_map(struct atl1_adapter *adapter, struct sk_buff *skb,
  1149. bool tcp_seg)
  1150. {
  1151. /* We enter this function holding a spinlock. */
  1152. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1153. struct atl1_buffer *buffer_info;
  1154. struct page *page;
  1155. int first_buf_len = skb->len;
  1156. unsigned long offset;
  1157. unsigned int nr_frags;
  1158. unsigned int f;
  1159. u16 tpd_next_to_use;
  1160. u16 proto_hdr_len;
  1161. u16 i, m, len12;
  1162. first_buf_len -= skb->data_len;
  1163. nr_frags = skb_shinfo(skb)->nr_frags;
  1164. tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1165. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1166. if (unlikely(buffer_info->skb))
  1167. BUG();
  1168. buffer_info->skb = NULL; /* put skb in last TPD */
  1169. if (tcp_seg) {
  1170. /* TSO/GSO */
  1171. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1172. buffer_info->length = proto_hdr_len;
  1173. page = virt_to_page(skb->data);
  1174. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1175. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1176. offset, proto_hdr_len,
  1177. PCI_DMA_TODEVICE);
  1178. if (++tpd_next_to_use == tpd_ring->count)
  1179. tpd_next_to_use = 0;
  1180. if (first_buf_len > proto_hdr_len) {
  1181. len12 = first_buf_len - proto_hdr_len;
  1182. m = (len12 + ATL1_MAX_TX_BUF_LEN - 1) /
  1183. ATL1_MAX_TX_BUF_LEN;
  1184. for (i = 0; i < m; i++) {
  1185. buffer_info =
  1186. &tpd_ring->buffer_info[tpd_next_to_use];
  1187. buffer_info->skb = NULL;
  1188. buffer_info->length =
  1189. (ATL1_MAX_TX_BUF_LEN >=
  1190. len12) ? ATL1_MAX_TX_BUF_LEN : len12;
  1191. len12 -= buffer_info->length;
  1192. page = virt_to_page(skb->data +
  1193. (proto_hdr_len +
  1194. i * ATL1_MAX_TX_BUF_LEN));
  1195. offset = (unsigned long)(skb->data +
  1196. (proto_hdr_len +
  1197. i * ATL1_MAX_TX_BUF_LEN)) & ~PAGE_MASK;
  1198. buffer_info->dma = pci_map_page(adapter->pdev,
  1199. page, offset, buffer_info->length,
  1200. PCI_DMA_TODEVICE);
  1201. if (++tpd_next_to_use == tpd_ring->count)
  1202. tpd_next_to_use = 0;
  1203. }
  1204. }
  1205. } else {
  1206. /* not TSO/GSO */
  1207. buffer_info->length = first_buf_len;
  1208. page = virt_to_page(skb->data);
  1209. offset = (unsigned long)skb->data & ~PAGE_MASK;
  1210. buffer_info->dma = pci_map_page(adapter->pdev, page,
  1211. offset, first_buf_len, PCI_DMA_TODEVICE);
  1212. if (++tpd_next_to_use == tpd_ring->count)
  1213. tpd_next_to_use = 0;
  1214. }
  1215. for (f = 0; f < nr_frags; f++) {
  1216. struct skb_frag_struct *frag;
  1217. u16 lenf, i, m;
  1218. frag = &skb_shinfo(skb)->frags[f];
  1219. lenf = frag->size;
  1220. m = (lenf + ATL1_MAX_TX_BUF_LEN - 1) / ATL1_MAX_TX_BUF_LEN;
  1221. for (i = 0; i < m; i++) {
  1222. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1223. if (unlikely(buffer_info->skb))
  1224. BUG();
  1225. buffer_info->skb = NULL;
  1226. buffer_info->length = (lenf > ATL1_MAX_TX_BUF_LEN) ?
  1227. ATL1_MAX_TX_BUF_LEN : lenf;
  1228. lenf -= buffer_info->length;
  1229. buffer_info->dma = pci_map_page(adapter->pdev,
  1230. frag->page,
  1231. frag->page_offset + (i * ATL1_MAX_TX_BUF_LEN),
  1232. buffer_info->length, PCI_DMA_TODEVICE);
  1233. if (++tpd_next_to_use == tpd_ring->count)
  1234. tpd_next_to_use = 0;
  1235. }
  1236. }
  1237. /* last tpd's buffer-info */
  1238. buffer_info->skb = skb;
  1239. }
  1240. static void atl1_tx_queue(struct atl1_adapter *adapter, int count,
  1241. union tpd_descr *descr)
  1242. {
  1243. /* We enter this function holding a spinlock. */
  1244. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1245. int j;
  1246. u32 val;
  1247. struct atl1_buffer *buffer_info;
  1248. struct tx_packet_desc *tpd;
  1249. u16 tpd_next_to_use = atomic_read(&tpd_ring->next_to_use);
  1250. for (j = 0; j < count; j++) {
  1251. buffer_info = &tpd_ring->buffer_info[tpd_next_to_use];
  1252. tpd = ATL1_TPD_DESC(&adapter->tpd_ring, tpd_next_to_use);
  1253. tpd->desc.csum.csumpu = descr->csum.csumpu;
  1254. tpd->desc.csum.csumpl = descr->csum.csumpl;
  1255. tpd->desc.tso.tsopu = descr->tso.tsopu;
  1256. tpd->desc.tso.tsopl = descr->tso.tsopl;
  1257. tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1258. tpd->desc.data = descr->data;
  1259. tpd->desc.csum.csumpu |= (cpu_to_le16(buffer_info->length) &
  1260. CSUM_PARAM_BUFLEN_MASK) << CSUM_PARAM_BUFLEN_SHIFT;
  1261. val = (descr->tso.tsopl >> TSO_PARAM_SEGMENT_SHIFT) &
  1262. TSO_PARAM_SEGMENT_MASK;
  1263. if (val && !j)
  1264. tpd->desc.tso.tsopl |= 1 << TSO_PARAM_HDRFLAG_SHIFT;
  1265. if (j == (count - 1))
  1266. tpd->desc.csum.csumpl |= 1 << CSUM_PARAM_EOP_SHIFT;
  1267. if (++tpd_next_to_use == tpd_ring->count)
  1268. tpd_next_to_use = 0;
  1269. }
  1270. /*
  1271. * Force memory writes to complete before letting h/w
  1272. * know there are new descriptors to fetch. (Only
  1273. * applicable for weak-ordered memory model archs,
  1274. * such as IA-64).
  1275. */
  1276. wmb();
  1277. atomic_set(&tpd_ring->next_to_use, (int)tpd_next_to_use);
  1278. }
  1279. static void atl1_update_mailbox(struct atl1_adapter *adapter)
  1280. {
  1281. unsigned long flags;
  1282. u32 tpd_next_to_use;
  1283. u32 rfd_next_to_use;
  1284. u32 rrd_next_to_clean;
  1285. u32 value;
  1286. spin_lock_irqsave(&adapter->mb_lock, flags);
  1287. tpd_next_to_use = atomic_read(&adapter->tpd_ring.next_to_use);
  1288. rfd_next_to_use = atomic_read(&adapter->rfd_ring.next_to_use);
  1289. rrd_next_to_clean = atomic_read(&adapter->rrd_ring.next_to_clean);
  1290. value = ((rfd_next_to_use & MB_RFD_PROD_INDX_MASK) <<
  1291. MB_RFD_PROD_INDX_SHIFT) |
  1292. ((rrd_next_to_clean & MB_RRD_CONS_INDX_MASK) <<
  1293. MB_RRD_CONS_INDX_SHIFT) |
  1294. ((tpd_next_to_use & MB_TPD_PROD_INDX_MASK) <<
  1295. MB_TPD_PROD_INDX_SHIFT);
  1296. iowrite32(value, adapter->hw.hw_addr + REG_MAILBOX);
  1297. spin_unlock_irqrestore(&adapter->mb_lock, flags);
  1298. }
  1299. static int atl1_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1300. {
  1301. struct atl1_adapter *adapter = netdev_priv(netdev);
  1302. int len = skb->len;
  1303. int tso;
  1304. int count = 1;
  1305. int ret_val;
  1306. u32 val;
  1307. union tpd_descr param;
  1308. u16 frag_size;
  1309. u16 vlan_tag;
  1310. unsigned long flags;
  1311. unsigned int nr_frags = 0;
  1312. unsigned int mss = 0;
  1313. unsigned int f;
  1314. unsigned int proto_hdr_len;
  1315. len -= skb->data_len;
  1316. if (unlikely(skb->len == 0)) {
  1317. dev_kfree_skb_any(skb);
  1318. return NETDEV_TX_OK;
  1319. }
  1320. param.data = 0;
  1321. param.tso.tsopu = 0;
  1322. param.tso.tsopl = 0;
  1323. param.csum.csumpu = 0;
  1324. param.csum.csumpl = 0;
  1325. /* nr_frags will be nonzero if we're doing scatter/gather (SG) */
  1326. nr_frags = skb_shinfo(skb)->nr_frags;
  1327. for (f = 0; f < nr_frags; f++) {
  1328. frag_size = skb_shinfo(skb)->frags[f].size;
  1329. if (frag_size)
  1330. count += (frag_size + ATL1_MAX_TX_BUF_LEN - 1) /
  1331. ATL1_MAX_TX_BUF_LEN;
  1332. }
  1333. /* mss will be nonzero if we're doing segment offload (TSO/GSO) */
  1334. mss = skb_shinfo(skb)->gso_size;
  1335. if (mss) {
  1336. if (skb->protocol == htons(ETH_P_IP)) {
  1337. proto_hdr_len = (skb_transport_offset(skb) +
  1338. tcp_hdrlen(skb));
  1339. if (unlikely(proto_hdr_len > len)) {
  1340. dev_kfree_skb_any(skb);
  1341. return NETDEV_TX_OK;
  1342. }
  1343. /* need additional TPD ? */
  1344. if (proto_hdr_len != len)
  1345. count += (len - proto_hdr_len +
  1346. ATL1_MAX_TX_BUF_LEN - 1) /
  1347. ATL1_MAX_TX_BUF_LEN;
  1348. }
  1349. }
  1350. local_irq_save(flags);
  1351. if (!spin_trylock(&adapter->lock)) {
  1352. /* Can't get lock - tell upper layer to requeue */
  1353. local_irq_restore(flags);
  1354. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx locked\n");
  1355. return NETDEV_TX_LOCKED;
  1356. }
  1357. if (tpd_avail(&adapter->tpd_ring) < count) {
  1358. /* not enough descriptors */
  1359. netif_stop_queue(netdev);
  1360. spin_unlock_irqrestore(&adapter->lock, flags);
  1361. dev_printk(KERN_DEBUG, &adapter->pdev->dev, "tx busy\n");
  1362. return NETDEV_TX_BUSY;
  1363. }
  1364. param.data = 0;
  1365. if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
  1366. vlan_tag = vlan_tx_tag_get(skb);
  1367. vlan_tag = (vlan_tag << 4) | (vlan_tag >> 13) |
  1368. ((vlan_tag >> 9) & 0x8);
  1369. param.csum.csumpl |= 1 << CSUM_PARAM_INSVLAG_SHIFT;
  1370. param.csum.csumpu |= (vlan_tag & CSUM_PARAM_VALANTAG_MASK) <<
  1371. CSUM_PARAM_VALAN_SHIFT;
  1372. }
  1373. tso = atl1_tso(adapter, skb, &param.tso);
  1374. if (tso < 0) {
  1375. spin_unlock_irqrestore(&adapter->lock, flags);
  1376. dev_kfree_skb_any(skb);
  1377. return NETDEV_TX_OK;
  1378. }
  1379. if (!tso) {
  1380. ret_val = atl1_tx_csum(adapter, skb, &param.csum);
  1381. if (ret_val < 0) {
  1382. spin_unlock_irqrestore(&adapter->lock, flags);
  1383. dev_kfree_skb_any(skb);
  1384. return NETDEV_TX_OK;
  1385. }
  1386. }
  1387. val = (param.csum.csumpl >> CSUM_PARAM_SEGMENT_SHIFT) &
  1388. CSUM_PARAM_SEGMENT_MASK;
  1389. atl1_tx_map(adapter, skb, 1 == val);
  1390. atl1_tx_queue(adapter, count, &param);
  1391. netdev->trans_start = jiffies;
  1392. spin_unlock_irqrestore(&adapter->lock, flags);
  1393. atl1_update_mailbox(adapter);
  1394. return NETDEV_TX_OK;
  1395. }
  1396. /*
  1397. * atl1_get_stats - Get System Network Statistics
  1398. * @netdev: network interface device structure
  1399. *
  1400. * Returns the address of the device statistics structure.
  1401. * The statistics are actually updated from the timer callback.
  1402. */
  1403. static struct net_device_stats *atl1_get_stats(struct net_device *netdev)
  1404. {
  1405. struct atl1_adapter *adapter = netdev_priv(netdev);
  1406. return &adapter->net_stats;
  1407. }
  1408. /*
  1409. * atl1_clean_rx_ring - Free RFD Buffers
  1410. * @adapter: board private structure
  1411. */
  1412. static void atl1_clean_rx_ring(struct atl1_adapter *adapter)
  1413. {
  1414. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1415. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1416. struct atl1_buffer *buffer_info;
  1417. struct pci_dev *pdev = adapter->pdev;
  1418. unsigned long size;
  1419. unsigned int i;
  1420. /* Free all the Rx ring sk_buffs */
  1421. for (i = 0; i < rfd_ring->count; i++) {
  1422. buffer_info = &rfd_ring->buffer_info[i];
  1423. if (buffer_info->dma) {
  1424. pci_unmap_page(pdev, buffer_info->dma,
  1425. buffer_info->length, PCI_DMA_FROMDEVICE);
  1426. buffer_info->dma = 0;
  1427. }
  1428. if (buffer_info->skb) {
  1429. dev_kfree_skb(buffer_info->skb);
  1430. buffer_info->skb = NULL;
  1431. }
  1432. }
  1433. size = sizeof(struct atl1_buffer) * rfd_ring->count;
  1434. memset(rfd_ring->buffer_info, 0, size);
  1435. /* Zero out the descriptor ring */
  1436. memset(rfd_ring->desc, 0, rfd_ring->size);
  1437. rfd_ring->next_to_clean = 0;
  1438. atomic_set(&rfd_ring->next_to_use, 0);
  1439. rrd_ring->next_to_use = 0;
  1440. atomic_set(&rrd_ring->next_to_clean, 0);
  1441. }
  1442. /*
  1443. * atl1_clean_tx_ring - Free Tx Buffers
  1444. * @adapter: board private structure
  1445. */
  1446. static void atl1_clean_tx_ring(struct atl1_adapter *adapter)
  1447. {
  1448. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1449. struct atl1_buffer *buffer_info;
  1450. struct pci_dev *pdev = adapter->pdev;
  1451. unsigned long size;
  1452. unsigned int i;
  1453. /* Free all the Tx ring sk_buffs */
  1454. for (i = 0; i < tpd_ring->count; i++) {
  1455. buffer_info = &tpd_ring->buffer_info[i];
  1456. if (buffer_info->dma) {
  1457. pci_unmap_page(pdev, buffer_info->dma,
  1458. buffer_info->length, PCI_DMA_TODEVICE);
  1459. buffer_info->dma = 0;
  1460. }
  1461. }
  1462. for (i = 0; i < tpd_ring->count; i++) {
  1463. buffer_info = &tpd_ring->buffer_info[i];
  1464. if (buffer_info->skb) {
  1465. dev_kfree_skb_any(buffer_info->skb);
  1466. buffer_info->skb = NULL;
  1467. }
  1468. }
  1469. size = sizeof(struct atl1_buffer) * tpd_ring->count;
  1470. memset(tpd_ring->buffer_info, 0, size);
  1471. /* Zero out the descriptor ring */
  1472. memset(tpd_ring->desc, 0, tpd_ring->size);
  1473. atomic_set(&tpd_ring->next_to_use, 0);
  1474. atomic_set(&tpd_ring->next_to_clean, 0);
  1475. }
  1476. /*
  1477. * atl1_free_ring_resources - Free Tx / RX descriptor Resources
  1478. * @adapter: board private structure
  1479. *
  1480. * Free all transmit software resources
  1481. */
  1482. void atl1_free_ring_resources(struct atl1_adapter *adapter)
  1483. {
  1484. struct pci_dev *pdev = adapter->pdev;
  1485. struct atl1_tpd_ring *tpd_ring = &adapter->tpd_ring;
  1486. struct atl1_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1487. struct atl1_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1488. struct atl1_ring_header *ring_header = &adapter->ring_header;
  1489. atl1_clean_tx_ring(adapter);
  1490. atl1_clean_rx_ring(adapter);
  1491. kfree(tpd_ring->buffer_info);
  1492. pci_free_consistent(pdev, ring_header->size, ring_header->desc,
  1493. ring_header->dma);
  1494. tpd_ring->buffer_info = NULL;
  1495. tpd_ring->desc = NULL;
  1496. tpd_ring->dma = 0;
  1497. rfd_ring->buffer_info = NULL;
  1498. rfd_ring->desc = NULL;
  1499. rfd_ring->dma = 0;
  1500. rrd_ring->desc = NULL;
  1501. rrd_ring->dma = 0;
  1502. }
  1503. s32 atl1_up(struct atl1_adapter *adapter)
  1504. {
  1505. struct net_device *netdev = adapter->netdev;
  1506. int err;
  1507. int irq_flags = IRQF_SAMPLE_RANDOM;
  1508. /* hardware has been reset, we need to reload some things */
  1509. atl1_set_multi(netdev);
  1510. atl1_restore_vlan(adapter);
  1511. err = atl1_alloc_rx_buffers(adapter);
  1512. if (unlikely(!err)) /* no RX BUFFER allocated */
  1513. return -ENOMEM;
  1514. if (unlikely(atl1_configure(adapter))) {
  1515. err = -EIO;
  1516. goto err_up;
  1517. }
  1518. err = pci_enable_msi(adapter->pdev);
  1519. if (err) {
  1520. dev_info(&adapter->pdev->dev,
  1521. "Unable to enable MSI: %d\n", err);
  1522. irq_flags |= IRQF_SHARED;
  1523. }
  1524. err = request_irq(adapter->pdev->irq, &atl1_intr, irq_flags,
  1525. netdev->name, netdev);
  1526. if (unlikely(err))
  1527. goto err_up;
  1528. mod_timer(&adapter->watchdog_timer, jiffies);
  1529. atl1_irq_enable(adapter);
  1530. atl1_check_link(adapter);
  1531. return 0;
  1532. err_up:
  1533. pci_disable_msi(adapter->pdev);
  1534. /* free rx_buffers */
  1535. atl1_clean_rx_ring(adapter);
  1536. return err;
  1537. }
  1538. void atl1_down(struct atl1_adapter *adapter)
  1539. {
  1540. struct net_device *netdev = adapter->netdev;
  1541. del_timer_sync(&adapter->watchdog_timer);
  1542. del_timer_sync(&adapter->phy_config_timer);
  1543. adapter->phy_timer_pending = false;
  1544. atl1_irq_disable(adapter);
  1545. free_irq(adapter->pdev->irq, netdev);
  1546. pci_disable_msi(adapter->pdev);
  1547. atl1_reset_hw(&adapter->hw);
  1548. adapter->cmb.cmb->int_stats = 0;
  1549. adapter->link_speed = SPEED_0;
  1550. adapter->link_duplex = -1;
  1551. netif_carrier_off(netdev);
  1552. netif_stop_queue(netdev);
  1553. atl1_clean_tx_ring(adapter);
  1554. atl1_clean_rx_ring(adapter);
  1555. }
  1556. /*
  1557. * atl1_change_mtu - Change the Maximum Transfer Unit
  1558. * @netdev: network interface device structure
  1559. * @new_mtu: new value for maximum frame size
  1560. *
  1561. * Returns 0 on success, negative on failure
  1562. */
  1563. static int atl1_change_mtu(struct net_device *netdev, int new_mtu)
  1564. {
  1565. struct atl1_adapter *adapter = netdev_priv(netdev);
  1566. int old_mtu = netdev->mtu;
  1567. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  1568. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  1569. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  1570. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  1571. return -EINVAL;
  1572. }
  1573. adapter->hw.max_frame_size = max_frame;
  1574. adapter->hw.tx_jumbo_task_th = (max_frame + 7) >> 3;
  1575. adapter->rx_buffer_len = (max_frame + 7) & ~7;
  1576. adapter->hw.rx_jumbo_th = adapter->rx_buffer_len / 8;
  1577. netdev->mtu = new_mtu;
  1578. if ((old_mtu != new_mtu) && netif_running(netdev)) {
  1579. atl1_down(adapter);
  1580. atl1_up(adapter);
  1581. }
  1582. return 0;
  1583. }
  1584. /*
  1585. * atl1_set_mac - Change the Ethernet Address of the NIC
  1586. * @netdev: network interface device structure
  1587. * @p: pointer to an address structure
  1588. *
  1589. * Returns 0 on success, negative on failure
  1590. */
  1591. static int atl1_set_mac(struct net_device *netdev, void *p)
  1592. {
  1593. struct atl1_adapter *adapter = netdev_priv(netdev);
  1594. struct sockaddr *addr = p;
  1595. if (netif_running(netdev))
  1596. return -EBUSY;
  1597. if (!is_valid_ether_addr(addr->sa_data))
  1598. return -EADDRNOTAVAIL;
  1599. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1600. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1601. atl1_set_mac_addr(&adapter->hw);
  1602. return 0;
  1603. }
  1604. /*
  1605. * atl1_watchdog - Timer Call-back
  1606. * @data: pointer to netdev cast into an unsigned long
  1607. */
  1608. static void atl1_watchdog(unsigned long data)
  1609. {
  1610. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1611. /* Reset the timer */
  1612. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1613. }
  1614. static int mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  1615. {
  1616. struct atl1_adapter *adapter = netdev_priv(netdev);
  1617. u16 result;
  1618. atl1_read_phy_reg(&adapter->hw, reg_num & 0x1f, &result);
  1619. return result;
  1620. }
  1621. static void mdio_write(struct net_device *netdev, int phy_id, int reg_num,
  1622. int val)
  1623. {
  1624. struct atl1_adapter *adapter = netdev_priv(netdev);
  1625. atl1_write_phy_reg(&adapter->hw, reg_num, val);
  1626. }
  1627. /*
  1628. * atl1_mii_ioctl -
  1629. * @netdev:
  1630. * @ifreq:
  1631. * @cmd:
  1632. */
  1633. static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1634. {
  1635. struct atl1_adapter *adapter = netdev_priv(netdev);
  1636. unsigned long flags;
  1637. int retval;
  1638. if (!netif_running(netdev))
  1639. return -EINVAL;
  1640. spin_lock_irqsave(&adapter->lock, flags);
  1641. retval = generic_mii_ioctl(&adapter->mii, if_mii(ifr), cmd, NULL);
  1642. spin_unlock_irqrestore(&adapter->lock, flags);
  1643. return retval;
  1644. }
  1645. /*
  1646. * atl1_ioctl -
  1647. * @netdev:
  1648. * @ifreq:
  1649. * @cmd:
  1650. */
  1651. static int atl1_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  1652. {
  1653. switch (cmd) {
  1654. case SIOCGMIIPHY:
  1655. case SIOCGMIIREG:
  1656. case SIOCSMIIREG:
  1657. return atl1_mii_ioctl(netdev, ifr, cmd);
  1658. default:
  1659. return -EOPNOTSUPP;
  1660. }
  1661. }
  1662. /*
  1663. * atl1_tx_timeout - Respond to a Tx Hang
  1664. * @netdev: network interface device structure
  1665. */
  1666. static void atl1_tx_timeout(struct net_device *netdev)
  1667. {
  1668. struct atl1_adapter *adapter = netdev_priv(netdev);
  1669. /* Do the reset outside of interrupt context */
  1670. schedule_work(&adapter->tx_timeout_task);
  1671. }
  1672. /*
  1673. * atl1_phy_config - Timer Call-back
  1674. * @data: pointer to netdev cast into an unsigned long
  1675. */
  1676. static void atl1_phy_config(unsigned long data)
  1677. {
  1678. struct atl1_adapter *adapter = (struct atl1_adapter *)data;
  1679. struct atl1_hw *hw = &adapter->hw;
  1680. unsigned long flags;
  1681. spin_lock_irqsave(&adapter->lock, flags);
  1682. adapter->phy_timer_pending = false;
  1683. atl1_write_phy_reg(hw, MII_ADVERTISE, hw->mii_autoneg_adv_reg);
  1684. atl1_write_phy_reg(hw, MII_AT001_CR, hw->mii_1000t_ctrl_reg);
  1685. atl1_write_phy_reg(hw, MII_BMCR, MII_CR_RESET | MII_CR_AUTO_NEG_EN);
  1686. spin_unlock_irqrestore(&adapter->lock, flags);
  1687. }
  1688. int atl1_reset(struct atl1_adapter *adapter)
  1689. {
  1690. int ret;
  1691. ret = atl1_reset_hw(&adapter->hw);
  1692. if (ret != ATL1_SUCCESS)
  1693. return ret;
  1694. return atl1_init_hw(&adapter->hw);
  1695. }
  1696. /*
  1697. * atl1_open - Called when a network interface is made active
  1698. * @netdev: network interface device structure
  1699. *
  1700. * Returns 0 on success, negative value on failure
  1701. *
  1702. * The open entry point is called when a network interface is made
  1703. * active by the system (IFF_UP). At this point all resources needed
  1704. * for transmit and receive operations are allocated, the interrupt
  1705. * handler is registered with the OS, the watchdog timer is started,
  1706. * and the stack is notified that the interface is ready.
  1707. */
  1708. static int atl1_open(struct net_device *netdev)
  1709. {
  1710. struct atl1_adapter *adapter = netdev_priv(netdev);
  1711. int err;
  1712. /* allocate transmit descriptors */
  1713. err = atl1_setup_ring_resources(adapter);
  1714. if (err)
  1715. return err;
  1716. err = atl1_up(adapter);
  1717. if (err)
  1718. goto err_up;
  1719. return 0;
  1720. err_up:
  1721. atl1_reset(adapter);
  1722. return err;
  1723. }
  1724. /*
  1725. * atl1_close - Disables a network interface
  1726. * @netdev: network interface device structure
  1727. *
  1728. * Returns 0, this is not allowed to fail
  1729. *
  1730. * The close entry point is called when an interface is de-activated
  1731. * by the OS. The hardware is still under the drivers control, but
  1732. * needs to be disabled. A global MAC reset is issued to stop the
  1733. * hardware, and all transmit and receive resources are freed.
  1734. */
  1735. static int atl1_close(struct net_device *netdev)
  1736. {
  1737. struct atl1_adapter *adapter = netdev_priv(netdev);
  1738. atl1_down(adapter);
  1739. atl1_free_ring_resources(adapter);
  1740. return 0;
  1741. }
  1742. #ifdef CONFIG_NET_POLL_CONTROLLER
  1743. static void atl1_poll_controller(struct net_device *netdev)
  1744. {
  1745. disable_irq(netdev->irq);
  1746. atl1_intr(netdev->irq, netdev);
  1747. enable_irq(netdev->irq);
  1748. }
  1749. #endif
  1750. /*
  1751. * Orphaned vendor comment left intact here:
  1752. * <vendor comment>
  1753. * If TPD Buffer size equal to 0, PCIE DMAR_TO_INT
  1754. * will assert. We do soft reset <0x1400=1> according
  1755. * with the SPEC. BUT, it seemes that PCIE or DMA
  1756. * state-machine will not be reset. DMAR_TO_INT will
  1757. * assert again and again.
  1758. * </vendor comment>
  1759. */
  1760. static void atl1_tx_timeout_task(struct work_struct *work)
  1761. {
  1762. struct atl1_adapter *adapter =
  1763. container_of(work, struct atl1_adapter, tx_timeout_task);
  1764. struct net_device *netdev = adapter->netdev;
  1765. netif_device_detach(netdev);
  1766. atl1_down(adapter);
  1767. atl1_up(adapter);
  1768. netif_device_attach(netdev);
  1769. }
  1770. /*
  1771. * atl1_link_chg_task - deal with link change event Out of interrupt context
  1772. */
  1773. static void atl1_link_chg_task(struct work_struct *work)
  1774. {
  1775. struct atl1_adapter *adapter =
  1776. container_of(work, struct atl1_adapter, link_chg_task);
  1777. unsigned long flags;
  1778. spin_lock_irqsave(&adapter->lock, flags);
  1779. atl1_check_link(adapter);
  1780. spin_unlock_irqrestore(&adapter->lock, flags);
  1781. }
  1782. /*
  1783. * atl1_pcie_patch - Patch for PCIE module
  1784. */
  1785. static void atl1_pcie_patch(struct atl1_adapter *adapter)
  1786. {
  1787. u32 value;
  1788. /* much vendor magic here */
  1789. value = 0x6500;
  1790. iowrite32(value, adapter->hw.hw_addr + 0x12FC);
  1791. /* pcie flow control mode change */
  1792. value = ioread32(adapter->hw.hw_addr + 0x1008);
  1793. value |= 0x8000;
  1794. iowrite32(value, adapter->hw.hw_addr + 0x1008);
  1795. }
  1796. /*
  1797. * When ACPI resume on some VIA MotherBoard, the Interrupt Disable bit/0x400
  1798. * on PCI Command register is disable.
  1799. * The function enable this bit.
  1800. * Brackett, 2006/03/15
  1801. */
  1802. static void atl1_via_workaround(struct atl1_adapter *adapter)
  1803. {
  1804. unsigned long value;
  1805. value = ioread16(adapter->hw.hw_addr + PCI_COMMAND);
  1806. if (value & PCI_COMMAND_INTX_DISABLE)
  1807. value &= ~PCI_COMMAND_INTX_DISABLE;
  1808. iowrite32(value, adapter->hw.hw_addr + PCI_COMMAND);
  1809. }
  1810. /*
  1811. * atl1_probe - Device Initialization Routine
  1812. * @pdev: PCI device information struct
  1813. * @ent: entry in atl1_pci_tbl
  1814. *
  1815. * Returns 0 on success, negative on failure
  1816. *
  1817. * atl1_probe initializes an adapter identified by a pci_dev structure.
  1818. * The OS initialization, configuring of the adapter private structure,
  1819. * and a hardware reset occur.
  1820. */
  1821. static int __devinit atl1_probe(struct pci_dev *pdev,
  1822. const struct pci_device_id *ent)
  1823. {
  1824. struct net_device *netdev;
  1825. struct atl1_adapter *adapter;
  1826. static int cards_found = 0;
  1827. bool pci_using_64 = true;
  1828. int err;
  1829. err = pci_enable_device(pdev);
  1830. if (err)
  1831. return err;
  1832. err = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
  1833. if (err) {
  1834. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  1835. if (err) {
  1836. dev_err(&pdev->dev, "no usable DMA configuration\n");
  1837. goto err_dma;
  1838. }
  1839. pci_using_64 = false;
  1840. }
  1841. /* Mark all PCI regions associated with PCI device
  1842. * pdev as being reserved by owner atl1_driver_name
  1843. */
  1844. err = pci_request_regions(pdev, atl1_driver_name);
  1845. if (err)
  1846. goto err_request_regions;
  1847. /* Enables bus-mastering on the device and calls
  1848. * pcibios_set_master to do the needed arch specific settings
  1849. */
  1850. pci_set_master(pdev);
  1851. netdev = alloc_etherdev(sizeof(struct atl1_adapter));
  1852. if (!netdev) {
  1853. err = -ENOMEM;
  1854. goto err_alloc_etherdev;
  1855. }
  1856. SET_MODULE_OWNER(netdev);
  1857. SET_NETDEV_DEV(netdev, &pdev->dev);
  1858. pci_set_drvdata(pdev, netdev);
  1859. adapter = netdev_priv(netdev);
  1860. adapter->netdev = netdev;
  1861. adapter->pdev = pdev;
  1862. adapter->hw.back = adapter;
  1863. adapter->hw.hw_addr = pci_iomap(pdev, 0, 0);
  1864. if (!adapter->hw.hw_addr) {
  1865. err = -EIO;
  1866. goto err_pci_iomap;
  1867. }
  1868. /* get device revision number */
  1869. adapter->hw.dev_rev = ioread16(adapter->hw.hw_addr +
  1870. (REG_MASTER_CTRL + 2));
  1871. dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
  1872. /* set default ring resource counts */
  1873. adapter->rfd_ring.count = adapter->rrd_ring.count = ATL1_DEFAULT_RFD;
  1874. adapter->tpd_ring.count = ATL1_DEFAULT_TPD;
  1875. adapter->mii.dev = netdev;
  1876. adapter->mii.mdio_read = mdio_read;
  1877. adapter->mii.mdio_write = mdio_write;
  1878. adapter->mii.phy_id_mask = 0x1f;
  1879. adapter->mii.reg_num_mask = 0x1f;
  1880. netdev->open = &atl1_open;
  1881. netdev->stop = &atl1_close;
  1882. netdev->hard_start_xmit = &atl1_xmit_frame;
  1883. netdev->get_stats = &atl1_get_stats;
  1884. netdev->set_multicast_list = &atl1_set_multi;
  1885. netdev->set_mac_address = &atl1_set_mac;
  1886. netdev->change_mtu = &atl1_change_mtu;
  1887. netdev->do_ioctl = &atl1_ioctl;
  1888. netdev->tx_timeout = &atl1_tx_timeout;
  1889. netdev->watchdog_timeo = 5 * HZ;
  1890. #ifdef CONFIG_NET_POLL_CONTROLLER
  1891. netdev->poll_controller = atl1_poll_controller;
  1892. #endif
  1893. netdev->vlan_rx_register = atl1_vlan_rx_register;
  1894. netdev->ethtool_ops = &atl1_ethtool_ops;
  1895. adapter->bd_number = cards_found;
  1896. adapter->pci_using_64 = pci_using_64;
  1897. /* setup the private structure */
  1898. err = atl1_sw_init(adapter);
  1899. if (err)
  1900. goto err_common;
  1901. netdev->features = NETIF_F_HW_CSUM;
  1902. netdev->features |= NETIF_F_SG;
  1903. netdev->features |= (NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX);
  1904. /*
  1905. * FIXME - Until tso performance gets fixed, disable the feature.
  1906. * Enable it with ethtool -K if desired.
  1907. */
  1908. /* netdev->features |= NETIF_F_TSO; */
  1909. if (pci_using_64)
  1910. netdev->features |= NETIF_F_HIGHDMA;
  1911. netdev->features |= NETIF_F_LLTX;
  1912. /*
  1913. * patch for some L1 of old version,
  1914. * the final version of L1 may not need these
  1915. * patches
  1916. */
  1917. /* atl1_pcie_patch(adapter); */
  1918. /* really reset GPHY core */
  1919. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  1920. /*
  1921. * reset the controller to
  1922. * put the device in a known good starting state
  1923. */
  1924. if (atl1_reset_hw(&adapter->hw)) {
  1925. err = -EIO;
  1926. goto err_common;
  1927. }
  1928. /* copy the MAC address out of the EEPROM */
  1929. atl1_read_mac_addr(&adapter->hw);
  1930. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  1931. if (!is_valid_ether_addr(netdev->dev_addr)) {
  1932. err = -EIO;
  1933. goto err_common;
  1934. }
  1935. atl1_check_options(adapter);
  1936. /* pre-init the MAC, and setup link */
  1937. err = atl1_init_hw(&adapter->hw);
  1938. if (err) {
  1939. err = -EIO;
  1940. goto err_common;
  1941. }
  1942. atl1_pcie_patch(adapter);
  1943. /* assume we have no link for now */
  1944. netif_carrier_off(netdev);
  1945. netif_stop_queue(netdev);
  1946. init_timer(&adapter->watchdog_timer);
  1947. adapter->watchdog_timer.function = &atl1_watchdog;
  1948. adapter->watchdog_timer.data = (unsigned long)adapter;
  1949. init_timer(&adapter->phy_config_timer);
  1950. adapter->phy_config_timer.function = &atl1_phy_config;
  1951. adapter->phy_config_timer.data = (unsigned long)adapter;
  1952. adapter->phy_timer_pending = false;
  1953. INIT_WORK(&adapter->tx_timeout_task, atl1_tx_timeout_task);
  1954. INIT_WORK(&adapter->link_chg_task, atl1_link_chg_task);
  1955. INIT_WORK(&adapter->pcie_dma_to_rst_task, atl1_tx_timeout_task);
  1956. err = register_netdev(netdev);
  1957. if (err)
  1958. goto err_common;
  1959. cards_found++;
  1960. atl1_via_workaround(adapter);
  1961. return 0;
  1962. err_common:
  1963. pci_iounmap(pdev, adapter->hw.hw_addr);
  1964. err_pci_iomap:
  1965. free_netdev(netdev);
  1966. err_alloc_etherdev:
  1967. pci_release_regions(pdev);
  1968. err_dma:
  1969. err_request_regions:
  1970. pci_disable_device(pdev);
  1971. return err;
  1972. }
  1973. /*
  1974. * atl1_remove - Device Removal Routine
  1975. * @pdev: PCI device information struct
  1976. *
  1977. * atl1_remove is called by the PCI subsystem to alert the driver
  1978. * that it should release a PCI device. The could be caused by a
  1979. * Hot-Plug event, or because the driver is going to be removed from
  1980. * memory.
  1981. */
  1982. static void __devexit atl1_remove(struct pci_dev *pdev)
  1983. {
  1984. struct net_device *netdev = pci_get_drvdata(pdev);
  1985. struct atl1_adapter *adapter;
  1986. /* Device not available. Return. */
  1987. if (!netdev)
  1988. return;
  1989. adapter = netdev_priv(netdev);
  1990. /* Some atl1 boards lack persistent storage for their MAC, and get it
  1991. * from the BIOS during POST. If we've been messing with the MAC
  1992. * address, we need to save the permanent one.
  1993. */
  1994. if (memcmp(adapter->hw.mac_addr, adapter->hw.perm_mac_addr, ETH_ALEN)) {
  1995. memcpy(adapter->hw.mac_addr, adapter->hw.perm_mac_addr,
  1996. ETH_ALEN);
  1997. atl1_set_mac_addr(&adapter->hw);
  1998. }
  1999. iowrite16(0, adapter->hw.hw_addr + REG_GPHY_ENABLE);
  2000. unregister_netdev(netdev);
  2001. pci_iounmap(pdev, adapter->hw.hw_addr);
  2002. pci_release_regions(pdev);
  2003. free_netdev(netdev);
  2004. pci_disable_device(pdev);
  2005. }
  2006. #ifdef CONFIG_PM
  2007. static int atl1_suspend(struct pci_dev *pdev, pm_message_t state)
  2008. {
  2009. struct net_device *netdev = pci_get_drvdata(pdev);
  2010. struct atl1_adapter *adapter = netdev_priv(netdev);
  2011. struct atl1_hw *hw = &adapter->hw;
  2012. u32 ctrl = 0;
  2013. u32 wufc = adapter->wol;
  2014. netif_device_detach(netdev);
  2015. if (netif_running(netdev))
  2016. atl1_down(adapter);
  2017. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2018. atl1_read_phy_reg(hw, MII_BMSR, (u16 *) & ctrl);
  2019. if (ctrl & BMSR_LSTATUS)
  2020. wufc &= ~ATL1_WUFC_LNKC;
  2021. /* reduce speed to 10/100M */
  2022. if (wufc) {
  2023. atl1_phy_enter_power_saving(hw);
  2024. /* if resume, let driver to re- setup link */
  2025. hw->phy_configured = false;
  2026. atl1_set_mac_addr(hw);
  2027. atl1_set_multi(netdev);
  2028. ctrl = 0;
  2029. /* turn on magic packet wol */
  2030. if (wufc & ATL1_WUFC_MAG)
  2031. ctrl = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2032. /* turn on Link change WOL */
  2033. if (wufc & ATL1_WUFC_LNKC)
  2034. ctrl |= (WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN);
  2035. iowrite32(ctrl, hw->hw_addr + REG_WOL_CTRL);
  2036. /* turn on all-multi mode if wake on multicast is enabled */
  2037. ctrl = ioread32(hw->hw_addr + REG_MAC_CTRL);
  2038. ctrl &= ~MAC_CTRL_DBG;
  2039. ctrl &= ~MAC_CTRL_PROMIS_EN;
  2040. if (wufc & ATL1_WUFC_MC)
  2041. ctrl |= MAC_CTRL_MC_ALL_EN;
  2042. else
  2043. ctrl &= ~MAC_CTRL_MC_ALL_EN;
  2044. /* turn on broadcast mode if wake on-BC is enabled */
  2045. if (wufc & ATL1_WUFC_BC)
  2046. ctrl |= MAC_CTRL_BC_EN;
  2047. else
  2048. ctrl &= ~MAC_CTRL_BC_EN;
  2049. /* enable RX */
  2050. ctrl |= MAC_CTRL_RX_EN;
  2051. iowrite32(ctrl, hw->hw_addr + REG_MAC_CTRL);
  2052. pci_enable_wake(pdev, PCI_D3hot, 1);
  2053. pci_enable_wake(pdev, PCI_D3cold, 1);
  2054. } else {
  2055. iowrite32(0, hw->hw_addr + REG_WOL_CTRL);
  2056. pci_enable_wake(pdev, PCI_D3hot, 0);
  2057. pci_enable_wake(pdev, PCI_D3cold, 0);
  2058. }
  2059. pci_save_state(pdev);
  2060. pci_disable_device(pdev);
  2061. pci_set_power_state(pdev, PCI_D3hot);
  2062. return 0;
  2063. }
  2064. static int atl1_resume(struct pci_dev *pdev)
  2065. {
  2066. struct net_device *netdev = pci_get_drvdata(pdev);
  2067. struct atl1_adapter *adapter = netdev_priv(netdev);
  2068. u32 ret_val;
  2069. pci_set_power_state(pdev, 0);
  2070. pci_restore_state(pdev);
  2071. ret_val = pci_enable_device(pdev);
  2072. pci_enable_wake(pdev, PCI_D3hot, 0);
  2073. pci_enable_wake(pdev, PCI_D3cold, 0);
  2074. iowrite32(0, adapter->hw.hw_addr + REG_WOL_CTRL);
  2075. atl1_reset(adapter);
  2076. if (netif_running(netdev))
  2077. atl1_up(adapter);
  2078. netif_device_attach(netdev);
  2079. atl1_via_workaround(adapter);
  2080. return 0;
  2081. }
  2082. #else
  2083. #define atl1_suspend NULL
  2084. #define atl1_resume NULL
  2085. #endif
  2086. static struct pci_driver atl1_driver = {
  2087. .name = atl1_driver_name,
  2088. .id_table = atl1_pci_tbl,
  2089. .probe = atl1_probe,
  2090. .remove = __devexit_p(atl1_remove),
  2091. .suspend = atl1_suspend,
  2092. .resume = atl1_resume
  2093. };
  2094. /*
  2095. * atl1_exit_module - Driver Exit Cleanup Routine
  2096. *
  2097. * atl1_exit_module is called just before the driver is removed
  2098. * from memory.
  2099. */
  2100. static void __exit atl1_exit_module(void)
  2101. {
  2102. pci_unregister_driver(&atl1_driver);
  2103. }
  2104. /*
  2105. * atl1_init_module - Driver Registration Routine
  2106. *
  2107. * atl1_init_module is the first routine called when the driver is
  2108. * loaded. All it does is register with the PCI subsystem.
  2109. */
  2110. static int __init atl1_init_module(void)
  2111. {
  2112. return pci_register_driver(&atl1_driver);
  2113. }
  2114. module_init(atl1_init_module);
  2115. module_exit(atl1_exit_module);