imx.c 21 KB

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  1. /*
  2. * linux/drivers/serial/imx.c
  3. *
  4. * Driver for Motorola IMX serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Author: Sascha Hauer <sascha@saschahauer.de>
  9. * Copyright (C) 2004 Pengutronix
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * [29-Mar-2005] Mike Lee
  26. * Added hardware handshake
  27. */
  28. #include <linux/config.h>
  29. #if defined(CONFIG_SERIAL_IMX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <linux/serial.h>
  42. #include <asm/io.h>
  43. #include <asm/irq.h>
  44. #include <asm/hardware.h>
  45. /* We've been assigned a range on the "Low-density serial ports" major */
  46. #define SERIAL_IMX_MAJOR 204
  47. #define MINOR_START 41
  48. #define NR_PORTS 2
  49. #define IMX_ISR_PASS_LIMIT 256
  50. /*
  51. * This is the size of our serial port register set.
  52. */
  53. #define UART_PORT_SIZE 0x100
  54. /*
  55. * This determines how often we check the modem status signals
  56. * for any change. They generally aren't connected to an IRQ
  57. * so we have to poll them. We also check immediately before
  58. * filling the TX fifo incase CTS has been dropped.
  59. */
  60. #define MCTRL_TIMEOUT (250*HZ/1000)
  61. #define DRIVER_NAME "IMX-uart"
  62. struct imx_port {
  63. struct uart_port port;
  64. struct timer_list timer;
  65. unsigned int old_status;
  66. int txirq,rxirq;
  67. };
  68. /*
  69. * Handle any change of modem status signal since we were last called.
  70. */
  71. static void imx_mctrl_check(struct imx_port *sport)
  72. {
  73. unsigned int status, changed;
  74. status = sport->port.ops->get_mctrl(&sport->port);
  75. changed = status ^ sport->old_status;
  76. if (changed == 0)
  77. return;
  78. sport->old_status = status;
  79. if (changed & TIOCM_RI)
  80. sport->port.icount.rng++;
  81. if (changed & TIOCM_DSR)
  82. sport->port.icount.dsr++;
  83. if (changed & TIOCM_CAR)
  84. uart_handle_dcd_change(&sport->port, status & TIOCM_CAR);
  85. if (changed & TIOCM_CTS)
  86. uart_handle_cts_change(&sport->port, status & TIOCM_CTS);
  87. wake_up_interruptible(&sport->port.info->delta_msr_wait);
  88. }
  89. /*
  90. * This is our per-port timeout handler, for checking the
  91. * modem status signals.
  92. */
  93. static void imx_timeout(unsigned long data)
  94. {
  95. struct imx_port *sport = (struct imx_port *)data;
  96. unsigned long flags;
  97. if (sport->port.info) {
  98. spin_lock_irqsave(&sport->port.lock, flags);
  99. imx_mctrl_check(sport);
  100. spin_unlock_irqrestore(&sport->port.lock, flags);
  101. mod_timer(&sport->timer, jiffies + MCTRL_TIMEOUT);
  102. }
  103. }
  104. /*
  105. * interrupts disabled on entry
  106. */
  107. static void imx_stop_tx(struct uart_port *port, unsigned int tty_stop)
  108. {
  109. struct imx_port *sport = (struct imx_port *)port;
  110. UCR1((u32)sport->port.membase) &= ~UCR1_TXMPTYEN;
  111. }
  112. /*
  113. * interrupts disabled on entry
  114. */
  115. static void imx_stop_rx(struct uart_port *port)
  116. {
  117. struct imx_port *sport = (struct imx_port *)port;
  118. UCR2((u32)sport->port.membase) &= ~UCR2_RXEN;
  119. }
  120. /*
  121. * Set the modem control timer to fire immediately.
  122. */
  123. static void imx_enable_ms(struct uart_port *port)
  124. {
  125. struct imx_port *sport = (struct imx_port *)port;
  126. mod_timer(&sport->timer, jiffies);
  127. }
  128. static inline void imx_transmit_buffer(struct imx_port *sport)
  129. {
  130. struct circ_buf *xmit = &sport->port.info->xmit;
  131. do {
  132. /* send xmit->buf[xmit->tail]
  133. * out the port here */
  134. URTX0((u32)sport->port.membase) = xmit->buf[xmit->tail];
  135. xmit->tail = (xmit->tail + 1) &
  136. (UART_XMIT_SIZE - 1);
  137. sport->port.icount.tx++;
  138. if (uart_circ_empty(xmit))
  139. break;
  140. } while (!(UTS((u32)sport->port.membase) & UTS_TXFULL));
  141. if (uart_circ_empty(xmit))
  142. imx_stop_tx(&sport->port, 0);
  143. }
  144. /*
  145. * interrupts disabled on entry
  146. */
  147. static void imx_start_tx(struct uart_port *port, unsigned int tty_start)
  148. {
  149. struct imx_port *sport = (struct imx_port *)port;
  150. UCR1((u32)sport->port.membase) |= UCR1_TXMPTYEN;
  151. if(UTS((u32)sport->port.membase) & UTS_TXEMPTY)
  152. imx_transmit_buffer(sport);
  153. }
  154. static irqreturn_t imx_txint(int irq, void *dev_id, struct pt_regs *regs)
  155. {
  156. struct imx_port *sport = (struct imx_port *)dev_id;
  157. struct circ_buf *xmit = &sport->port.info->xmit;
  158. unsigned long flags;
  159. spin_lock_irqsave(&sport->port.lock,flags);
  160. if (sport->port.x_char)
  161. {
  162. /* Send next char */
  163. URTX0((u32)sport->port.membase) = sport->port.x_char;
  164. goto out;
  165. }
  166. if (uart_circ_empty(xmit) || uart_tx_stopped(&sport->port)) {
  167. imx_stop_tx(&sport->port, 0);
  168. goto out;
  169. }
  170. imx_transmit_buffer(sport);
  171. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  172. uart_write_wakeup(&sport->port);
  173. out:
  174. spin_unlock_irqrestore(&sport->port.lock,flags);
  175. return IRQ_HANDLED;
  176. }
  177. static irqreturn_t imx_rxint(int irq, void *dev_id, struct pt_regs *regs)
  178. {
  179. struct imx_port *sport = dev_id;
  180. unsigned int rx,flg,ignored = 0;
  181. struct tty_struct *tty = sport->port.info->tty;
  182. unsigned long flags;
  183. rx = URXD0((u32)sport->port.membase);
  184. spin_lock_irqsave(&sport->port.lock,flags);
  185. do {
  186. flg = TTY_NORMAL;
  187. sport->port.icount.rx++;
  188. if( USR2((u32)sport->port.membase) & USR2_BRCD ) {
  189. USR2((u32)sport->port.membase) |= USR2_BRCD;
  190. if(uart_handle_break(&sport->port))
  191. goto ignore_char;
  192. }
  193. if (uart_handle_sysrq_char
  194. (&sport->port, (unsigned char)rx, regs))
  195. goto ignore_char;
  196. if( rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) )
  197. goto handle_error;
  198. error_return:
  199. tty_insert_flip_char(tty, rx, flg);
  200. if (tty->flip.count >= TTY_FLIPBUF_SIZE)
  201. goto out;
  202. ignore_char:
  203. rx = URXD0((u32)sport->port.membase);
  204. } while(rx & URXD_CHARRDY);
  205. out:
  206. spin_unlock_irqrestore(&sport->port.lock,flags);
  207. tty_flip_buffer_push(tty);
  208. return IRQ_HANDLED;
  209. handle_error:
  210. if (rx & URXD_PRERR)
  211. sport->port.icount.parity++;
  212. else if (rx & URXD_FRMERR)
  213. sport->port.icount.frame++;
  214. if (rx & URXD_OVRRUN)
  215. sport->port.icount.overrun++;
  216. if (rx & sport->port.ignore_status_mask) {
  217. if (++ignored > 100)
  218. goto out;
  219. goto ignore_char;
  220. }
  221. rx &= sport->port.read_status_mask;
  222. if (rx & URXD_PRERR)
  223. flg = TTY_PARITY;
  224. else if (rx & URXD_FRMERR)
  225. flg = TTY_FRAME;
  226. if (rx & URXD_OVRRUN)
  227. flg = TTY_OVERRUN;
  228. #ifdef SUPPORT_SYSRQ
  229. sport->port.sysrq = 0;
  230. #endif
  231. goto error_return;
  232. }
  233. /*
  234. * Return TIOCSER_TEMT when transmitter is not busy.
  235. */
  236. static unsigned int imx_tx_empty(struct uart_port *port)
  237. {
  238. struct imx_port *sport = (struct imx_port *)port;
  239. return USR2((u32)sport->port.membase) & USR2_TXDC ? TIOCSER_TEMT : 0;
  240. }
  241. static unsigned int imx_get_mctrl(struct uart_port *port)
  242. {
  243. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  244. }
  245. static void imx_set_mctrl(struct uart_port *port, unsigned int mctrl)
  246. {
  247. }
  248. /*
  249. * Interrupts always disabled.
  250. */
  251. static void imx_break_ctl(struct uart_port *port, int break_state)
  252. {
  253. struct imx_port *sport = (struct imx_port *)port;
  254. unsigned long flags;
  255. spin_lock_irqsave(&sport->port.lock, flags);
  256. if ( break_state != 0 )
  257. UCR1((u32)sport->port.membase) |= UCR1_SNDBRK;
  258. else
  259. UCR1((u32)sport->port.membase) &= ~UCR1_SNDBRK;
  260. spin_unlock_irqrestore(&sport->port.lock, flags);
  261. }
  262. #define TXTL 2 /* reset default */
  263. #define RXTL 1 /* reset default */
  264. static int imx_startup(struct uart_port *port)
  265. {
  266. struct imx_port *sport = (struct imx_port *)port;
  267. int retval;
  268. unsigned int val;
  269. unsigned long flags;
  270. /* set receiver / transmitter trigger level. We assume
  271. * that RFDIV has been set by the arch setup or by the bootloader.
  272. */
  273. val = (UFCR((u32)sport->port.membase) & UFCR_RFDIV) | TXTL<<10 | RXTL;
  274. UFCR((u32)sport->port.membase) = val;
  275. /* disable the DREN bit (Data Ready interrupt enable) before
  276. * requesting IRQs
  277. */
  278. UCR4((u32)sport->port.membase) &= ~UCR4_DREN;
  279. /*
  280. * Allocate the IRQ
  281. */
  282. retval = request_irq(sport->rxirq, imx_rxint, 0,
  283. DRIVER_NAME, sport);
  284. if (retval) goto error_out2;
  285. retval = request_irq(sport->txirq, imx_txint, 0,
  286. "imx-uart", sport);
  287. if (retval) goto error_out1;
  288. /*
  289. * Finally, clear and enable interrupts
  290. */
  291. UCR1((u32)sport->port.membase) |=
  292. (UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
  293. UCR2((u32)sport->port.membase) |= (UCR2_RXEN | UCR2_TXEN);
  294. /*
  295. * Enable modem status interrupts
  296. */
  297. spin_lock_irqsave(&sport->port.lock,flags);
  298. imx_enable_ms(&sport->port);
  299. spin_unlock_irqrestore(&sport->port.lock,flags);
  300. return 0;
  301. error_out1:
  302. free_irq(sport->rxirq, sport);
  303. error_out2:
  304. free_irq(sport->txirq, sport);
  305. return retval;
  306. }
  307. static void imx_shutdown(struct uart_port *port)
  308. {
  309. struct imx_port *sport = (struct imx_port *)port;
  310. /*
  311. * Stop our timer.
  312. */
  313. del_timer_sync(&sport->timer);
  314. /*
  315. * Free the interrupts
  316. */
  317. free_irq(sport->txirq, sport);
  318. free_irq(sport->rxirq, sport);
  319. /*
  320. * Disable all interrupts, port and break condition.
  321. */
  322. UCR1((u32)sport->port.membase) &=
  323. ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_UARTEN);
  324. }
  325. static void
  326. imx_set_termios(struct uart_port *port, struct termios *termios,
  327. struct termios *old)
  328. {
  329. struct imx_port *sport = (struct imx_port *)port;
  330. unsigned long flags;
  331. unsigned int ucr2, old_ucr1, old_txrxen, baud, quot;
  332. unsigned int old_csize = old ? old->c_cflag & CSIZE : CS8;
  333. /*
  334. * If we don't support modem control lines, don't allow
  335. * these to be set.
  336. */
  337. if (0) {
  338. termios->c_cflag &= ~(HUPCL | CRTSCTS | CMSPAR);
  339. termios->c_cflag |= CLOCAL;
  340. }
  341. /*
  342. * We only support CS7 and CS8.
  343. */
  344. while ((termios->c_cflag & CSIZE) != CS7 &&
  345. (termios->c_cflag & CSIZE) != CS8) {
  346. termios->c_cflag &= ~CSIZE;
  347. termios->c_cflag |= old_csize;
  348. old_csize = CS8;
  349. }
  350. if ((termios->c_cflag & CSIZE) == CS8)
  351. ucr2 = UCR2_WS | UCR2_SRST | UCR2_IRTS;
  352. else
  353. ucr2 = UCR2_SRST | UCR2_IRTS;
  354. if (termios->c_cflag & CRTSCTS) {
  355. ucr2 &= ~UCR2_IRTS;
  356. ucr2 |= UCR2_CTSC;
  357. }
  358. if (termios->c_cflag & CSTOPB)
  359. ucr2 |= UCR2_STPB;
  360. if (termios->c_cflag & PARENB) {
  361. ucr2 |= UCR2_PREN;
  362. if (!(termios->c_cflag & PARODD))
  363. ucr2 |= UCR2_PROE;
  364. }
  365. /*
  366. * Ask the core to calculate the divisor for us.
  367. */
  368. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  369. quot = uart_get_divisor(port, baud);
  370. spin_lock_irqsave(&sport->port.lock, flags);
  371. sport->port.read_status_mask = 0;
  372. if (termios->c_iflag & INPCK)
  373. sport->port.read_status_mask |= (URXD_FRMERR | URXD_PRERR);
  374. if (termios->c_iflag & (BRKINT | PARMRK))
  375. sport->port.read_status_mask |= URXD_BRK;
  376. /*
  377. * Characters to ignore
  378. */
  379. sport->port.ignore_status_mask = 0;
  380. if (termios->c_iflag & IGNPAR)
  381. sport->port.ignore_status_mask |= URXD_PRERR;
  382. if (termios->c_iflag & IGNBRK) {
  383. sport->port.ignore_status_mask |= URXD_BRK;
  384. /*
  385. * If we're ignoring parity and break indicators,
  386. * ignore overruns too (for real raw support).
  387. */
  388. if (termios->c_iflag & IGNPAR)
  389. sport->port.ignore_status_mask |= URXD_OVRRUN;
  390. }
  391. del_timer_sync(&sport->timer);
  392. /*
  393. * Update the per-port timeout.
  394. */
  395. uart_update_timeout(port, termios->c_cflag, baud);
  396. /*
  397. * disable interrupts and drain transmitter
  398. */
  399. old_ucr1 = UCR1((u32)sport->port.membase);
  400. UCR1((u32)sport->port.membase) &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
  401. while ( !(USR2((u32)sport->port.membase) & USR2_TXDC))
  402. barrier();
  403. /* then, disable everything */
  404. old_txrxen = UCR2((u32)sport->port.membase) & ( UCR2_TXEN | UCR2_RXEN );
  405. UCR2((u32)sport->port.membase) &= ~( UCR2_TXEN | UCR2_RXEN);
  406. /* set the parity, stop bits and data size */
  407. UCR2((u32)sport->port.membase) = ucr2;
  408. /* set the baud rate. We assume uartclk = 16 MHz
  409. *
  410. * baud * 16 UBIR - 1
  411. * --------- = --------
  412. * uartclk UBMR - 1
  413. */
  414. UBIR((u32)sport->port.membase) = (baud / 100) - 1;
  415. UBMR((u32)sport->port.membase) = 10000 - 1;
  416. UCR1((u32)sport->port.membase) = old_ucr1;
  417. UCR2((u32)sport->port.membase) |= old_txrxen;
  418. if (UART_ENABLE_MS(&sport->port, termios->c_cflag))
  419. imx_enable_ms(&sport->port);
  420. spin_unlock_irqrestore(&sport->port.lock, flags);
  421. }
  422. static const char *imx_type(struct uart_port *port)
  423. {
  424. struct imx_port *sport = (struct imx_port *)port;
  425. return sport->port.type == PORT_IMX ? "IMX" : NULL;
  426. }
  427. /*
  428. * Release the memory region(s) being used by 'port'.
  429. */
  430. static void imx_release_port(struct uart_port *port)
  431. {
  432. struct imx_port *sport = (struct imx_port *)port;
  433. release_mem_region(sport->port.mapbase, UART_PORT_SIZE);
  434. }
  435. /*
  436. * Request the memory region(s) being used by 'port'.
  437. */
  438. static int imx_request_port(struct uart_port *port)
  439. {
  440. struct imx_port *sport = (struct imx_port *)port;
  441. return request_mem_region(sport->port.mapbase, UART_PORT_SIZE,
  442. "imx-uart") != NULL ? 0 : -EBUSY;
  443. }
  444. /*
  445. * Configure/autoconfigure the port.
  446. */
  447. static void imx_config_port(struct uart_port *port, int flags)
  448. {
  449. struct imx_port *sport = (struct imx_port *)port;
  450. if (flags & UART_CONFIG_TYPE &&
  451. imx_request_port(&sport->port) == 0)
  452. sport->port.type = PORT_IMX;
  453. }
  454. /*
  455. * Verify the new serial_struct (for TIOCSSERIAL).
  456. * The only change we allow are to the flags and type, and
  457. * even then only between PORT_IMX and PORT_UNKNOWN
  458. */
  459. static int
  460. imx_verify_port(struct uart_port *port, struct serial_struct *ser)
  461. {
  462. struct imx_port *sport = (struct imx_port *)port;
  463. int ret = 0;
  464. if (ser->type != PORT_UNKNOWN && ser->type != PORT_IMX)
  465. ret = -EINVAL;
  466. if (sport->port.irq != ser->irq)
  467. ret = -EINVAL;
  468. if (ser->io_type != UPIO_MEM)
  469. ret = -EINVAL;
  470. if (sport->port.uartclk / 16 != ser->baud_base)
  471. ret = -EINVAL;
  472. if ((void *)sport->port.mapbase != ser->iomem_base)
  473. ret = -EINVAL;
  474. if (sport->port.iobase != ser->port)
  475. ret = -EINVAL;
  476. if (ser->hub6 != 0)
  477. ret = -EINVAL;
  478. return ret;
  479. }
  480. static struct uart_ops imx_pops = {
  481. .tx_empty = imx_tx_empty,
  482. .set_mctrl = imx_set_mctrl,
  483. .get_mctrl = imx_get_mctrl,
  484. .stop_tx = imx_stop_tx,
  485. .start_tx = imx_start_tx,
  486. .stop_rx = imx_stop_rx,
  487. .enable_ms = imx_enable_ms,
  488. .break_ctl = imx_break_ctl,
  489. .startup = imx_startup,
  490. .shutdown = imx_shutdown,
  491. .set_termios = imx_set_termios,
  492. .type = imx_type,
  493. .release_port = imx_release_port,
  494. .request_port = imx_request_port,
  495. .config_port = imx_config_port,
  496. .verify_port = imx_verify_port,
  497. };
  498. static struct imx_port imx_ports[] = {
  499. {
  500. .txirq = UART1_MINT_TX,
  501. .rxirq = UART1_MINT_RX,
  502. .port = {
  503. .type = PORT_IMX,
  504. .iotype = SERIAL_IO_MEM,
  505. .membase = (void *)IMX_UART1_BASE,
  506. .mapbase = IMX_UART1_BASE, /* FIXME */
  507. .irq = UART1_MINT_RX,
  508. .uartclk = 16000000,
  509. .fifosize = 8,
  510. .flags = ASYNC_BOOT_AUTOCONF,
  511. .ops = &imx_pops,
  512. .line = 0,
  513. },
  514. }, {
  515. .txirq = UART2_MINT_TX,
  516. .rxirq = UART2_MINT_RX,
  517. .port = {
  518. .type = PORT_IMX,
  519. .iotype = SERIAL_IO_MEM,
  520. .membase = (void *)IMX_UART2_BASE,
  521. .mapbase = IMX_UART2_BASE, /* FIXME */
  522. .irq = UART2_MINT_RX,
  523. .uartclk = 16000000,
  524. .fifosize = 8,
  525. .flags = ASYNC_BOOT_AUTOCONF,
  526. .ops = &imx_pops,
  527. .line = 1,
  528. },
  529. }
  530. };
  531. /*
  532. * Setup the IMX serial ports.
  533. * Note also that we support "console=ttySMXx" where "x" is either 0 or 1.
  534. * Which serial port this ends up being depends on the machine you're
  535. * running this kernel on. I'm not convinced that this is a good idea,
  536. * but that's the way it traditionally works.
  537. *
  538. */
  539. static void __init imx_init_ports(void)
  540. {
  541. static int first = 1;
  542. int i;
  543. if (!first)
  544. return;
  545. first = 0;
  546. for (i = 0; i < ARRAY_SIZE(imx_ports); i++) {
  547. init_timer(&imx_ports[i].timer);
  548. imx_ports[i].timer.function = imx_timeout;
  549. imx_ports[i].timer.data = (unsigned long)&imx_ports[i];
  550. }
  551. imx_gpio_mode(PC9_PF_UART1_CTS);
  552. imx_gpio_mode(PC10_PF_UART1_RTS);
  553. imx_gpio_mode(PC11_PF_UART1_TXD);
  554. imx_gpio_mode(PC12_PF_UART1_RXD);
  555. imx_gpio_mode(PB28_PF_UART2_CTS);
  556. imx_gpio_mode(PB29_PF_UART2_RTS);
  557. imx_gpio_mode(PB30_PF_UART2_TXD);
  558. imx_gpio_mode(PB31_PF_UART2_RXD);
  559. #if 0 /* We don't need these, on the mx1 the _modem_ side of the uart
  560. * is implemented.
  561. */
  562. imx_gpio_mode(PD7_AF_UART2_DTR);
  563. imx_gpio_mode(PD8_AF_UART2_DCD);
  564. imx_gpio_mode(PD9_AF_UART2_RI);
  565. imx_gpio_mode(PD10_AF_UART2_DSR);
  566. #endif
  567. }
  568. #ifdef CONFIG_SERIAL_IMX_CONSOLE
  569. /*
  570. * Interrupts are disabled on entering
  571. */
  572. static void
  573. imx_console_write(struct console *co, const char *s, unsigned int count)
  574. {
  575. struct imx_port *sport = &imx_ports[co->index];
  576. unsigned int old_ucr1, old_ucr2, i;
  577. /*
  578. * First, save UCR1/2 and then disable interrupts
  579. */
  580. old_ucr1 = UCR1((u32)sport->port.membase);
  581. old_ucr2 = UCR2((u32)sport->port.membase);
  582. UCR1((u32)sport->port.membase) =
  583. (old_ucr1 | UCR1_UARTCLKEN | UCR1_UARTEN)
  584. & ~(UCR1_TXMPTYEN | UCR1_RRDYEN);
  585. UCR2((u32)sport->port.membase) = old_ucr2 | UCR2_TXEN;
  586. /*
  587. * Now, do each character
  588. */
  589. for (i = 0; i < count; i++) {
  590. while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
  591. barrier();
  592. URTX0((u32)sport->port.membase) = s[i];
  593. if (s[i] == '\n') {
  594. while ((UTS((u32)sport->port.membase) & UTS_TXFULL))
  595. barrier();
  596. URTX0((u32)sport->port.membase) = '\r';
  597. }
  598. }
  599. /*
  600. * Finally, wait for transmitter to become empty
  601. * and restore UCR1/2
  602. */
  603. while (!(USR2((u32)sport->port.membase) & USR2_TXDC));
  604. UCR1((u32)sport->port.membase) = old_ucr1;
  605. UCR2((u32)sport->port.membase) = old_ucr2;
  606. }
  607. /*
  608. * If the port was already initialised (eg, by a boot loader),
  609. * try to determine the current setup.
  610. */
  611. static void __init
  612. imx_console_get_options(struct imx_port *sport, int *baud,
  613. int *parity, int *bits)
  614. {
  615. if ( UCR1((u32)sport->port.membase) | UCR1_UARTEN ) {
  616. /* ok, the port was enabled */
  617. unsigned int ucr2, ubir,ubmr, uartclk;
  618. ucr2 = UCR2((u32)sport->port.membase);
  619. *parity = 'n';
  620. if (ucr2 & UCR2_PREN) {
  621. if (ucr2 & UCR2_PROE)
  622. *parity = 'o';
  623. else
  624. *parity = 'e';
  625. }
  626. if (ucr2 & UCR2_WS)
  627. *bits = 8;
  628. else
  629. *bits = 7;
  630. ubir = UBIR((u32)sport->port.membase) & 0xffff;
  631. ubmr = UBMR((u32)sport->port.membase) & 0xffff;
  632. uartclk = sport->port.uartclk;
  633. *baud = ((uartclk/16) * (ubir + 1)) / (ubmr + 1);
  634. }
  635. }
  636. static int __init
  637. imx_console_setup(struct console *co, char *options)
  638. {
  639. struct imx_port *sport;
  640. int baud = 9600;
  641. int bits = 8;
  642. int parity = 'n';
  643. int flow = 'n';
  644. /*
  645. * Check whether an invalid uart number has been specified, and
  646. * if so, search for the first available port that does have
  647. * console support.
  648. */
  649. if (co->index == -1 || co->index >= ARRAY_SIZE(imx_ports))
  650. co->index = 0;
  651. sport = &imx_ports[co->index];
  652. if (options)
  653. uart_parse_options(options, &baud, &parity, &bits, &flow);
  654. else
  655. imx_console_get_options(sport, &baud, &parity, &bits);
  656. return uart_set_options(&sport->port, co, baud, parity, bits, flow);
  657. }
  658. extern struct uart_driver imx_reg;
  659. static struct console imx_console = {
  660. .name = "ttySMX",
  661. .write = imx_console_write,
  662. .device = uart_console_device,
  663. .setup = imx_console_setup,
  664. .flags = CON_PRINTBUFFER,
  665. .index = -1,
  666. .data = &imx_reg,
  667. };
  668. static int __init imx_rs_console_init(void)
  669. {
  670. imx_init_ports();
  671. register_console(&imx_console);
  672. return 0;
  673. }
  674. console_initcall(imx_rs_console_init);
  675. #define IMX_CONSOLE &imx_console
  676. #else
  677. #define IMX_CONSOLE NULL
  678. #endif
  679. static struct uart_driver imx_reg = {
  680. .owner = THIS_MODULE,
  681. .driver_name = DRIVER_NAME,
  682. .dev_name = "ttySMX",
  683. .devfs_name = "ttsmx/",
  684. .major = SERIAL_IMX_MAJOR,
  685. .minor = MINOR_START,
  686. .nr = ARRAY_SIZE(imx_ports),
  687. .cons = IMX_CONSOLE,
  688. };
  689. static int serial_imx_suspend(struct device *_dev, pm_message_t state, u32 level)
  690. {
  691. struct imx_port *sport = dev_get_drvdata(_dev);
  692. if (sport && level == SUSPEND_DISABLE)
  693. uart_suspend_port(&imx_reg, &sport->port);
  694. return 0;
  695. }
  696. static int serial_imx_resume(struct device *_dev, u32 level)
  697. {
  698. struct imx_port *sport = dev_get_drvdata(_dev);
  699. if (sport && level == RESUME_ENABLE)
  700. uart_resume_port(&imx_reg, &sport->port);
  701. return 0;
  702. }
  703. static int serial_imx_probe(struct device *_dev)
  704. {
  705. struct platform_device *dev = to_platform_device(_dev);
  706. imx_ports[dev->id].port.dev = _dev;
  707. uart_add_one_port(&imx_reg, &imx_ports[dev->id].port);
  708. dev_set_drvdata(_dev, &imx_ports[dev->id]);
  709. return 0;
  710. }
  711. static int serial_imx_remove(struct device *_dev)
  712. {
  713. struct imx_port *sport = dev_get_drvdata(_dev);
  714. dev_set_drvdata(_dev, NULL);
  715. if (sport)
  716. uart_remove_one_port(&imx_reg, &sport->port);
  717. return 0;
  718. }
  719. static struct device_driver serial_imx_driver = {
  720. .name = "imx-uart",
  721. .bus = &platform_bus_type,
  722. .probe = serial_imx_probe,
  723. .remove = serial_imx_remove,
  724. .suspend = serial_imx_suspend,
  725. .resume = serial_imx_resume,
  726. };
  727. static int __init imx_serial_init(void)
  728. {
  729. int ret;
  730. printk(KERN_INFO "Serial: IMX driver\n");
  731. imx_init_ports();
  732. ret = uart_register_driver(&imx_reg);
  733. if (ret)
  734. return ret;
  735. ret = driver_register(&serial_imx_driver);
  736. if (ret != 0)
  737. uart_unregister_driver(&imx_reg);
  738. return 0;
  739. }
  740. static void __exit imx_serial_exit(void)
  741. {
  742. uart_unregister_driver(&imx_reg);
  743. }
  744. module_init(imx_serial_init);
  745. module_exit(imx_serial_exit);
  746. MODULE_AUTHOR("Sascha Hauer");
  747. MODULE_DESCRIPTION("IMX generic serial port driver");
  748. MODULE_LICENSE("GPL");