lpfc_sli.c 74 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Enterprise Fibre Channel Host Bus Adapters. *
  4. * Refer to the README file included with this package for *
  5. * driver version and adapter support. *
  6. * Copyright (C) 2004 Emulex Corporation. *
  7. * www.emulex.com *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of the GNU General Public License *
  11. * as published by the Free Software Foundation; either version 2 *
  12. * of the License, or (at your option) any later version. *
  13. * *
  14. * This program is distributed in the hope that it will be useful, *
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  17. * GNU General Public License for more details, a copy of which *
  18. * can be found in the file COPYING included with this package. *
  19. *******************************************************************/
  20. /*
  21. * $Id: lpfc_sli.c 1.232 2005/04/13 11:59:16EDT sf_support Exp $
  22. */
  23. #include <linux/blkdev.h>
  24. #include <linux/pci.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/delay.h>
  27. #include <scsi/scsi_cmnd.h>
  28. #include <scsi/scsi_device.h>
  29. #include <scsi/scsi_host.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. /*
  62. * Translate the iocb command to an iocb command type used to decide the final
  63. * disposition of each completed IOCB.
  64. */
  65. static lpfc_iocb_type
  66. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  67. {
  68. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  69. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  70. return 0;
  71. switch (iocb_cmnd) {
  72. case CMD_XMIT_SEQUENCE_CR:
  73. case CMD_XMIT_SEQUENCE_CX:
  74. case CMD_XMIT_BCAST_CN:
  75. case CMD_XMIT_BCAST_CX:
  76. case CMD_ELS_REQUEST_CR:
  77. case CMD_ELS_REQUEST_CX:
  78. case CMD_CREATE_XRI_CR:
  79. case CMD_CREATE_XRI_CX:
  80. case CMD_GET_RPI_CN:
  81. case CMD_XMIT_ELS_RSP_CX:
  82. case CMD_GET_RPI_CR:
  83. case CMD_FCP_IWRITE_CR:
  84. case CMD_FCP_IWRITE_CX:
  85. case CMD_FCP_IREAD_CR:
  86. case CMD_FCP_IREAD_CX:
  87. case CMD_FCP_ICMND_CR:
  88. case CMD_FCP_ICMND_CX:
  89. case CMD_ADAPTER_MSG:
  90. case CMD_ADAPTER_DUMP:
  91. case CMD_XMIT_SEQUENCE64_CR:
  92. case CMD_XMIT_SEQUENCE64_CX:
  93. case CMD_XMIT_BCAST64_CN:
  94. case CMD_XMIT_BCAST64_CX:
  95. case CMD_ELS_REQUEST64_CR:
  96. case CMD_ELS_REQUEST64_CX:
  97. case CMD_FCP_IWRITE64_CR:
  98. case CMD_FCP_IWRITE64_CX:
  99. case CMD_FCP_IREAD64_CR:
  100. case CMD_FCP_IREAD64_CX:
  101. case CMD_FCP_ICMND64_CR:
  102. case CMD_FCP_ICMND64_CX:
  103. case CMD_GEN_REQUEST64_CR:
  104. case CMD_GEN_REQUEST64_CX:
  105. case CMD_XMIT_ELS_RSP64_CX:
  106. type = LPFC_SOL_IOCB;
  107. break;
  108. case CMD_ABORT_XRI_CN:
  109. case CMD_ABORT_XRI_CX:
  110. case CMD_CLOSE_XRI_CN:
  111. case CMD_CLOSE_XRI_CX:
  112. case CMD_XRI_ABORTED_CX:
  113. case CMD_ABORT_MXRI64_CN:
  114. type = LPFC_ABORT_IOCB;
  115. break;
  116. case CMD_RCV_SEQUENCE_CX:
  117. case CMD_RCV_ELS_REQ_CX:
  118. case CMD_RCV_SEQUENCE64_CX:
  119. case CMD_RCV_ELS_REQ64_CX:
  120. type = LPFC_UNSOL_IOCB;
  121. break;
  122. default:
  123. type = LPFC_UNKNOWN_IOCB;
  124. break;
  125. }
  126. return type;
  127. }
  128. static int
  129. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  130. {
  131. struct lpfc_sli *psli = &phba->sli;
  132. MAILBOX_t *pmbox = &pmb->mb;
  133. int i, rc;
  134. for (i = 0; i < psli->num_rings; i++) {
  135. phba->hba_state = LPFC_INIT_MBX_CMDS;
  136. lpfc_config_ring(phba, i, pmb);
  137. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  138. if (rc != MBX_SUCCESS) {
  139. lpfc_printf_log(phba,
  140. KERN_ERR,
  141. LOG_INIT,
  142. "%d:0446 Adapter failed to init, "
  143. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  144. "ring %d\n",
  145. phba->brd_no,
  146. pmbox->mbxCommand,
  147. pmbox->mbxStatus,
  148. i);
  149. phba->hba_state = LPFC_HBA_ERROR;
  150. return -ENXIO;
  151. }
  152. }
  153. return 0;
  154. }
  155. static int
  156. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  157. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  158. {
  159. uint16_t iotag;
  160. list_add_tail(&piocb->list, &pring->txcmplq);
  161. pring->txcmplq_cnt++;
  162. if (unlikely(pring->ringno == LPFC_ELS_RING))
  163. mod_timer(&phba->els_tmofunc,
  164. jiffies + HZ * (phba->fc_ratov << 1));
  165. if (pring->fast_lookup) {
  166. /* Setup fast lookup based on iotag for completion */
  167. iotag = piocb->iocb.ulpIoTag;
  168. if (iotag && (iotag < pring->fast_iotag))
  169. *(pring->fast_lookup + iotag) = piocb;
  170. else {
  171. /* Cmd ring <ringno> put: iotag <iotag> greater then
  172. configured max <fast_iotag> wd0 <icmd> */
  173. lpfc_printf_log(phba,
  174. KERN_ERR,
  175. LOG_SLI,
  176. "%d:0316 Cmd ring %d put: iotag x%x "
  177. "greater then configured max x%x "
  178. "wd0 x%x\n",
  179. phba->brd_no,
  180. pring->ringno, iotag,
  181. pring->fast_iotag,
  182. *(((uint32_t *)(&piocb->iocb)) + 7));
  183. }
  184. }
  185. return (0);
  186. }
  187. static struct lpfc_iocbq *
  188. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  189. {
  190. struct list_head *dlp;
  191. struct lpfc_iocbq *cmd_iocb;
  192. dlp = &pring->txq;
  193. cmd_iocb = NULL;
  194. list_remove_head((&pring->txq), cmd_iocb,
  195. struct lpfc_iocbq,
  196. list);
  197. if (cmd_iocb) {
  198. /* If the first ptr is not equal to the list header,
  199. * deque the IOCBQ_t and return it.
  200. */
  201. pring->txq_cnt--;
  202. }
  203. return (cmd_iocb);
  204. }
  205. static IOCB_t *
  206. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  207. {
  208. MAILBOX_t *mbox = (MAILBOX_t *)phba->sli.MBhostaddr;
  209. PGP *pgp = (PGP *)&mbox->us.s2.port[pring->ringno];
  210. uint32_t max_cmd_idx = pring->numCiocb;
  211. IOCB_t *iocb = NULL;
  212. if ((pring->next_cmdidx == pring->cmdidx) &&
  213. (++pring->next_cmdidx >= max_cmd_idx))
  214. pring->next_cmdidx = 0;
  215. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  216. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  217. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  218. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  219. "%d:0315 Ring %d issue: portCmdGet %d "
  220. "is bigger then cmd ring %d\n",
  221. phba->brd_no, pring->ringno,
  222. pring->local_getidx, max_cmd_idx);
  223. phba->hba_state = LPFC_HBA_ERROR;
  224. /*
  225. * All error attention handlers are posted to
  226. * worker thread
  227. */
  228. phba->work_ha |= HA_ERATT;
  229. phba->work_hs = HS_FFER3;
  230. if (phba->work_wait)
  231. wake_up(phba->work_wait);
  232. return NULL;
  233. }
  234. if (pring->local_getidx == pring->next_cmdidx)
  235. return NULL;
  236. }
  237. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  238. return iocb;
  239. }
  240. static uint32_t
  241. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  242. {
  243. uint32_t search_start;
  244. if (pring->fast_lookup == NULL) {
  245. pring->iotag_ctr++;
  246. if (pring->iotag_ctr >= pring->iotag_max)
  247. pring->iotag_ctr = 1;
  248. return pring->iotag_ctr;
  249. }
  250. search_start = pring->iotag_ctr;
  251. do {
  252. pring->iotag_ctr++;
  253. if (pring->iotag_ctr >= pring->fast_iotag)
  254. pring->iotag_ctr = 1;
  255. if (*(pring->fast_lookup + pring->iotag_ctr) == NULL)
  256. return pring->iotag_ctr;
  257. } while (pring->iotag_ctr != search_start);
  258. /*
  259. * Outstanding I/O count for ring <ringno> is at max <fast_iotag>
  260. */
  261. lpfc_printf_log(phba,
  262. KERN_ERR,
  263. LOG_SLI,
  264. "%d:0318 Outstanding I/O count for ring %d is at max x%x\n",
  265. phba->brd_no,
  266. pring->ringno,
  267. pring->fast_iotag);
  268. return (0);
  269. }
  270. static void
  271. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  272. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  273. {
  274. /*
  275. * Allocate and set up an iotag
  276. */
  277. nextiocb->iocb.ulpIoTag =
  278. lpfc_sli_next_iotag(phba, &phba->sli.ring[phba->sli.fcp_ring]);
  279. /*
  280. * Issue iocb command to adapter
  281. */
  282. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  283. wmb();
  284. pring->stats.iocb_cmd++;
  285. /*
  286. * If there is no completion routine to call, we can release the
  287. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  288. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  289. */
  290. if (nextiocb->iocb_cmpl)
  291. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  292. else {
  293. list_add_tail(&nextiocb->list, &phba->lpfc_iocb_list);
  294. }
  295. /*
  296. * Let the HBA know what IOCB slot will be the next one the
  297. * driver will put a command into.
  298. */
  299. pring->cmdidx = pring->next_cmdidx;
  300. writeb(pring->cmdidx, phba->MBslimaddr
  301. + (SLIMOFF + (pring->ringno * 2)) * 4);
  302. }
  303. static void
  304. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  305. struct lpfc_sli_ring *pring)
  306. {
  307. int ringno = pring->ringno;
  308. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  309. wmb();
  310. /*
  311. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  312. * The HBA will tell us when an IOCB entry is available.
  313. */
  314. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  315. readl(phba->CAregaddr); /* flush */
  316. pring->stats.iocb_cmd_full++;
  317. }
  318. static void
  319. lpfc_sli_update_ring(struct lpfc_hba * phba,
  320. struct lpfc_sli_ring *pring)
  321. {
  322. int ringno = pring->ringno;
  323. /*
  324. * Tell the HBA that there is work to do in this ring.
  325. */
  326. wmb();
  327. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  328. readl(phba->CAregaddr); /* flush */
  329. }
  330. static void
  331. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  332. {
  333. IOCB_t *iocb;
  334. struct lpfc_iocbq *nextiocb;
  335. /*
  336. * Check to see if:
  337. * (a) there is anything on the txq to send
  338. * (b) link is up
  339. * (c) link attention events can be processed (fcp ring only)
  340. * (d) IOCB processing is not blocked by the outstanding mbox command.
  341. */
  342. if (pring->txq_cnt &&
  343. (phba->hba_state > LPFC_LINK_DOWN) &&
  344. (pring->ringno != phba->sli.fcp_ring ||
  345. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  346. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  347. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  348. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  349. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  350. if (iocb)
  351. lpfc_sli_update_ring(phba, pring);
  352. else
  353. lpfc_sli_update_full_ring(phba, pring);
  354. }
  355. return;
  356. }
  357. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  358. static void
  359. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  360. {
  361. PGP *pgp =
  362. ((PGP *) &
  363. (((MAILBOX_t *)phba->sli.MBhostaddr)->us.s2.port[ringno]));
  364. /* If the ring is active, flag it */
  365. if (phba->sli.ring[ringno].cmdringaddr) {
  366. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  367. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  368. /*
  369. * Force update of the local copy of cmdGetInx
  370. */
  371. phba->sli.ring[ringno].local_getidx
  372. = le32_to_cpu(pgp->cmdGetInx);
  373. spin_lock_irq(phba->host->host_lock);
  374. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  375. spin_unlock_irq(phba->host->host_lock);
  376. }
  377. }
  378. }
  379. static int
  380. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  381. {
  382. uint8_t ret;
  383. switch (mbxCommand) {
  384. case MBX_LOAD_SM:
  385. case MBX_READ_NV:
  386. case MBX_WRITE_NV:
  387. case MBX_RUN_BIU_DIAG:
  388. case MBX_INIT_LINK:
  389. case MBX_DOWN_LINK:
  390. case MBX_CONFIG_LINK:
  391. case MBX_CONFIG_RING:
  392. case MBX_RESET_RING:
  393. case MBX_READ_CONFIG:
  394. case MBX_READ_RCONFIG:
  395. case MBX_READ_SPARM:
  396. case MBX_READ_STATUS:
  397. case MBX_READ_RPI:
  398. case MBX_READ_XRI:
  399. case MBX_READ_REV:
  400. case MBX_READ_LNK_STAT:
  401. case MBX_REG_LOGIN:
  402. case MBX_UNREG_LOGIN:
  403. case MBX_READ_LA:
  404. case MBX_CLEAR_LA:
  405. case MBX_DUMP_MEMORY:
  406. case MBX_DUMP_CONTEXT:
  407. case MBX_RUN_DIAGS:
  408. case MBX_RESTART:
  409. case MBX_UPDATE_CFG:
  410. case MBX_DOWN_LOAD:
  411. case MBX_DEL_LD_ENTRY:
  412. case MBX_RUN_PROGRAM:
  413. case MBX_SET_MASK:
  414. case MBX_SET_SLIM:
  415. case MBX_UNREG_D_ID:
  416. case MBX_CONFIG_FARP:
  417. case MBX_LOAD_AREA:
  418. case MBX_RUN_BIU_DIAG64:
  419. case MBX_CONFIG_PORT:
  420. case MBX_READ_SPARM64:
  421. case MBX_READ_RPI64:
  422. case MBX_REG_LOGIN64:
  423. case MBX_READ_LA64:
  424. case MBX_FLASH_WR_ULA:
  425. case MBX_SET_DEBUG:
  426. case MBX_LOAD_EXP_ROM:
  427. ret = mbxCommand;
  428. break;
  429. default:
  430. ret = MBX_SHUTDOWN;
  431. break;
  432. }
  433. return (ret);
  434. }
  435. static void
  436. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  437. {
  438. wait_queue_head_t *pdone_q;
  439. /*
  440. * If pdone_q is empty, the driver thread gave up waiting and
  441. * continued running.
  442. */
  443. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  444. if (pdone_q)
  445. wake_up_interruptible(pdone_q);
  446. return;
  447. }
  448. void
  449. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  450. {
  451. struct lpfc_dmabuf *mp;
  452. mp = (struct lpfc_dmabuf *) (pmb->context1);
  453. if (mp) {
  454. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  455. kfree(mp);
  456. }
  457. mempool_free( pmb, phba->mbox_mem_pool);
  458. return;
  459. }
  460. int
  461. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  462. {
  463. MAILBOX_t *mbox;
  464. MAILBOX_t *pmbox;
  465. LPFC_MBOXQ_t *pmb;
  466. struct lpfc_sli *psli;
  467. int i, rc;
  468. uint32_t process_next;
  469. psli = &phba->sli;
  470. /* We should only get here if we are in SLI2 mode */
  471. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  472. return (1);
  473. }
  474. phba->sli.slistat.mbox_event++;
  475. /* Get a Mailbox buffer to setup mailbox commands for callback */
  476. if ((pmb = phba->sli.mbox_active)) {
  477. pmbox = &pmb->mb;
  478. mbox = (MAILBOX_t *) phba->sli.MBhostaddr;
  479. /* First check out the status word */
  480. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  481. /* Sanity check to ensure the host owns the mailbox */
  482. if (pmbox->mbxOwner != OWN_HOST) {
  483. /* Lets try for a while */
  484. for (i = 0; i < 10240; i++) {
  485. /* First copy command data */
  486. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  487. sizeof (uint32_t));
  488. if (pmbox->mbxOwner == OWN_HOST)
  489. goto mbout;
  490. }
  491. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  492. <status> */
  493. lpfc_printf_log(phba,
  494. KERN_ERR,
  495. LOG_MBOX | LOG_SLI,
  496. "%d:0304 Stray Mailbox Interrupt "
  497. "mbxCommand x%x mbxStatus x%x\n",
  498. phba->brd_no,
  499. pmbox->mbxCommand,
  500. pmbox->mbxStatus);
  501. spin_lock_irq(phba->host->host_lock);
  502. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  503. spin_unlock_irq(phba->host->host_lock);
  504. return (1);
  505. }
  506. mbout:
  507. del_timer_sync(&phba->sli.mbox_tmo);
  508. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  509. /*
  510. * It is a fatal error if unknown mbox command completion.
  511. */
  512. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  513. MBX_SHUTDOWN) {
  514. /* Unknow mailbox command compl */
  515. lpfc_printf_log(phba,
  516. KERN_ERR,
  517. LOG_MBOX | LOG_SLI,
  518. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  519. phba->brd_no,
  520. pmbox->mbxCommand);
  521. phba->hba_state = LPFC_HBA_ERROR;
  522. phba->work_hs = HS_FFER3;
  523. lpfc_handle_eratt(phba);
  524. return (0);
  525. }
  526. phba->sli.mbox_active = NULL;
  527. if (pmbox->mbxStatus) {
  528. phba->sli.slistat.mbox_stat_err++;
  529. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  530. /* Mbox cmd cmpl error - RETRYing */
  531. lpfc_printf_log(phba,
  532. KERN_INFO,
  533. LOG_MBOX | LOG_SLI,
  534. "%d:0305 Mbox cmd cmpl error - "
  535. "RETRYing Data: x%x x%x x%x x%x\n",
  536. phba->brd_no,
  537. pmbox->mbxCommand,
  538. pmbox->mbxStatus,
  539. pmbox->un.varWords[0],
  540. phba->hba_state);
  541. pmbox->mbxStatus = 0;
  542. pmbox->mbxOwner = OWN_HOST;
  543. spin_lock_irq(phba->host->host_lock);
  544. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  545. spin_unlock_irq(phba->host->host_lock);
  546. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  547. if (rc == MBX_SUCCESS)
  548. return (0);
  549. }
  550. }
  551. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  552. lpfc_printf_log(phba,
  553. KERN_INFO,
  554. LOG_MBOX | LOG_SLI,
  555. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  556. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  557. phba->brd_no,
  558. pmbox->mbxCommand,
  559. pmb->mbox_cmpl,
  560. *((uint32_t *) pmbox),
  561. pmbox->un.varWords[0],
  562. pmbox->un.varWords[1],
  563. pmbox->un.varWords[2],
  564. pmbox->un.varWords[3],
  565. pmbox->un.varWords[4],
  566. pmbox->un.varWords[5],
  567. pmbox->un.varWords[6],
  568. pmbox->un.varWords[7]);
  569. if (pmb->mbox_cmpl) {
  570. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  571. pmb->mbox_cmpl(phba,pmb);
  572. }
  573. }
  574. do {
  575. process_next = 0; /* by default don't loop */
  576. spin_lock_irq(phba->host->host_lock);
  577. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  578. /* Process next mailbox command if there is one */
  579. if ((pmb = lpfc_mbox_get(phba))) {
  580. spin_unlock_irq(phba->host->host_lock);
  581. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  582. if (rc == MBX_NOT_FINISHED) {
  583. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  584. pmb->mbox_cmpl(phba,pmb);
  585. process_next = 1;
  586. continue; /* loop back */
  587. }
  588. } else {
  589. spin_unlock_irq(phba->host->host_lock);
  590. /* Turn on IOCB processing */
  591. for (i = 0; i < phba->sli.num_rings; i++) {
  592. lpfc_sli_turn_on_ring(phba, i);
  593. }
  594. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  595. while (!list_empty(&phba->freebufList)) {
  596. struct lpfc_dmabuf *mp;
  597. mp = NULL;
  598. list_remove_head((&phba->freebufList),
  599. mp,
  600. struct lpfc_dmabuf,
  601. list);
  602. if (mp) {
  603. lpfc_mbuf_free(phba, mp->virt,
  604. mp->phys);
  605. kfree(mp);
  606. }
  607. }
  608. }
  609. } while (process_next);
  610. return (0);
  611. }
  612. static int
  613. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  614. struct lpfc_iocbq *saveq)
  615. {
  616. IOCB_t * irsp;
  617. WORD5 * w5p;
  618. uint32_t Rctl, Type;
  619. uint32_t match, i;
  620. match = 0;
  621. irsp = &(saveq->iocb);
  622. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  623. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  624. Rctl = FC_ELS_REQ;
  625. Type = FC_ELS_DATA;
  626. } else {
  627. w5p =
  628. (WORD5 *) & (saveq->iocb.un.
  629. ulpWord[5]);
  630. Rctl = w5p->hcsw.Rctl;
  631. Type = w5p->hcsw.Type;
  632. /* Firmware Workaround */
  633. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  634. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  635. Rctl = FC_ELS_REQ;
  636. Type = FC_ELS_DATA;
  637. w5p->hcsw.Rctl = Rctl;
  638. w5p->hcsw.Type = Type;
  639. }
  640. }
  641. /* unSolicited Responses */
  642. if (pring->prt[0].profile) {
  643. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
  644. match = 1;
  645. } else {
  646. /* We must search, based on rctl / type
  647. for the right routine */
  648. for (i = 0; i < pring->num_mask;
  649. i++) {
  650. if ((pring->prt[i].rctl ==
  651. Rctl)
  652. && (pring->prt[i].
  653. type == Type)) {
  654. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  655. (phba, pring, saveq);
  656. match = 1;
  657. break;
  658. }
  659. }
  660. }
  661. if (match == 0) {
  662. /* Unexpected Rctl / Type received */
  663. /* Ring <ringno> handler: unexpected
  664. Rctl <Rctl> Type <Type> received */
  665. lpfc_printf_log(phba,
  666. KERN_WARNING,
  667. LOG_SLI,
  668. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  669. "Type x%x received \n",
  670. phba->brd_no,
  671. pring->ringno,
  672. Rctl,
  673. Type);
  674. }
  675. return(1);
  676. }
  677. static struct lpfc_iocbq *
  678. lpfc_sli_txcmpl_ring_search_slow(struct lpfc_sli_ring * pring,
  679. struct lpfc_iocbq * prspiocb)
  680. {
  681. IOCB_t *icmd = NULL;
  682. IOCB_t *irsp = NULL;
  683. struct lpfc_iocbq *cmd_iocb;
  684. struct lpfc_iocbq *iocb, *next_iocb;
  685. uint16_t iotag;
  686. irsp = &prspiocb->iocb;
  687. iotag = irsp->ulpIoTag;
  688. cmd_iocb = NULL;
  689. /* Search through txcmpl from the begining */
  690. list_for_each_entry_safe(iocb, next_iocb, &(pring->txcmplq), list) {
  691. icmd = &iocb->iocb;
  692. if (iotag == icmd->ulpIoTag) {
  693. /* Found a match. */
  694. cmd_iocb = iocb;
  695. list_del(&iocb->list);
  696. pring->txcmplq_cnt--;
  697. break;
  698. }
  699. }
  700. return (cmd_iocb);
  701. }
  702. static struct lpfc_iocbq *
  703. lpfc_sli_txcmpl_ring_iotag_lookup(struct lpfc_hba * phba,
  704. struct lpfc_sli_ring * pring,
  705. struct lpfc_iocbq * prspiocb)
  706. {
  707. IOCB_t *irsp = NULL;
  708. struct lpfc_iocbq *cmd_iocb = NULL;
  709. uint16_t iotag;
  710. if (unlikely(pring->fast_lookup == NULL))
  711. return NULL;
  712. /* Use fast lookup based on iotag for completion */
  713. irsp = &prspiocb->iocb;
  714. iotag = irsp->ulpIoTag;
  715. if (iotag < pring->fast_iotag) {
  716. cmd_iocb = *(pring->fast_lookup + iotag);
  717. *(pring->fast_lookup + iotag) = NULL;
  718. if (cmd_iocb) {
  719. list_del(&cmd_iocb->list);
  720. pring->txcmplq_cnt--;
  721. return cmd_iocb;
  722. } else {
  723. /*
  724. * This is clearly an error. A ring that uses iotags
  725. * should never have a interrupt for a completion that
  726. * is not on the ring. Return NULL and log a error.
  727. */
  728. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  729. "%d:0327 Rsp ring %d error - command "
  730. "completion for iotag x%x not found\n",
  731. phba->brd_no, pring->ringno, iotag);
  732. return NULL;
  733. }
  734. }
  735. /*
  736. * Rsp ring <ringno> get: iotag <iotag> greater then
  737. * configured max <fast_iotag> wd0 <irsp>. This is an
  738. * error. Just return NULL.
  739. */
  740. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  741. "%d:0317 Rsp ring %d get: iotag x%x greater then "
  742. "configured max x%x wd0 x%x\n",
  743. phba->brd_no, pring->ringno, iotag, pring->fast_iotag,
  744. *(((uint32_t *) irsp) + 7));
  745. return NULL;
  746. }
  747. static int
  748. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  749. struct lpfc_iocbq *saveq)
  750. {
  751. struct lpfc_iocbq * cmdiocbp;
  752. int rc = 1;
  753. unsigned long iflag;
  754. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  755. spin_lock_irqsave(phba->host->host_lock, iflag);
  756. cmdiocbp = lpfc_sli_txcmpl_ring_search_slow(pring, saveq);
  757. if (cmdiocbp) {
  758. if (cmdiocbp->iocb_cmpl) {
  759. /*
  760. * Post all ELS completions to the worker thread.
  761. * All other are passed to the completion callback.
  762. */
  763. if (pring->ringno == LPFC_ELS_RING) {
  764. spin_unlock_irqrestore(phba->host->host_lock,
  765. iflag);
  766. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  767. spin_lock_irqsave(phba->host->host_lock, iflag);
  768. }
  769. else {
  770. if (cmdiocbp->iocb_flag & LPFC_IO_POLL)
  771. rc = 0;
  772. spin_unlock_irqrestore(phba->host->host_lock,
  773. iflag);
  774. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  775. spin_lock_irqsave(phba->host->host_lock, iflag);
  776. }
  777. } else {
  778. list_add_tail(&cmdiocbp->list, &phba->lpfc_iocb_list);
  779. }
  780. } else {
  781. /*
  782. * Unknown initiating command based on the response iotag.
  783. * This could be the case on the ELS ring because of
  784. * lpfc_els_abort().
  785. */
  786. if (pring->ringno != LPFC_ELS_RING) {
  787. /*
  788. * Ring <ringno> handler: unexpected completion IoTag
  789. * <IoTag>
  790. */
  791. lpfc_printf_log(phba,
  792. KERN_WARNING,
  793. LOG_SLI,
  794. "%d:0322 Ring %d handler: unexpected "
  795. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  796. phba->brd_no,
  797. pring->ringno,
  798. saveq->iocb.ulpIoTag,
  799. saveq->iocb.ulpStatus,
  800. saveq->iocb.un.ulpWord[4],
  801. saveq->iocb.ulpCommand,
  802. saveq->iocb.ulpContext);
  803. }
  804. }
  805. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  806. return rc;
  807. }
  808. /*
  809. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  810. * to check it explicitly.
  811. */
  812. static int
  813. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  814. struct lpfc_sli_ring * pring, uint32_t mask)
  815. {
  816. IOCB_t *irsp = NULL;
  817. struct lpfc_iocbq *cmdiocbq = NULL;
  818. struct lpfc_iocbq rspiocbq;
  819. PGP *pgp;
  820. uint32_t status;
  821. uint32_t portRspPut, portRspMax;
  822. int rc = 1;
  823. lpfc_iocb_type type;
  824. unsigned long iflag;
  825. uint32_t rsp_cmpl = 0;
  826. void __iomem *to_slim;
  827. spin_lock_irqsave(phba->host->host_lock, iflag);
  828. pring->stats.iocb_event++;
  829. /* The driver assumes SLI-2 mode */
  830. pgp = (PGP *) &((MAILBOX_t *) phba->sli.MBhostaddr)
  831. ->us.s2.port[pring->ringno];
  832. /*
  833. * The next available response entry should never exceed the maximum
  834. * entries. If it does, treat it as an adapter hardware error.
  835. */
  836. portRspMax = pring->numRiocb;
  837. portRspPut = le32_to_cpu(pgp->rspPutInx);
  838. if (unlikely(portRspPut >= portRspMax)) {
  839. /*
  840. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  841. * rsp ring <portRspMax>
  842. */
  843. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  844. "%d:0312 Ring %d handler: portRspPut %d "
  845. "is bigger then rsp ring %d\n",
  846. phba->brd_no, pring->ringno, portRspPut,
  847. portRspMax);
  848. phba->hba_state = LPFC_HBA_ERROR;
  849. /* All error attention handlers are posted to worker thread */
  850. phba->work_ha |= HA_ERATT;
  851. phba->work_hs = HS_FFER3;
  852. if (phba->work_wait)
  853. wake_up(phba->work_wait);
  854. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  855. return 1;
  856. }
  857. rmb();
  858. while (pring->rspidx != portRspPut) {
  859. irsp = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  860. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  861. pring->stats.iocb_rsp++;
  862. rsp_cmpl++;
  863. if (unlikely(irsp->ulpStatus)) {
  864. /* Rsp ring <ringno> error: IOCB */
  865. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  866. "%d:0326 Rsp Ring %d error: IOCB Data: "
  867. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  868. phba->brd_no, pring->ringno,
  869. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  870. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  871. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  872. *(((uint32_t *) irsp) + 6),
  873. *(((uint32_t *) irsp) + 7));
  874. }
  875. switch (type) {
  876. case LPFC_ABORT_IOCB:
  877. case LPFC_SOL_IOCB:
  878. /*
  879. * Idle exchange closed via ABTS from port. No iocb
  880. * resources need to be recovered.
  881. */
  882. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  883. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  884. "Skipping completion\n", __FUNCTION__,
  885. irsp->ulpCommand);
  886. break;
  887. }
  888. rspiocbq.iocb.un.ulpWord[4] = irsp->un.ulpWord[4];
  889. rspiocbq.iocb.ulpStatus = irsp->ulpStatus;
  890. rspiocbq.iocb.ulpContext = irsp->ulpContext;
  891. rspiocbq.iocb.ulpIoTag = irsp->ulpIoTag;
  892. cmdiocbq = lpfc_sli_txcmpl_ring_iotag_lookup(phba,
  893. pring,
  894. &rspiocbq);
  895. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  896. spin_unlock_irqrestore(
  897. phba->host->host_lock, iflag);
  898. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  899. &rspiocbq);
  900. spin_lock_irqsave(phba->host->host_lock,
  901. iflag);
  902. }
  903. break;
  904. default:
  905. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  906. char adaptermsg[LPFC_MAX_ADPTMSG];
  907. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  908. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  909. MAX_MSG_DATA);
  910. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  911. phba->brd_no, adaptermsg);
  912. } else {
  913. /* Unknown IOCB command */
  914. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  915. "%d:0321 Unknown IOCB command "
  916. "Data: x%x, x%x x%x x%x x%x\n",
  917. phba->brd_no, type, irsp->ulpCommand,
  918. irsp->ulpStatus, irsp->ulpIoTag,
  919. irsp->ulpContext);
  920. }
  921. break;
  922. }
  923. /*
  924. * The response IOCB has been processed. Update the ring
  925. * pointer in SLIM. If the port response put pointer has not
  926. * been updated, sync the pgp->rspPutInx and fetch the new port
  927. * response put pointer.
  928. */
  929. if (++pring->rspidx >= portRspMax)
  930. pring->rspidx = 0;
  931. to_slim = phba->MBslimaddr +
  932. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  933. writeb(pring->rspidx, to_slim);
  934. if (pring->rspidx == portRspPut)
  935. portRspPut = le32_to_cpu(pgp->rspPutInx);
  936. }
  937. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  938. pring->stats.iocb_rsp_full++;
  939. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  940. writel(status, phba->CAregaddr);
  941. readl(phba->CAregaddr);
  942. }
  943. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  944. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  945. pring->stats.iocb_cmd_empty++;
  946. /* Force update of the local copy of cmdGetInx */
  947. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  948. lpfc_sli_resume_iocb(phba, pring);
  949. if ((pring->lpfc_sli_cmd_available))
  950. (pring->lpfc_sli_cmd_available) (phba, pring);
  951. }
  952. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  953. return rc;
  954. }
  955. int
  956. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  957. struct lpfc_sli_ring * pring, uint32_t mask)
  958. {
  959. IOCB_t *entry;
  960. IOCB_t *irsp = NULL;
  961. struct lpfc_iocbq *rspiocbp = NULL;
  962. struct lpfc_iocbq *next_iocb;
  963. struct lpfc_iocbq *cmdiocbp;
  964. struct lpfc_iocbq *saveq;
  965. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  966. HGP *hgp;
  967. PGP *pgp;
  968. MAILBOX_t *mbox;
  969. uint8_t iocb_cmd_type;
  970. lpfc_iocb_type type;
  971. uint32_t status, free_saveq;
  972. uint32_t portRspPut, portRspMax;
  973. int rc = 1;
  974. unsigned long iflag;
  975. void __iomem *to_slim;
  976. spin_lock_irqsave(phba->host->host_lock, iflag);
  977. pring->stats.iocb_event++;
  978. /* The driver assumes SLI-2 mode */
  979. mbox = (MAILBOX_t *) phba->sli.MBhostaddr;
  980. pgp = (PGP *) & mbox->us.s2.port[pring->ringno];
  981. hgp = (HGP *) & mbox->us.s2.host[pring->ringno];
  982. /*
  983. * The next available response entry should never exceed the maximum
  984. * entries. If it does, treat it as an adapter hardware error.
  985. */
  986. portRspMax = pring->numRiocb;
  987. portRspPut = le32_to_cpu(pgp->rspPutInx);
  988. if (portRspPut >= portRspMax) {
  989. /*
  990. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  991. * rsp ring <portRspMax>
  992. */
  993. lpfc_printf_log(phba,
  994. KERN_ERR,
  995. LOG_SLI,
  996. "%d:0312 Ring %d handler: portRspPut %d "
  997. "is bigger then rsp ring %d\n",
  998. phba->brd_no,
  999. pring->ringno, portRspPut, portRspMax);
  1000. phba->hba_state = LPFC_HBA_ERROR;
  1001. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1002. phba->work_hs = HS_FFER3;
  1003. lpfc_handle_eratt(phba);
  1004. return 1;
  1005. }
  1006. rmb();
  1007. lpfc_iocb_list = &phba->lpfc_iocb_list;
  1008. while (pring->rspidx != portRspPut) {
  1009. /*
  1010. * Build a completion list and call the appropriate handler.
  1011. * The process is to get the next available response iocb, get
  1012. * a free iocb from the list, copy the response data into the
  1013. * free iocb, insert to the continuation list, and update the
  1014. * next response index to slim. This process makes response
  1015. * iocb's in the ring available to DMA as fast as possible but
  1016. * pays a penalty for a copy operation. Since the iocb is
  1017. * only 32 bytes, this penalty is considered small relative to
  1018. * the PCI reads for register values and a slim write. When
  1019. * the ulpLe field is set, the entire Command has been
  1020. * received.
  1021. */
  1022. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1023. list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
  1024. list);
  1025. if (rspiocbp == NULL) {
  1026. printk(KERN_ERR "%s: out of buffers! Failing "
  1027. "completion.\n", __FUNCTION__);
  1028. break;
  1029. }
  1030. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1031. irsp = &rspiocbp->iocb;
  1032. if (++pring->rspidx >= portRspMax)
  1033. pring->rspidx = 0;
  1034. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1035. + 1) * 4;
  1036. writeb(pring->rspidx, to_slim);
  1037. if (list_empty(&(pring->iocb_continueq))) {
  1038. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1039. } else {
  1040. list_add_tail(&rspiocbp->list,
  1041. &(pring->iocb_continueq));
  1042. }
  1043. pring->iocb_continueq_cnt++;
  1044. if (irsp->ulpLe) {
  1045. /*
  1046. * By default, the driver expects to free all resources
  1047. * associated with this iocb completion.
  1048. */
  1049. free_saveq = 1;
  1050. saveq = list_get_first(&pring->iocb_continueq,
  1051. struct lpfc_iocbq, list);
  1052. irsp = &(saveq->iocb);
  1053. list_del_init(&pring->iocb_continueq);
  1054. pring->iocb_continueq_cnt = 0;
  1055. pring->stats.iocb_rsp++;
  1056. if (irsp->ulpStatus) {
  1057. /* Rsp ring <ringno> error: IOCB */
  1058. lpfc_printf_log(phba,
  1059. KERN_WARNING,
  1060. LOG_SLI,
  1061. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1062. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1063. phba->brd_no,
  1064. pring->ringno,
  1065. irsp->un.ulpWord[0],
  1066. irsp->un.ulpWord[1],
  1067. irsp->un.ulpWord[2],
  1068. irsp->un.ulpWord[3],
  1069. irsp->un.ulpWord[4],
  1070. irsp->un.ulpWord[5],
  1071. *(((uint32_t *) irsp) + 6),
  1072. *(((uint32_t *) irsp) + 7));
  1073. }
  1074. /*
  1075. * Fetch the IOCB command type and call the correct
  1076. * completion routine. Solicited and Unsolicited
  1077. * IOCBs on the ELS ring get freed back to the
  1078. * lpfc_iocb_list by the discovery kernel thread.
  1079. */
  1080. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1081. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1082. if (type == LPFC_SOL_IOCB) {
  1083. spin_unlock_irqrestore(phba->host->host_lock,
  1084. iflag);
  1085. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1086. saveq);
  1087. spin_lock_irqsave(phba->host->host_lock, iflag);
  1088. } else if (type == LPFC_UNSOL_IOCB) {
  1089. spin_unlock_irqrestore(phba->host->host_lock,
  1090. iflag);
  1091. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1092. saveq);
  1093. spin_lock_irqsave(phba->host->host_lock, iflag);
  1094. } else if (type == LPFC_ABORT_IOCB) {
  1095. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1096. ((cmdiocbp =
  1097. lpfc_sli_txcmpl_ring_search_slow(pring,
  1098. saveq)))) {
  1099. /* Call the specified completion
  1100. routine */
  1101. if (cmdiocbp->iocb_cmpl) {
  1102. spin_unlock_irqrestore(
  1103. phba->host->host_lock,
  1104. iflag);
  1105. (cmdiocbp->iocb_cmpl) (phba,
  1106. cmdiocbp, saveq);
  1107. spin_lock_irqsave(
  1108. phba->host->host_lock,
  1109. iflag);
  1110. } else {
  1111. list_add_tail(&cmdiocbp->list,
  1112. lpfc_iocb_list);
  1113. }
  1114. }
  1115. } else if (type == LPFC_UNKNOWN_IOCB) {
  1116. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1117. char adaptermsg[LPFC_MAX_ADPTMSG];
  1118. memset(adaptermsg, 0,
  1119. LPFC_MAX_ADPTMSG);
  1120. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1121. MAX_MSG_DATA);
  1122. dev_warn(&((phba->pcidev)->dev),
  1123. "lpfc%d: %s",
  1124. phba->brd_no, adaptermsg);
  1125. } else {
  1126. /* Unknown IOCB command */
  1127. lpfc_printf_log(phba,
  1128. KERN_ERR,
  1129. LOG_SLI,
  1130. "%d:0321 Unknown IOCB command "
  1131. "Data: x%x x%x x%x x%x\n",
  1132. phba->brd_no,
  1133. irsp->ulpCommand,
  1134. irsp->ulpStatus,
  1135. irsp->ulpIoTag,
  1136. irsp->ulpContext);
  1137. }
  1138. }
  1139. if (free_saveq) {
  1140. if (!list_empty(&saveq->list)) {
  1141. list_for_each_entry_safe(rspiocbp,
  1142. next_iocb,
  1143. &saveq->list,
  1144. list) {
  1145. list_add_tail(&rspiocbp->list,
  1146. lpfc_iocb_list);
  1147. }
  1148. }
  1149. list_add_tail(&saveq->list, lpfc_iocb_list);
  1150. }
  1151. }
  1152. /*
  1153. * If the port response put pointer has not been updated, sync
  1154. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1155. * response put pointer.
  1156. */
  1157. if (pring->rspidx == portRspPut) {
  1158. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1159. }
  1160. } /* while (pring->rspidx != portRspPut) */
  1161. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1162. /* At least one response entry has been freed */
  1163. pring->stats.iocb_rsp_full++;
  1164. /* SET RxRE_RSP in Chip Att register */
  1165. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1166. writel(status, phba->CAregaddr);
  1167. readl(phba->CAregaddr); /* flush */
  1168. }
  1169. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1170. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1171. pring->stats.iocb_cmd_empty++;
  1172. /* Force update of the local copy of cmdGetInx */
  1173. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1174. lpfc_sli_resume_iocb(phba, pring);
  1175. if ((pring->lpfc_sli_cmd_available))
  1176. (pring->lpfc_sli_cmd_available) (phba, pring);
  1177. }
  1178. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1179. return rc;
  1180. }
  1181. int
  1182. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1183. {
  1184. struct lpfc_iocbq *iocb, *next_iocb;
  1185. IOCB_t *icmd = NULL, *cmd = NULL;
  1186. int errcnt;
  1187. uint16_t iotag;
  1188. errcnt = 0;
  1189. /* Error everything on txq and txcmplq
  1190. * First do the txq.
  1191. */
  1192. spin_lock_irq(phba->host->host_lock);
  1193. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1194. list_del_init(&iocb->list);
  1195. if (iocb->iocb_cmpl) {
  1196. icmd = &iocb->iocb;
  1197. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1198. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1199. spin_unlock_irq(phba->host->host_lock);
  1200. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1201. spin_lock_irq(phba->host->host_lock);
  1202. } else {
  1203. list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
  1204. }
  1205. }
  1206. pring->txq_cnt = 0;
  1207. INIT_LIST_HEAD(&(pring->txq));
  1208. /* Next issue ABTS for everything on the txcmplq */
  1209. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1210. cmd = &iocb->iocb;
  1211. /*
  1212. * Imediate abort of IOCB, clear fast_lookup entry,
  1213. * if any, deque and call compl
  1214. */
  1215. iotag = cmd->ulpIoTag;
  1216. if (iotag && pring->fast_lookup &&
  1217. (iotag < pring->fast_iotag))
  1218. pring->fast_lookup[iotag] = NULL;
  1219. list_del_init(&iocb->list);
  1220. pring->txcmplq_cnt--;
  1221. if (iocb->iocb_cmpl) {
  1222. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1223. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1224. spin_unlock_irq(phba->host->host_lock);
  1225. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1226. spin_lock_irq(phba->host->host_lock);
  1227. } else {
  1228. list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
  1229. }
  1230. }
  1231. INIT_LIST_HEAD(&pring->txcmplq);
  1232. pring->txcmplq_cnt = 0;
  1233. spin_unlock_irq(phba->host->host_lock);
  1234. return errcnt;
  1235. }
  1236. /******************************************************************************
  1237. * lpfc_sli_send_reset
  1238. *
  1239. * Note: After returning from this function, the HBA cannot be accessed for
  1240. * 1 ms. Since we do not wish to delay in interrupt context, it is the
  1241. * responsibility of the caller to perform the mdelay(1) and flush via readl().
  1242. ******************************************************************************/
  1243. static int
  1244. lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
  1245. {
  1246. MAILBOX_t *swpmb;
  1247. volatile uint32_t word0;
  1248. void __iomem *to_slim;
  1249. unsigned long flags = 0;
  1250. spin_lock_irqsave(phba->host->host_lock, flags);
  1251. /* A board reset must use REAL SLIM. */
  1252. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1253. word0 = 0;
  1254. swpmb = (MAILBOX_t *) & word0;
  1255. swpmb->mbxCommand = MBX_RESTART;
  1256. swpmb->mbxHc = 1;
  1257. to_slim = phba->MBslimaddr;
  1258. writel(*(uint32_t *) swpmb, to_slim);
  1259. readl(to_slim); /* flush */
  1260. /* Only skip post after fc_ffinit is completed */
  1261. if (skip_post) {
  1262. word0 = 1; /* This is really setting up word1 */
  1263. } else {
  1264. word0 = 0; /* This is really setting up word1 */
  1265. }
  1266. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1267. writel(*(uint32_t *) swpmb, to_slim);
  1268. readl(to_slim); /* flush */
  1269. /* Turn off parity checking and serr during the physical reset */
  1270. pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
  1271. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1272. (phba->pci_cfg_value &
  1273. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1274. writel(HC_INITFF, phba->HCregaddr);
  1275. phba->hba_state = LPFC_INIT_START;
  1276. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1277. return 0;
  1278. }
  1279. static int
  1280. lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
  1281. {
  1282. struct lpfc_sli_ring *pring;
  1283. int i;
  1284. struct lpfc_dmabuf *mp, *next_mp;
  1285. unsigned long flags = 0;
  1286. lpfc_sli_send_reset(phba, skip_post);
  1287. mdelay(1);
  1288. spin_lock_irqsave(phba->host->host_lock, flags);
  1289. /* Risk the write on flush case ie no delay after the readl */
  1290. readl(phba->HCregaddr); /* flush */
  1291. /* Now toggle INITFF bit set by lpfc_sli_send_reset */
  1292. writel(0, phba->HCregaddr);
  1293. readl(phba->HCregaddr); /* flush */
  1294. /* Restore PCI cmd register */
  1295. pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
  1296. /* perform board reset */
  1297. phba->fc_eventTag = 0;
  1298. phba->fc_myDID = 0;
  1299. phba->fc_prevDID = Mask_DID;
  1300. /* Reset HBA */
  1301. lpfc_printf_log(phba,
  1302. KERN_INFO,
  1303. LOG_SLI,
  1304. "%d:0325 Reset HBA Data: x%x x%x x%x\n",
  1305. phba->brd_no,
  1306. phba->hba_state,
  1307. phba->sli.sli_flag,
  1308. skip_post);
  1309. /* Initialize relevant SLI info */
  1310. for (i = 0; i < phba->sli.num_rings; i++) {
  1311. pring = &phba->sli.ring[i];
  1312. pring->flag = 0;
  1313. pring->rspidx = 0;
  1314. pring->next_cmdidx = 0;
  1315. pring->local_getidx = 0;
  1316. pring->cmdidx = 0;
  1317. pring->missbufcnt = 0;
  1318. }
  1319. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1320. if (skip_post) {
  1321. mdelay(100);
  1322. } else {
  1323. mdelay(2000);
  1324. }
  1325. spin_lock_irqsave(phba->host->host_lock, flags);
  1326. /* Cleanup preposted buffers on the ELS ring */
  1327. pring = &phba->sli.ring[LPFC_ELS_RING];
  1328. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  1329. list_del(&mp->list);
  1330. pring->postbufq_cnt--;
  1331. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  1332. kfree(mp);
  1333. }
  1334. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1335. for (i = 0; i < phba->sli.num_rings; i++)
  1336. lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
  1337. return 0;
  1338. }
  1339. static int
  1340. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1341. {
  1342. uint32_t status, i = 0;
  1343. /* Read the HBA Host Status Register */
  1344. status = readl(phba->HSregaddr);
  1345. /* Check status register to see what current state is */
  1346. i = 0;
  1347. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1348. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1349. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1350. * 4.
  1351. */
  1352. if (i++ >= 20) {
  1353. /* Adapter failed to init, timeout, status reg
  1354. <status> */
  1355. lpfc_printf_log(phba,
  1356. KERN_ERR,
  1357. LOG_INIT,
  1358. "%d:0436 Adapter failed to init, "
  1359. "timeout, status reg x%x\n",
  1360. phba->brd_no,
  1361. status);
  1362. phba->hba_state = LPFC_HBA_ERROR;
  1363. return -ETIMEDOUT;
  1364. }
  1365. /* Check to see if any errors occurred during init */
  1366. if (status & HS_FFERM) {
  1367. /* ERROR: During chipset initialization */
  1368. /* Adapter failed to init, chipset, status reg
  1369. <status> */
  1370. lpfc_printf_log(phba,
  1371. KERN_ERR,
  1372. LOG_INIT,
  1373. "%d:0437 Adapter failed to init, "
  1374. "chipset, status reg x%x\n",
  1375. phba->brd_no,
  1376. status);
  1377. phba->hba_state = LPFC_HBA_ERROR;
  1378. return -EIO;
  1379. }
  1380. if (i <= 5) {
  1381. msleep(10);
  1382. } else if (i <= 10) {
  1383. msleep(500);
  1384. } else {
  1385. msleep(2500);
  1386. }
  1387. if (i == 15) {
  1388. lpfc_sli_brdreset(phba, 0);
  1389. }
  1390. /* Read the HBA Host Status Register */
  1391. status = readl(phba->HSregaddr);
  1392. }
  1393. /* Check to see if any errors occurred during init */
  1394. if (status & HS_FFERM) {
  1395. /* ERROR: During chipset initialization */
  1396. /* Adapter failed to init, chipset, status reg <status> */
  1397. lpfc_printf_log(phba,
  1398. KERN_ERR,
  1399. LOG_INIT,
  1400. "%d:0438 Adapter failed to init, chipset, "
  1401. "status reg x%x\n",
  1402. phba->brd_no,
  1403. status);
  1404. phba->hba_state = LPFC_HBA_ERROR;
  1405. return -EIO;
  1406. }
  1407. /* Clear all interrupt enable conditions */
  1408. writel(0, phba->HCregaddr);
  1409. readl(phba->HCregaddr); /* flush */
  1410. /* setup host attn register */
  1411. writel(0xffffffff, phba->HAregaddr);
  1412. readl(phba->HAregaddr); /* flush */
  1413. return 0;
  1414. }
  1415. int
  1416. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1417. {
  1418. LPFC_MBOXQ_t *pmb;
  1419. uint32_t resetcount = 0, rc = 0, done = 0;
  1420. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1421. if (!pmb) {
  1422. phba->hba_state = LPFC_HBA_ERROR;
  1423. return -ENOMEM;
  1424. }
  1425. while (resetcount < 2 && !done) {
  1426. phba->hba_state = 0;
  1427. lpfc_sli_brdreset(phba, 0);
  1428. msleep(2500);
  1429. rc = lpfc_sli_chipset_init(phba);
  1430. if (rc)
  1431. break;
  1432. resetcount++;
  1433. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1434. * means the call was successful. Any other nonzero value is a failure,
  1435. * but if ERESTART is returned, the driver may reset the HBA and try
  1436. * again.
  1437. */
  1438. rc = lpfc_config_port_prep(phba);
  1439. if (rc == -ERESTART) {
  1440. phba->hba_state = 0;
  1441. continue;
  1442. } else if (rc) {
  1443. break;
  1444. }
  1445. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1446. lpfc_config_port(phba, pmb);
  1447. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1448. if (rc == MBX_SUCCESS)
  1449. done = 1;
  1450. else {
  1451. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1452. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1453. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1454. phba->brd_no, pmb->mb.mbxCommand,
  1455. pmb->mb.mbxStatus, 0);
  1456. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1457. }
  1458. }
  1459. if (!done)
  1460. goto lpfc_sli_hba_setup_error;
  1461. rc = lpfc_sli_ring_map(phba, pmb);
  1462. if (rc)
  1463. goto lpfc_sli_hba_setup_error;
  1464. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1465. rc = lpfc_config_port_post(phba);
  1466. if (rc)
  1467. goto lpfc_sli_hba_setup_error;
  1468. goto lpfc_sli_hba_setup_exit;
  1469. lpfc_sli_hba_setup_error:
  1470. phba->hba_state = LPFC_HBA_ERROR;
  1471. lpfc_sli_hba_setup_exit:
  1472. mempool_free(pmb, phba->mbox_mem_pool);
  1473. return rc;
  1474. }
  1475. static void
  1476. lpfc_mbox_abort(struct lpfc_hba * phba)
  1477. {
  1478. LPFC_MBOXQ_t *pmbox;
  1479. MAILBOX_t *mb;
  1480. if (phba->sli.mbox_active) {
  1481. del_timer_sync(&phba->sli.mbox_tmo);
  1482. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1483. pmbox = phba->sli.mbox_active;
  1484. mb = &pmbox->mb;
  1485. phba->sli.mbox_active = NULL;
  1486. if (pmbox->mbox_cmpl) {
  1487. mb->mbxStatus = MBX_NOT_FINISHED;
  1488. (pmbox->mbox_cmpl) (phba, pmbox);
  1489. }
  1490. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1491. }
  1492. /* Abort all the non active mailbox commands. */
  1493. spin_lock_irq(phba->host->host_lock);
  1494. pmbox = lpfc_mbox_get(phba);
  1495. while (pmbox) {
  1496. mb = &pmbox->mb;
  1497. if (pmbox->mbox_cmpl) {
  1498. mb->mbxStatus = MBX_NOT_FINISHED;
  1499. spin_unlock_irq(phba->host->host_lock);
  1500. (pmbox->mbox_cmpl) (phba, pmbox);
  1501. spin_lock_irq(phba->host->host_lock);
  1502. }
  1503. pmbox = lpfc_mbox_get(phba);
  1504. }
  1505. spin_unlock_irq(phba->host->host_lock);
  1506. return;
  1507. }
  1508. /*! lpfc_mbox_timeout
  1509. *
  1510. * \pre
  1511. * \post
  1512. * \param hba Pointer to per struct lpfc_hba structure
  1513. * \param l1 Pointer to the driver's mailbox queue.
  1514. * \return
  1515. * void
  1516. *
  1517. * \b Description:
  1518. *
  1519. * This routine handles mailbox timeout events at timer interrupt context.
  1520. */
  1521. void
  1522. lpfc_mbox_timeout(unsigned long ptr)
  1523. {
  1524. struct lpfc_hba *phba;
  1525. unsigned long iflag;
  1526. phba = (struct lpfc_hba *)ptr;
  1527. spin_lock_irqsave(phba->host->host_lock, iflag);
  1528. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1529. phba->work_hba_events |= WORKER_MBOX_TMO;
  1530. if (phba->work_wait)
  1531. wake_up(phba->work_wait);
  1532. }
  1533. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1534. }
  1535. void
  1536. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1537. {
  1538. LPFC_MBOXQ_t *pmbox;
  1539. MAILBOX_t *mb;
  1540. spin_lock_irq(phba->host->host_lock);
  1541. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1542. spin_unlock_irq(phba->host->host_lock);
  1543. return;
  1544. }
  1545. pmbox = phba->sli.mbox_active;
  1546. mb = &pmbox->mb;
  1547. /* Mbox cmd <mbxCommand> timeout */
  1548. lpfc_printf_log(phba,
  1549. KERN_ERR,
  1550. LOG_MBOX | LOG_SLI,
  1551. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1552. phba->brd_no,
  1553. mb->mbxCommand,
  1554. phba->hba_state,
  1555. phba->sli.sli_flag,
  1556. phba->sli.mbox_active);
  1557. if (phba->sli.mbox_active == pmbox) {
  1558. phba->sli.mbox_active = NULL;
  1559. if (pmbox->mbox_cmpl) {
  1560. mb->mbxStatus = MBX_NOT_FINISHED;
  1561. spin_unlock_irq(phba->host->host_lock);
  1562. (pmbox->mbox_cmpl) (phba, pmbox);
  1563. spin_lock_irq(phba->host->host_lock);
  1564. }
  1565. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1566. }
  1567. spin_unlock_irq(phba->host->host_lock);
  1568. lpfc_mbox_abort(phba);
  1569. return;
  1570. }
  1571. int
  1572. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1573. {
  1574. MAILBOX_t *mbox;
  1575. MAILBOX_t *mb;
  1576. struct lpfc_sli *psli;
  1577. uint32_t status, evtctr;
  1578. uint32_t ha_copy;
  1579. int i;
  1580. unsigned long drvr_flag = 0;
  1581. volatile uint32_t word0, ldata;
  1582. void __iomem *to_slim;
  1583. psli = &phba->sli;
  1584. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1585. mb = &pmbox->mb;
  1586. status = MBX_SUCCESS;
  1587. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1588. /* Polling for a mbox command when another one is already active
  1589. * is not allowed in SLI. Also, the driver must have established
  1590. * SLI2 mode to queue and process multiple mbox commands.
  1591. */
  1592. if (flag & MBX_POLL) {
  1593. spin_unlock_irqrestore(phba->host->host_lock,
  1594. drvr_flag);
  1595. /* Mbox command <mbxCommand> cannot issue */
  1596. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1597. return (MBX_NOT_FINISHED);
  1598. }
  1599. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1600. spin_unlock_irqrestore(phba->host->host_lock,
  1601. drvr_flag);
  1602. /* Mbox command <mbxCommand> cannot issue */
  1603. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1604. return (MBX_NOT_FINISHED);
  1605. }
  1606. /* Handle STOP IOCB processing flag. This is only meaningful
  1607. * if we are not polling for mbox completion.
  1608. */
  1609. if (flag & MBX_STOP_IOCB) {
  1610. flag &= ~MBX_STOP_IOCB;
  1611. /* Now flag each ring */
  1612. for (i = 0; i < psli->num_rings; i++) {
  1613. /* If the ring is active, flag it */
  1614. if (psli->ring[i].cmdringaddr) {
  1615. psli->ring[i].flag |=
  1616. LPFC_STOP_IOCB_MBX;
  1617. }
  1618. }
  1619. }
  1620. /* Another mailbox command is still being processed, queue this
  1621. * command to be processed later.
  1622. */
  1623. lpfc_mbox_put(phba, pmbox);
  1624. /* Mbox cmd issue - BUSY */
  1625. lpfc_printf_log(phba,
  1626. KERN_INFO,
  1627. LOG_MBOX | LOG_SLI,
  1628. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1629. phba->brd_no,
  1630. mb->mbxCommand,
  1631. phba->hba_state,
  1632. psli->sli_flag,
  1633. flag);
  1634. psli->slistat.mbox_busy++;
  1635. spin_unlock_irqrestore(phba->host->host_lock,
  1636. drvr_flag);
  1637. return (MBX_BUSY);
  1638. }
  1639. /* Handle STOP IOCB processing flag. This is only meaningful
  1640. * if we are not polling for mbox completion.
  1641. */
  1642. if (flag & MBX_STOP_IOCB) {
  1643. flag &= ~MBX_STOP_IOCB;
  1644. if (flag == MBX_NOWAIT) {
  1645. /* Now flag each ring */
  1646. for (i = 0; i < psli->num_rings; i++) {
  1647. /* If the ring is active, flag it */
  1648. if (psli->ring[i].cmdringaddr) {
  1649. psli->ring[i].flag |=
  1650. LPFC_STOP_IOCB_MBX;
  1651. }
  1652. }
  1653. }
  1654. }
  1655. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1656. /* If we are not polling, we MUST be in SLI2 mode */
  1657. if (flag != MBX_POLL) {
  1658. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1659. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1660. spin_unlock_irqrestore(phba->host->host_lock,
  1661. drvr_flag);
  1662. /* Mbox command <mbxCommand> cannot issue */
  1663. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1664. return (MBX_NOT_FINISHED);
  1665. }
  1666. /* timeout active mbox command */
  1667. mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
  1668. }
  1669. /* Mailbox cmd <cmd> issue */
  1670. lpfc_printf_log(phba,
  1671. KERN_INFO,
  1672. LOG_MBOX | LOG_SLI,
  1673. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1674. phba->brd_no,
  1675. mb->mbxCommand,
  1676. phba->hba_state,
  1677. psli->sli_flag,
  1678. flag);
  1679. psli->slistat.mbox_cmd++;
  1680. evtctr = psli->slistat.mbox_event;
  1681. /* next set own bit for the adapter and copy over command word */
  1682. mb->mbxOwner = OWN_CHIP;
  1683. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1684. /* First copy command data to host SLIM area */
  1685. mbox = (MAILBOX_t *) psli->MBhostaddr;
  1686. lpfc_sli_pcimem_bcopy(mb, mbox, MAILBOX_CMD_SIZE);
  1687. } else {
  1688. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1689. /* copy command data into host mbox for cmpl */
  1690. mbox = (MAILBOX_t *) psli->MBhostaddr;
  1691. lpfc_sli_pcimem_bcopy(mb, mbox, MAILBOX_CMD_SIZE);
  1692. }
  1693. /* First copy mbox command data to HBA SLIM, skip past first
  1694. word */
  1695. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1696. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1697. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1698. /* Next copy over first word, with mbxOwner set */
  1699. ldata = *((volatile uint32_t *)mb);
  1700. to_slim = phba->MBslimaddr;
  1701. writel(ldata, to_slim);
  1702. readl(to_slim); /* flush */
  1703. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1704. /* switch over to host mailbox */
  1705. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1706. }
  1707. }
  1708. wmb();
  1709. /* interrupt board to doit right away */
  1710. writel(CA_MBATT, phba->CAregaddr);
  1711. readl(phba->CAregaddr); /* flush */
  1712. switch (flag) {
  1713. case MBX_NOWAIT:
  1714. /* Don't wait for it to finish, just return */
  1715. psli->mbox_active = pmbox;
  1716. break;
  1717. case MBX_POLL:
  1718. i = 0;
  1719. psli->mbox_active = NULL;
  1720. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1721. /* First read mbox status word */
  1722. mbox = (MAILBOX_t *) psli->MBhostaddr;
  1723. word0 = *((volatile uint32_t *)mbox);
  1724. word0 = le32_to_cpu(word0);
  1725. } else {
  1726. /* First read mbox status word */
  1727. word0 = readl(phba->MBslimaddr);
  1728. }
  1729. /* Read the HBA Host Attention Register */
  1730. ha_copy = readl(phba->HAregaddr);
  1731. /* Wait for command to complete */
  1732. while (((word0 & OWN_CHIP) == OWN_CHIP)
  1733. || !(ha_copy & HA_MBATT)) {
  1734. if (i++ >= 100) {
  1735. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1736. spin_unlock_irqrestore(phba->host->host_lock,
  1737. drvr_flag);
  1738. return (MBX_NOT_FINISHED);
  1739. }
  1740. /* Check if we took a mbox interrupt while we were
  1741. polling */
  1742. if (((word0 & OWN_CHIP) != OWN_CHIP)
  1743. && (evtctr != psli->slistat.mbox_event))
  1744. break;
  1745. spin_unlock_irqrestore(phba->host->host_lock,
  1746. drvr_flag);
  1747. /* Can be in interrupt context, do not sleep */
  1748. /* (or might be called with interrupts disabled) */
  1749. mdelay(i);
  1750. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1751. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1752. /* First copy command data */
  1753. mbox = (MAILBOX_t *) psli->MBhostaddr;
  1754. word0 = *((volatile uint32_t *)mbox);
  1755. word0 = le32_to_cpu(word0);
  1756. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1757. MAILBOX_t *slimmb;
  1758. volatile uint32_t slimword0;
  1759. /* Check real SLIM for any errors */
  1760. slimword0 = readl(phba->MBslimaddr);
  1761. slimmb = (MAILBOX_t *) & slimword0;
  1762. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  1763. && slimmb->mbxStatus) {
  1764. psli->sli_flag &=
  1765. ~LPFC_SLI2_ACTIVE;
  1766. word0 = slimword0;
  1767. }
  1768. }
  1769. } else {
  1770. /* First copy command data */
  1771. word0 = readl(phba->MBslimaddr);
  1772. }
  1773. /* Read the HBA Host Attention Register */
  1774. ha_copy = readl(phba->HAregaddr);
  1775. }
  1776. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1777. /* First copy command data */
  1778. mbox = (MAILBOX_t *) psli->MBhostaddr;
  1779. /* copy results back to user */
  1780. lpfc_sli_pcimem_bcopy(mbox, mb, MAILBOX_CMD_SIZE);
  1781. } else {
  1782. /* First copy command data */
  1783. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  1784. MAILBOX_CMD_SIZE);
  1785. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  1786. pmbox->context2) {
  1787. lpfc_memcpy_from_slim((void *)pmbox->context2,
  1788. phba->MBslimaddr + DMP_RSP_OFFSET,
  1789. mb->un.varDmp.word_cnt);
  1790. }
  1791. }
  1792. writel(HA_MBATT, phba->HAregaddr);
  1793. readl(phba->HAregaddr); /* flush */
  1794. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1795. status = mb->mbxStatus;
  1796. }
  1797. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1798. return (status);
  1799. }
  1800. static int
  1801. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  1802. struct lpfc_iocbq * piocb)
  1803. {
  1804. /* Insert the caller's iocb in the txq tail for later processing. */
  1805. list_add_tail(&piocb->list, &pring->txq);
  1806. pring->txq_cnt++;
  1807. return (0);
  1808. }
  1809. static struct lpfc_iocbq *
  1810. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1811. struct lpfc_iocbq ** piocb)
  1812. {
  1813. struct lpfc_iocbq * nextiocb;
  1814. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  1815. if (!nextiocb) {
  1816. nextiocb = *piocb;
  1817. *piocb = NULL;
  1818. }
  1819. return nextiocb;
  1820. }
  1821. int
  1822. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1823. struct lpfc_iocbq *piocb, uint32_t flag)
  1824. {
  1825. struct lpfc_iocbq *nextiocb;
  1826. IOCB_t *iocb;
  1827. /*
  1828. * We should never get an IOCB if we are in a < LINK_DOWN state
  1829. */
  1830. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  1831. return IOCB_ERROR;
  1832. /*
  1833. * Check to see if we are blocking IOCB processing because of a
  1834. * outstanding mbox command.
  1835. */
  1836. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  1837. goto iocb_busy;
  1838. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  1839. /*
  1840. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  1841. * can be issued if the link is not up.
  1842. */
  1843. switch (piocb->iocb.ulpCommand) {
  1844. case CMD_QUE_RING_BUF_CN:
  1845. case CMD_QUE_RING_BUF64_CN:
  1846. case CMD_CLOSE_XRI_CN:
  1847. case CMD_ABORT_XRI_CN:
  1848. /*
  1849. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  1850. * completion, iocb_cmpl MUST be 0.
  1851. */
  1852. if (piocb->iocb_cmpl)
  1853. piocb->iocb_cmpl = NULL;
  1854. /*FALLTHROUGH*/
  1855. case CMD_CREATE_XRI_CR:
  1856. break;
  1857. default:
  1858. goto iocb_busy;
  1859. }
  1860. /*
  1861. * For FCP commands, we must be in a state where we can process link
  1862. * attention events.
  1863. */
  1864. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  1865. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  1866. goto iocb_busy;
  1867. /*
  1868. * Check to see if this is a high priority command.
  1869. * If so bypass tx queue processing.
  1870. */
  1871. if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
  1872. (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
  1873. lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
  1874. piocb = NULL;
  1875. }
  1876. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  1877. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  1878. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  1879. if (iocb)
  1880. lpfc_sli_update_ring(phba, pring);
  1881. else
  1882. lpfc_sli_update_full_ring(phba, pring);
  1883. if (!piocb)
  1884. return IOCB_SUCCESS;
  1885. goto out_busy;
  1886. iocb_busy:
  1887. pring->stats.iocb_cmd_delay++;
  1888. out_busy:
  1889. if (!(flag & SLI_IOCB_RET_IOCB)) {
  1890. lpfc_sli_ringtx_put(phba, pring, piocb);
  1891. return IOCB_SUCCESS;
  1892. }
  1893. return IOCB_BUSY;
  1894. }
  1895. int
  1896. lpfc_sli_setup(struct lpfc_hba *phba)
  1897. {
  1898. int i, totiocb = 0;
  1899. struct lpfc_sli *psli = &phba->sli;
  1900. struct lpfc_sli_ring *pring;
  1901. psli->num_rings = MAX_CONFIGURED_RINGS;
  1902. psli->sli_flag = 0;
  1903. psli->fcp_ring = LPFC_FCP_RING;
  1904. psli->next_ring = LPFC_FCP_NEXT_RING;
  1905. psli->ip_ring = LPFC_IP_RING;
  1906. for (i = 0; i < psli->num_rings; i++) {
  1907. pring = &psli->ring[i];
  1908. switch (i) {
  1909. case LPFC_FCP_RING: /* ring 0 - FCP */
  1910. /* numCiocb and numRiocb are used in config_port */
  1911. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  1912. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  1913. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  1914. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  1915. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  1916. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  1917. pring->iotag_ctr = 0;
  1918. pring->iotag_max =
  1919. (phba->cfg_hba_queue_depth * 2);
  1920. pring->fast_iotag = pring->iotag_max;
  1921. pring->num_mask = 0;
  1922. break;
  1923. case LPFC_IP_RING: /* ring 1 - IP */
  1924. /* numCiocb and numRiocb are used in config_port */
  1925. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  1926. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  1927. pring->num_mask = 0;
  1928. break;
  1929. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  1930. /* numCiocb and numRiocb are used in config_port */
  1931. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  1932. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  1933. pring->fast_iotag = 0;
  1934. pring->iotag_ctr = 0;
  1935. pring->iotag_max = 4096;
  1936. pring->num_mask = 4;
  1937. pring->prt[0].profile = 0; /* Mask 0 */
  1938. pring->prt[0].rctl = FC_ELS_REQ;
  1939. pring->prt[0].type = FC_ELS_DATA;
  1940. pring->prt[0].lpfc_sli_rcv_unsol_event =
  1941. lpfc_els_unsol_event;
  1942. pring->prt[1].profile = 0; /* Mask 1 */
  1943. pring->prt[1].rctl = FC_ELS_RSP;
  1944. pring->prt[1].type = FC_ELS_DATA;
  1945. pring->prt[1].lpfc_sli_rcv_unsol_event =
  1946. lpfc_els_unsol_event;
  1947. pring->prt[2].profile = 0; /* Mask 2 */
  1948. /* NameServer Inquiry */
  1949. pring->prt[2].rctl = FC_UNSOL_CTL;
  1950. /* NameServer */
  1951. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  1952. pring->prt[2].lpfc_sli_rcv_unsol_event =
  1953. lpfc_ct_unsol_event;
  1954. pring->prt[3].profile = 0; /* Mask 3 */
  1955. /* NameServer response */
  1956. pring->prt[3].rctl = FC_SOL_CTL;
  1957. /* NameServer */
  1958. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  1959. pring->prt[3].lpfc_sli_rcv_unsol_event =
  1960. lpfc_ct_unsol_event;
  1961. break;
  1962. }
  1963. totiocb += (pring->numCiocb + pring->numRiocb);
  1964. }
  1965. if (totiocb > MAX_SLI2_IOCB) {
  1966. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  1967. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1968. "%d:0462 Too many cmd / rsp ring entries in "
  1969. "SLI2 SLIM Data: x%x x%x\n",
  1970. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  1971. }
  1972. return 0;
  1973. }
  1974. int
  1975. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  1976. {
  1977. struct lpfc_sli *psli;
  1978. struct lpfc_sli_ring *pring;
  1979. int i, cnt;
  1980. psli = &phba->sli;
  1981. spin_lock_irq(phba->host->host_lock);
  1982. INIT_LIST_HEAD(&psli->mboxq);
  1983. /* Initialize list headers for txq and txcmplq as double linked lists */
  1984. for (i = 0; i < psli->num_rings; i++) {
  1985. pring = &psli->ring[i];
  1986. pring->ringno = i;
  1987. pring->next_cmdidx = 0;
  1988. pring->local_getidx = 0;
  1989. pring->cmdidx = 0;
  1990. INIT_LIST_HEAD(&pring->txq);
  1991. INIT_LIST_HEAD(&pring->txcmplq);
  1992. INIT_LIST_HEAD(&pring->iocb_continueq);
  1993. INIT_LIST_HEAD(&pring->postbufq);
  1994. cnt = pring->fast_iotag;
  1995. spin_unlock_irq(phba->host->host_lock);
  1996. if (cnt) {
  1997. pring->fast_lookup =
  1998. kmalloc(cnt * sizeof (struct lpfc_iocbq *),
  1999. GFP_KERNEL);
  2000. if (pring->fast_lookup == 0) {
  2001. return (0);
  2002. }
  2003. memset((char *)pring->fast_lookup, 0,
  2004. cnt * sizeof (struct lpfc_iocbq *));
  2005. }
  2006. spin_lock_irq(phba->host->host_lock);
  2007. }
  2008. spin_unlock_irq(phba->host->host_lock);
  2009. return (1);
  2010. }
  2011. int
  2012. lpfc_sli_hba_down(struct lpfc_hba * phba)
  2013. {
  2014. struct lpfc_sli *psli;
  2015. struct lpfc_sli_ring *pring;
  2016. LPFC_MBOXQ_t *pmb;
  2017. struct lpfc_iocbq *iocb, *next_iocb;
  2018. IOCB_t *icmd = NULL;
  2019. int i;
  2020. unsigned long flags = 0;
  2021. psli = &phba->sli;
  2022. lpfc_hba_down_prep(phba);
  2023. spin_lock_irqsave(phba->host->host_lock, flags);
  2024. for (i = 0; i < psli->num_rings; i++) {
  2025. pring = &psli->ring[i];
  2026. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2027. /*
  2028. * Error everything on the txq since these iocbs have not been
  2029. * given to the FW yet.
  2030. */
  2031. pring->txq_cnt = 0;
  2032. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2033. list_del_init(&iocb->list);
  2034. if (iocb->iocb_cmpl) {
  2035. icmd = &iocb->iocb;
  2036. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2037. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2038. spin_unlock_irqrestore(phba->host->host_lock,
  2039. flags);
  2040. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2041. spin_lock_irqsave(phba->host->host_lock, flags);
  2042. } else {
  2043. list_add_tail(&iocb->list,
  2044. &phba->lpfc_iocb_list);
  2045. }
  2046. }
  2047. INIT_LIST_HEAD(&(pring->txq));
  2048. if (pring->fast_lookup) {
  2049. kfree(pring->fast_lookup);
  2050. pring->fast_lookup = NULL;
  2051. }
  2052. }
  2053. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2054. /* Return any active mbox cmds */
  2055. del_timer_sync(&psli->mbox_tmo);
  2056. spin_lock_irqsave(phba->host->host_lock, flags);
  2057. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2058. if (psli->mbox_active) {
  2059. pmb = psli->mbox_active;
  2060. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2061. if (pmb->mbox_cmpl) {
  2062. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2063. pmb->mbox_cmpl(phba,pmb);
  2064. spin_lock_irqsave(phba->host->host_lock, flags);
  2065. }
  2066. }
  2067. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2068. psli->mbox_active = NULL;
  2069. /* Return any pending mbox cmds */
  2070. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2071. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2072. if (pmb->mbox_cmpl) {
  2073. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2074. pmb->mbox_cmpl(phba,pmb);
  2075. spin_lock_irqsave(phba->host->host_lock, flags);
  2076. }
  2077. }
  2078. INIT_LIST_HEAD(&psli->mboxq);
  2079. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2080. /*
  2081. * Provided the hba is not in an error state, reset it. It is not
  2082. * capable of IO anymore.
  2083. */
  2084. if (phba->hba_state != LPFC_HBA_ERROR) {
  2085. phba->hba_state = LPFC_INIT_START;
  2086. lpfc_sli_brdreset(phba, 1);
  2087. }
  2088. return 1;
  2089. }
  2090. void
  2091. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2092. {
  2093. uint32_t *src = srcp;
  2094. uint32_t *dest = destp;
  2095. uint32_t ldata;
  2096. int i;
  2097. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2098. ldata = *src;
  2099. ldata = le32_to_cpu(ldata);
  2100. *dest = ldata;
  2101. src++;
  2102. dest++;
  2103. }
  2104. }
  2105. int
  2106. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2107. struct lpfc_dmabuf * mp)
  2108. {
  2109. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2110. later */
  2111. list_add_tail(&mp->list, &pring->postbufq);
  2112. pring->postbufq_cnt++;
  2113. return 0;
  2114. }
  2115. struct lpfc_dmabuf *
  2116. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2117. dma_addr_t phys)
  2118. {
  2119. struct lpfc_dmabuf *mp, *next_mp;
  2120. struct list_head *slp = &pring->postbufq;
  2121. /* Search postbufq, from the begining, looking for a match on phys */
  2122. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2123. if (mp->phys == phys) {
  2124. list_del_init(&mp->list);
  2125. pring->postbufq_cnt--;
  2126. return mp;
  2127. }
  2128. }
  2129. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2130. "%d:0410 Cannot find virtual addr for mapped buf on "
  2131. "ring %d Data x%llx x%p x%p x%x\n",
  2132. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2133. slp->next, slp->prev, pring->postbufq_cnt);
  2134. return NULL;
  2135. }
  2136. static void
  2137. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2138. struct lpfc_iocbq * rspiocb)
  2139. {
  2140. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2141. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2142. * just aborted.
  2143. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2144. */
  2145. if (cmdiocb->context2) {
  2146. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2147. /* Free the response IOCB before completing the abort
  2148. command. */
  2149. buf_ptr = NULL;
  2150. list_remove_head((&buf_ptr1->list), buf_ptr,
  2151. struct lpfc_dmabuf, list);
  2152. if (buf_ptr) {
  2153. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2154. kfree(buf_ptr);
  2155. }
  2156. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2157. kfree(buf_ptr1);
  2158. }
  2159. if (cmdiocb->context3) {
  2160. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2161. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2162. kfree(buf_ptr);
  2163. }
  2164. list_add_tail(&cmdiocb->list, &phba->lpfc_iocb_list);
  2165. return;
  2166. }
  2167. int
  2168. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2169. struct lpfc_sli_ring * pring,
  2170. struct lpfc_iocbq * cmdiocb)
  2171. {
  2172. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2173. struct lpfc_iocbq *abtsiocbp = NULL;
  2174. IOCB_t *icmd = NULL;
  2175. IOCB_t *iabt = NULL;
  2176. /* issue ABTS for this IOCB based on iotag */
  2177. list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
  2178. if (abtsiocbp == NULL)
  2179. return 0;
  2180. memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
  2181. iabt = &abtsiocbp->iocb;
  2182. icmd = &cmdiocb->iocb;
  2183. switch (icmd->ulpCommand) {
  2184. case CMD_ELS_REQUEST64_CR:
  2185. /* Even though we abort the ELS command, the firmware may access
  2186. * the BPL or other resources before it processes our
  2187. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2188. * resources till the actual abort request completes.
  2189. */
  2190. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2191. abtsiocbp->context2 = cmdiocb->context2;
  2192. abtsiocbp->context3 = cmdiocb->context3;
  2193. cmdiocb->context2 = NULL;
  2194. cmdiocb->context3 = NULL;
  2195. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2196. break;
  2197. default:
  2198. list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
  2199. return 0;
  2200. }
  2201. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2202. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2203. iabt->ulpLe = 1;
  2204. iabt->ulpClass = CLASS3;
  2205. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2206. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2207. list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
  2208. return 0;
  2209. }
  2210. return 1;
  2211. }
  2212. static int
  2213. lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
  2214. uint64_t lun_id, struct lpfc_iocbq *iocb,
  2215. uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
  2216. {
  2217. int rc = 1;
  2218. if (lpfc_cmd == NULL)
  2219. return rc;
  2220. switch (ctx_cmd) {
  2221. case LPFC_CTX_LUN:
  2222. if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
  2223. (lpfc_cmd->pCmd->device->lun == lun_id))
  2224. rc = 0;
  2225. break;
  2226. case LPFC_CTX_TGT:
  2227. if (lpfc_cmd->pCmd->device->id == tgt_id)
  2228. rc = 0;
  2229. break;
  2230. case LPFC_CTX_CTX:
  2231. if (iocb->iocb.ulpContext == ctx)
  2232. rc = 0;
  2233. case LPFC_CTX_HOST:
  2234. rc = 0;
  2235. break;
  2236. default:
  2237. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2238. __FUNCTION__, ctx_cmd);
  2239. break;
  2240. }
  2241. return rc;
  2242. }
  2243. int
  2244. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2245. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2246. {
  2247. struct lpfc_iocbq *iocb, *next_iocb;
  2248. IOCB_t *cmd = NULL;
  2249. struct lpfc_scsi_buf *lpfc_cmd;
  2250. int sum = 0, ret_val = 0;
  2251. /* Next check the txcmplq */
  2252. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2253. cmd = &iocb->iocb;
  2254. /* Must be a FCP command */
  2255. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2256. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2257. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2258. continue;
  2259. }
  2260. /* context1 MUST be a struct lpfc_scsi_buf */
  2261. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2262. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2263. NULL, 0, ctx_cmd);
  2264. if (ret_val != 0)
  2265. continue;
  2266. sum++;
  2267. }
  2268. return sum;
  2269. }
  2270. int
  2271. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2272. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2273. lpfc_ctx_cmd abort_cmd)
  2274. {
  2275. struct lpfc_iocbq *iocb, *next_iocb;
  2276. struct lpfc_iocbq *abtsiocb = NULL;
  2277. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2278. IOCB_t *cmd = NULL;
  2279. struct lpfc_scsi_buf *lpfc_cmd;
  2280. int errcnt = 0, ret_val = 0;
  2281. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2282. cmd = &iocb->iocb;
  2283. /* Must be a FCP command */
  2284. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2285. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2286. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2287. continue;
  2288. }
  2289. /* context1 MUST be a struct lpfc_scsi_buf */
  2290. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2291. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2292. iocb, ctx, abort_cmd);
  2293. if (ret_val != 0)
  2294. continue;
  2295. /* issue ABTS for this IOCB based on iotag */
  2296. list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
  2297. list);
  2298. if (abtsiocb == NULL) {
  2299. errcnt++;
  2300. continue;
  2301. }
  2302. memset(abtsiocb, 0, sizeof (struct lpfc_iocbq));
  2303. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2304. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2305. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2306. abtsiocb->iocb.ulpLe = 1;
  2307. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2308. if (phba->hba_state >= LPFC_LINK_UP)
  2309. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2310. else
  2311. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2312. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2313. if (ret_val == IOCB_ERROR) {
  2314. list_add_tail(&abtsiocb->list, lpfc_iocb_list);
  2315. errcnt++;
  2316. continue;
  2317. }
  2318. }
  2319. return errcnt;
  2320. }
  2321. void
  2322. lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
  2323. struct lpfc_iocbq * queue1,
  2324. struct lpfc_iocbq * queue2)
  2325. {
  2326. if (queue1->context2 && queue2)
  2327. memcpy(queue1->context2, queue2, sizeof (struct lpfc_iocbq));
  2328. /* The waiter is looking for LPFC_IO_HIPRI bit to be set
  2329. as a signal to wake up */
  2330. queue1->iocb_flag |= LPFC_IO_HIPRI;
  2331. return;
  2332. }
  2333. int
  2334. lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
  2335. struct lpfc_sli_ring * pring,
  2336. struct lpfc_iocbq * piocb,
  2337. uint32_t flag,
  2338. struct lpfc_iocbq * prspiocbq,
  2339. uint32_t timeout)
  2340. {
  2341. int j, delay_time, retval = IOCB_ERROR;
  2342. /* The caller must left context1 empty. */
  2343. if (piocb->context_un.hipri_wait_queue != 0) {
  2344. return IOCB_ERROR;
  2345. }
  2346. /*
  2347. * If the caller has provided a response iocbq buffer, context2 must
  2348. * be NULL or its an error.
  2349. */
  2350. if (prspiocbq && piocb->context2) {
  2351. return IOCB_ERROR;
  2352. }
  2353. piocb->context2 = prspiocbq;
  2354. /* Setup callback routine and issue the command. */
  2355. piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
  2356. retval = lpfc_sli_issue_iocb(phba, pring, piocb,
  2357. flag | SLI_IOCB_HIGH_PRIORITY);
  2358. if (retval != IOCB_SUCCESS) {
  2359. piocb->context2 = NULL;
  2360. return IOCB_ERROR;
  2361. }
  2362. /*
  2363. * This high-priority iocb was sent out-of-band. Poll for its
  2364. * completion rather than wait for a signal. Note that the host_lock
  2365. * is held by the midlayer and must be released here to allow the
  2366. * interrupt handlers to complete the IO and signal this routine via
  2367. * the iocb_flag.
  2368. * Also, the delay_time is computed to be one second longer than
  2369. * the scsi command timeout to give the FW time to abort on
  2370. * timeout rather than the driver just giving up. Typically,
  2371. * the midlayer does not specify a time for this command so the
  2372. * driver is free to enforce its own timeout.
  2373. */
  2374. delay_time = ((timeout + 1) * 1000) >> 6;
  2375. retval = IOCB_ERROR;
  2376. spin_unlock_irq(phba->host->host_lock);
  2377. for (j = 0; j < 64; j++) {
  2378. msleep(delay_time);
  2379. if (piocb->iocb_flag & LPFC_IO_HIPRI) {
  2380. piocb->iocb_flag &= ~LPFC_IO_HIPRI;
  2381. retval = IOCB_SUCCESS;
  2382. break;
  2383. }
  2384. }
  2385. spin_lock_irq(phba->host->host_lock);
  2386. piocb->context2 = NULL;
  2387. return retval;
  2388. }
  2389. int
  2390. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2391. uint32_t timeout)
  2392. {
  2393. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2394. DECLARE_WAITQUEUE(wq_entry, current);
  2395. uint32_t timeleft = 0;
  2396. int retval;
  2397. /* The caller must leave context1 empty. */
  2398. if (pmboxq->context1 != 0) {
  2399. return (MBX_NOT_FINISHED);
  2400. }
  2401. /* setup wake call as IOCB callback */
  2402. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2403. /* setup context field to pass wait_queue pointer to wake function */
  2404. pmboxq->context1 = &done_q;
  2405. /* start to sleep before we wait, to avoid races */
  2406. set_current_state(TASK_INTERRUPTIBLE);
  2407. add_wait_queue(&done_q, &wq_entry);
  2408. /* now issue the command */
  2409. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2410. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2411. timeleft = schedule_timeout(timeout * HZ);
  2412. pmboxq->context1 = NULL;
  2413. /* if schedule_timeout returns 0, we timed out and were not
  2414. woken up */
  2415. if (timeleft == 0) {
  2416. retval = MBX_TIMEOUT;
  2417. } else {
  2418. retval = MBX_SUCCESS;
  2419. }
  2420. }
  2421. set_current_state(TASK_RUNNING);
  2422. remove_wait_queue(&done_q, &wq_entry);
  2423. return retval;
  2424. }
  2425. irqreturn_t
  2426. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2427. {
  2428. struct lpfc_hba *phba;
  2429. uint32_t ha_copy;
  2430. uint32_t work_ha_copy;
  2431. unsigned long status;
  2432. int i;
  2433. uint32_t control;
  2434. /*
  2435. * Get the driver's phba structure from the dev_id and
  2436. * assume the HBA is not interrupting.
  2437. */
  2438. phba = (struct lpfc_hba *) dev_id;
  2439. if (unlikely(!phba))
  2440. return IRQ_NONE;
  2441. phba->sli.slistat.sli_intr++;
  2442. /*
  2443. * Call the HBA to see if it is interrupting. If not, don't claim
  2444. * the interrupt
  2445. */
  2446. /* Ignore all interrupts during initialization. */
  2447. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2448. return IRQ_NONE;
  2449. /*
  2450. * Read host attention register to determine interrupt source
  2451. * Clear Attention Sources, except Error Attention (to
  2452. * preserve status) and Link Attention
  2453. */
  2454. spin_lock(phba->host->host_lock);
  2455. ha_copy = readl(phba->HAregaddr);
  2456. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2457. readl(phba->HAregaddr); /* flush */
  2458. spin_unlock(phba->host->host_lock);
  2459. if (unlikely(!ha_copy))
  2460. return IRQ_NONE;
  2461. work_ha_copy = ha_copy & phba->work_ha_mask;
  2462. if (unlikely(work_ha_copy)) {
  2463. if (work_ha_copy & HA_LATT) {
  2464. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2465. /*
  2466. * Turn off Link Attention interrupts
  2467. * until CLEAR_LA done
  2468. */
  2469. spin_lock(phba->host->host_lock);
  2470. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2471. control = readl(phba->HCregaddr);
  2472. control &= ~HC_LAINT_ENA;
  2473. writel(control, phba->HCregaddr);
  2474. readl(phba->HCregaddr); /* flush */
  2475. spin_unlock(phba->host->host_lock);
  2476. }
  2477. else
  2478. work_ha_copy &= ~HA_LATT;
  2479. }
  2480. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2481. for (i = 0; i < phba->sli.num_rings; i++) {
  2482. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2483. /*
  2484. * Turn off Slow Rings interrupts
  2485. */
  2486. spin_lock(phba->host->host_lock);
  2487. control = readl(phba->HCregaddr);
  2488. control &= ~(HC_R0INT_ENA << i);
  2489. writel(control, phba->HCregaddr);
  2490. readl(phba->HCregaddr); /* flush */
  2491. spin_unlock(phba->host->host_lock);
  2492. }
  2493. }
  2494. }
  2495. if (work_ha_copy & HA_ERATT) {
  2496. phba->hba_state = LPFC_HBA_ERROR;
  2497. /*
  2498. * There was a link/board error. Read the
  2499. * status register to retrieve the error event
  2500. * and process it.
  2501. */
  2502. phba->sli.slistat.err_attn_event++;
  2503. /* Save status info */
  2504. phba->work_hs = readl(phba->HSregaddr);
  2505. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2506. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2507. /* Clear Chip error bit */
  2508. writel(HA_ERATT, phba->HAregaddr);
  2509. readl(phba->HAregaddr); /* flush */
  2510. /*
  2511. * Reseting the HBA is the only reliable way
  2512. * to shutdown interrupt when there is a
  2513. * ERROR.
  2514. */
  2515. lpfc_sli_send_reset(phba, phba->hba_state);
  2516. }
  2517. spin_lock(phba->host->host_lock);
  2518. phba->work_ha |= work_ha_copy;
  2519. if (phba->work_wait)
  2520. wake_up(phba->work_wait);
  2521. spin_unlock(phba->host->host_lock);
  2522. }
  2523. ha_copy &= ~(phba->work_ha_mask);
  2524. /*
  2525. * Process all events on FCP ring. Take the optimized path for
  2526. * FCP IO. Any other IO is slow path and is handled by
  2527. * the worker thread.
  2528. */
  2529. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2530. status >>= (4*LPFC_FCP_RING);
  2531. if (status & HA_RXATT)
  2532. lpfc_sli_handle_fast_ring_event(phba,
  2533. &phba->sli.ring[LPFC_FCP_RING],
  2534. status);
  2535. return IRQ_HANDLED;
  2536. } /* lpfc_intr_handler */