dtc.h 2.7 KB

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  1. /*
  2. * DTC controller, taken from T128 driver by...
  3. * Copyright 1993, Drew Eckhardt
  4. * Visionary Computing
  5. * (Unix and Linux consulting and custom programming)
  6. * drew@colorado.edu
  7. * +1 (303) 440-4894
  8. *
  9. * DISTRIBUTION RELEASE 2.
  10. *
  11. * For more information, please consult
  12. *
  13. *
  14. *
  15. * and
  16. *
  17. * NCR 5380 Family
  18. * SCSI Protocol Controller
  19. * Databook
  20. *
  21. * NCR Microelectronics
  22. * 1635 Aeroplaza Drive
  23. * Colorado Springs, CO 80916
  24. * 1+ (719) 578-3400
  25. * 1+ (800) 334-5454
  26. */
  27. #ifndef DTC3280_H
  28. #define DTC3280_H
  29. static int dtc_abort(Scsi_Cmnd *);
  30. static int dtc_biosparam(struct scsi_device *, struct block_device *,
  31. sector_t, int*);
  32. static int dtc_detect(Scsi_Host_Template *);
  33. static int dtc_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
  34. static int dtc_bus_reset(Scsi_Cmnd *);
  35. static int dtc_device_reset(Scsi_Cmnd *);
  36. static int dtc_host_reset(Scsi_Cmnd *);
  37. #ifndef CMD_PER_LUN
  38. #define CMD_PER_LUN 2
  39. #endif
  40. #ifndef CAN_QUEUE
  41. #define CAN_QUEUE 32
  42. #endif
  43. #define NCR5380_implementation_fields \
  44. void __iomem *base
  45. #define NCR5380_local_declare() \
  46. void __iomem *base
  47. #define NCR5380_setup(instance) \
  48. base = ((struct NCR5380_hostdata *)(instance)->hostdata)->base
  49. #define DTC_address(reg) (base + DTC_5380_OFFSET + reg)
  50. #define dbNCR5380_read(reg) \
  51. (rval=readb(DTC_address(reg)), \
  52. (((unsigned char) printk("DTC : read register %d at addr %p is: %02x\n"\
  53. , (reg), DTC_address(reg), rval)), rval ) )
  54. #define dbNCR5380_write(reg, value) do { \
  55. printk("DTC : write %02x to register %d at address %p\n", \
  56. (value), (reg), DTC_address(reg)); \
  57. writeb(value, DTC_address(reg));} while(0)
  58. #if !(DTCDEBUG & DTCDEBUG_TRANSFER)
  59. #define NCR5380_read(reg) (readb(DTC_address(reg)))
  60. #define NCR5380_write(reg, value) (writeb(value, DTC_address(reg)))
  61. #else
  62. #define NCR5380_read(reg) (readb(DTC_address(reg)))
  63. #define xNCR5380_read(reg) \
  64. (((unsigned char) printk("DTC : read register %d at address %p\n"\
  65. , (reg), DTC_address(reg))), readb(DTC_address(reg)))
  66. #define NCR5380_write(reg, value) do { \
  67. printk("DTC : write %02x to register %d at address %p\n", \
  68. (value), (reg), DTC_address(reg)); \
  69. writeb(value, DTC_address(reg));} while(0)
  70. #endif
  71. #define NCR5380_intr dtc_intr
  72. #define NCR5380_queue_command dtc_queue_command
  73. #define NCR5380_abort dtc_abort
  74. #define NCR5380_bus_reset dtc_bus_reset
  75. #define NCR5380_device_reset dtc_device_reset
  76. #define NCR5380_host_reset dtc_host_reset
  77. #define NCR5380_proc_info dtc_proc_info
  78. /* 15 12 11 10
  79. 1001 1100 0000 0000 */
  80. #define DTC_IRQS 0x9c00
  81. #endif /* DTC3280_H */