pci-sysfs.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490
  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/config.h>
  17. #include <linux/kernel.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include "pci.h"
  23. static int sysfs_initialized; /* = 0 */
  24. /* show configuration fields */
  25. #define pci_config_attr(field, format_string) \
  26. static ssize_t \
  27. field##_show(struct device *dev, char *buf) \
  28. { \
  29. struct pci_dev *pdev; \
  30. \
  31. pdev = to_pci_dev (dev); \
  32. return sprintf (buf, format_string, pdev->field); \
  33. }
  34. pci_config_attr(vendor, "0x%04x\n");
  35. pci_config_attr(device, "0x%04x\n");
  36. pci_config_attr(subsystem_vendor, "0x%04x\n");
  37. pci_config_attr(subsystem_device, "0x%04x\n");
  38. pci_config_attr(class, "0x%06x\n");
  39. pci_config_attr(irq, "%u\n");
  40. static ssize_t local_cpus_show(struct device *dev, char *buf)
  41. {
  42. cpumask_t mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  43. int len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
  44. strcat(buf,"\n");
  45. return 1+len;
  46. }
  47. /* show resources */
  48. static ssize_t
  49. resource_show(struct device * dev, char * buf)
  50. {
  51. struct pci_dev * pci_dev = to_pci_dev(dev);
  52. char * str = buf;
  53. int i;
  54. int max = 7;
  55. if (pci_dev->subordinate)
  56. max = DEVICE_COUNT_RESOURCE;
  57. for (i = 0; i < max; i++) {
  58. str += sprintf(str,"0x%016lx 0x%016lx 0x%016lx\n",
  59. pci_resource_start(pci_dev,i),
  60. pci_resource_end(pci_dev,i),
  61. pci_resource_flags(pci_dev,i));
  62. }
  63. return (str - buf);
  64. }
  65. struct device_attribute pci_dev_attrs[] = {
  66. __ATTR_RO(resource),
  67. __ATTR_RO(vendor),
  68. __ATTR_RO(device),
  69. __ATTR_RO(subsystem_vendor),
  70. __ATTR_RO(subsystem_device),
  71. __ATTR_RO(class),
  72. __ATTR_RO(irq),
  73. __ATTR_RO(local_cpus),
  74. __ATTR_NULL,
  75. };
  76. static ssize_t
  77. pci_read_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  78. {
  79. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  80. unsigned int size = 64;
  81. loff_t init_off = off;
  82. /* Several chips lock up trying to read undefined config space */
  83. if (capable(CAP_SYS_ADMIN)) {
  84. size = dev->cfg_size;
  85. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  86. size = 128;
  87. }
  88. if (off > size)
  89. return 0;
  90. if (off + count > size) {
  91. size -= off;
  92. count = size;
  93. } else {
  94. size = count;
  95. }
  96. while (off & 3) {
  97. unsigned char val;
  98. pci_read_config_byte(dev, off, &val);
  99. buf[off - init_off] = val;
  100. off++;
  101. if (--size == 0)
  102. break;
  103. }
  104. while (size > 3) {
  105. unsigned int val;
  106. pci_read_config_dword(dev, off, &val);
  107. buf[off - init_off] = val & 0xff;
  108. buf[off - init_off + 1] = (val >> 8) & 0xff;
  109. buf[off - init_off + 2] = (val >> 16) & 0xff;
  110. buf[off - init_off + 3] = (val >> 24) & 0xff;
  111. off += 4;
  112. size -= 4;
  113. }
  114. while (size > 0) {
  115. unsigned char val;
  116. pci_read_config_byte(dev, off, &val);
  117. buf[off - init_off] = val;
  118. off++;
  119. --size;
  120. }
  121. return count;
  122. }
  123. static ssize_t
  124. pci_write_config(struct kobject *kobj, char *buf, loff_t off, size_t count)
  125. {
  126. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  127. unsigned int size = count;
  128. loff_t init_off = off;
  129. if (off > dev->cfg_size)
  130. return 0;
  131. if (off + count > dev->cfg_size) {
  132. size = dev->cfg_size - off;
  133. count = size;
  134. }
  135. while (off & 3) {
  136. pci_write_config_byte(dev, off, buf[off - init_off]);
  137. off++;
  138. if (--size == 0)
  139. break;
  140. }
  141. while (size > 3) {
  142. unsigned int val = buf[off - init_off];
  143. val |= (unsigned int) buf[off - init_off + 1] << 8;
  144. val |= (unsigned int) buf[off - init_off + 2] << 16;
  145. val |= (unsigned int) buf[off - init_off + 3] << 24;
  146. pci_write_config_dword(dev, off, val);
  147. off += 4;
  148. size -= 4;
  149. }
  150. while (size > 0) {
  151. pci_write_config_byte(dev, off, buf[off - init_off]);
  152. off++;
  153. --size;
  154. }
  155. return count;
  156. }
  157. #ifdef HAVE_PCI_LEGACY
  158. /**
  159. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  160. * @kobj: kobject corresponding to file to read from
  161. * @buf: buffer to store results
  162. * @off: offset into legacy I/O port space
  163. * @count: number of bytes to read
  164. *
  165. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  166. * callback routine (pci_legacy_read).
  167. */
  168. ssize_t
  169. pci_read_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  170. {
  171. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  172. struct class_device,
  173. kobj));
  174. /* Only support 1, 2 or 4 byte accesses */
  175. if (count != 1 && count != 2 && count != 4)
  176. return -EINVAL;
  177. return pci_legacy_read(bus, off, (u32 *)buf, count);
  178. }
  179. /**
  180. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  181. * @kobj: kobject corresponding to file to read from
  182. * @buf: buffer containing value to be written
  183. * @off: offset into legacy I/O port space
  184. * @count: number of bytes to write
  185. *
  186. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  187. * callback routine (pci_legacy_write).
  188. */
  189. ssize_t
  190. pci_write_legacy_io(struct kobject *kobj, char *buf, loff_t off, size_t count)
  191. {
  192. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  193. struct class_device,
  194. kobj));
  195. /* Only support 1, 2 or 4 byte accesses */
  196. if (count != 1 && count != 2 && count != 4)
  197. return -EINVAL;
  198. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  199. }
  200. /**
  201. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  202. * @kobj: kobject corresponding to device to be mapped
  203. * @attr: struct bin_attribute for this file
  204. * @vma: struct vm_area_struct passed to mmap
  205. *
  206. * Uses an arch specific callback, pci_mmap_legacy_page_range, to mmap
  207. * legacy memory space (first meg of bus space) into application virtual
  208. * memory space.
  209. */
  210. int
  211. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  212. struct vm_area_struct *vma)
  213. {
  214. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  215. struct class_device,
  216. kobj));
  217. return pci_mmap_legacy_page_range(bus, vma);
  218. }
  219. #endif /* HAVE_PCI_LEGACY */
  220. #ifdef HAVE_PCI_MMAP
  221. /**
  222. * pci_mmap_resource - map a PCI resource into user memory space
  223. * @kobj: kobject for mapping
  224. * @attr: struct bin_attribute for the file being mapped
  225. * @vma: struct vm_area_struct passed into the mmap
  226. *
  227. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  228. * FIXME: write combining? maybe automatic for prefetchable regions?
  229. */
  230. static int
  231. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  232. struct vm_area_struct *vma)
  233. {
  234. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  235. struct device, kobj));
  236. struct resource *res = (struct resource *)attr->private;
  237. enum pci_mmap_state mmap_type;
  238. vma->vm_pgoff += res->start >> PAGE_SHIFT;
  239. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  240. return pci_mmap_page_range(pdev, vma, mmap_type, 0);
  241. }
  242. /**
  243. * pci_create_resource_files - create resource files in sysfs for @dev
  244. * @dev: dev in question
  245. *
  246. * Walk the resources in @dev creating files for each resource available.
  247. */
  248. static void
  249. pci_create_resource_files(struct pci_dev *pdev)
  250. {
  251. int i;
  252. /* Expose the PCI resources from this device as files */
  253. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  254. struct bin_attribute *res_attr;
  255. /* skip empty resources */
  256. if (!pci_resource_len(pdev, i))
  257. continue;
  258. res_attr = kmalloc(sizeof(*res_attr) + 10, GFP_ATOMIC);
  259. if (res_attr) {
  260. memset(res_attr, 0, sizeof(*res_attr) + 10);
  261. pdev->res_attr[i] = res_attr;
  262. /* Allocated above after the res_attr struct */
  263. res_attr->attr.name = (char *)(res_attr + 1);
  264. sprintf(res_attr->attr.name, "resource%d", i);
  265. res_attr->size = pci_resource_len(pdev, i);
  266. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  267. res_attr->attr.owner = THIS_MODULE;
  268. res_attr->mmap = pci_mmap_resource;
  269. res_attr->private = &pdev->resource[i];
  270. sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  271. }
  272. }
  273. }
  274. /**
  275. * pci_remove_resource_files - cleanup resource files
  276. * @dev: dev to cleanup
  277. *
  278. * If we created resource files for @dev, remove them from sysfs and
  279. * free their resources.
  280. */
  281. static void
  282. pci_remove_resource_files(struct pci_dev *pdev)
  283. {
  284. int i;
  285. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  286. struct bin_attribute *res_attr;
  287. res_attr = pdev->res_attr[i];
  288. if (res_attr) {
  289. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  290. kfree(res_attr);
  291. }
  292. }
  293. }
  294. #else /* !HAVE_PCI_MMAP */
  295. static inline void pci_create_resource_files(struct pci_dev *dev) { return; }
  296. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  297. #endif /* HAVE_PCI_MMAP */
  298. /**
  299. * pci_write_rom - used to enable access to the PCI ROM display
  300. * @kobj: kernel object handle
  301. * @buf: user input
  302. * @off: file offset
  303. * @count: number of byte in input
  304. *
  305. * writing anything except 0 enables it
  306. */
  307. static ssize_t
  308. pci_write_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  309. {
  310. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  311. if ((off == 0) && (*buf == '0') && (count == 2))
  312. pdev->rom_attr_enabled = 0;
  313. else
  314. pdev->rom_attr_enabled = 1;
  315. return count;
  316. }
  317. /**
  318. * pci_read_rom - read a PCI ROM
  319. * @kobj: kernel object handle
  320. * @buf: where to put the data we read from the ROM
  321. * @off: file offset
  322. * @count: number of bytes to read
  323. *
  324. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  325. * device corresponding to @kobj.
  326. */
  327. static ssize_t
  328. pci_read_rom(struct kobject *kobj, char *buf, loff_t off, size_t count)
  329. {
  330. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  331. void __iomem *rom;
  332. size_t size;
  333. if (!pdev->rom_attr_enabled)
  334. return -EINVAL;
  335. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  336. if (!rom)
  337. return 0;
  338. if (off >= size)
  339. count = 0;
  340. else {
  341. if (off + count > size)
  342. count = size - off;
  343. memcpy_fromio(buf, rom + off, count);
  344. }
  345. pci_unmap_rom(pdev, rom);
  346. return count;
  347. }
  348. static struct bin_attribute pci_config_attr = {
  349. .attr = {
  350. .name = "config",
  351. .mode = S_IRUGO | S_IWUSR,
  352. .owner = THIS_MODULE,
  353. },
  354. .size = 256,
  355. .read = pci_read_config,
  356. .write = pci_write_config,
  357. };
  358. static struct bin_attribute pcie_config_attr = {
  359. .attr = {
  360. .name = "config",
  361. .mode = S_IRUGO | S_IWUSR,
  362. .owner = THIS_MODULE,
  363. },
  364. .size = 4096,
  365. .read = pci_read_config,
  366. .write = pci_write_config,
  367. };
  368. int pci_create_sysfs_dev_files (struct pci_dev *pdev)
  369. {
  370. if (!sysfs_initialized)
  371. return -EACCES;
  372. if (pdev->cfg_size < 4096)
  373. sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  374. else
  375. sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  376. pci_create_resource_files(pdev);
  377. /* If the device has a ROM, try to expose it in sysfs. */
  378. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  379. struct bin_attribute *rom_attr;
  380. rom_attr = kmalloc(sizeof(*rom_attr), GFP_ATOMIC);
  381. if (rom_attr) {
  382. memset(rom_attr, 0x00, sizeof(*rom_attr));
  383. pdev->rom_attr = rom_attr;
  384. rom_attr->size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  385. rom_attr->attr.name = "rom";
  386. rom_attr->attr.mode = S_IRUSR;
  387. rom_attr->attr.owner = THIS_MODULE;
  388. rom_attr->read = pci_read_rom;
  389. rom_attr->write = pci_write_rom;
  390. sysfs_create_bin_file(&pdev->dev.kobj, rom_attr);
  391. }
  392. }
  393. /* add platform-specific attributes */
  394. pcibios_add_platform_entries(pdev);
  395. return 0;
  396. }
  397. /**
  398. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  399. * @pdev: device whose entries we should free
  400. *
  401. * Cleanup when @pdev is removed from sysfs.
  402. */
  403. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  404. {
  405. if (pdev->cfg_size < 4096)
  406. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  407. else
  408. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  409. pci_remove_resource_files(pdev);
  410. if (pci_resource_len(pdev, PCI_ROM_RESOURCE)) {
  411. if (pdev->rom_attr) {
  412. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  413. kfree(pdev->rom_attr);
  414. }
  415. }
  416. }
  417. static int __init pci_sysfs_init(void)
  418. {
  419. struct pci_dev *pdev = NULL;
  420. sysfs_initialized = 1;
  421. for_each_pci_dev(pdev)
  422. pci_create_sysfs_dev_files(pdev);
  423. return 0;
  424. }
  425. __initcall(pci_sysfs_init);