macserial.c 78 KB

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  1. /*
  2. * macserial.c: Serial port driver for Power Macintoshes.
  3. *
  4. * Derived from drivers/sbus/char/sunserial.c by Paul Mackerras.
  5. *
  6. * Copyright (C) 1996 Paul Mackerras (Paul.Mackerras@cs.anu.edu.au)
  7. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  8. *
  9. * Receive DMA code by Takashi Oe <toe@unlserve.unl.edu>.
  10. *
  11. * $Id: macserial.c,v 1.24.2.4 1999/10/19 04:36:42 paulus Exp $
  12. */
  13. #include <linux/config.h>
  14. #include <linux/errno.h>
  15. #include <linux/module.h>
  16. #include <linux/signal.h>
  17. #include <linux/sched.h>
  18. #include <linux/timer.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/workqueue.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/fcntl.h>
  26. #include <linux/mm.h>
  27. #include <linux/kernel.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #ifdef CONFIG_SERIAL_CONSOLE
  31. #include <linux/console.h>
  32. #endif
  33. #include <linux/slab.h>
  34. #include <linux/bitops.h>
  35. #include <asm/sections.h>
  36. #include <asm/io.h>
  37. #include <asm/pgtable.h>
  38. #include <asm/irq.h>
  39. #include <asm/prom.h>
  40. #include <asm/system.h>
  41. #include <asm/segment.h>
  42. #include <asm/machdep.h>
  43. #include <asm/pmac_feature.h>
  44. #include <linux/adb.h>
  45. #include <linux/pmu.h>
  46. #ifdef CONFIG_KGDB
  47. #include <asm/kgdb.h>
  48. #endif
  49. #include <asm/dbdma.h>
  50. #include "macserial.h"
  51. #ifdef CONFIG_PMAC_PBOOK
  52. static int serial_notify_sleep(struct pmu_sleep_notifier *self, int when);
  53. static struct pmu_sleep_notifier serial_sleep_notifier = {
  54. serial_notify_sleep,
  55. SLEEP_LEVEL_MISC,
  56. };
  57. #endif
  58. #define SUPPORT_SERIAL_DMA
  59. #define MACSERIAL_VERSION "2.0"
  60. /*
  61. * It would be nice to dynamically allocate everything that
  62. * depends on NUM_SERIAL, so we could support any number of
  63. * Z8530s, but for now...
  64. */
  65. #define NUM_SERIAL 2 /* Max number of ZS chips supported */
  66. #define NUM_CHANNELS (NUM_SERIAL * 2) /* 2 channels per chip */
  67. /* On PowerMacs, the hardware takes care of the SCC recovery time,
  68. but we need the eieio to make sure that the accesses occur
  69. in the order we want. */
  70. #define RECOVERY_DELAY eieio()
  71. static struct tty_driver *serial_driver;
  72. struct mac_zschannel zs_channels[NUM_CHANNELS];
  73. struct mac_serial zs_soft[NUM_CHANNELS];
  74. int zs_channels_found;
  75. struct mac_serial *zs_chain; /* list of all channels */
  76. struct tty_struct zs_ttys[NUM_CHANNELS];
  77. static int is_powerbook;
  78. #ifdef CONFIG_SERIAL_CONSOLE
  79. static struct console sercons;
  80. #endif
  81. #ifdef CONFIG_KGDB
  82. struct mac_zschannel *zs_kgdbchan;
  83. static unsigned char scc_inittab[] = {
  84. 9, 0x80, /* reset A side (CHRA) */
  85. 13, 0, /* set baud rate divisor */
  86. 12, 1,
  87. 14, 1, /* baud rate gen enable, src=rtxc (BRENABL) */
  88. 11, 0x50, /* clocks = br gen (RCBR | TCBR) */
  89. 5, 0x6a, /* tx 8 bits, assert RTS (Tx8 | TxENAB | RTS) */
  90. 4, 0x44, /* x16 clock, 1 stop (SB1 | X16CLK)*/
  91. 3, 0xc1, /* rx enable, 8 bits (RxENABLE | Rx8)*/
  92. };
  93. #endif
  94. #define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */
  95. /* serial subtype definitions */
  96. #define SERIAL_TYPE_NORMAL 1
  97. /* number of characters left in xmit buffer before we ask for more */
  98. #define WAKEUP_CHARS 256
  99. /*
  100. * Debugging.
  101. */
  102. #undef SERIAL_DEBUG_INTR
  103. #undef SERIAL_DEBUG_OPEN
  104. #undef SERIAL_DEBUG_FLOW
  105. #undef SERIAL_DEBUG_POWER
  106. #undef SERIAL_DEBUG_THROTTLE
  107. #undef SERIAL_DEBUG_STOP
  108. #undef SERIAL_DEBUG_BAUDS
  109. #define RS_STROBE_TIME 10
  110. #define RS_ISR_PASS_LIMIT 256
  111. #define _INLINE_ inline
  112. #ifdef SERIAL_DEBUG_OPEN
  113. #define OPNDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
  114. #else
  115. #define OPNDBG(fmt, arg...) do { } while (0)
  116. #endif
  117. #ifdef SERIAL_DEBUG_POWER
  118. #define PWRDBG(fmt, arg...) printk(KERN_DEBUG fmt , ## arg)
  119. #else
  120. #define PWRDBG(fmt, arg...) do { } while (0)
  121. #endif
  122. #ifdef SERIAL_DEBUG_BAUDS
  123. #define BAUDBG(fmt, arg...) printk(fmt , ## arg)
  124. #else
  125. #define BAUDBG(fmt, arg...) do { } while (0)
  126. #endif
  127. static void probe_sccs(void);
  128. static void change_speed(struct mac_serial *info, struct termios *old);
  129. static void rs_wait_until_sent(struct tty_struct *tty, int timeout);
  130. static int set_scc_power(struct mac_serial * info, int state);
  131. static int setup_scc(struct mac_serial * info);
  132. static void dbdma_reset(volatile struct dbdma_regs *dma);
  133. static void dbdma_flush(volatile struct dbdma_regs *dma);
  134. static irqreturn_t rs_txdma_irq(int irq, void *dev_id, struct pt_regs *regs);
  135. static irqreturn_t rs_rxdma_irq(int irq, void *dev_id, struct pt_regs *regs);
  136. static void dma_init(struct mac_serial * info);
  137. static void rxdma_start(struct mac_serial * info, int curr);
  138. static void rxdma_to_tty(struct mac_serial * info);
  139. /*
  140. * tmp_buf is used as a temporary buffer by serial_write. We need to
  141. * lock it in case the copy_from_user blocks while swapping in a page,
  142. * and some other program tries to do a serial write at the same time.
  143. * Since the lock will only come under contention when the system is
  144. * swapping and available memory is low, it makes sense to share one
  145. * buffer across all the serial ports, since it significantly saves
  146. * memory if large numbers of serial ports are open.
  147. */
  148. static unsigned char *tmp_buf;
  149. static DECLARE_MUTEX(tmp_buf_sem);
  150. static inline int __pmac
  151. serial_paranoia_check(struct mac_serial *info,
  152. char *name, const char *routine)
  153. {
  154. #ifdef SERIAL_PARANOIA_CHECK
  155. static const char badmagic[] = KERN_WARNING
  156. "Warning: bad magic number for serial struct %s in %s\n";
  157. static const char badinfo[] = KERN_WARNING
  158. "Warning: null mac_serial for %s in %s\n";
  159. if (!info) {
  160. printk(badinfo, name, routine);
  161. return 1;
  162. }
  163. if (info->magic != SERIAL_MAGIC) {
  164. printk(badmagic, name, routine);
  165. return 1;
  166. }
  167. #endif
  168. return 0;
  169. }
  170. /*
  171. * Reading and writing Z8530 registers.
  172. */
  173. static inline unsigned char __pmac read_zsreg(struct mac_zschannel *channel,
  174. unsigned char reg)
  175. {
  176. unsigned char retval;
  177. unsigned long flags;
  178. /*
  179. * We have to make this atomic.
  180. */
  181. spin_lock_irqsave(&channel->lock, flags);
  182. if (reg != 0) {
  183. *channel->control = reg;
  184. RECOVERY_DELAY;
  185. }
  186. retval = *channel->control;
  187. RECOVERY_DELAY;
  188. spin_unlock_irqrestore(&channel->lock, flags);
  189. return retval;
  190. }
  191. static inline void __pmac write_zsreg(struct mac_zschannel *channel,
  192. unsigned char reg, unsigned char value)
  193. {
  194. unsigned long flags;
  195. spin_lock_irqsave(&channel->lock, flags);
  196. if (reg != 0) {
  197. *channel->control = reg;
  198. RECOVERY_DELAY;
  199. }
  200. *channel->control = value;
  201. RECOVERY_DELAY;
  202. spin_unlock_irqrestore(&channel->lock, flags);
  203. return;
  204. }
  205. static inline unsigned char __pmac read_zsdata(struct mac_zschannel *channel)
  206. {
  207. unsigned char retval;
  208. retval = *channel->data;
  209. RECOVERY_DELAY;
  210. return retval;
  211. }
  212. static inline void write_zsdata(struct mac_zschannel *channel,
  213. unsigned char value)
  214. {
  215. *channel->data = value;
  216. RECOVERY_DELAY;
  217. return;
  218. }
  219. static inline void load_zsregs(struct mac_zschannel *channel,
  220. unsigned char *regs)
  221. {
  222. ZS_CLEARERR(channel);
  223. ZS_CLEARFIFO(channel);
  224. /* Load 'em up */
  225. write_zsreg(channel, R4, regs[R4]);
  226. write_zsreg(channel, R10, regs[R10]);
  227. write_zsreg(channel, R3, regs[R3] & ~RxENABLE);
  228. write_zsreg(channel, R5, regs[R5] & ~TxENAB);
  229. write_zsreg(channel, R1, regs[R1]);
  230. write_zsreg(channel, R9, regs[R9]);
  231. write_zsreg(channel, R11, regs[R11]);
  232. write_zsreg(channel, R12, regs[R12]);
  233. write_zsreg(channel, R13, regs[R13]);
  234. write_zsreg(channel, R14, regs[R14]);
  235. write_zsreg(channel, R15, regs[R15]);
  236. write_zsreg(channel, R3, regs[R3]);
  237. write_zsreg(channel, R5, regs[R5]);
  238. return;
  239. }
  240. /* Sets or clears DTR/RTS on the requested line */
  241. static inline void zs_rtsdtr(struct mac_serial *ss, int set)
  242. {
  243. if (set)
  244. ss->curregs[5] |= (RTS | DTR);
  245. else
  246. ss->curregs[5] &= ~(RTS | DTR);
  247. write_zsreg(ss->zs_channel, 5, ss->curregs[5]);
  248. return;
  249. }
  250. /* Utility routines for the Zilog */
  251. static inline int get_zsbaud(struct mac_serial *ss)
  252. {
  253. struct mac_zschannel *channel = ss->zs_channel;
  254. int brg;
  255. if ((ss->curregs[R11] & TCBR) == 0) {
  256. /* higher rates don't use the baud rate generator */
  257. return (ss->curregs[R4] & X32CLK)? ZS_CLOCK/32: ZS_CLOCK/16;
  258. }
  259. /* The baud rate is split up between two 8-bit registers in
  260. * what is termed 'BRG time constant' format in my docs for
  261. * the chip, it is a function of the clk rate the chip is
  262. * receiving which happens to be constant.
  263. */
  264. brg = (read_zsreg(channel, 13) << 8);
  265. brg |= read_zsreg(channel, 12);
  266. return BRG_TO_BPS(brg, (ZS_CLOCK/(ss->clk_divisor)));
  267. }
  268. /* On receive, this clears errors and the receiver interrupts */
  269. static inline void rs_recv_clear(struct mac_zschannel *zsc)
  270. {
  271. write_zsreg(zsc, 0, ERR_RES);
  272. write_zsreg(zsc, 0, RES_H_IUS); /* XXX this is unnecessary */
  273. }
  274. /*
  275. * Reset a Descriptor-Based DMA channel.
  276. */
  277. static void dbdma_reset(volatile struct dbdma_regs *dma)
  278. {
  279. int i;
  280. out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16);
  281. /*
  282. * Yes this looks peculiar, but apparently it needs to be this
  283. * way on some machines. (We need to make sure the DBDMA
  284. * engine has actually got the write above and responded
  285. * to it. - paulus)
  286. */
  287. for (i = 200; i > 0; --i)
  288. if (ld_le32(&dma->status) & RUN)
  289. udelay(1);
  290. }
  291. /*
  292. * Tells a DBDMA channel to stop and write any buffered data
  293. * it might have to memory.
  294. */
  295. static _INLINE_ void dbdma_flush(volatile struct dbdma_regs *dma)
  296. {
  297. int i = 0;
  298. out_le32(&dma->control, (FLUSH << 16) | FLUSH);
  299. while (((in_le32(&dma->status) & FLUSH) != 0) && (i++ < 100))
  300. udelay(1);
  301. }
  302. /*
  303. * ----------------------------------------------------------------------
  304. *
  305. * Here starts the interrupt handling routines. All of the following
  306. * subroutines are declared as inline and are folded into
  307. * rs_interrupt(). They were separated out for readability's sake.
  308. *
  309. * - Ted Ts'o (tytso@mit.edu), 7-Mar-93
  310. * -----------------------------------------------------------------------
  311. */
  312. /*
  313. * This routine is used by the interrupt handler to schedule
  314. * processing in the software interrupt portion of the driver.
  315. */
  316. static _INLINE_ void rs_sched_event(struct mac_serial *info,
  317. int event)
  318. {
  319. info->event |= 1 << event;
  320. schedule_work(&info->tqueue);
  321. }
  322. /* Work out the flag value for a z8530 status value. */
  323. static _INLINE_ int stat_to_flag(int stat)
  324. {
  325. int flag;
  326. if (stat & Rx_OVR) {
  327. flag = TTY_OVERRUN;
  328. } else if (stat & FRM_ERR) {
  329. flag = TTY_FRAME;
  330. } else if (stat & PAR_ERR) {
  331. flag = TTY_PARITY;
  332. } else
  333. flag = 0;
  334. return flag;
  335. }
  336. static _INLINE_ void receive_chars(struct mac_serial *info,
  337. struct pt_regs *regs)
  338. {
  339. struct tty_struct *tty = info->tty;
  340. unsigned char ch, stat, flag;
  341. while ((read_zsreg(info->zs_channel, 0) & Rx_CH_AV) != 0) {
  342. stat = read_zsreg(info->zs_channel, R1);
  343. ch = read_zsdata(info->zs_channel);
  344. #ifdef CONFIG_KGDB
  345. if (info->kgdb_channel) {
  346. if (ch == 0x03 || ch == '$')
  347. breakpoint();
  348. if (stat & (Rx_OVR|FRM_ERR|PAR_ERR))
  349. write_zsreg(info->zs_channel, 0, ERR_RES);
  350. return;
  351. }
  352. #endif
  353. if (!tty)
  354. continue;
  355. if (tty->flip.count >= TTY_FLIPBUF_SIZE)
  356. tty_flip_buffer_push(tty);
  357. if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
  358. static int flip_buf_ovf;
  359. if (++flip_buf_ovf <= 1)
  360. printk(KERN_WARNING "FB. overflow: %d\n",
  361. flip_buf_ovf);
  362. break;
  363. }
  364. tty->flip.count++;
  365. {
  366. static int flip_max_cnt;
  367. if (flip_max_cnt < tty->flip.count)
  368. flip_max_cnt = tty->flip.count;
  369. }
  370. flag = stat_to_flag(stat);
  371. if (flag)
  372. /* reset the error indication */
  373. write_zsreg(info->zs_channel, 0, ERR_RES);
  374. *tty->flip.flag_buf_ptr++ = flag;
  375. *tty->flip.char_buf_ptr++ = ch;
  376. }
  377. if (tty)
  378. tty_flip_buffer_push(tty);
  379. }
  380. static void transmit_chars(struct mac_serial *info)
  381. {
  382. if ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0)
  383. return;
  384. info->tx_active = 0;
  385. if (info->x_char && !info->power_wait) {
  386. /* Send next char */
  387. write_zsdata(info->zs_channel, info->x_char);
  388. info->x_char = 0;
  389. info->tx_active = 1;
  390. return;
  391. }
  392. if ((info->xmit_cnt <= 0) || info->tty->stopped || info->tx_stopped
  393. || info->power_wait) {
  394. write_zsreg(info->zs_channel, 0, RES_Tx_P);
  395. return;
  396. }
  397. /* Send char */
  398. write_zsdata(info->zs_channel, info->xmit_buf[info->xmit_tail++]);
  399. info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE-1);
  400. info->xmit_cnt--;
  401. info->tx_active = 1;
  402. if (info->xmit_cnt < WAKEUP_CHARS)
  403. rs_sched_event(info, RS_EVENT_WRITE_WAKEUP);
  404. }
  405. static void powerup_done(unsigned long data)
  406. {
  407. struct mac_serial *info = (struct mac_serial *) data;
  408. unsigned long flags;
  409. spin_lock_irqsave(&info->lock, flags);
  410. info->power_wait = 0;
  411. transmit_chars(info);
  412. spin_unlock_irqrestore(&info->lock, flags);
  413. }
  414. static _INLINE_ void status_handle(struct mac_serial *info)
  415. {
  416. unsigned char status;
  417. /* Get status from Read Register 0 */
  418. status = read_zsreg(info->zs_channel, 0);
  419. /* Check for DCD transitions */
  420. if (((status ^ info->read_reg_zero) & DCD) != 0
  421. && info->tty && !C_CLOCAL(info->tty)) {
  422. if (status & DCD) {
  423. wake_up_interruptible(&info->open_wait);
  424. } else {
  425. if (info->tty)
  426. tty_hangup(info->tty);
  427. }
  428. }
  429. /* Check for CTS transitions */
  430. if (info->tty && C_CRTSCTS(info->tty)) {
  431. /*
  432. * For some reason, on the Power Macintosh,
  433. * it seems that the CTS bit is 1 when CTS is
  434. * *negated* and 0 when it is asserted.
  435. * The DCD bit doesn't seem to be inverted
  436. * like this.
  437. */
  438. if ((status & CTS) == 0) {
  439. if (info->tx_stopped) {
  440. #ifdef SERIAL_DEBUG_FLOW
  441. printk(KERN_DEBUG "CTS up\n");
  442. #endif
  443. info->tx_stopped = 0;
  444. if (!info->tx_active)
  445. transmit_chars(info);
  446. }
  447. } else {
  448. #ifdef SERIAL_DEBUG_FLOW
  449. printk(KERN_DEBUG "CTS down\n");
  450. #endif
  451. info->tx_stopped = 1;
  452. }
  453. }
  454. /* Clear status condition... */
  455. write_zsreg(info->zs_channel, 0, RES_EXT_INT);
  456. info->read_reg_zero = status;
  457. }
  458. static _INLINE_ void receive_special_dma(struct mac_serial *info)
  459. {
  460. unsigned char stat, flag;
  461. volatile struct dbdma_regs *rd = &info->rx->dma;
  462. int where = RX_BUF_SIZE;
  463. spin_lock(&info->rx_dma_lock);
  464. if ((ld_le32(&rd->status) & ACTIVE) != 0)
  465. dbdma_flush(rd);
  466. if (in_le32(&rd->cmdptr)
  467. == virt_to_bus(info->rx_cmds[info->rx_cbuf] + 1))
  468. where -= in_le16(&info->rx->res_count);
  469. where--;
  470. stat = read_zsreg(info->zs_channel, R1);
  471. flag = stat_to_flag(stat);
  472. if (flag) {
  473. info->rx_flag_buf[info->rx_cbuf][where] = flag;
  474. /* reset the error indication */
  475. write_zsreg(info->zs_channel, 0, ERR_RES);
  476. }
  477. spin_unlock(&info->rx_dma_lock);
  478. }
  479. /*
  480. * This is the serial driver's generic interrupt routine
  481. */
  482. static irqreturn_t rs_interrupt(int irq, void *dev_id, struct pt_regs * regs)
  483. {
  484. struct mac_serial *info = (struct mac_serial *) dev_id;
  485. unsigned char zs_intreg;
  486. int shift;
  487. unsigned long flags;
  488. int handled = 0;
  489. if (!(info->flags & ZILOG_INITIALIZED)) {
  490. printk(KERN_WARNING "rs_interrupt: irq %d, port not "
  491. "initialized\n", irq);
  492. disable_irq(irq);
  493. return IRQ_NONE;
  494. }
  495. /* NOTE: The read register 3, which holds the irq status,
  496. * does so for both channels on each chip. Although
  497. * the status value itself must be read from the A
  498. * channel and is only valid when read from channel A.
  499. * Yes... broken hardware...
  500. */
  501. #define CHAN_IRQMASK (CHBRxIP | CHBTxIP | CHBEXT)
  502. if (info->zs_chan_a == info->zs_channel)
  503. shift = 3; /* Channel A */
  504. else
  505. shift = 0; /* Channel B */
  506. spin_lock_irqsave(&info->lock, flags);
  507. for (;;) {
  508. zs_intreg = read_zsreg(info->zs_chan_a, 3) >> shift;
  509. #ifdef SERIAL_DEBUG_INTR
  510. printk(KERN_DEBUG "rs_interrupt: irq %d, zs_intreg 0x%x\n",
  511. irq, (int)zs_intreg);
  512. #endif
  513. if ((zs_intreg & CHAN_IRQMASK) == 0)
  514. break;
  515. handled = 1;
  516. if (zs_intreg & CHBRxIP) {
  517. /* If we are doing DMA, we only ask for interrupts
  518. on characters with errors or special conditions. */
  519. if (info->dma_initted)
  520. receive_special_dma(info);
  521. else
  522. receive_chars(info, regs);
  523. }
  524. if (zs_intreg & CHBTxIP)
  525. transmit_chars(info);
  526. if (zs_intreg & CHBEXT)
  527. status_handle(info);
  528. }
  529. spin_unlock_irqrestore(&info->lock, flags);
  530. return IRQ_RETVAL(handled);
  531. }
  532. /* Transmit DMA interrupt - not used at present */
  533. static irqreturn_t rs_txdma_irq(int irq, void *dev_id, struct pt_regs *regs)
  534. {
  535. return IRQ_HANDLED;
  536. }
  537. /*
  538. * Receive DMA interrupt.
  539. */
  540. static irqreturn_t rs_rxdma_irq(int irq, void *dev_id, struct pt_regs *regs)
  541. {
  542. struct mac_serial *info = (struct mac_serial *) dev_id;
  543. volatile struct dbdma_cmd *cd;
  544. if (!info->dma_initted)
  545. return IRQ_NONE;
  546. spin_lock(&info->rx_dma_lock);
  547. /* First, confirm that this interrupt is, indeed, coming */
  548. /* from Rx DMA */
  549. cd = info->rx_cmds[info->rx_cbuf] + 2;
  550. if ((in_le16(&cd->xfer_status) & (RUN | ACTIVE)) != (RUN | ACTIVE)) {
  551. spin_unlock(&info->rx_dma_lock);
  552. return IRQ_NONE;
  553. }
  554. if (info->rx_fbuf != RX_NO_FBUF) {
  555. info->rx_cbuf = info->rx_fbuf;
  556. if (++info->rx_fbuf == info->rx_nbuf)
  557. info->rx_fbuf = 0;
  558. if (info->rx_fbuf == info->rx_ubuf)
  559. info->rx_fbuf = RX_NO_FBUF;
  560. }
  561. spin_unlock(&info->rx_dma_lock);
  562. return IRQ_HANDLED;
  563. }
  564. /*
  565. * -------------------------------------------------------------------
  566. * Here ends the serial interrupt routines.
  567. * -------------------------------------------------------------------
  568. */
  569. /*
  570. * ------------------------------------------------------------
  571. * rs_stop() and rs_start()
  572. *
  573. * This routines are called before setting or resetting tty->stopped.
  574. * ------------------------------------------------------------
  575. */
  576. static void rs_stop(struct tty_struct *tty)
  577. {
  578. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  579. #ifdef SERIAL_DEBUG_STOP
  580. printk(KERN_DEBUG "rs_stop %ld....\n",
  581. tty->ldisc.chars_in_buffer(tty));
  582. #endif
  583. if (serial_paranoia_check(info, tty->name, "rs_stop"))
  584. return;
  585. #if 0
  586. spin_lock_irqsave(&info->lock, flags);
  587. if (info->curregs[5] & TxENAB) {
  588. info->curregs[5] &= ~TxENAB;
  589. info->pendregs[5] &= ~TxENAB;
  590. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  591. }
  592. spin_unlock_irqrestore(&info->lock, flags);
  593. #endif
  594. }
  595. static void rs_start(struct tty_struct *tty)
  596. {
  597. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  598. unsigned long flags;
  599. #ifdef SERIAL_DEBUG_STOP
  600. printk(KERN_DEBUG "rs_start %ld....\n",
  601. tty->ldisc.chars_in_buffer(tty));
  602. #endif
  603. if (serial_paranoia_check(info, tty->name, "rs_start"))
  604. return;
  605. spin_lock_irqsave(&info->lock, flags);
  606. #if 0
  607. if (info->xmit_cnt && info->xmit_buf && !(info->curregs[5] & TxENAB)) {
  608. info->curregs[5] |= TxENAB;
  609. info->pendregs[5] = info->curregs[5];
  610. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  611. }
  612. #else
  613. if (info->xmit_cnt && info->xmit_buf && !info->tx_active) {
  614. transmit_chars(info);
  615. }
  616. #endif
  617. spin_unlock_irqrestore(&info->lock, flags);
  618. }
  619. static void do_softint(void *private_)
  620. {
  621. struct mac_serial *info = (struct mac_serial *) private_;
  622. struct tty_struct *tty;
  623. tty = info->tty;
  624. if (!tty)
  625. return;
  626. if (test_and_clear_bit(RS_EVENT_WRITE_WAKEUP, &info->event))
  627. tty_wakeup(tty);
  628. }
  629. static int startup(struct mac_serial * info)
  630. {
  631. int delay;
  632. OPNDBG("startup() (ttyS%d, irq %d)\n", info->line, info->irq);
  633. if (info->flags & ZILOG_INITIALIZED) {
  634. OPNDBG(" -> already inited\n");
  635. return 0;
  636. }
  637. if (!info->xmit_buf) {
  638. info->xmit_buf = (unsigned char *) get_zeroed_page(GFP_KERNEL);
  639. if (!info->xmit_buf)
  640. return -ENOMEM;
  641. }
  642. OPNDBG("starting up ttyS%d (irq %d)...\n", info->line, info->irq);
  643. delay = set_scc_power(info, 1);
  644. setup_scc(info);
  645. if (delay) {
  646. unsigned long flags;
  647. /* delay is in ms */
  648. spin_lock_irqsave(&info->lock, flags);
  649. info->power_wait = 1;
  650. mod_timer(&info->powerup_timer,
  651. jiffies + (delay * HZ + 999) / 1000);
  652. spin_unlock_irqrestore(&info->lock, flags);
  653. }
  654. OPNDBG("enabling IRQ on ttyS%d (irq %d)...\n", info->line, info->irq);
  655. info->flags |= ZILOG_INITIALIZED;
  656. enable_irq(info->irq);
  657. if (info->dma_initted) {
  658. enable_irq(info->rx_dma_irq);
  659. }
  660. return 0;
  661. }
  662. static _INLINE_ void rxdma_start(struct mac_serial * info, int curr)
  663. {
  664. volatile struct dbdma_regs *rd = &info->rx->dma;
  665. volatile struct dbdma_cmd *cd = info->rx_cmds[curr];
  666. //printk(KERN_DEBUG "SCC: rxdma_start\n");
  667. st_le32(&rd->cmdptr, virt_to_bus(cd));
  668. out_le32(&rd->control, (RUN << 16) | RUN);
  669. }
  670. static void rxdma_to_tty(struct mac_serial *info)
  671. {
  672. struct tty_struct *tty = info->tty;
  673. volatile struct dbdma_regs *rd = &info->rx->dma;
  674. unsigned long flags;
  675. int residue, available, space, do_queue;
  676. if (!tty)
  677. return;
  678. do_queue = 0;
  679. spin_lock_irqsave(&info->rx_dma_lock, flags);
  680. more:
  681. space = TTY_FLIPBUF_SIZE - tty->flip.count;
  682. if (!space) {
  683. do_queue++;
  684. goto out;
  685. }
  686. residue = 0;
  687. if (info->rx_ubuf == info->rx_cbuf) {
  688. if ((ld_le32(&rd->status) & ACTIVE) != 0) {
  689. dbdma_flush(rd);
  690. if (in_le32(&rd->cmdptr)
  691. == virt_to_bus(info->rx_cmds[info->rx_cbuf]+1))
  692. residue = in_le16(&info->rx->res_count);
  693. }
  694. }
  695. available = RX_BUF_SIZE - residue - info->rx_done_bytes;
  696. if (available > space)
  697. available = space;
  698. if (available) {
  699. memcpy(tty->flip.char_buf_ptr,
  700. info->rx_char_buf[info->rx_ubuf] + info->rx_done_bytes,
  701. available);
  702. memcpy(tty->flip.flag_buf_ptr,
  703. info->rx_flag_buf[info->rx_ubuf] + info->rx_done_bytes,
  704. available);
  705. tty->flip.char_buf_ptr += available;
  706. tty->flip.count += available;
  707. tty->flip.flag_buf_ptr += available;
  708. memset(info->rx_flag_buf[info->rx_ubuf] + info->rx_done_bytes,
  709. 0, available);
  710. info->rx_done_bytes += available;
  711. do_queue++;
  712. }
  713. if (info->rx_done_bytes == RX_BUF_SIZE) {
  714. volatile struct dbdma_cmd *cd = info->rx_cmds[info->rx_ubuf];
  715. if (info->rx_ubuf == info->rx_cbuf)
  716. goto out;
  717. /* mark rx_char_buf[rx_ubuf] free */
  718. st_le16(&cd->command, DBDMA_NOP);
  719. cd++;
  720. st_le32(&cd->cmd_dep, 0);
  721. st_le32((unsigned int *)&cd->res_count, 0);
  722. cd++;
  723. st_le16(&cd->xfer_status, 0);
  724. if (info->rx_fbuf == RX_NO_FBUF) {
  725. info->rx_fbuf = info->rx_ubuf;
  726. if (!(ld_le32(&rd->status) & ACTIVE)) {
  727. dbdma_reset(&info->rx->dma);
  728. rxdma_start(info, info->rx_ubuf);
  729. info->rx_cbuf = info->rx_ubuf;
  730. }
  731. }
  732. info->rx_done_bytes = 0;
  733. if (++info->rx_ubuf == info->rx_nbuf)
  734. info->rx_ubuf = 0;
  735. if (info->rx_fbuf == info->rx_ubuf)
  736. info->rx_fbuf = RX_NO_FBUF;
  737. goto more;
  738. }
  739. out:
  740. spin_unlock_irqrestore(&info->rx_dma_lock, flags);
  741. if (do_queue)
  742. tty_flip_buffer_push(tty);
  743. }
  744. static void poll_rxdma(unsigned long private_)
  745. {
  746. struct mac_serial *info = (struct mac_serial *) private_;
  747. unsigned long flags;
  748. rxdma_to_tty(info);
  749. spin_lock_irqsave(&info->rx_dma_lock, flags);
  750. mod_timer(&info->poll_dma_timer, RX_DMA_TIMER);
  751. spin_unlock_irqrestore(&info->rx_dma_lock, flags);
  752. }
  753. static void dma_init(struct mac_serial * info)
  754. {
  755. int i, size;
  756. volatile struct dbdma_cmd *cd;
  757. unsigned char *p;
  758. info->rx_nbuf = 8;
  759. /* various mem set up */
  760. size = sizeof(struct dbdma_cmd) * (3 * info->rx_nbuf + 2)
  761. + (RX_BUF_SIZE * 2 + sizeof(*info->rx_cmds)
  762. + sizeof(*info->rx_char_buf) + sizeof(*info->rx_flag_buf))
  763. * info->rx_nbuf;
  764. info->dma_priv = kmalloc(size, GFP_KERNEL | GFP_DMA);
  765. if (info->dma_priv == NULL)
  766. return;
  767. memset(info->dma_priv, 0, size);
  768. info->rx_cmds = (volatile struct dbdma_cmd **)info->dma_priv;
  769. info->rx_char_buf = (unsigned char **) (info->rx_cmds + info->rx_nbuf);
  770. info->rx_flag_buf = info->rx_char_buf + info->rx_nbuf;
  771. p = (unsigned char *) (info->rx_flag_buf + info->rx_nbuf);
  772. for (i = 0; i < info->rx_nbuf; i++, p += RX_BUF_SIZE)
  773. info->rx_char_buf[i] = p;
  774. for (i = 0; i < info->rx_nbuf; i++, p += RX_BUF_SIZE)
  775. info->rx_flag_buf[i] = p;
  776. /* a bit of DMA programming */
  777. cd = info->rx_cmds[0] = (volatile struct dbdma_cmd *) DBDMA_ALIGN(p);
  778. st_le16(&cd->command, DBDMA_NOP);
  779. cd++;
  780. st_le16(&cd->req_count, RX_BUF_SIZE);
  781. st_le16(&cd->command, INPUT_MORE);
  782. st_le32(&cd->phy_addr, virt_to_bus(info->rx_char_buf[0]));
  783. cd++;
  784. st_le16(&cd->req_count, 4);
  785. st_le16(&cd->command, STORE_WORD | INTR_ALWAYS);
  786. st_le32(&cd->phy_addr, virt_to_bus(cd-2));
  787. st_le32(&cd->cmd_dep, DBDMA_STOP);
  788. for (i = 1; i < info->rx_nbuf; i++) {
  789. info->rx_cmds[i] = ++cd;
  790. st_le16(&cd->command, DBDMA_NOP);
  791. cd++;
  792. st_le16(&cd->req_count, RX_BUF_SIZE);
  793. st_le16(&cd->command, INPUT_MORE);
  794. st_le32(&cd->phy_addr, virt_to_bus(info->rx_char_buf[i]));
  795. cd++;
  796. st_le16(&cd->req_count, 4);
  797. st_le16(&cd->command, STORE_WORD | INTR_ALWAYS);
  798. st_le32(&cd->phy_addr, virt_to_bus(cd-2));
  799. st_le32(&cd->cmd_dep, DBDMA_STOP);
  800. }
  801. cd++;
  802. st_le16(&cd->command, DBDMA_NOP | BR_ALWAYS);
  803. st_le32(&cd->cmd_dep, virt_to_bus(info->rx_cmds[0]));
  804. /* setup DMA to our liking */
  805. dbdma_reset(&info->rx->dma);
  806. st_le32(&info->rx->dma.intr_sel, 0x10001);
  807. st_le32(&info->rx->dma.br_sel, 0x10001);
  808. out_le32(&info->rx->dma.wait_sel, 0x10001);
  809. /* set various flags */
  810. info->rx_ubuf = 0;
  811. info->rx_cbuf = 0;
  812. info->rx_fbuf = info->rx_ubuf + 1;
  813. if (info->rx_fbuf == info->rx_nbuf)
  814. info->rx_fbuf = RX_NO_FBUF;
  815. info->rx_done_bytes = 0;
  816. /* setup polling */
  817. init_timer(&info->poll_dma_timer);
  818. info->poll_dma_timer.function = (void *)&poll_rxdma;
  819. info->poll_dma_timer.data = (unsigned long)info;
  820. info->dma_initted = 1;
  821. }
  822. /*
  823. * FixZeroBug....Works around a bug in the SCC receving channel.
  824. * Taken from Darwin code, 15 Sept. 2000 -DanM
  825. *
  826. * The following sequence prevents a problem that is seen with O'Hare ASICs
  827. * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
  828. * at the input to the receiver becomes 'stuck' and locks up the receiver.
  829. * This problem can occur as a result of a zero bit at the receiver input
  830. * coincident with any of the following events:
  831. *
  832. * The SCC is initialized (hardware or software).
  833. * A framing error is detected.
  834. * The clocking option changes from synchronous or X1 asynchronous
  835. * clocking to X16, X32, or X64 asynchronous clocking.
  836. * The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
  837. *
  838. * This workaround attempts to recover from the lockup condition by placing
  839. * the SCC in synchronous loopback mode with a fast clock before programming
  840. * any of the asynchronous modes.
  841. */
  842. static void fix_zero_bug_scc(struct mac_serial * info)
  843. {
  844. write_zsreg(info->zs_channel, 9,
  845. (info->zs_channel == info->zs_chan_a? CHRA: CHRB));
  846. udelay(10);
  847. write_zsreg(info->zs_channel, 9,
  848. ((info->zs_channel == info->zs_chan_a? CHRA: CHRB) | NV));
  849. write_zsreg(info->zs_channel, 4, (X1CLK | EXTSYNC));
  850. /* I think this is wrong....but, I just copying code....
  851. */
  852. write_zsreg(info->zs_channel, 3, (8 & ~RxENABLE));
  853. write_zsreg(info->zs_channel, 5, (8 & ~TxENAB));
  854. write_zsreg(info->zs_channel, 9, NV); /* Didn't we already do this? */
  855. write_zsreg(info->zs_channel, 11, (RCBR | TCBR));
  856. write_zsreg(info->zs_channel, 12, 0);
  857. write_zsreg(info->zs_channel, 13, 0);
  858. write_zsreg(info->zs_channel, 14, (LOOPBAK | SSBR));
  859. write_zsreg(info->zs_channel, 14, (LOOPBAK | SSBR | BRENABL));
  860. write_zsreg(info->zs_channel, 3, (8 | RxENABLE));
  861. write_zsreg(info->zs_channel, 0, RES_EXT_INT);
  862. write_zsreg(info->zs_channel, 0, RES_EXT_INT); /* to kill some time */
  863. /* The channel should be OK now, but it is probably receiving
  864. * loopback garbage.
  865. * Switch to asynchronous mode, disable the receiver,
  866. * and discard everything in the receive buffer.
  867. */
  868. write_zsreg(info->zs_channel, 9, NV);
  869. write_zsreg(info->zs_channel, 4, PAR_ENA);
  870. write_zsreg(info->zs_channel, 3, (8 & ~RxENABLE));
  871. while (read_zsreg(info->zs_channel, 0) & Rx_CH_AV) {
  872. (void)read_zsreg(info->zs_channel, 8);
  873. write_zsreg(info->zs_channel, 0, RES_EXT_INT);
  874. write_zsreg(info->zs_channel, 0, ERR_RES);
  875. }
  876. }
  877. static int setup_scc(struct mac_serial * info)
  878. {
  879. unsigned long flags;
  880. OPNDBG("setting up ttyS%d SCC...\n", info->line);
  881. spin_lock_irqsave(&info->lock, flags);
  882. /* Nice buggy HW ... */
  883. fix_zero_bug_scc(info);
  884. /*
  885. * Reset the chip.
  886. */
  887. write_zsreg(info->zs_channel, 9,
  888. (info->zs_channel == info->zs_chan_a? CHRA: CHRB));
  889. udelay(10);
  890. write_zsreg(info->zs_channel, 9, 0);
  891. /*
  892. * Clear the receive FIFO.
  893. */
  894. ZS_CLEARFIFO(info->zs_channel);
  895. info->xmit_fifo_size = 1;
  896. /*
  897. * Reset DMAs
  898. */
  899. if (info->has_dma)
  900. dma_init(info);
  901. /*
  902. * Clear the interrupt registers.
  903. */
  904. write_zsreg(info->zs_channel, 0, ERR_RES);
  905. write_zsreg(info->zs_channel, 0, RES_H_IUS);
  906. /*
  907. * Turn on RTS and DTR.
  908. */
  909. if (!info->is_irda)
  910. zs_rtsdtr(info, 1);
  911. /*
  912. * Finally, enable sequencing and interrupts
  913. */
  914. if (!info->dma_initted) {
  915. /* interrupt on ext/status changes, all received chars,
  916. transmit ready */
  917. info->curregs[1] = (info->curregs[1] & ~0x18)
  918. | (EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB);
  919. } else {
  920. /* interrupt on ext/status changes, W/Req pin is
  921. receive DMA request */
  922. info->curregs[1] = (info->curregs[1] & ~(0x18 | TxINT_ENAB))
  923. | (EXT_INT_ENAB | WT_RDY_RT | WT_FN_RDYFN);
  924. write_zsreg(info->zs_channel, 1, info->curregs[1]);
  925. /* enable W/Req pin */
  926. info->curregs[1] |= WT_RDY_ENAB;
  927. write_zsreg(info->zs_channel, 1, info->curregs[1]);
  928. /* enable interrupts on transmit ready and receive errors */
  929. info->curregs[1] |= INT_ERR_Rx | TxINT_ENAB;
  930. }
  931. info->pendregs[1] = info->curregs[1];
  932. info->curregs[3] |= (RxENABLE | Rx8);
  933. info->pendregs[3] = info->curregs[3];
  934. info->curregs[5] |= (TxENAB | Tx8);
  935. info->pendregs[5] = info->curregs[5];
  936. info->curregs[9] |= (NV | MIE);
  937. info->pendregs[9] = info->curregs[9];
  938. write_zsreg(info->zs_channel, 3, info->curregs[3]);
  939. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  940. write_zsreg(info->zs_channel, 9, info->curregs[9]);
  941. if (info->tty)
  942. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  943. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  944. spin_unlock_irqrestore(&info->lock, flags);
  945. /*
  946. * Set the speed of the serial port
  947. */
  948. change_speed(info, 0);
  949. /* Save the current value of RR0 */
  950. info->read_reg_zero = read_zsreg(info->zs_channel, 0);
  951. if (info->dma_initted) {
  952. spin_lock_irqsave(&info->rx_dma_lock, flags);
  953. rxdma_start(info, 0);
  954. info->poll_dma_timer.expires = RX_DMA_TIMER;
  955. add_timer(&info->poll_dma_timer);
  956. spin_unlock_irqrestore(&info->rx_dma_lock, flags);
  957. }
  958. return 0;
  959. }
  960. /*
  961. * This routine will shutdown a serial port; interrupts are disabled, and
  962. * DTR is dropped if the hangup on close termio flag is on.
  963. */
  964. static void shutdown(struct mac_serial * info)
  965. {
  966. OPNDBG("Shutting down serial port %d (irq %d)....\n", info->line,
  967. info->irq);
  968. if (!(info->flags & ZILOG_INITIALIZED)) {
  969. OPNDBG("(already shutdown)\n");
  970. return;
  971. }
  972. if (info->has_dma) {
  973. del_timer(&info->poll_dma_timer);
  974. dbdma_reset(info->tx_dma);
  975. dbdma_reset(&info->rx->dma);
  976. disable_irq(info->tx_dma_irq);
  977. disable_irq(info->rx_dma_irq);
  978. }
  979. disable_irq(info->irq);
  980. info->pendregs[1] = info->curregs[1] = 0;
  981. write_zsreg(info->zs_channel, 1, 0); /* no interrupts */
  982. info->curregs[3] &= ~RxENABLE;
  983. info->pendregs[3] = info->curregs[3];
  984. write_zsreg(info->zs_channel, 3, info->curregs[3]);
  985. info->curregs[5] &= ~TxENAB;
  986. if (!info->tty || C_HUPCL(info->tty))
  987. info->curregs[5] &= ~DTR;
  988. info->pendregs[5] = info->curregs[5];
  989. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  990. if (info->tty)
  991. set_bit(TTY_IO_ERROR, &info->tty->flags);
  992. set_scc_power(info, 0);
  993. if (info->xmit_buf) {
  994. free_page((unsigned long) info->xmit_buf);
  995. info->xmit_buf = 0;
  996. }
  997. if (info->has_dma && info->dma_priv) {
  998. kfree(info->dma_priv);
  999. info->dma_priv = NULL;
  1000. info->dma_initted = 0;
  1001. }
  1002. memset(info->curregs, 0, sizeof(info->curregs));
  1003. memset(info->pendregs, 0, sizeof(info->pendregs));
  1004. info->flags &= ~ZILOG_INITIALIZED;
  1005. }
  1006. /*
  1007. * Turn power on or off to the SCC and associated stuff
  1008. * (port drivers, modem, IR port, etc.)
  1009. * Returns the number of milliseconds we should wait before
  1010. * trying to use the port.
  1011. */
  1012. static int set_scc_power(struct mac_serial * info, int state)
  1013. {
  1014. int delay = 0;
  1015. if (state) {
  1016. PWRDBG("ttyS%d: powering up hardware\n", info->line);
  1017. pmac_call_feature(
  1018. PMAC_FTR_SCC_ENABLE,
  1019. info->dev_node, info->port_type, 1);
  1020. if (info->is_internal_modem) {
  1021. pmac_call_feature(
  1022. PMAC_FTR_MODEM_ENABLE,
  1023. info->dev_node, 0, 1);
  1024. delay = 2500; /* wait for 2.5s before using */
  1025. } else if (info->is_irda)
  1026. mdelay(50); /* Do better here once the problems
  1027. * with blocking have been ironed out
  1028. */
  1029. } else {
  1030. /* TODO: Make that depend on a timer, don't power down
  1031. * immediately
  1032. */
  1033. PWRDBG("ttyS%d: shutting down hardware\n", info->line);
  1034. if (info->is_internal_modem) {
  1035. PWRDBG("ttyS%d: shutting down modem\n", info->line);
  1036. pmac_call_feature(
  1037. PMAC_FTR_MODEM_ENABLE,
  1038. info->dev_node, 0, 0);
  1039. }
  1040. pmac_call_feature(
  1041. PMAC_FTR_SCC_ENABLE,
  1042. info->dev_node, info->port_type, 0);
  1043. }
  1044. return delay;
  1045. }
  1046. static void irda_rts_pulses(struct mac_serial *info, int w)
  1047. {
  1048. udelay(w);
  1049. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB);
  1050. udelay(2);
  1051. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
  1052. udelay(8);
  1053. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB);
  1054. udelay(4);
  1055. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
  1056. }
  1057. /*
  1058. * Set the irda codec on the imac to the specified baud rate.
  1059. */
  1060. static void irda_setup(struct mac_serial *info)
  1061. {
  1062. int code, speed, t;
  1063. speed = info->tty->termios->c_cflag & CBAUD;
  1064. if (speed < B2400 || speed > B115200)
  1065. return;
  1066. code = 0x4d + B115200 - speed;
  1067. /* disable serial interrupts and receive DMA */
  1068. write_zsreg(info->zs_channel, 1, info->curregs[1] & ~0x9f);
  1069. /* wait for transmitter to drain */
  1070. t = 10000;
  1071. while ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0
  1072. || (read_zsreg(info->zs_channel, 1) & ALL_SNT) == 0) {
  1073. if (--t <= 0) {
  1074. printk(KERN_ERR "transmitter didn't drain\n");
  1075. return;
  1076. }
  1077. udelay(10);
  1078. }
  1079. udelay(100);
  1080. /* set to 8 bits, no parity, 19200 baud, RTS on, DTR off */
  1081. write_zsreg(info->zs_channel, 4, X16CLK | SB1);
  1082. write_zsreg(info->zs_channel, 11, TCBR | RCBR);
  1083. t = BPS_TO_BRG(19200, ZS_CLOCK/16);
  1084. write_zsreg(info->zs_channel, 12, t);
  1085. write_zsreg(info->zs_channel, 13, t >> 8);
  1086. write_zsreg(info->zs_channel, 14, BRENABL);
  1087. write_zsreg(info->zs_channel, 3, Rx8 | RxENABLE);
  1088. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
  1089. /* set TxD low for ~104us and pulse RTS */
  1090. udelay(1000);
  1091. write_zsdata(info->zs_channel, 0xfe);
  1092. irda_rts_pulses(info, 150);
  1093. irda_rts_pulses(info, 180);
  1094. irda_rts_pulses(info, 50);
  1095. udelay(100);
  1096. /* assert DTR, wait 30ms, talk to the chip */
  1097. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS | DTR);
  1098. mdelay(30);
  1099. while (read_zsreg(info->zs_channel, 0) & Rx_CH_AV)
  1100. read_zsdata(info->zs_channel);
  1101. write_zsdata(info->zs_channel, 1);
  1102. t = 1000;
  1103. while ((read_zsreg(info->zs_channel, 0) & Rx_CH_AV) == 0) {
  1104. if (--t <= 0) {
  1105. printk(KERN_ERR "irda_setup timed out on 1st byte\n");
  1106. goto out;
  1107. }
  1108. udelay(10);
  1109. }
  1110. t = read_zsdata(info->zs_channel);
  1111. if (t != 4)
  1112. printk(KERN_ERR "irda_setup 1st byte = %x\n", t);
  1113. write_zsdata(info->zs_channel, code);
  1114. t = 1000;
  1115. while ((read_zsreg(info->zs_channel, 0) & Rx_CH_AV) == 0) {
  1116. if (--t <= 0) {
  1117. printk(KERN_ERR "irda_setup timed out on 2nd byte\n");
  1118. goto out;
  1119. }
  1120. udelay(10);
  1121. }
  1122. t = read_zsdata(info->zs_channel);
  1123. if (t != code)
  1124. printk(KERN_ERR "irda_setup 2nd byte = %x (%x)\n", t, code);
  1125. /* Drop DTR again and do some more RTS pulses */
  1126. out:
  1127. udelay(100);
  1128. write_zsreg(info->zs_channel, 5, Tx8 | TxENAB | RTS);
  1129. irda_rts_pulses(info, 80);
  1130. /* We should be right to go now. We assume that load_zsregs
  1131. will get called soon to load up the correct baud rate etc. */
  1132. info->curregs[5] = (info->curregs[5] | RTS) & ~DTR;
  1133. info->pendregs[5] = info->curregs[5];
  1134. }
  1135. /*
  1136. * This routine is called to set the UART divisor registers to match
  1137. * the specified baud rate for a serial port.
  1138. */
  1139. static void change_speed(struct mac_serial *info, struct termios *old_termios)
  1140. {
  1141. unsigned cflag;
  1142. int bits;
  1143. int brg, baud;
  1144. unsigned long flags;
  1145. if (!info->tty || !info->tty->termios)
  1146. return;
  1147. cflag = info->tty->termios->c_cflag;
  1148. baud = tty_get_baud_rate(info->tty);
  1149. if (baud == 0) {
  1150. if (old_termios) {
  1151. info->tty->termios->c_cflag &= ~CBAUD;
  1152. info->tty->termios->c_cflag |= (old_termios->c_cflag & CBAUD);
  1153. cflag = info->tty->termios->c_cflag;
  1154. baud = tty_get_baud_rate(info->tty);
  1155. }
  1156. else
  1157. baud = info->zs_baud;
  1158. }
  1159. if (baud > 230400)
  1160. baud = 230400;
  1161. else if (baud == 0)
  1162. baud = 38400;
  1163. spin_lock_irqsave(&info->lock, flags);
  1164. info->zs_baud = baud;
  1165. info->clk_divisor = 16;
  1166. BAUDBG(KERN_DEBUG "set speed to %d bds, ", baud);
  1167. switch (baud) {
  1168. case ZS_CLOCK/16: /* 230400 */
  1169. info->curregs[4] = X16CLK;
  1170. info->curregs[11] = 0;
  1171. break;
  1172. case ZS_CLOCK/32: /* 115200 */
  1173. info->curregs[4] = X32CLK;
  1174. info->curregs[11] = 0;
  1175. break;
  1176. default:
  1177. info->curregs[4] = X16CLK;
  1178. info->curregs[11] = TCBR | RCBR;
  1179. brg = BPS_TO_BRG(baud, ZS_CLOCK/info->clk_divisor);
  1180. info->curregs[12] = (brg & 255);
  1181. info->curregs[13] = ((brg >> 8) & 255);
  1182. info->curregs[14] = BRENABL;
  1183. }
  1184. /* byte size and parity */
  1185. info->curregs[3] &= ~RxNBITS_MASK;
  1186. info->curregs[5] &= ~TxNBITS_MASK;
  1187. switch (cflag & CSIZE) {
  1188. case CS5:
  1189. info->curregs[3] |= Rx5;
  1190. info->curregs[5] |= Tx5;
  1191. BAUDBG("5 bits, ");
  1192. bits = 7;
  1193. break;
  1194. case CS6:
  1195. info->curregs[3] |= Rx6;
  1196. info->curregs[5] |= Tx6;
  1197. BAUDBG("6 bits, ");
  1198. bits = 8;
  1199. break;
  1200. case CS7:
  1201. info->curregs[3] |= Rx7;
  1202. info->curregs[5] |= Tx7;
  1203. BAUDBG("7 bits, ");
  1204. bits = 9;
  1205. break;
  1206. case CS8:
  1207. default: /* defaults to 8 bits */
  1208. info->curregs[3] |= Rx8;
  1209. info->curregs[5] |= Tx8;
  1210. BAUDBG("8 bits, ");
  1211. bits = 10;
  1212. break;
  1213. }
  1214. info->pendregs[3] = info->curregs[3];
  1215. info->pendregs[5] = info->curregs[5];
  1216. info->curregs[4] &= ~(SB_MASK | PAR_ENA | PAR_EVEN);
  1217. if (cflag & CSTOPB) {
  1218. info->curregs[4] |= SB2;
  1219. bits++;
  1220. BAUDBG("2 stop, ");
  1221. } else {
  1222. info->curregs[4] |= SB1;
  1223. BAUDBG("1 stop, ");
  1224. }
  1225. if (cflag & PARENB) {
  1226. bits++;
  1227. info->curregs[4] |= PAR_ENA;
  1228. BAUDBG("parity, ");
  1229. }
  1230. if (!(cflag & PARODD)) {
  1231. info->curregs[4] |= PAR_EVEN;
  1232. }
  1233. info->pendregs[4] = info->curregs[4];
  1234. if (!(cflag & CLOCAL)) {
  1235. if (!(info->curregs[15] & DCDIE))
  1236. info->read_reg_zero = read_zsreg(info->zs_channel, 0);
  1237. info->curregs[15] |= DCDIE;
  1238. } else
  1239. info->curregs[15] &= ~DCDIE;
  1240. if (cflag & CRTSCTS) {
  1241. info->curregs[15] |= CTSIE;
  1242. if ((read_zsreg(info->zs_channel, 0) & CTS) != 0)
  1243. info->tx_stopped = 1;
  1244. } else {
  1245. info->curregs[15] &= ~CTSIE;
  1246. info->tx_stopped = 0;
  1247. }
  1248. info->pendregs[15] = info->curregs[15];
  1249. /* Calc timeout value. This is pretty broken with high baud rates with HZ=100.
  1250. This code would love a larger HZ and a >1 fifo size, but this is not
  1251. a priority. The resulting value must be >HZ/2
  1252. */
  1253. info->timeout = ((info->xmit_fifo_size*HZ*bits) / baud);
  1254. info->timeout += HZ/50+1; /* Add .02 seconds of slop */
  1255. BAUDBG("timeout=%d/%ds, base:%d\n", (int)info->timeout, (int)HZ,
  1256. (int)info->baud_base);
  1257. /* set the irda codec to the right rate */
  1258. if (info->is_irda)
  1259. irda_setup(info);
  1260. /* Load up the new values */
  1261. load_zsregs(info->zs_channel, info->curregs);
  1262. spin_unlock_irqrestore(&info->lock, flags);
  1263. }
  1264. static void rs_flush_chars(struct tty_struct *tty)
  1265. {
  1266. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1267. unsigned long flags;
  1268. if (serial_paranoia_check(info, tty->name, "rs_flush_chars"))
  1269. return;
  1270. spin_lock_irqsave(&info->lock, flags);
  1271. if (!(info->xmit_cnt <= 0 || tty->stopped || info->tx_stopped ||
  1272. !info->xmit_buf))
  1273. /* Enable transmitter */
  1274. transmit_chars(info);
  1275. spin_unlock_irqrestore(&info->lock, flags);
  1276. }
  1277. static int rs_write(struct tty_struct * tty,
  1278. const unsigned char *buf, int count)
  1279. {
  1280. int c, ret = 0;
  1281. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1282. unsigned long flags;
  1283. if (serial_paranoia_check(info, tty->name, "rs_write"))
  1284. return 0;
  1285. if (!tty || !info->xmit_buf || !tmp_buf)
  1286. return 0;
  1287. while (1) {
  1288. spin_lock_irqsave(&info->lock, flags);
  1289. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  1290. SERIAL_XMIT_SIZE - info->xmit_head));
  1291. if (c <= 0) {
  1292. spin_unlock_irqrestore(&info->lock, flags);
  1293. break;
  1294. }
  1295. memcpy(info->xmit_buf + info->xmit_head, buf, c);
  1296. info->xmit_head = ((info->xmit_head + c) &
  1297. (SERIAL_XMIT_SIZE-1));
  1298. info->xmit_cnt += c;
  1299. spin_unlock_irqrestore(&info->lock, flags);
  1300. buf += c;
  1301. count -= c;
  1302. ret += c;
  1303. }
  1304. spin_lock_irqsave(&info->lock, flags);
  1305. if (info->xmit_cnt && !tty->stopped && !info->tx_stopped
  1306. && !info->tx_active)
  1307. transmit_chars(info);
  1308. spin_unlock_irqrestore(&info->lock, flags);
  1309. return ret;
  1310. }
  1311. static int rs_write_room(struct tty_struct *tty)
  1312. {
  1313. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1314. int ret;
  1315. if (serial_paranoia_check(info, tty->name, "rs_write_room"))
  1316. return 0;
  1317. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1318. if (ret < 0)
  1319. ret = 0;
  1320. return ret;
  1321. }
  1322. static int rs_chars_in_buffer(struct tty_struct *tty)
  1323. {
  1324. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1325. if (serial_paranoia_check(info, tty->name, "rs_chars_in_buffer"))
  1326. return 0;
  1327. return info->xmit_cnt;
  1328. }
  1329. static void rs_flush_buffer(struct tty_struct *tty)
  1330. {
  1331. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1332. unsigned long flags;
  1333. if (serial_paranoia_check(info, tty->name, "rs_flush_buffer"))
  1334. return;
  1335. spin_lock_irqsave(&info->lock, flags);
  1336. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  1337. spin_unlock_irqrestore(&info->lock, flags);
  1338. tty_wakeup(tty);
  1339. }
  1340. /*
  1341. * ------------------------------------------------------------
  1342. * rs_throttle()
  1343. *
  1344. * This routine is called by the upper-layer tty layer to signal that
  1345. * incoming characters should be throttled.
  1346. * ------------------------------------------------------------
  1347. */
  1348. static void rs_throttle(struct tty_struct * tty)
  1349. {
  1350. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1351. unsigned long flags;
  1352. #ifdef SERIAL_DEBUG_THROTTLE
  1353. printk(KERN_DEBUG "throttle %ld....\n",tty->ldisc.chars_in_buffer(tty));
  1354. #endif
  1355. if (serial_paranoia_check(info, tty->name, "rs_throttle"))
  1356. return;
  1357. if (I_IXOFF(tty)) {
  1358. spin_lock_irqsave(&info->lock, flags);
  1359. info->x_char = STOP_CHAR(tty);
  1360. if (!info->tx_active)
  1361. transmit_chars(info);
  1362. spin_unlock_irqrestore(&info->lock, flags);
  1363. }
  1364. if (C_CRTSCTS(tty)) {
  1365. /*
  1366. * Here we want to turn off the RTS line. On Macintoshes,
  1367. * the external serial ports using a DIN-8 or DIN-9
  1368. * connector only have the DTR line (which is usually
  1369. * wired to both RTS and DTR on an external modem in
  1370. * the cable). RTS doesn't go out to the serial port
  1371. * socket, it acts as an output enable for the transmit
  1372. * data line. So in this case we don't drop RTS.
  1373. *
  1374. * Macs with internal modems generally do have both RTS
  1375. * and DTR wired to the modem, so in that case we do
  1376. * drop RTS.
  1377. */
  1378. if (info->is_internal_modem) {
  1379. spin_lock_irqsave(&info->lock, flags);
  1380. info->curregs[5] &= ~RTS;
  1381. info->pendregs[5] &= ~RTS;
  1382. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  1383. spin_unlock_irqrestore(&info->lock, flags);
  1384. }
  1385. }
  1386. #ifdef CDTRCTS
  1387. if (tty->termios->c_cflag & CDTRCTS) {
  1388. spin_lock_irqsave(&info->lock, flags);
  1389. info->curregs[5] &= ~DTR;
  1390. info->pendregs[5] &= ~DTR;
  1391. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  1392. spin_unlock_irqrestore(&info->lock, flags);
  1393. }
  1394. #endif /* CDTRCTS */
  1395. }
  1396. static void rs_unthrottle(struct tty_struct * tty)
  1397. {
  1398. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1399. unsigned long flags;
  1400. #ifdef SERIAL_DEBUG_THROTTLE
  1401. printk(KERN_DEBUG "unthrottle %s: %d....\n",
  1402. tty->ldisc.chars_in_buffer(tty));
  1403. #endif
  1404. if (serial_paranoia_check(info, tty->name, "rs_unthrottle"))
  1405. return;
  1406. if (I_IXOFF(tty)) {
  1407. spin_lock_irqsave(&info->lock, flags);
  1408. if (info->x_char)
  1409. info->x_char = 0;
  1410. else {
  1411. info->x_char = START_CHAR(tty);
  1412. if (!info->tx_active)
  1413. transmit_chars(info);
  1414. }
  1415. spin_unlock_irqrestore(&info->lock, flags);
  1416. }
  1417. if (C_CRTSCTS(tty) && info->is_internal_modem) {
  1418. /* Assert RTS line */
  1419. spin_lock_irqsave(&info->lock, flags);
  1420. info->curregs[5] |= RTS;
  1421. info->pendregs[5] |= RTS;
  1422. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  1423. spin_unlock_irqrestore(&info->lock, flags);
  1424. }
  1425. #ifdef CDTRCTS
  1426. if (tty->termios->c_cflag & CDTRCTS) {
  1427. /* Assert DTR line */
  1428. spin_lock_irqsave(&info->lock, flags);
  1429. info->curregs[5] |= DTR;
  1430. info->pendregs[5] |= DTR;
  1431. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  1432. spin_unlock_irqrestore(&info->lock, flags);
  1433. }
  1434. #endif
  1435. }
  1436. /*
  1437. * ------------------------------------------------------------
  1438. * rs_ioctl() and friends
  1439. * ------------------------------------------------------------
  1440. */
  1441. static int get_serial_info(struct mac_serial * info,
  1442. struct serial_struct __user * retinfo)
  1443. {
  1444. struct serial_struct tmp;
  1445. if (!retinfo)
  1446. return -EFAULT;
  1447. memset(&tmp, 0, sizeof(tmp));
  1448. tmp.type = info->type;
  1449. tmp.line = info->line;
  1450. tmp.port = info->port;
  1451. tmp.irq = info->irq;
  1452. tmp.flags = info->flags;
  1453. tmp.baud_base = info->baud_base;
  1454. tmp.close_delay = info->close_delay;
  1455. tmp.closing_wait = info->closing_wait;
  1456. tmp.custom_divisor = info->custom_divisor;
  1457. if (copy_to_user(retinfo,&tmp,sizeof(*retinfo)))
  1458. return -EFAULT;
  1459. return 0;
  1460. }
  1461. static int set_serial_info(struct mac_serial * info,
  1462. struct serial_struct __user * new_info)
  1463. {
  1464. struct serial_struct new_serial;
  1465. struct mac_serial old_info;
  1466. int retval = 0;
  1467. if (copy_from_user(&new_serial,new_info,sizeof(new_serial)))
  1468. return -EFAULT;
  1469. old_info = *info;
  1470. if (!capable(CAP_SYS_ADMIN)) {
  1471. if ((new_serial.baud_base != info->baud_base) ||
  1472. (new_serial.type != info->type) ||
  1473. (new_serial.close_delay != info->close_delay) ||
  1474. ((new_serial.flags & ~ZILOG_USR_MASK) !=
  1475. (info->flags & ~ZILOG_USR_MASK)))
  1476. return -EPERM;
  1477. info->flags = ((info->flags & ~ZILOG_USR_MASK) |
  1478. (new_serial.flags & ZILOG_USR_MASK));
  1479. info->custom_divisor = new_serial.custom_divisor;
  1480. goto check_and_exit;
  1481. }
  1482. if (info->count > 1)
  1483. return -EBUSY;
  1484. /*
  1485. * OK, past this point, all the error checking has been done.
  1486. * At this point, we start making changes.....
  1487. */
  1488. info->baud_base = new_serial.baud_base;
  1489. info->flags = ((info->flags & ~ZILOG_FLAGS) |
  1490. (new_serial.flags & ZILOG_FLAGS));
  1491. info->type = new_serial.type;
  1492. info->close_delay = new_serial.close_delay;
  1493. info->closing_wait = new_serial.closing_wait;
  1494. check_and_exit:
  1495. if (info->flags & ZILOG_INITIALIZED)
  1496. retval = setup_scc(info);
  1497. return retval;
  1498. }
  1499. /*
  1500. * get_lsr_info - get line status register info
  1501. *
  1502. * Purpose: Let user call ioctl() to get info when the UART physically
  1503. * is emptied. On bus types like RS485, the transmitter must
  1504. * release the bus after transmitting. This must be done when
  1505. * the transmit shift register is empty, not be done when the
  1506. * transmit holding register is empty. This functionality
  1507. * allows an RS485 driver to be written in user space.
  1508. */
  1509. static int get_lsr_info(struct mac_serial * info, unsigned int *value)
  1510. {
  1511. unsigned char status;
  1512. unsigned long flags;
  1513. spin_lock_irqsave(&info->lock, flags);
  1514. status = read_zsreg(info->zs_channel, 0);
  1515. spin_unlock_irqrestore(&info->lock, flags);
  1516. status = (status & Tx_BUF_EMP)? TIOCSER_TEMT: 0;
  1517. return put_user(status,value);
  1518. }
  1519. static int rs_tiocmget(struct tty_struct *tty, struct file *file)
  1520. {
  1521. struct mac_serial * info = (struct mac_serial *)tty->driver_data;
  1522. unsigned char control, status;
  1523. unsigned long flags;
  1524. #ifdef CONFIG_KGDB
  1525. if (info->kgdb_channel)
  1526. return -ENODEV;
  1527. #endif
  1528. if (serial_paranoia_check(info, tty->name, __FUNCTION__))
  1529. return -ENODEV;
  1530. if (tty->flags & (1 << TTY_IO_ERROR))
  1531. return -EIO;
  1532. spin_lock_irqsave(&info->lock, flags);
  1533. control = info->curregs[5];
  1534. status = read_zsreg(info->zs_channel, 0);
  1535. spin_unlock_irqrestore(&info->lock, flags);
  1536. return ((control & RTS) ? TIOCM_RTS: 0)
  1537. | ((control & DTR) ? TIOCM_DTR: 0)
  1538. | ((status & DCD) ? TIOCM_CAR: 0)
  1539. | ((status & CTS) ? 0: TIOCM_CTS);
  1540. }
  1541. static int rs_tiocmset(struct tty_struct *tty, struct file *file,
  1542. unsigned int set, unsigned int clear)
  1543. {
  1544. struct mac_serial * info = (struct mac_serial *)tty->driver_data;
  1545. unsigned int arg, bits;
  1546. unsigned long flags;
  1547. #ifdef CONFIG_KGDB
  1548. if (info->kgdb_channel)
  1549. return -ENODEV;
  1550. #endif
  1551. if (serial_paranoia_check(info, tty->name, __FUNCTION__))
  1552. return -ENODEV;
  1553. if (tty->flags & (1 << TTY_IO_ERROR))
  1554. return -EIO;
  1555. spin_lock_irqsave(&info->lock, flags);
  1556. if (set & TIOCM_RTS)
  1557. info->curregs[5] |= RTS;
  1558. if (set & TIOCM_DTR)
  1559. info->curregs[5] |= DTR;
  1560. if (clear & TIOCM_RTS)
  1561. info->curregs[5] &= ~RTS;
  1562. if (clear & TIOCM_DTR)
  1563. info->curregs[5] &= ~DTR;
  1564. info->pendregs[5] = info->curregs[5];
  1565. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  1566. spin_unlock_irqrestore(&info->lock, flags);
  1567. return 0;
  1568. }
  1569. /*
  1570. * rs_break - turn transmit break condition on/off
  1571. */
  1572. static void rs_break(struct tty_struct *tty, int break_state)
  1573. {
  1574. struct mac_serial *info = (struct mac_serial *) tty->driver_data;
  1575. unsigned long flags;
  1576. if (serial_paranoia_check(info, tty->name, "rs_break"))
  1577. return;
  1578. spin_lock_irqsave(&info->lock, flags);
  1579. if (break_state == -1)
  1580. info->curregs[5] |= SND_BRK;
  1581. else
  1582. info->curregs[5] &= ~SND_BRK;
  1583. write_zsreg(info->zs_channel, 5, info->curregs[5]);
  1584. spin_unlock_irqrestore(&info->lock, flags);
  1585. }
  1586. static int rs_ioctl(struct tty_struct *tty, struct file * file,
  1587. unsigned int cmd, unsigned long arg)
  1588. {
  1589. struct mac_serial * info = (struct mac_serial *)tty->driver_data;
  1590. #ifdef CONFIG_KGDB
  1591. if (info->kgdb_channel)
  1592. return -ENODEV;
  1593. #endif
  1594. if (serial_paranoia_check(info, tty->name, "rs_ioctl"))
  1595. return -ENODEV;
  1596. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1597. (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGSTRUCT)) {
  1598. if (tty->flags & (1 << TTY_IO_ERROR))
  1599. return -EIO;
  1600. }
  1601. switch (cmd) {
  1602. case TIOCGSERIAL:
  1603. return get_serial_info(info,
  1604. (struct serial_struct __user *) arg);
  1605. case TIOCSSERIAL:
  1606. return set_serial_info(info,
  1607. (struct serial_struct __user *) arg);
  1608. case TIOCSERGETLSR: /* Get line status register */
  1609. return get_lsr_info(info, (unsigned int *) arg);
  1610. case TIOCSERGSTRUCT:
  1611. if (copy_to_user((struct mac_serial __user *) arg,
  1612. info, sizeof(struct mac_serial)))
  1613. return -EFAULT;
  1614. return 0;
  1615. default:
  1616. return -ENOIOCTLCMD;
  1617. }
  1618. return 0;
  1619. }
  1620. static void rs_set_termios(struct tty_struct *tty, struct termios *old_termios)
  1621. {
  1622. struct mac_serial *info = (struct mac_serial *)tty->driver_data;
  1623. int was_stopped;
  1624. if (tty->termios->c_cflag == old_termios->c_cflag)
  1625. return;
  1626. was_stopped = info->tx_stopped;
  1627. change_speed(info, old_termios);
  1628. if (was_stopped && !info->tx_stopped) {
  1629. tty->hw_stopped = 0;
  1630. rs_start(tty);
  1631. }
  1632. }
  1633. /*
  1634. * ------------------------------------------------------------
  1635. * rs_close()
  1636. *
  1637. * This routine is called when the serial port gets closed.
  1638. * Wait for the last remaining data to be sent.
  1639. * ------------------------------------------------------------
  1640. */
  1641. static void rs_close(struct tty_struct *tty, struct file * filp)
  1642. {
  1643. struct mac_serial * info = (struct mac_serial *)tty->driver_data;
  1644. unsigned long flags;
  1645. if (!info || serial_paranoia_check(info, tty->name, "rs_close"))
  1646. return;
  1647. spin_lock_irqsave(&info->lock, flags);
  1648. if (tty_hung_up_p(filp)) {
  1649. spin_unlock_irqrestore(&info->lock, flags);
  1650. return;
  1651. }
  1652. OPNDBG("rs_close ttyS%d, count = %d\n", info->line, info->count);
  1653. if ((tty->count == 1) && (info->count != 1)) {
  1654. /*
  1655. * Uh, oh. tty->count is 1, which means that the tty
  1656. * structure will be freed. Info->count should always
  1657. * be one in these conditions. If it's greater than
  1658. * one, we've got real problems, since it means the
  1659. * serial port won't be shutdown.
  1660. */
  1661. printk(KERN_ERR "rs_close: bad serial port count; tty->count "
  1662. "is 1, info->count is %d\n", info->count);
  1663. info->count = 1;
  1664. }
  1665. if (--info->count < 0) {
  1666. printk(KERN_ERR "rs_close: bad serial port count for "
  1667. "ttyS%d: %d\n", info->line, info->count);
  1668. info->count = 0;
  1669. }
  1670. if (info->count) {
  1671. spin_unlock_irqrestore(&info->lock, flags);
  1672. return;
  1673. }
  1674. info->flags |= ZILOG_CLOSING;
  1675. /*
  1676. * Now we wait for the transmit buffer to clear; and we notify
  1677. * the line discipline to only process XON/XOFF characters.
  1678. */
  1679. OPNDBG("waiting end of Tx... (timeout:%d)\n", info->closing_wait);
  1680. tty->closing = 1;
  1681. if (info->closing_wait != ZILOG_CLOSING_WAIT_NONE) {
  1682. spin_unlock_irqrestore(&info->lock, flags);
  1683. tty_wait_until_sent(tty, info->closing_wait);
  1684. spin_lock_irqsave(&info->lock, flags);
  1685. }
  1686. /*
  1687. * At this point we stop accepting input. To do this, we
  1688. * disable the receiver and receive interrupts.
  1689. */
  1690. info->curregs[3] &= ~RxENABLE;
  1691. info->pendregs[3] = info->curregs[3];
  1692. write_zsreg(info->zs_channel, 3, info->curregs[3]);
  1693. info->curregs[1] &= ~(0x18); /* disable any rx ints */
  1694. info->pendregs[1] = info->curregs[1];
  1695. write_zsreg(info->zs_channel, 1, info->curregs[1]);
  1696. ZS_CLEARFIFO(info->zs_channel);
  1697. if (info->flags & ZILOG_INITIALIZED) {
  1698. /*
  1699. * Before we drop DTR, make sure the SCC transmitter
  1700. * has completely drained.
  1701. */
  1702. OPNDBG("waiting end of Rx...\n");
  1703. spin_unlock_irqrestore(&info->lock, flags);
  1704. rs_wait_until_sent(tty, info->timeout);
  1705. spin_lock_irqsave(&info->lock, flags);
  1706. }
  1707. shutdown(info);
  1708. /* restore flags now since shutdown() will have disabled this port's
  1709. specific irqs */
  1710. spin_unlock_irqrestore(&info->lock, flags);
  1711. if (tty->driver->flush_buffer)
  1712. tty->driver->flush_buffer(tty);
  1713. tty_ldisc_flush(tty);
  1714. tty->closing = 0;
  1715. info->event = 0;
  1716. info->tty = 0;
  1717. if (info->blocked_open) {
  1718. if (info->close_delay) {
  1719. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  1720. }
  1721. wake_up_interruptible(&info->open_wait);
  1722. }
  1723. info->flags &= ~(ZILOG_NORMAL_ACTIVE|ZILOG_CLOSING);
  1724. wake_up_interruptible(&info->close_wait);
  1725. }
  1726. /*
  1727. * rs_wait_until_sent() --- wait until the transmitter is empty
  1728. */
  1729. static void rs_wait_until_sent(struct tty_struct *tty, int timeout)
  1730. {
  1731. struct mac_serial *info = (struct mac_serial *) tty->driver_data;
  1732. unsigned long orig_jiffies, char_time;
  1733. if (serial_paranoia_check(info, tty->name, "rs_wait_until_sent"))
  1734. return;
  1735. /* printk("rs_wait_until_sent, timeout:%d, tty_stopped:%d, tx_stopped:%d\n",
  1736. timeout, tty->stopped, info->tx_stopped);
  1737. */
  1738. orig_jiffies = jiffies;
  1739. /*
  1740. * Set the check interval to be 1/5 of the estimated time to
  1741. * send a single character, and make it at least 1. The check
  1742. * interval should also be less than the timeout.
  1743. */
  1744. if (info->timeout <= HZ/50) {
  1745. printk(KERN_INFO "macserial: invalid info->timeout=%d\n",
  1746. info->timeout);
  1747. info->timeout = HZ/50+1;
  1748. }
  1749. char_time = (info->timeout - HZ/50) / info->xmit_fifo_size;
  1750. char_time = char_time / 5;
  1751. if (char_time > HZ) {
  1752. printk(KERN_WARNING "macserial: char_time %ld >HZ !!!\n",
  1753. char_time);
  1754. char_time = 1;
  1755. } else if (char_time == 0)
  1756. char_time = 1;
  1757. if (timeout)
  1758. char_time = min_t(unsigned long, char_time, timeout);
  1759. while ((read_zsreg(info->zs_channel, 1) & ALL_SNT) == 0) {
  1760. msleep_interruptible(jiffies_to_msecs(char_time));
  1761. if (signal_pending(current))
  1762. break;
  1763. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1764. break;
  1765. }
  1766. current->state = TASK_RUNNING;
  1767. }
  1768. /*
  1769. * rs_hangup() --- called by tty_hangup() when a hangup is signaled.
  1770. */
  1771. static void rs_hangup(struct tty_struct *tty)
  1772. {
  1773. struct mac_serial * info = (struct mac_serial *)tty->driver_data;
  1774. if (serial_paranoia_check(info, tty->name, "rs_hangup"))
  1775. return;
  1776. rs_flush_buffer(tty);
  1777. shutdown(info);
  1778. info->event = 0;
  1779. info->count = 0;
  1780. info->flags &= ~ZILOG_NORMAL_ACTIVE;
  1781. info->tty = 0;
  1782. wake_up_interruptible(&info->open_wait);
  1783. }
  1784. /*
  1785. * ------------------------------------------------------------
  1786. * rs_open() and friends
  1787. * ------------------------------------------------------------
  1788. */
  1789. static int block_til_ready(struct tty_struct *tty, struct file * filp,
  1790. struct mac_serial *info)
  1791. {
  1792. DECLARE_WAITQUEUE(wait,current);
  1793. int retval;
  1794. int do_clocal = 0;
  1795. /*
  1796. * If the device is in the middle of being closed, then block
  1797. * until it's done, and then try again.
  1798. */
  1799. if (info->flags & ZILOG_CLOSING) {
  1800. interruptible_sleep_on(&info->close_wait);
  1801. return -EAGAIN;
  1802. }
  1803. /*
  1804. * If non-blocking mode is set, or the port is not enabled,
  1805. * then make the check up front and then exit.
  1806. */
  1807. if ((filp->f_flags & O_NONBLOCK) ||
  1808. (tty->flags & (1 << TTY_IO_ERROR))) {
  1809. info->flags |= ZILOG_NORMAL_ACTIVE;
  1810. return 0;
  1811. }
  1812. if (tty->termios->c_cflag & CLOCAL)
  1813. do_clocal = 1;
  1814. /*
  1815. * Block waiting for the carrier detect and the line to become
  1816. * free (i.e., not in use by the callout). While we are in
  1817. * this loop, info->count is dropped by one, so that
  1818. * rs_close() knows when to free things. We restore it upon
  1819. * exit, either normal or abnormal.
  1820. */
  1821. retval = 0;
  1822. add_wait_queue(&info->open_wait, &wait);
  1823. OPNDBG("block_til_ready before block: ttyS%d, count = %d\n",
  1824. info->line, info->count);
  1825. spin_lock_irq(&info->lock);
  1826. if (!tty_hung_up_p(filp))
  1827. info->count--;
  1828. spin_unlock_irq(&info->lock);
  1829. info->blocked_open++;
  1830. while (1) {
  1831. spin_lock_irq(&info->lock);
  1832. if ((tty->termios->c_cflag & CBAUD) &&
  1833. !info->is_irda)
  1834. zs_rtsdtr(info, 1);
  1835. spin_unlock_irq(&info->lock);
  1836. set_current_state(TASK_INTERRUPTIBLE);
  1837. if (tty_hung_up_p(filp) ||
  1838. !(info->flags & ZILOG_INITIALIZED)) {
  1839. retval = -EAGAIN;
  1840. break;
  1841. }
  1842. if (!(info->flags & ZILOG_CLOSING) &&
  1843. (do_clocal || (read_zsreg(info->zs_channel, 0) & DCD)))
  1844. break;
  1845. if (signal_pending(current)) {
  1846. retval = -ERESTARTSYS;
  1847. break;
  1848. }
  1849. OPNDBG("block_til_ready blocking: ttyS%d, count = %d\n",
  1850. info->line, info->count);
  1851. schedule();
  1852. }
  1853. current->state = TASK_RUNNING;
  1854. remove_wait_queue(&info->open_wait, &wait);
  1855. if (!tty_hung_up_p(filp))
  1856. info->count++;
  1857. info->blocked_open--;
  1858. OPNDBG("block_til_ready after blocking: ttyS%d, count = %d\n",
  1859. info->line, info->count);
  1860. if (retval)
  1861. return retval;
  1862. info->flags |= ZILOG_NORMAL_ACTIVE;
  1863. return 0;
  1864. }
  1865. /*
  1866. * This routine is called whenever a serial port is opened. It
  1867. * enables interrupts for a serial port, linking in its ZILOG structure into
  1868. * the IRQ chain. It also performs the serial-specific
  1869. * initialization for the tty structure.
  1870. */
  1871. static int rs_open(struct tty_struct *tty, struct file * filp)
  1872. {
  1873. struct mac_serial *info;
  1874. int retval, line;
  1875. unsigned long page;
  1876. line = tty->index;
  1877. if ((line < 0) || (line >= zs_channels_found)) {
  1878. return -ENODEV;
  1879. }
  1880. info = zs_soft + line;
  1881. #ifdef CONFIG_KGDB
  1882. if (info->kgdb_channel) {
  1883. return -ENODEV;
  1884. }
  1885. #endif
  1886. if (serial_paranoia_check(info, tty->name, "rs_open"))
  1887. return -ENODEV;
  1888. OPNDBG("rs_open %s, count = %d, tty=%p\n", tty->name,
  1889. info->count, tty);
  1890. info->count++;
  1891. tty->driver_data = info;
  1892. info->tty = tty;
  1893. if (!tmp_buf) {
  1894. page = get_zeroed_page(GFP_KERNEL);
  1895. if (!page)
  1896. return -ENOMEM;
  1897. if (tmp_buf)
  1898. free_page(page);
  1899. else
  1900. tmp_buf = (unsigned char *) page;
  1901. }
  1902. /*
  1903. * If the port is the middle of closing, bail out now
  1904. */
  1905. if (tty_hung_up_p(filp) ||
  1906. (info->flags & ZILOG_CLOSING)) {
  1907. if (info->flags & ZILOG_CLOSING)
  1908. interruptible_sleep_on(&info->close_wait);
  1909. return -EAGAIN;
  1910. }
  1911. /*
  1912. * Start up serial port
  1913. */
  1914. retval = startup(info);
  1915. if (retval)
  1916. return retval;
  1917. retval = block_til_ready(tty, filp, info);
  1918. if (retval) {
  1919. OPNDBG("rs_open returning after block_til_ready with %d\n",
  1920. retval);
  1921. return retval;
  1922. }
  1923. #ifdef CONFIG_SERIAL_CONSOLE
  1924. if (sercons.cflag && sercons.index == line) {
  1925. tty->termios->c_cflag = sercons.cflag;
  1926. sercons.cflag = 0;
  1927. change_speed(info, 0);
  1928. }
  1929. #endif
  1930. OPNDBG("rs_open %s successful...\n", tty->name);
  1931. return 0;
  1932. }
  1933. /* Finally, routines used to initialize the serial driver. */
  1934. static void show_serial_version(void)
  1935. {
  1936. printk(KERN_INFO "PowerMac Z8530 serial driver version " MACSERIAL_VERSION "\n");
  1937. }
  1938. /*
  1939. * Initialize one channel, both the mac_serial and mac_zschannel
  1940. * structs. We use the dev_node field of the mac_serial struct.
  1941. */
  1942. static int
  1943. chan_init(struct mac_serial *zss, struct mac_zschannel *zs_chan,
  1944. struct mac_zschannel *zs_chan_a)
  1945. {
  1946. struct device_node *ch = zss->dev_node;
  1947. char *conn;
  1948. int len;
  1949. struct slot_names_prop {
  1950. int count;
  1951. char name[1];
  1952. } *slots;
  1953. zss->irq = ch->intrs[0].line;
  1954. zss->has_dma = 0;
  1955. #if !defined(CONFIG_KGDB) && defined(SUPPORT_SERIAL_DMA)
  1956. if (ch->n_addrs >= 3 && ch->n_intrs == 3)
  1957. zss->has_dma = 1;
  1958. #endif
  1959. zss->dma_initted = 0;
  1960. zs_chan->control = (volatile unsigned char *)
  1961. ioremap(ch->addrs[0].address, 0x1000);
  1962. zs_chan->data = zs_chan->control + 0x10;
  1963. spin_lock_init(&zs_chan->lock);
  1964. zs_chan->parent = zss;
  1965. zss->zs_channel = zs_chan;
  1966. zss->zs_chan_a = zs_chan_a;
  1967. /* setup misc varariables */
  1968. zss->kgdb_channel = 0;
  1969. /* For now, we assume you either have a slot-names property
  1970. * with "Modem" in it, or your channel is compatible with
  1971. * "cobalt". Might need additional fixups
  1972. */
  1973. zss->is_internal_modem = device_is_compatible(ch, "cobalt");
  1974. conn = get_property(ch, "AAPL,connector", &len);
  1975. zss->is_irda = conn && (strcmp(conn, "infrared") == 0);
  1976. zss->port_type = PMAC_SCC_ASYNC;
  1977. /* 1999 Powerbook G3 has slot-names property instead */
  1978. slots = (struct slot_names_prop *)get_property(ch, "slot-names", &len);
  1979. if (slots && slots->count > 0) {
  1980. if (strcmp(slots->name, "IrDA") == 0)
  1981. zss->is_irda = 1;
  1982. else if (strcmp(slots->name, "Modem") == 0)
  1983. zss->is_internal_modem = 1;
  1984. }
  1985. if (zss->is_irda)
  1986. zss->port_type = PMAC_SCC_IRDA;
  1987. if (zss->is_internal_modem) {
  1988. struct device_node* i2c_modem = find_devices("i2c-modem");
  1989. if (i2c_modem) {
  1990. char* mid = get_property(i2c_modem, "modem-id", NULL);
  1991. if (mid) switch(*mid) {
  1992. case 0x04 :
  1993. case 0x05 :
  1994. case 0x07 :
  1995. case 0x08 :
  1996. case 0x0b :
  1997. case 0x0c :
  1998. zss->port_type = PMAC_SCC_I2S1;
  1999. }
  2000. printk(KERN_INFO "macserial: i2c-modem detected, id: %d\n",
  2001. mid ? (*mid) : 0);
  2002. } else {
  2003. printk(KERN_INFO "macserial: serial modem detected\n");
  2004. }
  2005. }
  2006. while (zss->has_dma) {
  2007. zss->dma_priv = NULL;
  2008. /* it seems that the last two addresses are the
  2009. DMA controllers */
  2010. zss->tx_dma = (volatile struct dbdma_regs *)
  2011. ioremap(ch->addrs[ch->n_addrs - 2].address, 0x100);
  2012. zss->rx = (volatile struct mac_dma *)
  2013. ioremap(ch->addrs[ch->n_addrs - 1].address, 0x100);
  2014. zss->tx_dma_irq = ch->intrs[1].line;
  2015. zss->rx_dma_irq = ch->intrs[2].line;
  2016. spin_lock_init(&zss->rx_dma_lock);
  2017. break;
  2018. }
  2019. init_timer(&zss->powerup_timer);
  2020. zss->powerup_timer.function = powerup_done;
  2021. zss->powerup_timer.data = (unsigned long) zss;
  2022. return 0;
  2023. }
  2024. /*
  2025. * /proc fs routines. TODO: Add status lines & error stats
  2026. */
  2027. static inline int
  2028. line_info(char *buf, struct mac_serial *info)
  2029. {
  2030. int ret=0;
  2031. unsigned char* connector;
  2032. int lenp;
  2033. ret += sprintf(buf, "%d: port:0x%X irq:%d", info->line, info->port, info->irq);
  2034. connector = get_property(info->dev_node, "AAPL,connector", &lenp);
  2035. if (connector)
  2036. ret+=sprintf(buf+ret," con:%s ", connector);
  2037. if (info->is_internal_modem) {
  2038. if (!connector)
  2039. ret+=sprintf(buf+ret," con:");
  2040. ret+=sprintf(buf+ret,"%s", " (internal modem)");
  2041. }
  2042. if (info->is_irda) {
  2043. if (!connector)
  2044. ret+=sprintf(buf+ret," con:");
  2045. ret+=sprintf(buf+ret,"%s", " (IrDA)");
  2046. }
  2047. ret+=sprintf(buf+ret,"\n");
  2048. return ret;
  2049. }
  2050. int macserial_read_proc(char *page, char **start, off_t off, int count,
  2051. int *eof, void *data)
  2052. {
  2053. int l, len = 0;
  2054. off_t begin = 0;
  2055. struct mac_serial *info;
  2056. len += sprintf(page, "serinfo:1.0 driver:" MACSERIAL_VERSION "\n");
  2057. for (info = zs_chain; info && len < 4000; info = info->zs_next) {
  2058. l = line_info(page + len, info);
  2059. len += l;
  2060. if (len+begin > off+count)
  2061. goto done;
  2062. if (len+begin < off) {
  2063. begin += len;
  2064. len = 0;
  2065. }
  2066. }
  2067. *eof = 1;
  2068. done:
  2069. if (off >= len+begin)
  2070. return 0;
  2071. *start = page + (off-begin);
  2072. return ((count < begin+len-off) ? count : begin+len-off);
  2073. }
  2074. /* Ask the PROM how many Z8530s we have and initialize their zs_channels */
  2075. static void
  2076. probe_sccs(void)
  2077. {
  2078. struct device_node *dev, *ch;
  2079. struct mac_serial **pp;
  2080. int n, chip, nchan;
  2081. struct mac_zschannel *zs_chan;
  2082. int chan_a_index;
  2083. n = 0;
  2084. pp = &zs_chain;
  2085. zs_chan = zs_channels;
  2086. for (dev = find_devices("escc"); dev != 0; dev = dev->next) {
  2087. nchan = 0;
  2088. chip = n;
  2089. if (n >= NUM_CHANNELS) {
  2090. printk(KERN_WARNING "Sorry, can't use %s: no more "
  2091. "channels\n", dev->full_name);
  2092. continue;
  2093. }
  2094. chan_a_index = 0;
  2095. for (ch = dev->child; ch != 0; ch = ch->sibling) {
  2096. if (nchan >= 2) {
  2097. printk(KERN_WARNING "SCC: Only 2 channels per "
  2098. "chip are supported\n");
  2099. break;
  2100. }
  2101. if (ch->n_addrs < 1 || (ch ->n_intrs < 1)) {
  2102. printk("Can't use %s: %d addrs %d intrs\n",
  2103. ch->full_name, ch->n_addrs, ch->n_intrs);
  2104. continue;
  2105. }
  2106. /* The channel with the higher address
  2107. will be the A side. */
  2108. if (nchan > 0 &&
  2109. ch->addrs[0].address
  2110. > zs_soft[n-1].dev_node->addrs[0].address)
  2111. chan_a_index = 1;
  2112. /* minimal initialization for now */
  2113. zs_soft[n].dev_node = ch;
  2114. *pp = &zs_soft[n];
  2115. pp = &zs_soft[n].zs_next;
  2116. ++nchan;
  2117. ++n;
  2118. }
  2119. if (nchan == 0)
  2120. continue;
  2121. /* set up A side */
  2122. if (chan_init(&zs_soft[chip + chan_a_index], zs_chan, zs_chan))
  2123. continue;
  2124. ++zs_chan;
  2125. /* set up B side, if it exists */
  2126. if (nchan > 1)
  2127. if (chan_init(&zs_soft[chip + 1 - chan_a_index],
  2128. zs_chan, zs_chan - 1))
  2129. continue;
  2130. ++zs_chan;
  2131. }
  2132. *pp = 0;
  2133. zs_channels_found = n;
  2134. #ifdef CONFIG_PMAC_PBOOK
  2135. if (n)
  2136. pmu_register_sleep_notifier(&serial_sleep_notifier);
  2137. #endif /* CONFIG_PMAC_PBOOK */
  2138. }
  2139. static struct tty_operations serial_ops = {
  2140. .open = rs_open,
  2141. .close = rs_close,
  2142. .write = rs_write,
  2143. .flush_chars = rs_flush_chars,
  2144. .write_room = rs_write_room,
  2145. .chars_in_buffer = rs_chars_in_buffer,
  2146. .flush_buffer = rs_flush_buffer,
  2147. .ioctl = rs_ioctl,
  2148. .throttle = rs_throttle,
  2149. .unthrottle = rs_unthrottle,
  2150. .set_termios = rs_set_termios,
  2151. .stop = rs_stop,
  2152. .start = rs_start,
  2153. .hangup = rs_hangup,
  2154. .break_ctl = rs_break,
  2155. .wait_until_sent = rs_wait_until_sent,
  2156. .read_proc = macserial_read_proc,
  2157. .tiocmget = rs_tiocmget,
  2158. .tiocmset = rs_tiocmset,
  2159. };
  2160. static int macserial_init(void)
  2161. {
  2162. int channel, i;
  2163. struct mac_serial *info;
  2164. /* Find out how many Z8530 SCCs we have */
  2165. if (zs_chain == 0)
  2166. probe_sccs();
  2167. serial_driver = alloc_tty_driver(zs_channels_found);
  2168. if (!serial_driver)
  2169. return -ENOMEM;
  2170. /* XXX assume it's a powerbook if we have a via-pmu
  2171. *
  2172. * This is OK for core99 machines as well.
  2173. */
  2174. is_powerbook = find_devices("via-pmu") != 0;
  2175. /* Register the interrupt handler for each one
  2176. * We also request the OF resources here as probe_sccs()
  2177. * might be called too early for that
  2178. */
  2179. for (i = 0; i < zs_channels_found; ++i) {
  2180. struct device_node* ch = zs_soft[i].dev_node;
  2181. if (!request_OF_resource(ch, 0, NULL)) {
  2182. printk(KERN_ERR "macserial: can't request IO resource !\n");
  2183. put_tty_driver(serial_driver);
  2184. return -ENODEV;
  2185. }
  2186. if (zs_soft[i].has_dma) {
  2187. if (!request_OF_resource(ch, ch->n_addrs - 2, " (tx dma)")) {
  2188. printk(KERN_ERR "macserial: can't request TX DMA resource !\n");
  2189. zs_soft[i].has_dma = 0;
  2190. goto no_dma;
  2191. }
  2192. if (!request_OF_resource(ch, ch->n_addrs - 1, " (rx dma)")) {
  2193. release_OF_resource(ch, ch->n_addrs - 2);
  2194. printk(KERN_ERR "macserial: can't request RX DMA resource !\n");
  2195. zs_soft[i].has_dma = 0;
  2196. goto no_dma;
  2197. }
  2198. if (request_irq(zs_soft[i].tx_dma_irq, rs_txdma_irq, 0,
  2199. "SCC-txdma", &zs_soft[i]))
  2200. printk(KERN_ERR "macserial: can't get irq %d\n",
  2201. zs_soft[i].tx_dma_irq);
  2202. disable_irq(zs_soft[i].tx_dma_irq);
  2203. if (request_irq(zs_soft[i].rx_dma_irq, rs_rxdma_irq, 0,
  2204. "SCC-rxdma", &zs_soft[i]))
  2205. printk(KERN_ERR "macserial: can't get irq %d\n",
  2206. zs_soft[i].rx_dma_irq);
  2207. disable_irq(zs_soft[i].rx_dma_irq);
  2208. }
  2209. no_dma:
  2210. if (request_irq(zs_soft[i].irq, rs_interrupt, 0,
  2211. "SCC", &zs_soft[i]))
  2212. printk(KERN_ERR "macserial: can't get irq %d\n",
  2213. zs_soft[i].irq);
  2214. disable_irq(zs_soft[i].irq);
  2215. }
  2216. show_serial_version();
  2217. /* Initialize the tty_driver structure */
  2218. /* Not all of this is exactly right for us. */
  2219. serial_driver->owner = THIS_MODULE;
  2220. serial_driver->driver_name = "macserial";
  2221. serial_driver->devfs_name = "tts/";
  2222. serial_driver->name = "ttyS";
  2223. serial_driver->major = TTY_MAJOR;
  2224. serial_driver->minor_start = 64;
  2225. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2226. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2227. serial_driver->init_termios = tty_std_termios;
  2228. serial_driver->init_termios.c_cflag =
  2229. B38400 | CS8 | CREAD | HUPCL | CLOCAL;
  2230. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2231. tty_set_operations(serial_driver, &serial_ops);
  2232. if (tty_register_driver(serial_driver))
  2233. printk(KERN_ERR "Error: couldn't register serial driver\n");
  2234. for (channel = 0; channel < zs_channels_found; ++channel) {
  2235. #ifdef CONFIG_KGDB
  2236. if (zs_soft[channel].kgdb_channel) {
  2237. kgdb_interruptible(1);
  2238. continue;
  2239. }
  2240. #endif
  2241. zs_soft[channel].clk_divisor = 16;
  2242. /* -- we are not sure the SCC is powered ON at this point
  2243. zs_soft[channel].zs_baud = get_zsbaud(&zs_soft[channel]);
  2244. */
  2245. zs_soft[channel].zs_baud = 38400;
  2246. /* If console serial line, then enable interrupts. */
  2247. if (zs_soft[channel].is_cons) {
  2248. printk(KERN_INFO "macserial: console line, enabling "
  2249. "interrupt %d\n", zs_soft[channel].irq);
  2250. panic("macserial: console not supported yet !");
  2251. write_zsreg(zs_soft[channel].zs_channel, R1,
  2252. (EXT_INT_ENAB | INT_ALL_Rx | TxINT_ENAB));
  2253. write_zsreg(zs_soft[channel].zs_channel, R9,
  2254. (NV | MIE));
  2255. }
  2256. }
  2257. for (info = zs_chain, i = 0; info; info = info->zs_next, i++)
  2258. {
  2259. unsigned char* connector;
  2260. int lenp;
  2261. #ifdef CONFIG_KGDB
  2262. if (info->kgdb_channel) {
  2263. continue;
  2264. }
  2265. #endif
  2266. info->magic = SERIAL_MAGIC;
  2267. info->port = (int) info->zs_channel->control;
  2268. info->line = i;
  2269. info->tty = 0;
  2270. info->custom_divisor = 16;
  2271. info->timeout = 0;
  2272. info->close_delay = 50;
  2273. info->closing_wait = 3000;
  2274. info->x_char = 0;
  2275. info->event = 0;
  2276. info->count = 0;
  2277. info->blocked_open = 0;
  2278. INIT_WORK(&info->tqueue, do_softint, info);
  2279. spin_lock_init(&info->lock);
  2280. init_waitqueue_head(&info->open_wait);
  2281. init_waitqueue_head(&info->close_wait);
  2282. info->timeout = HZ;
  2283. printk(KERN_INFO "tty%02d at 0x%08x (irq = %d)", info->line,
  2284. info->port, info->irq);
  2285. printk(" is a Z8530 ESCC");
  2286. connector = get_property(info->dev_node, "AAPL,connector", &lenp);
  2287. if (connector)
  2288. printk(", port = %s", connector);
  2289. if (info->is_internal_modem)
  2290. printk(" (internal modem)");
  2291. if (info->is_irda)
  2292. printk(" (IrDA)");
  2293. printk("\n");
  2294. }
  2295. tmp_buf = 0;
  2296. return 0;
  2297. }
  2298. void macserial_cleanup(void)
  2299. {
  2300. int i;
  2301. unsigned long flags;
  2302. struct mac_serial *info;
  2303. for (info = zs_chain, i = 0; info; info = info->zs_next, i++)
  2304. set_scc_power(info, 0);
  2305. spin_lock_irqsave(&info->lock, flags);
  2306. for (i = 0; i < zs_channels_found; ++i) {
  2307. free_irq(zs_soft[i].irq, &zs_soft[i]);
  2308. if (zs_soft[i].has_dma) {
  2309. free_irq(zs_soft[i].tx_dma_irq, &zs_soft[i]);
  2310. free_irq(zs_soft[i].rx_dma_irq, &zs_soft[i]);
  2311. }
  2312. release_OF_resource(zs_soft[i].dev_node, 0);
  2313. if (zs_soft[i].has_dma) {
  2314. struct device_node* ch = zs_soft[i].dev_node;
  2315. release_OF_resource(ch, ch->n_addrs - 2);
  2316. release_OF_resource(ch, ch->n_addrs - 1);
  2317. }
  2318. }
  2319. spin_unlock_irqrestore(&info->lock, flags);
  2320. tty_unregister_driver(serial_driver);
  2321. put_tty_driver(serial_driver);
  2322. if (tmp_buf) {
  2323. free_page((unsigned long) tmp_buf);
  2324. tmp_buf = 0;
  2325. }
  2326. #ifdef CONFIG_PMAC_PBOOK
  2327. if (zs_channels_found)
  2328. pmu_unregister_sleep_notifier(&serial_sleep_notifier);
  2329. #endif /* CONFIG_PMAC_PBOOK */
  2330. }
  2331. module_init(macserial_init);
  2332. module_exit(macserial_cleanup);
  2333. MODULE_LICENSE("GPL");
  2334. #if 0
  2335. /*
  2336. * register_serial and unregister_serial allows for serial ports to be
  2337. * configured at run-time, to support PCMCIA modems.
  2338. */
  2339. /* PowerMac: Unused at this time, just here to make things link. */
  2340. int register_serial(struct serial_struct *req)
  2341. {
  2342. return -1;
  2343. }
  2344. void unregister_serial(int line)
  2345. {
  2346. return;
  2347. }
  2348. #endif
  2349. /*
  2350. * ------------------------------------------------------------
  2351. * Serial console driver
  2352. * ------------------------------------------------------------
  2353. */
  2354. #ifdef CONFIG_SERIAL_CONSOLE
  2355. /*
  2356. * Print a string to the serial port trying not to disturb
  2357. * any possible real use of the port...
  2358. */
  2359. static void serial_console_write(struct console *co, const char *s,
  2360. unsigned count)
  2361. {
  2362. struct mac_serial *info = zs_soft + co->index;
  2363. int i;
  2364. /* Turn of interrupts and enable the transmitter. */
  2365. write_zsreg(info->zs_channel, R1, info->curregs[1] & ~TxINT_ENAB);
  2366. write_zsreg(info->zs_channel, R5, info->curregs[5] | TxENAB | RTS | DTR);
  2367. for (i=0; i<count; i++) {
  2368. /* Wait for the transmit buffer to empty. */
  2369. while ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP) == 0) {
  2370. eieio();
  2371. }
  2372. write_zsdata(info->zs_channel, s[i]);
  2373. if (s[i] == 10) {
  2374. while ((read_zsreg(info->zs_channel, 0) & Tx_BUF_EMP)
  2375. == 0)
  2376. eieio();
  2377. write_zsdata(info->zs_channel, 13);
  2378. }
  2379. }
  2380. /* Restore the values in the registers. */
  2381. write_zsreg(info->zs_channel, R1, info->curregs[1]);
  2382. /* Don't disable the transmitter. */
  2383. }
  2384. static struct tty_driver *serial_driver;
  2385. static struct tty_driver *serial_console_device(struct console *c, int *index)
  2386. {
  2387. *index = c->index;
  2388. return serial_driver;
  2389. }
  2390. /*
  2391. * Setup initial baud/bits/parity. We do two things here:
  2392. * - construct a cflag setting for the first rs_open()
  2393. * - initialize the serial port
  2394. * Return non-zero if we didn't find a serial port.
  2395. */
  2396. static int __init serial_console_setup(struct console *co, char *options)
  2397. {
  2398. struct mac_serial *info;
  2399. int baud = 38400;
  2400. int bits = 8;
  2401. int parity = 'n';
  2402. int cflag = CREAD | HUPCL | CLOCAL;
  2403. int brg;
  2404. char *s;
  2405. long flags;
  2406. /* Find out how many Z8530 SCCs we have */
  2407. if (zs_chain == 0)
  2408. probe_sccs();
  2409. if (zs_chain == 0)
  2410. return -1;
  2411. /* Do we have the device asked for? */
  2412. if (co->index >= zs_channels_found)
  2413. return -1;
  2414. info = zs_soft + co->index;
  2415. set_scc_power(info, 1);
  2416. /* Reset the channel */
  2417. write_zsreg(info->zs_channel, R9, CHRA);
  2418. if (options) {
  2419. baud = simple_strtoul(options, NULL, 10);
  2420. s = options;
  2421. while(*s >= '0' && *s <= '9')
  2422. s++;
  2423. if (*s)
  2424. parity = *s++;
  2425. if (*s)
  2426. bits = *s - '0';
  2427. }
  2428. /*
  2429. * Now construct a cflag setting.
  2430. */
  2431. switch(baud) {
  2432. case 1200:
  2433. cflag |= B1200;
  2434. break;
  2435. case 2400:
  2436. cflag |= B2400;
  2437. break;
  2438. case 4800:
  2439. cflag |= B4800;
  2440. break;
  2441. case 9600:
  2442. cflag |= B9600;
  2443. break;
  2444. case 19200:
  2445. cflag |= B19200;
  2446. break;
  2447. case 57600:
  2448. cflag |= B57600;
  2449. break;
  2450. case 115200:
  2451. cflag |= B115200;
  2452. break;
  2453. case 38400:
  2454. default:
  2455. cflag |= B38400;
  2456. break;
  2457. }
  2458. switch(bits) {
  2459. case 7:
  2460. cflag |= CS7;
  2461. break;
  2462. default:
  2463. case 8:
  2464. cflag |= CS8;
  2465. break;
  2466. }
  2467. switch(parity) {
  2468. case 'o': case 'O':
  2469. cflag |= PARENB | PARODD;
  2470. break;
  2471. case 'e': case 'E':
  2472. cflag |= PARENB;
  2473. break;
  2474. }
  2475. co->cflag = cflag;
  2476. spin_lock_irqsave(&info->lock, flags);
  2477. memset(info->curregs, 0, sizeof(info->curregs));
  2478. info->zs_baud = baud;
  2479. info->clk_divisor = 16;
  2480. switch (info->zs_baud) {
  2481. case ZS_CLOCK/16: /* 230400 */
  2482. info->curregs[4] = X16CLK;
  2483. info->curregs[11] = 0;
  2484. break;
  2485. case ZS_CLOCK/32: /* 115200 */
  2486. info->curregs[4] = X32CLK;
  2487. info->curregs[11] = 0;
  2488. break;
  2489. default:
  2490. info->curregs[4] = X16CLK;
  2491. info->curregs[11] = TCBR | RCBR;
  2492. brg = BPS_TO_BRG(info->zs_baud, ZS_CLOCK/info->clk_divisor);
  2493. info->curregs[12] = (brg & 255);
  2494. info->curregs[13] = ((brg >> 8) & 255);
  2495. info->curregs[14] = BRENABL;
  2496. }
  2497. /* byte size and parity */
  2498. info->curregs[3] &= ~RxNBITS_MASK;
  2499. info->curregs[5] &= ~TxNBITS_MASK;
  2500. switch (cflag & CSIZE) {
  2501. case CS5:
  2502. info->curregs[3] |= Rx5;
  2503. info->curregs[5] |= Tx5;
  2504. break;
  2505. case CS6:
  2506. info->curregs[3] |= Rx6;
  2507. info->curregs[5] |= Tx6;
  2508. break;
  2509. case CS7:
  2510. info->curregs[3] |= Rx7;
  2511. info->curregs[5] |= Tx7;
  2512. break;
  2513. case CS8:
  2514. default: /* defaults to 8 bits */
  2515. info->curregs[3] |= Rx8;
  2516. info->curregs[5] |= Tx8;
  2517. break;
  2518. }
  2519. info->curregs[5] |= TxENAB | RTS | DTR;
  2520. info->pendregs[3] = info->curregs[3];
  2521. info->pendregs[5] = info->curregs[5];
  2522. info->curregs[4] &= ~(SB_MASK | PAR_ENA | PAR_EVEN);
  2523. if (cflag & CSTOPB) {
  2524. info->curregs[4] |= SB2;
  2525. } else {
  2526. info->curregs[4] |= SB1;
  2527. }
  2528. if (cflag & PARENB) {
  2529. info->curregs[4] |= PAR_ENA;
  2530. if (!(cflag & PARODD)) {
  2531. info->curregs[4] |= PAR_EVEN;
  2532. }
  2533. }
  2534. info->pendregs[4] = info->curregs[4];
  2535. if (!(cflag & CLOCAL)) {
  2536. if (!(info->curregs[15] & DCDIE))
  2537. info->read_reg_zero = read_zsreg(info->zs_channel, 0);
  2538. info->curregs[15] |= DCDIE;
  2539. } else
  2540. info->curregs[15] &= ~DCDIE;
  2541. if (cflag & CRTSCTS) {
  2542. info->curregs[15] |= CTSIE;
  2543. if ((read_zsreg(info->zs_channel, 0) & CTS) != 0)
  2544. info->tx_stopped = 1;
  2545. } else {
  2546. info->curregs[15] &= ~CTSIE;
  2547. info->tx_stopped = 0;
  2548. }
  2549. info->pendregs[15] = info->curregs[15];
  2550. /* Load up the new values */
  2551. load_zsregs(info->zs_channel, info->curregs);
  2552. spin_unlock_irqrestore(&info->lock, flags);
  2553. return 0;
  2554. }
  2555. static struct console sercons = {
  2556. .name = "ttyS",
  2557. .write = serial_console_write,
  2558. .device = serial_console_device,
  2559. .setup = serial_console_setup,
  2560. .flags = CON_PRINTBUFFER,
  2561. .index = -1,
  2562. };
  2563. /*
  2564. * Register console.
  2565. */
  2566. static void __init mac_scc_console_init(void)
  2567. {
  2568. register_console(&sercons);
  2569. }
  2570. console_initcall(mac_scc_console_init);
  2571. #endif /* ifdef CONFIG_SERIAL_CONSOLE */
  2572. #ifdef CONFIG_KGDB
  2573. /* These are for receiving and sending characters under the kgdb
  2574. * source level kernel debugger.
  2575. */
  2576. void putDebugChar(char kgdb_char)
  2577. {
  2578. struct mac_zschannel *chan = zs_kgdbchan;
  2579. while ((read_zsreg(chan, 0) & Tx_BUF_EMP) == 0)
  2580. udelay(5);
  2581. write_zsdata(chan, kgdb_char);
  2582. }
  2583. char getDebugChar(void)
  2584. {
  2585. struct mac_zschannel *chan = zs_kgdbchan;
  2586. while((read_zsreg(chan, 0) & Rx_CH_AV) == 0)
  2587. eieio(); /*barrier();*/
  2588. return read_zsdata(chan);
  2589. }
  2590. void kgdb_interruptible(int yes)
  2591. {
  2592. struct mac_zschannel *chan = zs_kgdbchan;
  2593. int one, nine;
  2594. nine = read_zsreg(chan, 9);
  2595. if (yes == 1) {
  2596. one = EXT_INT_ENAB|INT_ALL_Rx;
  2597. nine |= MIE;
  2598. printk("turning serial ints on\n");
  2599. } else {
  2600. one = RxINT_DISAB;
  2601. nine &= ~MIE;
  2602. printk("turning serial ints off\n");
  2603. }
  2604. write_zsreg(chan, 1, one);
  2605. write_zsreg(chan, 9, nine);
  2606. }
  2607. /* This sets up the serial port we're using, and turns on
  2608. * interrupts for that channel, so kgdb is usable once we're done.
  2609. */
  2610. static inline void kgdb_chaninit(struct mac_zschannel *ms, int intson, int bps)
  2611. {
  2612. int brg;
  2613. int i, x;
  2614. volatile char *sccc = ms->control;
  2615. brg = BPS_TO_BRG(bps, ZS_CLOCK/16);
  2616. printk("setting bps on kgdb line to %d [brg=%x]\n", bps, brg);
  2617. for (i = 20000; i != 0; --i) {
  2618. x = *sccc; eieio();
  2619. }
  2620. for (i = 0; i < sizeof(scc_inittab); ++i) {
  2621. write_zsreg(ms, scc_inittab[i], scc_inittab[i+1]);
  2622. i++;
  2623. }
  2624. }
  2625. /* This is called at boot time to prime the kgdb serial debugging
  2626. * serial line. The 'tty_num' argument is 0 for /dev/ttya and 1
  2627. * for /dev/ttyb which is determined in setup_arch() from the
  2628. * boot command line flags.
  2629. * XXX at the moment probably only channel A will work
  2630. */
  2631. void __init zs_kgdb_hook(int tty_num)
  2632. {
  2633. /* Find out how many Z8530 SCCs we have */
  2634. if (zs_chain == 0)
  2635. probe_sccs();
  2636. set_scc_power(&zs_soft[tty_num], 1);
  2637. zs_kgdbchan = zs_soft[tty_num].zs_channel;
  2638. zs_soft[tty_num].change_needed = 0;
  2639. zs_soft[tty_num].clk_divisor = 16;
  2640. zs_soft[tty_num].zs_baud = 38400;
  2641. zs_soft[tty_num].kgdb_channel = 1; /* This runs kgdb */
  2642. /* Turn on transmitter/receiver at 8-bits/char */
  2643. kgdb_chaninit(zs_soft[tty_num].zs_channel, 1, 38400);
  2644. printk("KGDB: on channel %d initialized\n", tty_num);
  2645. set_debug_traps(); /* init stub */
  2646. }
  2647. #endif /* ifdef CONFIG_KGDB */
  2648. #ifdef CONFIG_PMAC_PBOOK
  2649. /*
  2650. * notify clients before sleep and reset bus afterwards
  2651. */
  2652. int
  2653. serial_notify_sleep(struct pmu_sleep_notifier *self, int when)
  2654. {
  2655. int i;
  2656. switch (when) {
  2657. case PBOOK_SLEEP_REQUEST:
  2658. case PBOOK_SLEEP_REJECT:
  2659. break;
  2660. case PBOOK_SLEEP_NOW:
  2661. for (i=0; i<zs_channels_found; i++) {
  2662. struct mac_serial *info = &zs_soft[i];
  2663. if (info->flags & ZILOG_INITIALIZED) {
  2664. shutdown(info);
  2665. info->flags |= ZILOG_SLEEPING;
  2666. }
  2667. }
  2668. break;
  2669. case PBOOK_WAKE:
  2670. for (i=0; i<zs_channels_found; i++) {
  2671. struct mac_serial *info = &zs_soft[i];
  2672. if (info->flags & ZILOG_SLEEPING) {
  2673. info->flags &= ~ZILOG_SLEEPING;
  2674. startup(info);
  2675. }
  2676. }
  2677. break;
  2678. }
  2679. return PBOOK_SLEEP_OK;
  2680. }
  2681. #endif /* CONFIG_PMAC_PBOOK */