ipath_rc.c 51 KB

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  1. /*
  2. * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
  3. * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. */
  33. #include <linux/io.h>
  34. #include "ipath_verbs.h"
  35. #include "ipath_kernel.h"
  36. /* cut down ridiculously long IB macro names */
  37. #define OP(x) IB_OPCODE_RC_##x
  38. static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
  39. u32 psn, u32 pmtu)
  40. {
  41. u32 len;
  42. len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  43. ss->sge = wqe->sg_list[0];
  44. ss->sg_list = wqe->sg_list + 1;
  45. ss->num_sge = wqe->wr.num_sge;
  46. ipath_skip_sge(ss, len);
  47. return wqe->length - len;
  48. }
  49. /**
  50. * ipath_init_restart- initialize the qp->s_sge after a restart
  51. * @qp: the QP who's SGE we're restarting
  52. * @wqe: the work queue to initialize the QP's SGE from
  53. *
  54. * The QP s_lock should be held and interrupts disabled.
  55. */
  56. static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
  57. {
  58. struct ipath_ibdev *dev;
  59. qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
  60. ib_mtu_enum_to_int(qp->path_mtu));
  61. dev = to_idev(qp->ibqp.device);
  62. spin_lock(&dev->pending_lock);
  63. if (list_empty(&qp->timerwait))
  64. list_add_tail(&qp->timerwait,
  65. &dev->pending[dev->pending_index]);
  66. spin_unlock(&dev->pending_lock);
  67. }
  68. /**
  69. * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  70. * @qp: a pointer to the QP
  71. * @ohdr: a pointer to the IB header being constructed
  72. * @pmtu: the path MTU
  73. *
  74. * Return 1 if constructed; otherwise, return 0.
  75. * Note that we are in the responder's side of the QP context.
  76. * Note the QP s_lock must be held.
  77. */
  78. static int ipath_make_rc_ack(struct ipath_ibdev *dev, struct ipath_qp *qp,
  79. struct ipath_other_headers *ohdr, u32 pmtu)
  80. {
  81. struct ipath_ack_entry *e;
  82. u32 hwords;
  83. u32 len;
  84. u32 bth0;
  85. u32 bth2;
  86. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  87. hwords = 5;
  88. switch (qp->s_ack_state) {
  89. case OP(RDMA_READ_RESPONSE_LAST):
  90. case OP(RDMA_READ_RESPONSE_ONLY):
  91. case OP(ATOMIC_ACKNOWLEDGE):
  92. /*
  93. * We can increment the tail pointer now that the last
  94. * response has been sent instead of only being
  95. * constructed.
  96. */
  97. if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
  98. qp->s_tail_ack_queue = 0;
  99. /* FALLTHROUGH */
  100. case OP(SEND_ONLY):
  101. case OP(ACKNOWLEDGE):
  102. /* Check for no next entry in the queue. */
  103. if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
  104. if (qp->s_flags & IPATH_S_ACK_PENDING)
  105. goto normal;
  106. qp->s_ack_state = OP(ACKNOWLEDGE);
  107. goto bail;
  108. }
  109. e = &qp->s_ack_queue[qp->s_tail_ack_queue];
  110. if (e->opcode == OP(RDMA_READ_REQUEST)) {
  111. /* Copy SGE state in case we need to resend */
  112. qp->s_ack_rdma_sge = e->rdma_sge;
  113. qp->s_cur_sge = &qp->s_ack_rdma_sge;
  114. len = e->rdma_sge.sge.sge_length;
  115. if (len > pmtu) {
  116. len = pmtu;
  117. qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
  118. } else {
  119. qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
  120. e->sent = 1;
  121. }
  122. ohdr->u.aeth = ipath_compute_aeth(qp);
  123. hwords++;
  124. qp->s_ack_rdma_psn = e->psn;
  125. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  126. } else {
  127. /* COMPARE_SWAP or FETCH_ADD */
  128. qp->s_cur_sge = NULL;
  129. len = 0;
  130. qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
  131. ohdr->u.at.aeth = ipath_compute_aeth(qp);
  132. ohdr->u.at.atomic_ack_eth[0] =
  133. cpu_to_be32(e->atomic_data >> 32);
  134. ohdr->u.at.atomic_ack_eth[1] =
  135. cpu_to_be32(e->atomic_data);
  136. hwords += sizeof(ohdr->u.at) / sizeof(u32);
  137. bth2 = e->psn;
  138. e->sent = 1;
  139. }
  140. bth0 = qp->s_ack_state << 24;
  141. break;
  142. case OP(RDMA_READ_RESPONSE_FIRST):
  143. qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  144. /* FALLTHROUGH */
  145. case OP(RDMA_READ_RESPONSE_MIDDLE):
  146. len = qp->s_ack_rdma_sge.sge.sge_length;
  147. if (len > pmtu)
  148. len = pmtu;
  149. else {
  150. ohdr->u.aeth = ipath_compute_aeth(qp);
  151. hwords++;
  152. qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
  153. qp->s_ack_queue[qp->s_tail_ack_queue].sent = 1;
  154. }
  155. bth0 = qp->s_ack_state << 24;
  156. bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
  157. break;
  158. default:
  159. normal:
  160. /*
  161. * Send a regular ACK.
  162. * Set the s_ack_state so we wait until after sending
  163. * the ACK before setting s_ack_state to ACKNOWLEDGE
  164. * (see above).
  165. */
  166. qp->s_ack_state = OP(SEND_ONLY);
  167. qp->s_flags &= ~IPATH_S_ACK_PENDING;
  168. qp->s_cur_sge = NULL;
  169. if (qp->s_nak_state)
  170. ohdr->u.aeth =
  171. cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  172. (qp->s_nak_state <<
  173. IPATH_AETH_CREDIT_SHIFT));
  174. else
  175. ohdr->u.aeth = ipath_compute_aeth(qp);
  176. hwords++;
  177. len = 0;
  178. bth0 = OP(ACKNOWLEDGE) << 24;
  179. bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
  180. }
  181. qp->s_hdrwords = hwords;
  182. qp->s_cur_size = len;
  183. ipath_make_ruc_header(dev, qp, ohdr, bth0, bth2);
  184. return 1;
  185. bail:
  186. return 0;
  187. }
  188. /**
  189. * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
  190. * @qp: a pointer to the QP
  191. *
  192. * Return 1 if constructed; otherwise, return 0.
  193. */
  194. int ipath_make_rc_req(struct ipath_qp *qp)
  195. {
  196. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  197. struct ipath_other_headers *ohdr;
  198. struct ipath_sge_state *ss;
  199. struct ipath_swqe *wqe;
  200. u32 hwords;
  201. u32 len;
  202. u32 bth0;
  203. u32 bth2;
  204. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  205. char newreq;
  206. unsigned long flags;
  207. int ret = 0;
  208. ohdr = &qp->s_hdr.u.oth;
  209. if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
  210. ohdr = &qp->s_hdr.u.l.oth;
  211. /*
  212. * The lock is needed to synchronize between the sending tasklet,
  213. * the receive interrupt handler, and timeout resends.
  214. */
  215. spin_lock_irqsave(&qp->s_lock, flags);
  216. /* Sending responses has higher priority over sending requests. */
  217. if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  218. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  219. qp->s_ack_state != OP(ACKNOWLEDGE)) &&
  220. ipath_make_rc_ack(dev, qp, ohdr, pmtu))
  221. goto done;
  222. if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK) ||
  223. qp->s_rnr_timeout || qp->s_wait_credit)
  224. goto bail;
  225. /* Limit the number of packets sent without an ACK. */
  226. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT) > 0) {
  227. qp->s_wait_credit = 1;
  228. dev->n_rc_stalls++;
  229. goto bail;
  230. }
  231. /* header size in 32-bit words LRH+BTH = (8+12)/4. */
  232. hwords = 5;
  233. bth0 = 1 << 22; /* Set M bit */
  234. /* Send a request. */
  235. wqe = get_swqe_ptr(qp, qp->s_cur);
  236. switch (qp->s_state) {
  237. default:
  238. /*
  239. * Resend an old request or start a new one.
  240. *
  241. * We keep track of the current SWQE so that
  242. * we don't reset the "furthest progress" state
  243. * if we need to back up.
  244. */
  245. newreq = 0;
  246. if (qp->s_cur == qp->s_tail) {
  247. /* Check if send work queue is empty. */
  248. if (qp->s_tail == qp->s_head)
  249. goto bail;
  250. /*
  251. * If a fence is requested, wait for previous
  252. * RDMA read and atomic operations to finish.
  253. */
  254. if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
  255. qp->s_num_rd_atomic) {
  256. qp->s_flags |= IPATH_S_FENCE_PENDING;
  257. goto bail;
  258. }
  259. wqe->psn = qp->s_next_psn;
  260. newreq = 1;
  261. }
  262. /*
  263. * Note that we have to be careful not to modify the
  264. * original work request since we may need to resend
  265. * it.
  266. */
  267. len = wqe->length;
  268. ss = &qp->s_sge;
  269. bth2 = 0;
  270. switch (wqe->wr.opcode) {
  271. case IB_WR_SEND:
  272. case IB_WR_SEND_WITH_IMM:
  273. /* If no credit, return. */
  274. if (qp->s_lsn != (u32) -1 &&
  275. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  276. goto bail;
  277. wqe->lpsn = wqe->psn;
  278. if (len > pmtu) {
  279. wqe->lpsn += (len - 1) / pmtu;
  280. qp->s_state = OP(SEND_FIRST);
  281. len = pmtu;
  282. break;
  283. }
  284. if (wqe->wr.opcode == IB_WR_SEND)
  285. qp->s_state = OP(SEND_ONLY);
  286. else {
  287. qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
  288. /* Immediate data comes after the BTH */
  289. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  290. hwords += 1;
  291. }
  292. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  293. bth0 |= 1 << 23;
  294. bth2 = 1 << 31; /* Request ACK. */
  295. if (++qp->s_cur == qp->s_size)
  296. qp->s_cur = 0;
  297. break;
  298. case IB_WR_RDMA_WRITE:
  299. if (newreq && qp->s_lsn != (u32) -1)
  300. qp->s_lsn++;
  301. /* FALLTHROUGH */
  302. case IB_WR_RDMA_WRITE_WITH_IMM:
  303. /* If no credit, return. */
  304. if (qp->s_lsn != (u32) -1 &&
  305. ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0)
  306. goto bail;
  307. ohdr->u.rc.reth.vaddr =
  308. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  309. ohdr->u.rc.reth.rkey =
  310. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  311. ohdr->u.rc.reth.length = cpu_to_be32(len);
  312. hwords += sizeof(struct ib_reth) / sizeof(u32);
  313. wqe->lpsn = wqe->psn;
  314. if (len > pmtu) {
  315. wqe->lpsn += (len - 1) / pmtu;
  316. qp->s_state = OP(RDMA_WRITE_FIRST);
  317. len = pmtu;
  318. break;
  319. }
  320. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  321. qp->s_state = OP(RDMA_WRITE_ONLY);
  322. else {
  323. qp->s_state =
  324. OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
  325. /* Immediate data comes after RETH */
  326. ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
  327. hwords += 1;
  328. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  329. bth0 |= 1 << 23;
  330. }
  331. bth2 = 1 << 31; /* Request ACK. */
  332. if (++qp->s_cur == qp->s_size)
  333. qp->s_cur = 0;
  334. break;
  335. case IB_WR_RDMA_READ:
  336. /*
  337. * Don't allow more operations to be started
  338. * than the QP limits allow.
  339. */
  340. if (newreq) {
  341. if (qp->s_num_rd_atomic >=
  342. qp->s_max_rd_atomic) {
  343. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  344. goto bail;
  345. }
  346. qp->s_num_rd_atomic++;
  347. if (qp->s_lsn != (u32) -1)
  348. qp->s_lsn++;
  349. /*
  350. * Adjust s_next_psn to count the
  351. * expected number of responses.
  352. */
  353. if (len > pmtu)
  354. qp->s_next_psn += (len - 1) / pmtu;
  355. wqe->lpsn = qp->s_next_psn++;
  356. }
  357. ohdr->u.rc.reth.vaddr =
  358. cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
  359. ohdr->u.rc.reth.rkey =
  360. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  361. ohdr->u.rc.reth.length = cpu_to_be32(len);
  362. qp->s_state = OP(RDMA_READ_REQUEST);
  363. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  364. ss = NULL;
  365. len = 0;
  366. if (++qp->s_cur == qp->s_size)
  367. qp->s_cur = 0;
  368. break;
  369. case IB_WR_ATOMIC_CMP_AND_SWP:
  370. case IB_WR_ATOMIC_FETCH_AND_ADD:
  371. /*
  372. * Don't allow more operations to be started
  373. * than the QP limits allow.
  374. */
  375. if (newreq) {
  376. if (qp->s_num_rd_atomic >=
  377. qp->s_max_rd_atomic) {
  378. qp->s_flags |= IPATH_S_RDMAR_PENDING;
  379. goto bail;
  380. }
  381. qp->s_num_rd_atomic++;
  382. if (qp->s_lsn != (u32) -1)
  383. qp->s_lsn++;
  384. wqe->lpsn = wqe->psn;
  385. }
  386. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
  387. qp->s_state = OP(COMPARE_SWAP);
  388. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  389. wqe->wr.wr.atomic.swap);
  390. ohdr->u.atomic_eth.compare_data = cpu_to_be64(
  391. wqe->wr.wr.atomic.compare_add);
  392. } else {
  393. qp->s_state = OP(FETCH_ADD);
  394. ohdr->u.atomic_eth.swap_data = cpu_to_be64(
  395. wqe->wr.wr.atomic.compare_add);
  396. ohdr->u.atomic_eth.compare_data = 0;
  397. }
  398. ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
  399. wqe->wr.wr.atomic.remote_addr >> 32);
  400. ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
  401. wqe->wr.wr.atomic.remote_addr);
  402. ohdr->u.atomic_eth.rkey = cpu_to_be32(
  403. wqe->wr.wr.atomic.rkey);
  404. hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
  405. ss = NULL;
  406. len = 0;
  407. if (++qp->s_cur == qp->s_size)
  408. qp->s_cur = 0;
  409. break;
  410. default:
  411. goto bail;
  412. }
  413. qp->s_sge.sge = wqe->sg_list[0];
  414. qp->s_sge.sg_list = wqe->sg_list + 1;
  415. qp->s_sge.num_sge = wqe->wr.num_sge;
  416. qp->s_len = wqe->length;
  417. if (newreq) {
  418. qp->s_tail++;
  419. if (qp->s_tail >= qp->s_size)
  420. qp->s_tail = 0;
  421. }
  422. bth2 |= qp->s_psn & IPATH_PSN_MASK;
  423. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  424. qp->s_psn = wqe->lpsn + 1;
  425. else {
  426. qp->s_psn++;
  427. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  428. qp->s_next_psn = qp->s_psn;
  429. }
  430. /*
  431. * Put the QP on the pending list so lost ACKs will cause
  432. * a retry. More than one request can be pending so the
  433. * QP may already be on the dev->pending list.
  434. */
  435. spin_lock(&dev->pending_lock);
  436. if (list_empty(&qp->timerwait))
  437. list_add_tail(&qp->timerwait,
  438. &dev->pending[dev->pending_index]);
  439. spin_unlock(&dev->pending_lock);
  440. break;
  441. case OP(RDMA_READ_RESPONSE_FIRST):
  442. /*
  443. * This case can only happen if a send is restarted.
  444. * See ipath_restart_rc().
  445. */
  446. ipath_init_restart(qp, wqe);
  447. /* FALLTHROUGH */
  448. case OP(SEND_FIRST):
  449. qp->s_state = OP(SEND_MIDDLE);
  450. /* FALLTHROUGH */
  451. case OP(SEND_MIDDLE):
  452. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  453. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  454. qp->s_next_psn = qp->s_psn;
  455. ss = &qp->s_sge;
  456. len = qp->s_len;
  457. if (len > pmtu) {
  458. len = pmtu;
  459. break;
  460. }
  461. if (wqe->wr.opcode == IB_WR_SEND)
  462. qp->s_state = OP(SEND_LAST);
  463. else {
  464. qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
  465. /* Immediate data comes after the BTH */
  466. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  467. hwords += 1;
  468. }
  469. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  470. bth0 |= 1 << 23;
  471. bth2 |= 1 << 31; /* Request ACK. */
  472. qp->s_cur++;
  473. if (qp->s_cur >= qp->s_size)
  474. qp->s_cur = 0;
  475. break;
  476. case OP(RDMA_READ_RESPONSE_LAST):
  477. /*
  478. * This case can only happen if a RDMA write is restarted.
  479. * See ipath_restart_rc().
  480. */
  481. ipath_init_restart(qp, wqe);
  482. /* FALLTHROUGH */
  483. case OP(RDMA_WRITE_FIRST):
  484. qp->s_state = OP(RDMA_WRITE_MIDDLE);
  485. /* FALLTHROUGH */
  486. case OP(RDMA_WRITE_MIDDLE):
  487. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  488. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  489. qp->s_next_psn = qp->s_psn;
  490. ss = &qp->s_sge;
  491. len = qp->s_len;
  492. if (len > pmtu) {
  493. len = pmtu;
  494. break;
  495. }
  496. if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
  497. qp->s_state = OP(RDMA_WRITE_LAST);
  498. else {
  499. qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
  500. /* Immediate data comes after the BTH */
  501. ohdr->u.imm_data = wqe->wr.ex.imm_data;
  502. hwords += 1;
  503. if (wqe->wr.send_flags & IB_SEND_SOLICITED)
  504. bth0 |= 1 << 23;
  505. }
  506. bth2 |= 1 << 31; /* Request ACK. */
  507. qp->s_cur++;
  508. if (qp->s_cur >= qp->s_size)
  509. qp->s_cur = 0;
  510. break;
  511. case OP(RDMA_READ_RESPONSE_MIDDLE):
  512. /*
  513. * This case can only happen if a RDMA read is restarted.
  514. * See ipath_restart_rc().
  515. */
  516. ipath_init_restart(qp, wqe);
  517. len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
  518. ohdr->u.rc.reth.vaddr =
  519. cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
  520. ohdr->u.rc.reth.rkey =
  521. cpu_to_be32(wqe->wr.wr.rdma.rkey);
  522. ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
  523. qp->s_state = OP(RDMA_READ_REQUEST);
  524. hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
  525. bth2 = qp->s_psn++ & IPATH_PSN_MASK;
  526. if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
  527. qp->s_next_psn = qp->s_psn;
  528. ss = NULL;
  529. len = 0;
  530. qp->s_cur++;
  531. if (qp->s_cur == qp->s_size)
  532. qp->s_cur = 0;
  533. break;
  534. }
  535. if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
  536. bth2 |= 1 << 31; /* Request ACK. */
  537. qp->s_len -= len;
  538. qp->s_hdrwords = hwords;
  539. qp->s_cur_sge = ss;
  540. qp->s_cur_size = len;
  541. ipath_make_ruc_header(dev, qp, ohdr, bth0 | (qp->s_state << 24), bth2);
  542. done:
  543. ret = 1;
  544. bail:
  545. spin_unlock_irqrestore(&qp->s_lock, flags);
  546. return ret;
  547. }
  548. /**
  549. * send_rc_ack - Construct an ACK packet and send it
  550. * @qp: a pointer to the QP
  551. *
  552. * This is called from ipath_rc_rcv() and only uses the receive
  553. * side QP state.
  554. * Note that RDMA reads and atomics are handled in the
  555. * send side QP state and tasklet.
  556. */
  557. static void send_rc_ack(struct ipath_qp *qp)
  558. {
  559. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  560. struct ipath_devdata *dd;
  561. u16 lrh0;
  562. u32 bth0;
  563. u32 hwords;
  564. u32 __iomem *piobuf;
  565. struct ipath_ib_header hdr;
  566. struct ipath_other_headers *ohdr;
  567. unsigned long flags;
  568. spin_lock_irqsave(&qp->s_lock, flags);
  569. /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
  570. if (qp->r_head_ack_queue != qp->s_tail_ack_queue ||
  571. (qp->s_flags & IPATH_S_ACK_PENDING) ||
  572. qp->s_ack_state != OP(ACKNOWLEDGE))
  573. goto queue_ack;
  574. spin_unlock_irqrestore(&qp->s_lock, flags);
  575. dd = dev->dd;
  576. piobuf = ipath_getpiobuf(dd, 0, NULL);
  577. if (!piobuf) {
  578. /*
  579. * We are out of PIO buffers at the moment.
  580. * Pass responsibility for sending the ACK to the
  581. * send tasklet so that when a PIO buffer becomes
  582. * available, the ACK is sent ahead of other outgoing
  583. * packets.
  584. */
  585. spin_lock_irqsave(&qp->s_lock, flags);
  586. goto queue_ack;
  587. }
  588. /* Construct the header. */
  589. ohdr = &hdr.u.oth;
  590. lrh0 = IPATH_LRH_BTH;
  591. /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
  592. hwords = 6;
  593. if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
  594. hwords += ipath_make_grh(dev, &hdr.u.l.grh,
  595. &qp->remote_ah_attr.grh,
  596. hwords, 0);
  597. ohdr = &hdr.u.l.oth;
  598. lrh0 = IPATH_LRH_GRH;
  599. }
  600. /* read pkey_index w/o lock (its atomic) */
  601. bth0 = ipath_get_pkey(dd, qp->s_pkey_index) |
  602. (OP(ACKNOWLEDGE) << 24) | (1 << 22);
  603. if (qp->r_nak_state)
  604. ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
  605. (qp->r_nak_state <<
  606. IPATH_AETH_CREDIT_SHIFT));
  607. else
  608. ohdr->u.aeth = ipath_compute_aeth(qp);
  609. lrh0 |= qp->remote_ah_attr.sl << 4;
  610. hdr.lrh[0] = cpu_to_be16(lrh0);
  611. hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
  612. hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
  613. hdr.lrh[3] = cpu_to_be16(dd->ipath_lid);
  614. ohdr->bth[0] = cpu_to_be32(bth0);
  615. ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
  616. ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
  617. writeq(hwords + 1, piobuf);
  618. if (dd->ipath_flags & IPATH_PIO_FLUSH_WC) {
  619. u32 *hdrp = (u32 *) &hdr;
  620. ipath_flush_wc();
  621. __iowrite32_copy(piobuf + 2, hdrp, hwords - 1);
  622. ipath_flush_wc();
  623. __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
  624. } else
  625. __iowrite32_copy(piobuf + 2, (u32 *) &hdr, hwords);
  626. ipath_flush_wc();
  627. dev->n_unicast_xmit++;
  628. goto done;
  629. queue_ack:
  630. dev->n_rc_qacks++;
  631. qp->s_flags |= IPATH_S_ACK_PENDING;
  632. qp->s_nak_state = qp->r_nak_state;
  633. qp->s_ack_psn = qp->r_ack_psn;
  634. spin_unlock_irqrestore(&qp->s_lock, flags);
  635. /* Call ipath_do_rc_send() in another thread. */
  636. tasklet_hi_schedule(&qp->s_task);
  637. done:
  638. return;
  639. }
  640. /**
  641. * reset_psn - reset the QP state to send starting from PSN
  642. * @qp: the QP
  643. * @psn: the packet sequence number to restart at
  644. *
  645. * This is called from ipath_rc_rcv() to process an incoming RC ACK
  646. * for the given QP.
  647. * Called at interrupt level with the QP s_lock held.
  648. */
  649. static void reset_psn(struct ipath_qp *qp, u32 psn)
  650. {
  651. u32 n = qp->s_last;
  652. struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
  653. u32 opcode;
  654. qp->s_cur = n;
  655. /*
  656. * If we are starting the request from the beginning,
  657. * let the normal send code handle initialization.
  658. */
  659. if (ipath_cmp24(psn, wqe->psn) <= 0) {
  660. qp->s_state = OP(SEND_LAST);
  661. goto done;
  662. }
  663. /* Find the work request opcode corresponding to the given PSN. */
  664. opcode = wqe->wr.opcode;
  665. for (;;) {
  666. int diff;
  667. if (++n == qp->s_size)
  668. n = 0;
  669. if (n == qp->s_tail)
  670. break;
  671. wqe = get_swqe_ptr(qp, n);
  672. diff = ipath_cmp24(psn, wqe->psn);
  673. if (diff < 0)
  674. break;
  675. qp->s_cur = n;
  676. /*
  677. * If we are starting the request from the beginning,
  678. * let the normal send code handle initialization.
  679. */
  680. if (diff == 0) {
  681. qp->s_state = OP(SEND_LAST);
  682. goto done;
  683. }
  684. opcode = wqe->wr.opcode;
  685. }
  686. /*
  687. * Set the state to restart in the middle of a request.
  688. * Don't change the s_sge, s_cur_sge, or s_cur_size.
  689. * See ipath_do_rc_send().
  690. */
  691. switch (opcode) {
  692. case IB_WR_SEND:
  693. case IB_WR_SEND_WITH_IMM:
  694. qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
  695. break;
  696. case IB_WR_RDMA_WRITE:
  697. case IB_WR_RDMA_WRITE_WITH_IMM:
  698. qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
  699. break;
  700. case IB_WR_RDMA_READ:
  701. qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
  702. break;
  703. default:
  704. /*
  705. * This case shouldn't happen since its only
  706. * one PSN per req.
  707. */
  708. qp->s_state = OP(SEND_LAST);
  709. }
  710. done:
  711. qp->s_psn = psn;
  712. }
  713. /**
  714. * ipath_restart_rc - back up requester to resend the last un-ACKed request
  715. * @qp: the QP to restart
  716. * @psn: packet sequence number for the request
  717. * @wc: the work completion request
  718. *
  719. * The QP s_lock should be held and interrupts disabled.
  720. */
  721. void ipath_restart_rc(struct ipath_qp *qp, u32 psn)
  722. {
  723. struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
  724. struct ipath_ibdev *dev;
  725. if (qp->s_retry == 0) {
  726. ipath_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
  727. ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  728. goto bail;
  729. }
  730. qp->s_retry--;
  731. /*
  732. * Remove the QP from the timeout queue.
  733. * Note: it may already have been removed by ipath_ib_timer().
  734. */
  735. dev = to_idev(qp->ibqp.device);
  736. spin_lock(&dev->pending_lock);
  737. if (!list_empty(&qp->timerwait))
  738. list_del_init(&qp->timerwait);
  739. if (!list_empty(&qp->piowait))
  740. list_del_init(&qp->piowait);
  741. spin_unlock(&dev->pending_lock);
  742. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  743. dev->n_rc_resends++;
  744. else
  745. dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
  746. reset_psn(qp, psn);
  747. tasklet_hi_schedule(&qp->s_task);
  748. bail:
  749. return;
  750. }
  751. static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
  752. {
  753. if (qp->s_last_psn != psn) {
  754. qp->s_last_psn = psn;
  755. if (qp->s_wait_credit) {
  756. qp->s_wait_credit = 0;
  757. tasklet_hi_schedule(&qp->s_task);
  758. }
  759. }
  760. }
  761. /**
  762. * do_rc_ack - process an incoming RC ACK
  763. * @qp: the QP the ACK came in on
  764. * @psn: the packet sequence number of the ACK
  765. * @opcode: the opcode of the request that resulted in the ACK
  766. *
  767. * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
  768. * for the given QP.
  769. * Called at interrupt level with the QP s_lock held and interrupts disabled.
  770. * Returns 1 if OK, 0 if current operation should be aborted (NAK).
  771. */
  772. static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,
  773. u64 val)
  774. {
  775. struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
  776. struct ib_wc wc;
  777. enum ib_wc_status status;
  778. struct ipath_swqe *wqe;
  779. int ret = 0;
  780. u32 ack_psn;
  781. int diff;
  782. /*
  783. * Remove the QP from the timeout queue (or RNR timeout queue).
  784. * If ipath_ib_timer() has already removed it,
  785. * it's OK since we hold the QP s_lock and ipath_restart_rc()
  786. * just won't find anything to restart if we ACK everything.
  787. */
  788. spin_lock(&dev->pending_lock);
  789. if (!list_empty(&qp->timerwait))
  790. list_del_init(&qp->timerwait);
  791. spin_unlock(&dev->pending_lock);
  792. /*
  793. * Note that NAKs implicitly ACK outstanding SEND and RDMA write
  794. * requests and implicitly NAK RDMA read and atomic requests issued
  795. * before the NAK'ed request. The MSN won't include the NAK'ed
  796. * request but will include an ACK'ed request(s).
  797. */
  798. ack_psn = psn;
  799. if (aeth >> 29)
  800. ack_psn--;
  801. wqe = get_swqe_ptr(qp, qp->s_last);
  802. /*
  803. * The MSN might be for a later WQE than the PSN indicates so
  804. * only complete WQEs that the PSN finishes.
  805. */
  806. while ((diff = ipath_cmp24(ack_psn, wqe->lpsn)) >= 0) {
  807. /*
  808. * RDMA_READ_RESPONSE_ONLY is a special case since
  809. * we want to generate completion events for everything
  810. * before the RDMA read, copy the data, then generate
  811. * the completion for the read.
  812. */
  813. if (wqe->wr.opcode == IB_WR_RDMA_READ &&
  814. opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
  815. diff == 0) {
  816. ret = 1;
  817. goto bail;
  818. }
  819. /*
  820. * If this request is a RDMA read or atomic, and the ACK is
  821. * for a later operation, this ACK NAKs the RDMA read or
  822. * atomic. In other words, only a RDMA_READ_LAST or ONLY
  823. * can ACK a RDMA read and likewise for atomic ops. Note
  824. * that the NAK case can only happen if relaxed ordering is
  825. * used and requests are sent after an RDMA read or atomic
  826. * is sent but before the response is received.
  827. */
  828. if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
  829. (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
  830. ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  831. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
  832. (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
  833. /*
  834. * The last valid PSN seen is the previous
  835. * request's.
  836. */
  837. update_last_psn(qp, wqe->psn - 1);
  838. /* Retry this request. */
  839. ipath_restart_rc(qp, wqe->psn);
  840. /*
  841. * No need to process the ACK/NAK since we are
  842. * restarting an earlier request.
  843. */
  844. goto bail;
  845. }
  846. if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  847. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
  848. *(u64 *) wqe->sg_list[0].vaddr = val;
  849. if (qp->s_num_rd_atomic &&
  850. (wqe->wr.opcode == IB_WR_RDMA_READ ||
  851. wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
  852. wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
  853. qp->s_num_rd_atomic--;
  854. /* Restart sending task if fence is complete */
  855. if ((qp->s_flags & IPATH_S_FENCE_PENDING) &&
  856. !qp->s_num_rd_atomic) {
  857. qp->s_flags &= ~IPATH_S_FENCE_PENDING;
  858. tasklet_hi_schedule(&qp->s_task);
  859. } else if (qp->s_flags & IPATH_S_RDMAR_PENDING) {
  860. qp->s_flags &= ~IPATH_S_RDMAR_PENDING;
  861. tasklet_hi_schedule(&qp->s_task);
  862. }
  863. }
  864. /* Post a send completion queue entry if requested. */
  865. if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
  866. (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
  867. memset(&wc, 0, sizeof wc);
  868. wc.wr_id = wqe->wr.wr_id;
  869. wc.status = IB_WC_SUCCESS;
  870. wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
  871. wc.byte_len = wqe->length;
  872. wc.qp = &qp->ibqp;
  873. wc.src_qp = qp->remote_qpn;
  874. wc.slid = qp->remote_ah_attr.dlid;
  875. wc.sl = qp->remote_ah_attr.sl;
  876. ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
  877. }
  878. qp->s_retry = qp->s_retry_cnt;
  879. /*
  880. * If we are completing a request which is in the process of
  881. * being resent, we can stop resending it since we know the
  882. * responder has already seen it.
  883. */
  884. if (qp->s_last == qp->s_cur) {
  885. if (++qp->s_cur >= qp->s_size)
  886. qp->s_cur = 0;
  887. qp->s_last = qp->s_cur;
  888. if (qp->s_last == qp->s_tail)
  889. break;
  890. wqe = get_swqe_ptr(qp, qp->s_cur);
  891. qp->s_state = OP(SEND_LAST);
  892. qp->s_psn = wqe->psn;
  893. } else {
  894. if (++qp->s_last >= qp->s_size)
  895. qp->s_last = 0;
  896. if (qp->s_last == qp->s_tail)
  897. break;
  898. wqe = get_swqe_ptr(qp, qp->s_last);
  899. }
  900. }
  901. switch (aeth >> 29) {
  902. case 0: /* ACK */
  903. dev->n_rc_acks++;
  904. /* If this is a partial ACK, reset the retransmit timer. */
  905. if (qp->s_last != qp->s_tail) {
  906. spin_lock(&dev->pending_lock);
  907. if (list_empty(&qp->timerwait))
  908. list_add_tail(&qp->timerwait,
  909. &dev->pending[dev->pending_index]);
  910. spin_unlock(&dev->pending_lock);
  911. /*
  912. * If we get a partial ACK for a resent operation,
  913. * we can stop resending the earlier packets and
  914. * continue with the next packet the receiver wants.
  915. */
  916. if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  917. reset_psn(qp, psn + 1);
  918. tasklet_hi_schedule(&qp->s_task);
  919. }
  920. } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
  921. qp->s_state = OP(SEND_LAST);
  922. qp->s_psn = psn + 1;
  923. }
  924. ipath_get_credit(qp, aeth);
  925. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  926. qp->s_retry = qp->s_retry_cnt;
  927. update_last_psn(qp, psn);
  928. ret = 1;
  929. goto bail;
  930. case 1: /* RNR NAK */
  931. dev->n_rnr_naks++;
  932. if (qp->s_last == qp->s_tail)
  933. goto bail;
  934. if (qp->s_rnr_retry == 0) {
  935. status = IB_WC_RNR_RETRY_EXC_ERR;
  936. goto class_b;
  937. }
  938. if (qp->s_rnr_retry_cnt < 7)
  939. qp->s_rnr_retry--;
  940. /* The last valid PSN is the previous PSN. */
  941. update_last_psn(qp, psn - 1);
  942. if (wqe->wr.opcode == IB_WR_RDMA_READ)
  943. dev->n_rc_resends++;
  944. else
  945. dev->n_rc_resends +=
  946. (qp->s_psn - psn) & IPATH_PSN_MASK;
  947. reset_psn(qp, psn);
  948. qp->s_rnr_timeout =
  949. ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
  950. IPATH_AETH_CREDIT_MASK];
  951. ipath_insert_rnr_queue(qp);
  952. goto bail;
  953. case 3: /* NAK */
  954. if (qp->s_last == qp->s_tail)
  955. goto bail;
  956. /* The last valid PSN is the previous PSN. */
  957. update_last_psn(qp, psn - 1);
  958. switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
  959. IPATH_AETH_CREDIT_MASK) {
  960. case 0: /* PSN sequence error */
  961. dev->n_seq_naks++;
  962. /*
  963. * Back up to the responder's expected PSN.
  964. * Note that we might get a NAK in the middle of an
  965. * RDMA READ response which terminates the RDMA
  966. * READ.
  967. */
  968. ipath_restart_rc(qp, psn);
  969. break;
  970. case 1: /* Invalid Request */
  971. status = IB_WC_REM_INV_REQ_ERR;
  972. dev->n_other_naks++;
  973. goto class_b;
  974. case 2: /* Remote Access Error */
  975. status = IB_WC_REM_ACCESS_ERR;
  976. dev->n_other_naks++;
  977. goto class_b;
  978. case 3: /* Remote Operation Error */
  979. status = IB_WC_REM_OP_ERR;
  980. dev->n_other_naks++;
  981. class_b:
  982. ipath_send_complete(qp, wqe, status);
  983. ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  984. break;
  985. default:
  986. /* Ignore other reserved NAK error codes */
  987. goto reserved;
  988. }
  989. qp->s_rnr_retry = qp->s_rnr_retry_cnt;
  990. goto bail;
  991. default: /* 2: reserved */
  992. reserved:
  993. /* Ignore reserved NAK codes. */
  994. goto bail;
  995. }
  996. bail:
  997. return ret;
  998. }
  999. /**
  1000. * ipath_rc_rcv_resp - process an incoming RC response packet
  1001. * @dev: the device this packet came in on
  1002. * @ohdr: the other headers for this packet
  1003. * @data: the packet data
  1004. * @tlen: the packet length
  1005. * @qp: the QP for this packet
  1006. * @opcode: the opcode for this packet
  1007. * @psn: the packet sequence number for this packet
  1008. * @hdrsize: the header length
  1009. * @pmtu: the path MTU
  1010. * @header_in_data: true if part of the header data is in the data buffer
  1011. *
  1012. * This is called from ipath_rc_rcv() to process an incoming RC response
  1013. * packet for the given QP.
  1014. * Called at interrupt level.
  1015. */
  1016. static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
  1017. struct ipath_other_headers *ohdr,
  1018. void *data, u32 tlen,
  1019. struct ipath_qp *qp,
  1020. u32 opcode,
  1021. u32 psn, u32 hdrsize, u32 pmtu,
  1022. int header_in_data)
  1023. {
  1024. struct ipath_swqe *wqe;
  1025. enum ib_wc_status status;
  1026. unsigned long flags;
  1027. int diff;
  1028. u32 pad;
  1029. u32 aeth;
  1030. u64 val;
  1031. spin_lock_irqsave(&qp->s_lock, flags);
  1032. /* Ignore invalid responses. */
  1033. if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
  1034. goto ack_done;
  1035. /* Ignore duplicate responses. */
  1036. diff = ipath_cmp24(psn, qp->s_last_psn);
  1037. if (unlikely(diff <= 0)) {
  1038. /* Update credits for "ghost" ACKs */
  1039. if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
  1040. if (!header_in_data)
  1041. aeth = be32_to_cpu(ohdr->u.aeth);
  1042. else {
  1043. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1044. data += sizeof(__be32);
  1045. }
  1046. if ((aeth >> 29) == 0)
  1047. ipath_get_credit(qp, aeth);
  1048. }
  1049. goto ack_done;
  1050. }
  1051. if (unlikely(qp->s_last == qp->s_tail))
  1052. goto ack_done;
  1053. wqe = get_swqe_ptr(qp, qp->s_last);
  1054. status = IB_WC_SUCCESS;
  1055. switch (opcode) {
  1056. case OP(ACKNOWLEDGE):
  1057. case OP(ATOMIC_ACKNOWLEDGE):
  1058. case OP(RDMA_READ_RESPONSE_FIRST):
  1059. if (!header_in_data)
  1060. aeth = be32_to_cpu(ohdr->u.aeth);
  1061. else {
  1062. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1063. data += sizeof(__be32);
  1064. }
  1065. if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
  1066. if (!header_in_data) {
  1067. __be32 *p = ohdr->u.at.atomic_ack_eth;
  1068. val = ((u64) be32_to_cpu(p[0]) << 32) |
  1069. be32_to_cpu(p[1]);
  1070. } else
  1071. val = be64_to_cpu(((__be64 *) data)[0]);
  1072. } else
  1073. val = 0;
  1074. if (!do_rc_ack(qp, aeth, psn, opcode, val) ||
  1075. opcode != OP(RDMA_READ_RESPONSE_FIRST))
  1076. goto ack_done;
  1077. hdrsize += 4;
  1078. wqe = get_swqe_ptr(qp, qp->s_last);
  1079. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1080. goto ack_op_err;
  1081. /*
  1082. * If this is a response to a resent RDMA read, we
  1083. * have to be careful to copy the data to the right
  1084. * location.
  1085. */
  1086. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1087. wqe, psn, pmtu);
  1088. goto read_middle;
  1089. case OP(RDMA_READ_RESPONSE_MIDDLE):
  1090. /* no AETH, no ACK */
  1091. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1092. dev->n_rdma_seq++;
  1093. ipath_restart_rc(qp, qp->s_last_psn + 1);
  1094. goto ack_done;
  1095. }
  1096. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1097. goto ack_op_err;
  1098. read_middle:
  1099. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1100. goto ack_len_err;
  1101. if (unlikely(pmtu >= qp->s_rdma_read_len))
  1102. goto ack_len_err;
  1103. /* We got a response so update the timeout. */
  1104. spin_lock(&dev->pending_lock);
  1105. if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
  1106. list_move_tail(&qp->timerwait,
  1107. &dev->pending[dev->pending_index]);
  1108. spin_unlock(&dev->pending_lock);
  1109. if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
  1110. qp->s_retry = qp->s_retry_cnt;
  1111. /*
  1112. * Update the RDMA receive state but do the copy w/o
  1113. * holding the locks and blocking interrupts.
  1114. */
  1115. qp->s_rdma_read_len -= pmtu;
  1116. update_last_psn(qp, psn);
  1117. spin_unlock_irqrestore(&qp->s_lock, flags);
  1118. ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
  1119. goto bail;
  1120. case OP(RDMA_READ_RESPONSE_ONLY):
  1121. if (!header_in_data)
  1122. aeth = be32_to_cpu(ohdr->u.aeth);
  1123. else
  1124. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1125. if (!do_rc_ack(qp, aeth, psn, opcode, 0))
  1126. goto ack_done;
  1127. /* Get the number of bytes the message was padded by. */
  1128. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1129. /*
  1130. * Check that the data size is >= 0 && <= pmtu.
  1131. * Remember to account for the AETH header (4) and
  1132. * ICRC (4).
  1133. */
  1134. if (unlikely(tlen < (hdrsize + pad + 8)))
  1135. goto ack_len_err;
  1136. /*
  1137. * If this is a response to a resent RDMA read, we
  1138. * have to be careful to copy the data to the right
  1139. * location.
  1140. */
  1141. wqe = get_swqe_ptr(qp, qp->s_last);
  1142. qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
  1143. wqe, psn, pmtu);
  1144. goto read_last;
  1145. case OP(RDMA_READ_RESPONSE_LAST):
  1146. /* ACKs READ req. */
  1147. if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
  1148. dev->n_rdma_seq++;
  1149. ipath_restart_rc(qp, qp->s_last_psn + 1);
  1150. goto ack_done;
  1151. }
  1152. if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
  1153. goto ack_op_err;
  1154. /* Get the number of bytes the message was padded by. */
  1155. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1156. /*
  1157. * Check that the data size is >= 1 && <= pmtu.
  1158. * Remember to account for the AETH header (4) and
  1159. * ICRC (4).
  1160. */
  1161. if (unlikely(tlen <= (hdrsize + pad + 8)))
  1162. goto ack_len_err;
  1163. read_last:
  1164. tlen -= hdrsize + pad + 8;
  1165. if (unlikely(tlen != qp->s_rdma_read_len))
  1166. goto ack_len_err;
  1167. if (!header_in_data)
  1168. aeth = be32_to_cpu(ohdr->u.aeth);
  1169. else {
  1170. aeth = be32_to_cpu(((__be32 *) data)[0]);
  1171. data += sizeof(__be32);
  1172. }
  1173. ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
  1174. (void) do_rc_ack(qp, aeth, psn,
  1175. OP(RDMA_READ_RESPONSE_LAST), 0);
  1176. goto ack_done;
  1177. }
  1178. ack_op_err:
  1179. status = IB_WC_LOC_QP_OP_ERR;
  1180. goto ack_err;
  1181. ack_len_err:
  1182. status = IB_WC_LOC_LEN_ERR;
  1183. ack_err:
  1184. ipath_send_complete(qp, wqe, status);
  1185. ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
  1186. ack_done:
  1187. spin_unlock_irqrestore(&qp->s_lock, flags);
  1188. bail:
  1189. return;
  1190. }
  1191. /**
  1192. * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
  1193. * @dev: the device this packet came in on
  1194. * @ohdr: the other headers for this packet
  1195. * @data: the packet data
  1196. * @qp: the QP for this packet
  1197. * @opcode: the opcode for this packet
  1198. * @psn: the packet sequence number for this packet
  1199. * @diff: the difference between the PSN and the expected PSN
  1200. * @header_in_data: true if part of the header data is in the data buffer
  1201. *
  1202. * This is called from ipath_rc_rcv() to process an unexpected
  1203. * incoming RC packet for the given QP.
  1204. * Called at interrupt level.
  1205. * Return 1 if no more processing is needed; otherwise return 0 to
  1206. * schedule a response to be sent.
  1207. */
  1208. static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
  1209. struct ipath_other_headers *ohdr,
  1210. void *data,
  1211. struct ipath_qp *qp,
  1212. u32 opcode,
  1213. u32 psn,
  1214. int diff,
  1215. int header_in_data)
  1216. {
  1217. struct ipath_ack_entry *e;
  1218. u8 i, prev;
  1219. int old_req;
  1220. unsigned long flags;
  1221. if (diff > 0) {
  1222. /*
  1223. * Packet sequence error.
  1224. * A NAK will ACK earlier sends and RDMA writes.
  1225. * Don't queue the NAK if we already sent one.
  1226. */
  1227. if (!qp->r_nak_state) {
  1228. qp->r_nak_state = IB_NAK_PSN_ERROR;
  1229. /* Use the expected PSN. */
  1230. qp->r_ack_psn = qp->r_psn;
  1231. goto send_ack;
  1232. }
  1233. goto done;
  1234. }
  1235. /*
  1236. * Handle a duplicate request. Don't re-execute SEND, RDMA
  1237. * write or atomic op. Don't NAK errors, just silently drop
  1238. * the duplicate request. Note that r_sge, r_len, and
  1239. * r_rcv_len may be in use so don't modify them.
  1240. *
  1241. * We are supposed to ACK the earliest duplicate PSN but we
  1242. * can coalesce an outstanding duplicate ACK. We have to
  1243. * send the earliest so that RDMA reads can be restarted at
  1244. * the requester's expected PSN.
  1245. *
  1246. * First, find where this duplicate PSN falls within the
  1247. * ACKs previously sent.
  1248. */
  1249. psn &= IPATH_PSN_MASK;
  1250. e = NULL;
  1251. old_req = 1;
  1252. spin_lock_irqsave(&qp->s_lock, flags);
  1253. for (i = qp->r_head_ack_queue; ; i = prev) {
  1254. if (i == qp->s_tail_ack_queue)
  1255. old_req = 0;
  1256. if (i)
  1257. prev = i - 1;
  1258. else
  1259. prev = IPATH_MAX_RDMA_ATOMIC;
  1260. if (prev == qp->r_head_ack_queue) {
  1261. e = NULL;
  1262. break;
  1263. }
  1264. e = &qp->s_ack_queue[prev];
  1265. if (!e->opcode) {
  1266. e = NULL;
  1267. break;
  1268. }
  1269. if (ipath_cmp24(psn, e->psn) >= 0) {
  1270. if (prev == qp->s_tail_ack_queue)
  1271. old_req = 0;
  1272. break;
  1273. }
  1274. }
  1275. switch (opcode) {
  1276. case OP(RDMA_READ_REQUEST): {
  1277. struct ib_reth *reth;
  1278. u32 offset;
  1279. u32 len;
  1280. /*
  1281. * If we didn't find the RDMA read request in the ack queue,
  1282. * or the send tasklet is already backed up to send an
  1283. * earlier entry, we can ignore this request.
  1284. */
  1285. if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
  1286. goto unlock_done;
  1287. /* RETH comes after BTH */
  1288. if (!header_in_data)
  1289. reth = &ohdr->u.rc.reth;
  1290. else {
  1291. reth = (struct ib_reth *)data;
  1292. data += sizeof(*reth);
  1293. }
  1294. /*
  1295. * Address range must be a subset of the original
  1296. * request and start on pmtu boundaries.
  1297. * We reuse the old ack_queue slot since the requester
  1298. * should not back up and request an earlier PSN for the
  1299. * same request.
  1300. */
  1301. offset = ((psn - e->psn) & IPATH_PSN_MASK) *
  1302. ib_mtu_enum_to_int(qp->path_mtu);
  1303. len = be32_to_cpu(reth->length);
  1304. if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
  1305. goto unlock_done;
  1306. if (len != 0) {
  1307. u32 rkey = be32_to_cpu(reth->rkey);
  1308. u64 vaddr = be64_to_cpu(reth->vaddr);
  1309. int ok;
  1310. ok = ipath_rkey_ok(qp, &e->rdma_sge,
  1311. len, vaddr, rkey,
  1312. IB_ACCESS_REMOTE_READ);
  1313. if (unlikely(!ok))
  1314. goto unlock_done;
  1315. } else {
  1316. e->rdma_sge.sg_list = NULL;
  1317. e->rdma_sge.num_sge = 0;
  1318. e->rdma_sge.sge.mr = NULL;
  1319. e->rdma_sge.sge.vaddr = NULL;
  1320. e->rdma_sge.sge.length = 0;
  1321. e->rdma_sge.sge.sge_length = 0;
  1322. }
  1323. e->psn = psn;
  1324. qp->s_ack_state = OP(ACKNOWLEDGE);
  1325. qp->s_tail_ack_queue = prev;
  1326. break;
  1327. }
  1328. case OP(COMPARE_SWAP):
  1329. case OP(FETCH_ADD): {
  1330. /*
  1331. * If we didn't find the atomic request in the ack queue
  1332. * or the send tasklet is already backed up to send an
  1333. * earlier entry, we can ignore this request.
  1334. */
  1335. if (!e || e->opcode != (u8) opcode || old_req)
  1336. goto unlock_done;
  1337. qp->s_ack_state = OP(ACKNOWLEDGE);
  1338. qp->s_tail_ack_queue = prev;
  1339. break;
  1340. }
  1341. default:
  1342. if (old_req)
  1343. goto unlock_done;
  1344. /*
  1345. * Resend the most recent ACK if this request is
  1346. * after all the previous RDMA reads and atomics.
  1347. */
  1348. if (i == qp->r_head_ack_queue) {
  1349. spin_unlock_irqrestore(&qp->s_lock, flags);
  1350. qp->r_nak_state = 0;
  1351. qp->r_ack_psn = qp->r_psn - 1;
  1352. goto send_ack;
  1353. }
  1354. /*
  1355. * Try to send a simple ACK to work around a Mellanox bug
  1356. * which doesn't accept a RDMA read response or atomic
  1357. * response as an ACK for earlier SENDs or RDMA writes.
  1358. */
  1359. if (qp->r_head_ack_queue == qp->s_tail_ack_queue &&
  1360. !(qp->s_flags & IPATH_S_ACK_PENDING) &&
  1361. qp->s_ack_state == OP(ACKNOWLEDGE)) {
  1362. spin_unlock_irqrestore(&qp->s_lock, flags);
  1363. qp->r_nak_state = 0;
  1364. qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
  1365. goto send_ack;
  1366. }
  1367. /*
  1368. * Resend the RDMA read or atomic op which
  1369. * ACKs this duplicate request.
  1370. */
  1371. qp->s_ack_state = OP(ACKNOWLEDGE);
  1372. qp->s_tail_ack_queue = i;
  1373. break;
  1374. }
  1375. qp->r_nak_state = 0;
  1376. tasklet_hi_schedule(&qp->s_task);
  1377. unlock_done:
  1378. spin_unlock_irqrestore(&qp->s_lock, flags);
  1379. done:
  1380. return 1;
  1381. send_ack:
  1382. return 0;
  1383. }
  1384. void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
  1385. {
  1386. unsigned long flags;
  1387. int lastwqe;
  1388. spin_lock_irqsave(&qp->s_lock, flags);
  1389. lastwqe = ipath_error_qp(qp, err);
  1390. spin_unlock_irqrestore(&qp->s_lock, flags);
  1391. if (lastwqe) {
  1392. struct ib_event ev;
  1393. ev.device = qp->ibqp.device;
  1394. ev.element.qp = &qp->ibqp;
  1395. ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
  1396. qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
  1397. }
  1398. }
  1399. static inline void ipath_update_ack_queue(struct ipath_qp *qp, unsigned n)
  1400. {
  1401. unsigned long flags;
  1402. unsigned next;
  1403. next = n + 1;
  1404. if (next > IPATH_MAX_RDMA_ATOMIC)
  1405. next = 0;
  1406. spin_lock_irqsave(&qp->s_lock, flags);
  1407. if (n == qp->s_tail_ack_queue) {
  1408. qp->s_tail_ack_queue = next;
  1409. qp->s_ack_state = OP(ACKNOWLEDGE);
  1410. }
  1411. spin_unlock_irqrestore(&qp->s_lock, flags);
  1412. }
  1413. /**
  1414. * ipath_rc_rcv - process an incoming RC packet
  1415. * @dev: the device this packet came in on
  1416. * @hdr: the header of this packet
  1417. * @has_grh: true if the header has a GRH
  1418. * @data: the packet data
  1419. * @tlen: the packet length
  1420. * @qp: the QP for this packet
  1421. *
  1422. * This is called from ipath_qp_rcv() to process an incoming RC packet
  1423. * for the given QP.
  1424. * Called at interrupt level.
  1425. */
  1426. void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
  1427. int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
  1428. {
  1429. struct ipath_other_headers *ohdr;
  1430. u32 opcode;
  1431. u32 hdrsize;
  1432. u32 psn;
  1433. u32 pad;
  1434. struct ib_wc wc;
  1435. u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
  1436. int diff;
  1437. struct ib_reth *reth;
  1438. int header_in_data;
  1439. /* Validate the SLID. See Ch. 9.6.1.5 */
  1440. if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
  1441. goto done;
  1442. /* Check for GRH */
  1443. if (!has_grh) {
  1444. ohdr = &hdr->u.oth;
  1445. hdrsize = 8 + 12; /* LRH + BTH */
  1446. psn = be32_to_cpu(ohdr->bth[2]);
  1447. header_in_data = 0;
  1448. } else {
  1449. ohdr = &hdr->u.l.oth;
  1450. hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
  1451. /*
  1452. * The header with GRH is 60 bytes and the core driver sets
  1453. * the eager header buffer size to 56 bytes so the last 4
  1454. * bytes of the BTH header (PSN) is in the data buffer.
  1455. */
  1456. header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
  1457. if (header_in_data) {
  1458. psn = be32_to_cpu(((__be32 *) data)[0]);
  1459. data += sizeof(__be32);
  1460. } else
  1461. psn = be32_to_cpu(ohdr->bth[2]);
  1462. }
  1463. /*
  1464. * Process responses (ACKs) before anything else. Note that the
  1465. * packet sequence number will be for something in the send work
  1466. * queue rather than the expected receive packet sequence number.
  1467. * In other words, this QP is the requester.
  1468. */
  1469. opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
  1470. if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
  1471. opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
  1472. ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
  1473. hdrsize, pmtu, header_in_data);
  1474. goto done;
  1475. }
  1476. /* Compute 24 bits worth of difference. */
  1477. diff = ipath_cmp24(psn, qp->r_psn);
  1478. if (unlikely(diff)) {
  1479. if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
  1480. psn, diff, header_in_data))
  1481. goto done;
  1482. goto send_ack;
  1483. }
  1484. /* Check for opcode sequence errors. */
  1485. switch (qp->r_state) {
  1486. case OP(SEND_FIRST):
  1487. case OP(SEND_MIDDLE):
  1488. if (opcode == OP(SEND_MIDDLE) ||
  1489. opcode == OP(SEND_LAST) ||
  1490. opcode == OP(SEND_LAST_WITH_IMMEDIATE))
  1491. break;
  1492. goto nack_inv;
  1493. case OP(RDMA_WRITE_FIRST):
  1494. case OP(RDMA_WRITE_MIDDLE):
  1495. if (opcode == OP(RDMA_WRITE_MIDDLE) ||
  1496. opcode == OP(RDMA_WRITE_LAST) ||
  1497. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1498. break;
  1499. goto nack_inv;
  1500. default:
  1501. if (opcode == OP(SEND_MIDDLE) ||
  1502. opcode == OP(SEND_LAST) ||
  1503. opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
  1504. opcode == OP(RDMA_WRITE_MIDDLE) ||
  1505. opcode == OP(RDMA_WRITE_LAST) ||
  1506. opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
  1507. goto nack_inv;
  1508. /*
  1509. * Note that it is up to the requester to not send a new
  1510. * RDMA read or atomic operation before receiving an ACK
  1511. * for the previous operation.
  1512. */
  1513. break;
  1514. }
  1515. memset(&wc, 0, sizeof wc);
  1516. /* OK, process the packet. */
  1517. switch (opcode) {
  1518. case OP(SEND_FIRST):
  1519. if (!ipath_get_rwqe(qp, 0))
  1520. goto rnr_nak;
  1521. qp->r_rcv_len = 0;
  1522. /* FALLTHROUGH */
  1523. case OP(SEND_MIDDLE):
  1524. case OP(RDMA_WRITE_MIDDLE):
  1525. send_middle:
  1526. /* Check for invalid length PMTU or posted rwqe len. */
  1527. if (unlikely(tlen != (hdrsize + pmtu + 4)))
  1528. goto nack_inv;
  1529. qp->r_rcv_len += pmtu;
  1530. if (unlikely(qp->r_rcv_len > qp->r_len))
  1531. goto nack_inv;
  1532. ipath_copy_sge(&qp->r_sge, data, pmtu);
  1533. break;
  1534. case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
  1535. /* consume RWQE */
  1536. if (!ipath_get_rwqe(qp, 1))
  1537. goto rnr_nak;
  1538. goto send_last_imm;
  1539. case OP(SEND_ONLY):
  1540. case OP(SEND_ONLY_WITH_IMMEDIATE):
  1541. if (!ipath_get_rwqe(qp, 0))
  1542. goto rnr_nak;
  1543. qp->r_rcv_len = 0;
  1544. if (opcode == OP(SEND_ONLY))
  1545. goto send_last;
  1546. /* FALLTHROUGH */
  1547. case OP(SEND_LAST_WITH_IMMEDIATE):
  1548. send_last_imm:
  1549. if (header_in_data) {
  1550. wc.imm_data = *(__be32 *) data;
  1551. data += sizeof(__be32);
  1552. } else {
  1553. /* Immediate data comes after BTH */
  1554. wc.imm_data = ohdr->u.imm_data;
  1555. }
  1556. hdrsize += 4;
  1557. wc.wc_flags = IB_WC_WITH_IMM;
  1558. /* FALLTHROUGH */
  1559. case OP(SEND_LAST):
  1560. case OP(RDMA_WRITE_LAST):
  1561. send_last:
  1562. /* Get the number of bytes the message was padded by. */
  1563. pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
  1564. /* Check for invalid length. */
  1565. /* XXX LAST len should be >= 1 */
  1566. if (unlikely(tlen < (hdrsize + pad + 4)))
  1567. goto nack_inv;
  1568. /* Don't count the CRC. */
  1569. tlen -= (hdrsize + pad + 4);
  1570. wc.byte_len = tlen + qp->r_rcv_len;
  1571. if (unlikely(wc.byte_len > qp->r_len))
  1572. goto nack_inv;
  1573. ipath_copy_sge(&qp->r_sge, data, tlen);
  1574. qp->r_msn++;
  1575. if (!qp->r_wrid_valid)
  1576. break;
  1577. qp->r_wrid_valid = 0;
  1578. wc.wr_id = qp->r_wr_id;
  1579. wc.status = IB_WC_SUCCESS;
  1580. if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
  1581. opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
  1582. wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
  1583. else
  1584. wc.opcode = IB_WC_RECV;
  1585. wc.qp = &qp->ibqp;
  1586. wc.src_qp = qp->remote_qpn;
  1587. wc.slid = qp->remote_ah_attr.dlid;
  1588. wc.sl = qp->remote_ah_attr.sl;
  1589. /* Signal completion event if the solicited bit is set. */
  1590. ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
  1591. (ohdr->bth[0] &
  1592. __constant_cpu_to_be32(1 << 23)) != 0);
  1593. break;
  1594. case OP(RDMA_WRITE_FIRST):
  1595. case OP(RDMA_WRITE_ONLY):
  1596. case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
  1597. if (unlikely(!(qp->qp_access_flags &
  1598. IB_ACCESS_REMOTE_WRITE)))
  1599. goto nack_inv;
  1600. /* consume RWQE */
  1601. /* RETH comes after BTH */
  1602. if (!header_in_data)
  1603. reth = &ohdr->u.rc.reth;
  1604. else {
  1605. reth = (struct ib_reth *)data;
  1606. data += sizeof(*reth);
  1607. }
  1608. hdrsize += sizeof(*reth);
  1609. qp->r_len = be32_to_cpu(reth->length);
  1610. qp->r_rcv_len = 0;
  1611. if (qp->r_len != 0) {
  1612. u32 rkey = be32_to_cpu(reth->rkey);
  1613. u64 vaddr = be64_to_cpu(reth->vaddr);
  1614. int ok;
  1615. /* Check rkey & NAK */
  1616. ok = ipath_rkey_ok(qp, &qp->r_sge,
  1617. qp->r_len, vaddr, rkey,
  1618. IB_ACCESS_REMOTE_WRITE);
  1619. if (unlikely(!ok))
  1620. goto nack_acc;
  1621. } else {
  1622. qp->r_sge.sg_list = NULL;
  1623. qp->r_sge.sge.mr = NULL;
  1624. qp->r_sge.sge.vaddr = NULL;
  1625. qp->r_sge.sge.length = 0;
  1626. qp->r_sge.sge.sge_length = 0;
  1627. }
  1628. if (opcode == OP(RDMA_WRITE_FIRST))
  1629. goto send_middle;
  1630. else if (opcode == OP(RDMA_WRITE_ONLY))
  1631. goto send_last;
  1632. if (!ipath_get_rwqe(qp, 1))
  1633. goto rnr_nak;
  1634. goto send_last_imm;
  1635. case OP(RDMA_READ_REQUEST): {
  1636. struct ipath_ack_entry *e;
  1637. u32 len;
  1638. u8 next;
  1639. if (unlikely(!(qp->qp_access_flags &
  1640. IB_ACCESS_REMOTE_READ)))
  1641. goto nack_inv;
  1642. next = qp->r_head_ack_queue + 1;
  1643. if (next > IPATH_MAX_RDMA_ATOMIC)
  1644. next = 0;
  1645. if (unlikely(next == qp->s_tail_ack_queue)) {
  1646. if (!qp->s_ack_queue[next].sent)
  1647. goto nack_inv;
  1648. ipath_update_ack_queue(qp, next);
  1649. }
  1650. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1651. /* RETH comes after BTH */
  1652. if (!header_in_data)
  1653. reth = &ohdr->u.rc.reth;
  1654. else {
  1655. reth = (struct ib_reth *)data;
  1656. data += sizeof(*reth);
  1657. }
  1658. len = be32_to_cpu(reth->length);
  1659. if (len) {
  1660. u32 rkey = be32_to_cpu(reth->rkey);
  1661. u64 vaddr = be64_to_cpu(reth->vaddr);
  1662. int ok;
  1663. /* Check rkey & NAK */
  1664. ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
  1665. rkey, IB_ACCESS_REMOTE_READ);
  1666. if (unlikely(!ok))
  1667. goto nack_acc;
  1668. /*
  1669. * Update the next expected PSN. We add 1 later
  1670. * below, so only add the remainder here.
  1671. */
  1672. if (len > pmtu)
  1673. qp->r_psn += (len - 1) / pmtu;
  1674. } else {
  1675. e->rdma_sge.sg_list = NULL;
  1676. e->rdma_sge.num_sge = 0;
  1677. e->rdma_sge.sge.mr = NULL;
  1678. e->rdma_sge.sge.vaddr = NULL;
  1679. e->rdma_sge.sge.length = 0;
  1680. e->rdma_sge.sge.sge_length = 0;
  1681. }
  1682. e->opcode = opcode;
  1683. e->sent = 0;
  1684. e->psn = psn;
  1685. /*
  1686. * We need to increment the MSN here instead of when we
  1687. * finish sending the result since a duplicate request would
  1688. * increment it more than once.
  1689. */
  1690. qp->r_msn++;
  1691. qp->r_psn++;
  1692. qp->r_state = opcode;
  1693. qp->r_nak_state = 0;
  1694. barrier();
  1695. qp->r_head_ack_queue = next;
  1696. /* Call ipath_do_rc_send() in another thread. */
  1697. tasklet_hi_schedule(&qp->s_task);
  1698. goto done;
  1699. }
  1700. case OP(COMPARE_SWAP):
  1701. case OP(FETCH_ADD): {
  1702. struct ib_atomic_eth *ateth;
  1703. struct ipath_ack_entry *e;
  1704. u64 vaddr;
  1705. atomic64_t *maddr;
  1706. u64 sdata;
  1707. u32 rkey;
  1708. u8 next;
  1709. if (unlikely(!(qp->qp_access_flags &
  1710. IB_ACCESS_REMOTE_ATOMIC)))
  1711. goto nack_inv;
  1712. next = qp->r_head_ack_queue + 1;
  1713. if (next > IPATH_MAX_RDMA_ATOMIC)
  1714. next = 0;
  1715. if (unlikely(next == qp->s_tail_ack_queue)) {
  1716. if (!qp->s_ack_queue[next].sent)
  1717. goto nack_inv;
  1718. ipath_update_ack_queue(qp, next);
  1719. }
  1720. if (!header_in_data)
  1721. ateth = &ohdr->u.atomic_eth;
  1722. else
  1723. ateth = (struct ib_atomic_eth *)data;
  1724. vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
  1725. be32_to_cpu(ateth->vaddr[1]);
  1726. if (unlikely(vaddr & (sizeof(u64) - 1)))
  1727. goto nack_inv;
  1728. rkey = be32_to_cpu(ateth->rkey);
  1729. /* Check rkey & NAK */
  1730. if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
  1731. sizeof(u64), vaddr, rkey,
  1732. IB_ACCESS_REMOTE_ATOMIC)))
  1733. goto nack_acc;
  1734. /* Perform atomic OP and save result. */
  1735. maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
  1736. sdata = be64_to_cpu(ateth->swap_data);
  1737. e = &qp->s_ack_queue[qp->r_head_ack_queue];
  1738. e->atomic_data = (opcode == OP(FETCH_ADD)) ?
  1739. (u64) atomic64_add_return(sdata, maddr) - sdata :
  1740. (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
  1741. be64_to_cpu(ateth->compare_data),
  1742. sdata);
  1743. e->opcode = opcode;
  1744. e->sent = 0;
  1745. e->psn = psn & IPATH_PSN_MASK;
  1746. qp->r_msn++;
  1747. qp->r_psn++;
  1748. qp->r_state = opcode;
  1749. qp->r_nak_state = 0;
  1750. barrier();
  1751. qp->r_head_ack_queue = next;
  1752. /* Call ipath_do_rc_send() in another thread. */
  1753. tasklet_hi_schedule(&qp->s_task);
  1754. goto done;
  1755. }
  1756. default:
  1757. /* NAK unknown opcodes. */
  1758. goto nack_inv;
  1759. }
  1760. qp->r_psn++;
  1761. qp->r_state = opcode;
  1762. qp->r_ack_psn = psn;
  1763. qp->r_nak_state = 0;
  1764. /* Send an ACK if requested or required. */
  1765. if (psn & (1 << 31))
  1766. goto send_ack;
  1767. goto done;
  1768. rnr_nak:
  1769. qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
  1770. qp->r_ack_psn = qp->r_psn;
  1771. goto send_ack;
  1772. nack_inv:
  1773. ipath_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
  1774. qp->r_nak_state = IB_NAK_INVALID_REQUEST;
  1775. qp->r_ack_psn = qp->r_psn;
  1776. goto send_ack;
  1777. nack_acc:
  1778. ipath_rc_error(qp, IB_WC_LOC_PROT_ERR);
  1779. qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
  1780. qp->r_ack_psn = qp->r_psn;
  1781. send_ack:
  1782. send_rc_ack(qp);
  1783. done:
  1784. return;
  1785. }